Mesa (master): 26 new commits

2020-07-23 Thread GitLab Mirror
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=14a12b771d0a380defacafe5825362af77ff21bd
Author: Jason Ekstrand 
Date:   Fri May 29 16:45:21 2020 -0500

spirv: Rework our handling of images and samplers

Previously, objects of type OpTypeImage or OpTypeSampler were treated as
vtn_pointers and objects of type OpTypeSampledImage were a special-use
vtn_sampled_image struct.  This commit changes that so that all of those
objects are stored in vtn_ssa_values.  Each of images, samplers, and
sampled images, are stored as a scalar or vector nir_ssa_def whose
components are NIR deref values.  We now use vtn_type_get_nir_type to
re-resolve those as-needed into GLSL sampler types for NIR.

This simplification has a number of benefits:

 1. We can git rid of the rest of our special-cases for handling images
and samplers in function arguments.  Now that they're treated as
structs at the glsl_type level, the generic paths can handle images
and samplers.

 2. We can now construct composite values containing images and samplers
internally.  It's unclear from the SPIR-V spec whether or not this
is allowed and it's not a pattern that GLSLang currently generates
thanks to GLSL rules.  However, if we do start seeing SPIR-V that
contains such composites, we should now be able to handle it.

 3. SPIR-V OpNull and OpUndef instructions can now create samplers,
images, and sampled images.  The NIR generated won't likely be fully
valid but, given a NIR pass to do something sensible, it should be a
thing we can compile.

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=196db51fc27090012ce6f94bfffc3909f78c44d3
Author: Jason Ekstrand 
Date:   Thu Jun 11 13:29:02 2020 -0500

anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref

We're about to make the SPIR-V -> NIR path generate a bit more complex
SSA chains for certain derefs.  This will ensure we don't regress anyone
when we start making vec2's of derefs.

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=66c8628b65c4239022b799a9ef569d1d44819e9e
Author: Jason Ekstrand 
Date:   Fri May 29 20:48:23 2020 -0500

spirv: More heavily use vtn_ssa_value in function parameter handling

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=32ba23f8977cc16e5f8d3f74482fc5c8419bcbb3
Author: Jason Ekstrand 
Date:   Fri May 29 21:02:31 2020 -0500

spirv: Remove a dead case in function parameter handling

Ever since 31a7476335f911a, we've set something for vtn_type::type for
all pointer types.  For logical pointer types, it's uint32_t.

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e3213ad30fdf121f98dc3e250486c1533047c10
Author: Jason Ekstrand 
Date:   Fri May 29 17:57:34 2020 -0500

spirv: Add a helper for getting the NIR type of a vtn_type

There are a few cases, atomic counters being one example, where the type
used by vtn_ssa_value is not the same as the type we want NIR to use in
derefs and variables.  To solve this, we add a helper which converts
between the types for us.  In the next commit, we'll be adding another
major user of this: images and samplers.

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=051f8d3d1cf1d6eba5775622fddb280ce810daf1
Author: Jason Ekstrand 
Date:   Fri May 29 18:39:30 2020 -0500

spirv: Give atomic counters their own variable mode

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a7932b095307e59e18781a819922f23161a1f5d
Author: Jason Ekstrand 
Date:   Fri May 29 16:36:54 2020 -0500

spirv: Drop the sampled boolean from vtn_type

It was set but never used.  We always check the glsl_type instead.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0be2fed4edaa5f00433f41a0f4c660330348191
Author: Jason Ekstrand 
Date:   Fri May 29 16:10:28 2020 -0500

spirv: Add better checks for SSA value types

Primarily, we check for two things:

 1. That we only ever add SSA values via vtn_push_ssa_value and
vtn_copy_value.

 2. That the type of the SSA value matches the SPIR-V destination type.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

Mesa (master): 26 new commits

2019-09-17 Thread GitLab Mirror
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f55f7b199d135e8e174150eb09099535843adf6a
Author: Samuel Iglesias Gonsálvez 
Date:   Wed Feb 13 13:50:01 2019 +0100

docs/relnotes: add support for VK_KHR_shader_float_controls on Intel

v2:
- Move to 19.2.0 release notes (Andres).

v3:
- Move to 19.3.0 release notes (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5dd6dfe012666123bb59b9a4f8e9afb46d67414
Author: Samuel Iglesias Gonsálvez 
Date:   Thu May 31 11:44:21 2018 +0200

anv: enable VK_KHR_shader_float_controls and SPV_KHR_float_controls

This adds support for
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR and
enables de Vulkan and SPIR-V extensions.

Also, notice that this includes the updates applied to the
VkPhysicalDeviceFloatControlsPropertiesKHR structure in the extension
VK_KHR_shader_float_controls v4 and Vulkan 1.1.116.

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b07020a4f2d6e680c89ef0a97dbb0bb53c5f299
Author: Samuel Iglesias Gonsálvez 
Date:   Mon Nov 19 12:38:10 2018 +0100

i965/fs: add support for shader float control to 
remove_extra_rounding_modes()

The remove_extra_rounding_modes() optimization will remove duplicated
rounding mode changes.

v2:
- Fix bug in the rounding mode change (Alejandro).

v3:
- Fix rounding modes.

v4:
- Updated to renamed shader info member and enum values (Andres).

v5:
- Simplify flags logic operations (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bd88d10d82c15960e3936423c17dd6e0746e9ef
Author: Samuel Iglesias Gonsálvez 
Date:   Wed Feb 13 10:42:05 2019 +0100

i965/fs: set rounding mode when emitting nir_op_f2f32 or nir_op_f2f16

v2:
- Consider nir_op_f2f16 case too (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba1e25e1aa63023040df3345146644b417953826
Author: Samuel Iglesias Gonsálvez 
Date:   Tue Feb 12 16:13:59 2019 +0100

i965/fs: set rounding mode when emitting fadd, fmul and ffma instructions

v2:
- Updated to renamed shader info member (Andres).

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9da56ffc5228ff4578d4a078e456a0bf8588e71c
Author: Samuel Iglesias Gonsálvez 
Date:   Fri Jun 1 12:36:47 2018 +0200

i965/fs: add emit_shader_float_controls_execution_mode() and aux functions

We need this function to emit code that setups the control register
later with the defined execution mode for the shader. Therefore, we
emit it as the first instruction.

v2:
- Fix bug in setting the default mode mask in brw_rnd_mode_from_nir().
- Fix support for rounding modes in brw_rnd_mode_from_nir().

v3:
- Updated to renamed shader info member and enum values (Andres).

v4:
- Add actual emission as first instruction of emit_nir_code (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez 
Signed-off-by: Andres Gomez 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a6507b6fe03c13224d0409df00bdcd210e2a9a4
Author: Samuel Iglesias Gonsálvez 
Date:   Fri Sep 13 01:38:06 2019 +0300

i965/fs/generator: add new opcode to set float controls modes in control 
register

Before this commit, we had only FPRoundingMode decoration (the per
instruction one) that is applied during the SPIR-V handling. In
vtn_alu we find out the rounding mode, and generate the code
accordingly that later will be used to look for the respective
nir_op_f2f16_{rtz,rtne}.

Per-instruction gets prioritized because we make them explicit
conversions (with RTZ or RTNE nir opcodes) and they will override the
default execution mode defined with float controls. However, we need
to come back to the mode defined by float controls after the execution
of the FP Rounding instruction.

Therefore, the new SHADER_OPCODE_FLOAT_CONTROL_MODE opcode will be
used to set the default rounding mode and denorms treatment in the
whole shader while the pre-existent SHADER_OPCODE_RND_MODE, will be
used as prioritized rounding mode in a per-instruction basis.

v2:
- Fix bug in defining BRW_CR0_FP_MODE_MASK.

Mesa (master): 26 new commits

2019-07-09 Thread GitLab Mirror
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b2093961eeb7b9d70573fde33eb8b87d5a6f35f
Author: Marek Olšák 
Date:   Wed Jul 3 22:24:36 2019 -0400

radeonsi/gfx10: enable primitive binning by default

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f68367d19d9c0394bc935493788dcd189e08f49
Author: Marek Olšák 
Date:   Tue Jul 2 22:34:42 2019 -0400

radeonsi/gfx10: implement primitive binning

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e56a2aaa86891873866966f9c4bd016ce907f77
Author: Marek Olšák 
Date:   Wed Jul 3 22:27:12 2019 -0400

radeonsi: simplify primitive binning enablement

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3521297251c071a43c00c6e3ac92d27369072e05
Author: Marek Olšák 
Date:   Wed Jul 3 22:23:18 2019 -0400

radeonsi: set primitive binning tunables for dGPUs

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7e80ba1e7bd8c2826921a8fcdb3d8db7e3141cb
Author: Marek Olšák 
Date:   Wed Jul 3 22:04:30 2019 -0400

radeonsi: set FLUSH_ON_BINNING_TRANSITION when needed

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dbe63ceea3996cca381f59b238a029e0035ab54
Author: Marek Olšák 
Date:   Wed Jul 3 21:57:43 2019 -0400

radeonsi/gfx10: use the new scan converter when binning is disabled

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=80b3f4b4bdd00190158b865eed67ea5f31d2197b
Author: Marek Olšák 
Date:   Tue Jul 2 22:31:14 2019 -0400

radeonsi/gfx9: fix an oversight in primitive binning code

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f53a3e7668bbc249e051bbb51f22bde50ea6e99
Author: Marek Olšák 
Date:   Wed Jul 3 21:12:46 2019 -0400

radeonsi: use BREAK_BATCH instead of FLUSH_DFSM when CB_TARGET_MASK changes

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=605900d7dd03915bd531ea6a34e1eaeaa1804eeb
Author: Marek Olšák 
Date:   Wed Jul 3 00:22:29 2019 -0400

radeonsi/gfx10: don't expose unimplemented PIPE_CAP_QUERY_SO_OVERFLOW

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=270a8ab6481f584be791ee1a827c12a536070d52
Author: Marek Olšák 
Date:   Wed Jul 3 22:56:58 2019 -0400

radeonsi/gfx10: launch 2 compute waves per CU before going onto the next CU

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab1f36a1d3949542c73f8643f4d68a84fd453f83
Author: Marek Olšák 
Date:   Wed Jul 3 23:01:25 2019 -0400

radeonsi/gfx10: set more registers and fields

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b65f6618c920cd33c2707368e0f5a305a7b2131
Author: Marek Olšák 
Date:   Wed Jul 3 00:09:21 2019 -0400

radeonsi/gfx10: enable LATE_ALLOC_GS

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4985c3ee22e291aa57dee66758f874ee95c0426c
Author: Marek Olšák 
Date:   Tue Jul 2 23:35:05 2019 -0400

radeonsi/gfx10: set HS/GS/CS.WGP_MODE

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=329406ec9c0aa8105c5e36281d68b5726c4aab49
Author: Marek Olšák 
Date:   Tue Jul 2 22:48:49 2019 -0400

radeonsi/gfx10: set GE_PC_ALLOC

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d1483de3b89c4b05adb326c6b444ef9ed169243
Author: Marek Olšák 
Date:   Tue Jul 2 21:40:49 2019 -0400

radeonsi/gfx10: enable 1D textures

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d3bffaf9cb7ade0676bab969b5d33d6bdabcec8
Author: Marek Olšák 
Date:   Fri Jun 28 23:48:14 2019 -0400

radeonsi/gfx10: enable image stores with DCC

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b50fb9b7f33a5acb5409b5e363a290ba856d509
Author: Marek Olšák 
Date:   Fri Jun 28 20:31:41 2019 -0400

radeonsi/gfx10: no need to invalidate L2 for framebuffer -> texture 
coherency

Acked-by: Pierre-Eric Pelloux-Prayer 
Acked-by: Dave Airlie 

URL:

Mesa (master): 26 new commits

2018-12-19 Thread GitLab Mirror
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d73a25f2c0ae64e208a1511c785e35f5d74f4cd6
Author: Nicolai Hähnle 
Date:   Thu Sep 20 10:21:26 2018 +0200

radeonsi: const-ify the si_query_ops

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c85b0dea0aebd10968748e14623e5460635a17af
Author: Nicolai Hähnle 
Date:   Tue Sep 18 22:29:41 2018 +0200

radeonsi: split perfcounter queries from si_query_hw

Remove a level of indirection to make the code more explicit -- should
make it easier to follow what's going on.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0f0d3675d462aad4ca30e4383a3530d46e6e85d
Author: Nicolai Hähnle 
Date:   Tue Sep 18 15:52:17 2018 +0200

radeonsi: factor si_query_buffer logic out of si_query_hw

This is a move towards using composition instead of inheritance for
different query types.

This change weakens out-of-memory error reporting somewhat, though this
should be acceptable since we didn't consistently report such errors in
the first place.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fc6e573dddbaaeac517bb8b03c1484a50943cd9
Author: Nicolai Hähnle 
Date:   Tue Sep 18 14:43:09 2018 +0200

radeonsi: move query suspend logic into the top-level si_query struct

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2b9329f17eaf94c0cb6cc9f9bad907500fedeba
Author: Nicolai Hähnle 
Date:   Tue Sep 18 14:16:10 2018 +0200

radeonsi: move remaining perfcounter code into si_perfcounter.c

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7dd289d9e4a141a5af786530a010ac0aecdae8b4
Author: Nicolai Hähnle 
Date:   Fri Sep 21 17:19:34 2018 +0200

radeonsi: track constant buffer bind history in si_pipe_set_constant_buffer

Other callers of si_set_constant_buffer don't need it.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=829d4179145e9e365b8270080510a394a547e92e
Author: Nicolai Hähnle 
Date:   Thu Sep 20 10:47:03 2018 +0200

radeonsi: use si_set_rw_shader_buffer for setting streamout buffers

Reduce the number of places that encode buffer descriptors.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce785f5ffd7dbed14a3909164e55a975a023ee97
Author: Nicolai Hähnle 
Date:   Fri Sep 21 17:35:56 2018 +0200

radeonsi: add an si_set_rw_shader_buffer convenience function

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=556c4c42b76c5bb399d0f3e6cfc2b9f58d4363e4
Author: Nicolai Hähnle 
Date:   Sun Sep 16 15:56:13 2018 +0200

radeonsi: avoid using hard-coded SI_NUM_RW_BUFFERS

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e49d723177a02d8727f44c4d222f774f818d65f
Author: Nicolai Hähnle 
Date:   Fri Aug 31 19:51:50 2018 +0200

radeonsi: show the fixed function TCS in debug dumps

This is rather important for merged VS/TCS as LSHS shaders...

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e67e79de4985b20aa0dfa400fa3e6564326a66e
Author: Nicolai Hähnle 
Date:   Thu Aug 30 17:11:23 2018 +0200

radeonsi: const-ify si_set_tesseval_regs

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c841a1b1e1ab13e56590a08847733326c792f6f
Author: Nicolai Hähnle 
Date:   Mon Jul 2 18:41:06 2018 +0200

radeonsi: rename SI_RESOURCE_FLAG_FORCE_TILING to clarify its purpose

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d58dcc3cff2f491f7c57c5c5c9d4b28e7f842b2
Author: Nicolai Hähnle 
Date:   Fri Sep 21 18:05:19 2018 +0200

radeonsi: don't set RAW_WAIT for CP DMA clears

There is never a read-after-write hazard because the command doesn't read.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=23af72af25b26e290a903611e1aa5b5d1cb10b40
Author: Nicolai Hähnle 
Date:   Fri Jun 29 00:08:26 2018 +0200

radeonsi/gfx9: use SET_UCONFIG_REG_INDEX packets when available

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f18b2ac0db4fe3cd3a49d04c70869e81040291ff
Author: Nicolai Hähnle 
Date:   Thu Nov 16 12:14:51 2017 +0100

radeonsi: add si_init_draw_functions and make some functions static

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=555cb668cc909d5e05a81297aa775b4c346a1832
Author: Nicolai Hähnle 
Date:   Sun Nov 19 17:29:31 2017 +0100

radeonsi: extract declare_vs_blit_inputs

Prepare for some later refactoring.

Reviewed-by: Marek Olšák 

URL:

Mesa (master): 26 new commits

2017-11-01 Thread Jordan Justen
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a61a8b9a7c7cdbb42b74a76c2ec825f7107cc83
Author: Jordan Justen 
Date:   Sat Feb 25 02:30:06 2017 -0800

i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false

(Apologies for the double negative.)

For now, the shader cache is disabled by default on i965 to allow us
to verify its stability.

In other words, to enable the shader cache on i965, set
MESA_GLSL_CACHE_DISABLE to false or 0. If the variable is unset, then
the shader cache will be disabled.

We use the build-id of i965_dri.so for the timestamp, and the pci
device id for the device name.

v2:
 * Simplify code by forcing link to include build id sha. (Matt)

v3:
 * Don't use a for loop with snprintf for bin to hex. (Matt)
 * Assume fixed length render and timestamp string to further simplify
   code.

Cc: Matt Turner 
Signed-off-by: Jordan Justen 
Reviewed-by: Jason Ekstrand 
Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccb700526f647e0d02cb1c500b6aee083ba1b9d7
Author: Jordan Justen 
Date:   Wed Oct 18 15:04:37 2017 -0700

dri drivers: Always add the sha1 build-id

v4:
 * Add Android build changes. (Emil)

Cc: Dylan Baker 
Signed-off-by: Jordan Justen 
Reviewed-by: Jason Ekstrand 
Reviewed-by: Dylan Baker 
Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5b141634cff3aa1f68699f39a2c3794261a32b1
Author: Jordan Justen 
Date:   Fri Oct 13 22:04:52 2017 -0700

disk_cache: Fix issue reading GLSL metadata

This would cause the read of the metadata content to fail, which would
prevent the linking from being skipped.

Seen on Rocket League with i965 shader cache.

Fixes: b86ecea3446e "util/disk_cache: write cache item metadata to disk"
Cc: Timothy Arceri 
Signed-off-by: Jordan Justen 
Reviewed-by: Timothy Arceri 
Reviewed-by: Jason Ekstrand 
Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6ecd7d73fdbbca45ed398185eee2823e381d472
Author: Jordan Justen 
Date:   Tue Mar 28 11:48:55 2017 -0700

glsl/shader_cache: Save fs (BlendSupport) metadata

Fixes many GL 4.5 CTS blend tests, such as:

* GL45-CTS.blend_equation_advanced.extension_directive_enable
* GL45-CTS.blend_equation_advanced.extension_directive_warn
* GL45-CTS.blend_equation_advanced.blend_all.GL_MULTIPLY_KHR_all_qualifier
* GL45-CTS.blend_equation_advanced.blend_specific.GL_COLORBURN_KHR

v2:
 * Directly save the BlendSupport field to avoid potentially including
   a pointer in the future in the structure is updated. (tarceri)

Cc: Timothy Arceri 
Signed-off-by: Jordan Justen 
Reviewed-by: Timothy Arceri 
Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f5204a0dbfc2c3ab240842f06d3afb2e7b9ed2c
Author: Jordan Justen 
Date:   Sat Feb 25 17:36:28 2017 -0800

i965: Initialize sha1 hash of dri config options

Signed-off-by: Jordan Justen 
Reviewed-by: Timothy Arceri 
Reviewed-by: Jason Ekstrand 
Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=478a73fdfaf1fed57bc7f05e672f6728e27ab110
Author: Jordan Justen 
Date:   Sat Feb 25 02:37:57 2017 -0800

i965: Don't link when the program was found in the disk cache

Signed-off-by: Jordan Justen 
Cc: Timothy Arceri 
Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3a8ae105ca4c6abdd967bd569b9605967cfcf25
Author: Jordan Justen 
Date:   Wed Oct 18 19:25:48 2017 -0700

i965: add cache fallback support using serialized nir

If the i965 gen program cannot be loaded from the cache, then we
fallback to using a serialized nir program.

This is based on "i965: add cache fallback support" by Timothy Arceri
. Tim's version was written to fallback
to compiling from source, and therefore had to be much more complex.
After Connor 

Mesa (master): 26 new commits

2017-08-02 Thread Samuel Pitoiset
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd4e817b7f10dadccae3b954b4d4c69248a9
Author: Samuel Pitoiset 
Date:   Thu Jul 27 12:16:44 2017 +0200

mesa: add KHR_no_error support to glPolygonMode()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b603f0985ece4764962480bcaed043b7ac54998
Author: Samuel Pitoiset 
Date:   Thu Jul 27 12:15:04 2017 +0200

mesa: add polygon_mode() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da0ecdae1da7912a5ed4a1c018ed270888d5b1d6
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:28:52 2017 +0200

mesa: add KHR_no_error support to glClearBufferiv()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54bd9a1d6698760e714606b111fe49ddae2f01f1
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:27:23 2017 +0200

mesa: add clear_bufferiv() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11e0542e5ce9a3c7f7eff09987bc6dbeb9eb
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:25:03 2017 +0200

mesa: add KHR_no_error support to glClearBufferuiv()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b18b1fa6bc50a304f213fc007395528ba68c925e
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:23:35 2017 +0200

mesa: add clear_bufferuiv() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73c5e750d799a8b35f282767fe6fa57f32190089
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:21:10 2017 +0200

mesa: add KHR_no_error support to glClearBufferfi()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ed61e0239feb5f08236df9a8e74cd8fb78c13e8
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:19:27 2017 +0200

mesa: add clear_bufferi() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e05e7debcc176c9bae72478552337417dddafd2
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:04:15 2017 +0200

mesa: add KHR_no_error support to glClearBufferfv()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33b47306e48b0e51458a728514fa026377ac7166
Author: Samuel Pitoiset 
Date:   Fri Jul 21 14:02:20 2017 +0200

mesa: add clear_bufferfv() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0127af12812c56b24891cc92e610950b61057771
Author: Samuel Pitoiset 
Date:   Fri Jul 21 12:02:26 2017 +0200

mesa: add KHR_no_error support to glClear*Buffer*Data()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=589450c4a2aec2482136b25fd7be0fa596731da4
Author: Samuel Pitoiset 
Date:   Fri Jul 21 11:51:47 2017 +0200

mesa: add clear_buffer_sub_data_error() helper

And make clear_buffer_sub_data() always inline.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8191213b5572a1e00d6c1da5fcf73aa3b304f02
Author: Samuel Pitoiset 
Date:   Fri Jul 21 11:50:56 2017 +0200

mesa: make get_texbuffer_format() global

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1722c2498ff8c403c1f47a31f0ee2a036310b59b
Author: Samuel Pitoiset 
Date:   Thu Jul 20 11:41:31 2017 +0200

mesa: add 

Mesa (master): 26 new commits

2017-04-05 Thread Nicolai Hähnle
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=570e50af4ba9f7e003465b4e91e2cb93ae1615a1
Author: Nicolai Hähnle 
Date:   Thu Feb 2 21:11:05 2017 +0100

radeonsi: enable ARB_sparse_buffer

v2:
- fill in DRM version requirement
- disable on SI due to CP DMA faults

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aee473eb01abac74d1c10330005ab1378f017ce9
Author: Nicolai Hähnle 
Date:   Fri Mar 24 23:30:55 2017 +0100

radeonsi: disable SDMA clears and copies for sparse buffers

VM faults cannot be disabled for SDMA on <= VI.

We could still use SDMA by asking the winsys about which parts of the
buffers are committed. This is left as a potential future improvement.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a685ce9a7862752ea523fa74310901171da0c47
Author: Nicolai Hähnle 
Date:   Wed Feb 8 11:07:19 2017 +0100

gallium/radeon: implement pipe->resource_commit

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e077c5fe657906f52b23fd99f52e19c8cbab5c67
Author: Nicolai Hähnle 
Date:   Tue Feb 7 18:24:59 2017 +0100

gallium/radeon: transfers and invalidation for sparse buffers

Sparse buffers can never be mapped by the CPU.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5969a373a13bae8e908d26b8f43fd1265bc2e573
Author: Nicolai Hähnle 
Date:   Tue Feb 7 18:03:55 2017 +0100

gallium/radeon: implement sparse buffer creation

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47e59a7e36351de75ed0539e693bbf3727b44084
Author: Nicolai Hähnle 
Date:   Mon Feb 13 12:51:12 2017 +0100

winsys/amdgpu: sparse buffer debugging helpers

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0baee15596d51df5fe0f0edd4b48bd500c26e2cd
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:58:39 2017 +0100

winsys/amdgpu: take fences when freeing a backing buffer

We never add fences to backing buffers during submit. When we free a
backing buffer, it must inherit the sparse buffer's fences, so that it
doesn't get re-used prematurely via the cache.

v2:
- remove pipe_mutex_*

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79dae12b416d3544da6d7b3eb8d43d4a934f93ce
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:11:00 2017 +0100

winsys/amdgpu: add sparse buffers to CS

... and implement the corresponding fence handling.

v2:
- add missing bit in amdgpu_bo_is_referenced_by_cs_with_usage
- remove pipe_mutex_*

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=667da4eaed37de143681711344aba19373bee1d0
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:04:49 2017 +0100

winsys/amdgpu: sparse buffer creation / destruction / commitment

This is the bulk of the buffer allocation logic. It is fairly simple and
stupid. We'll probably want to use e.g. interval trees at some point to
keep track of commitments, but Mesa doesn't have an implementation of those
yet.

v2:
- remove pipe_mutex_*
- fix total_backing_pages accounting
- simplify by using the new VA_OP_CLEAR/REPLACE kernel interface

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3482486473a471b4da80b2db2c7c3f3b6445d02
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:03:59 2017 +0100

winsys/amdgpu: add sparse buffer data structures

v2:
- remove pipe_mutex_*
- use a simple page commitment array

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3e514361c817037e5c26edaf4200a20a3442382
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:53:49 2017 +0100

winsys/amdgpu: extend amdgpu_add_fence to allow adding multiple fences

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae4f442304aee57e23dde7a2f3b70b54c1565966
Author: Nicolai Hähnle 
Date:   Tue Feb 7 17:35:02 2017 +0100

winsys/amdgpu: build handles and flags list late on submit thread

This probably has only minor performance effects, but it simplifies some
subsequent code slightly.

Ideally, it could also be used to simplify the handling of slab 

Mesa (master): 26 new commits

2016-12-20 Thread Axel Davy
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=123e947228241e743a4d0fdb8a911f57a3dd4ef9
Author: Axel Davy 
Date:   Sun Dec 18 19:21:08 2016 +0100

st/nine: Upload on secondary context for Draw*Up

Avoid synchronization by using the secondary context
for uploading the vertex data for Draw*Up.

v2: Rely on u_upload_mgr to use persistent coherent
buffers. Do not flush.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ec4e5f630ed68ece3f176b174cfd66eff023904
Author: Axel Davy 
Date:   Tue Dec 13 01:16:21 2016 +0100

st/nine: Dirty MANAGED buffers at Lock time

Tests suggest MANAGED buffers are made dirty
at Lock time, not at Unlock time.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bad7f7cc638391acc93f070fce3e1b7035dc48f8
Author: Axel Davy 
Date:   Sun Dec 4 20:34:59 2016 +0100

st/nine: Implement new buffer upload path

This new buffer upload path enables to lock
faster than the normal path when using
DISCARD/NOOVERWRITE.

v2: Diverse cleanups and fixes.
v3: Fix allocation size for 'lone' buffers and
add more debug info.
v4: Rewrite of the path to handle when DISCARD/NOOVERWRITE
is not used anymore. The resource content is copied to the
new resource used.
v5: flush for safety after unmap (not sure it is really required
here, but safer to flush).
v6: Do not use the path if persistent coherent mapping is unavailable.
Fix buffer creation flags.
v7: Do not flush since it is not needed.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8960be0e939bc6c0f9f34c5d4a16891af7e325fd
Author: Axel Davy 
Date:   Sun Dec 4 19:23:11 2016 +0100

st/nine: Allow non-zero resource offset for vertex buffers

Next patches will introduce an offset.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e64be6f91652e7e5ba60c86c379ee41bb7e4f81
Author: Axel Davy 
Date:   Sun Dec 4 10:34:34 2016 +0100

st/nine: Do not wait for DEFAULT lock for volumes when we can

If the volumes (and the texture container) are not referenced,
then they are no pending operations on them. We can lock directly.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b4f16615ef6546c6f8eab8a2d2a50cdab1773a91
Author: Axel Davy 
Date:   Sun Dec 4 10:33:19 2016 +0100

st/nine: Do not wait for DEFAULT lock for surfaces when we can

If the surfaces (and the texture container) are not referenced,
then they are no pending operations on them. We can lock directly.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=525a1b292a3d65857db06832e175fba840b75ff8
Author: Axel Davy 
Date:   Sun Dec 4 10:32:01 2016 +0100

st/nine: Add arguments to context's blit and copy_region

The new arguments enable to reference the objects while
the function hasn't run.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=325324c749c2331162e7889efc335bfcfcd27005
Author: Axel Davy 
Date:   Sun Dec 4 01:13:25 2016 +0100

st/nine: Idem for nine_context_gen_mipmap

Will enable to use the bind count as an information for
whether the surface/volume is used in the worker thread.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7089d88199d607d8a135a9605f14ec6393134205
Author: Axel Davy 
Date:   Sun Dec 4 01:10:34 2016 +0100

st/nine: Bind destination for surface/volume uploads

Will enable to use the bind count as an information for
whether the surface/volume is used in the worker thread.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4a9b21feb890c149f0aa44b0bb6ea63a9932925
Author: Axel Davy 
Date:   Sun Dec 4 00:29:16 2016 +0100

st/nine: Use nine_context_box_upload for volumes

Use nine_context_box_upload for uploads:
. systemmem volume to default volume
. managed volume internal content to its resource.

Check the uploads are executed before any action
that can alter the data, that is LockBox and
volume destruction.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f04263923132bcf0425e1297da460543e93a95fe
Author: Axel Davy 
Date:   Mon Dec 5 00:12:52 2016 +0100

st/nine: Fix leak with volume dtor

The last level was not released.

 

Mesa (master): 26 new commits

2016-12-12 Thread Nicolai Hähnle
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec0a0a60cc2773624f6c72b11c4d37519397a59d
Author: Nicolai Hähnle 
Date:   Wed Nov 30 12:26:49 2016 +0100

radeonsi: shrink the GSVS ring to account for the reduced item sizes

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fdef7d26569c1c8bfebcd5d16749ef094b01982
Author: Nicolai Hähnle 
Date:   Wed Nov 30 12:25:45 2016 +0100

radeonsi: shrink each vertex stream to the actually required size

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f2e941e2d9d6155e0661f452343e7a80f2439c4
Author: Nicolai Hähnle 
Date:   Tue Nov 29 17:41:59 2016 +0100

radeonsi: use a single descriptor for the GSVS ring

We can hardcode all of the fields for swizzling in the geometry shader.

The advantage is that we use fewer descriptor slots and we no longer have to
update any of the (ring) descriptors when the geometry shader changes.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=18616e7551fcecb9445597d78446df6e1df98fbb
Author: Nicolai Hähnle 
Date:   Wed Nov 30 11:33:25 2016 +0100

radeonsi: pack GS output components for each vertex stream contiguously

Note that the memory layout of one vertex stream inside one "item" (= memory
written by one GS wave) on the GSVS ring is:

  t0v0c0 ... t15v0c0 t0v1c0 ... t15v1c0 ... t0vLc0 ... t15vLc0
  t0v0c1 ... t15v0c1 t0v1c1 ... t15v1c1 ... t0vLc1 ... t15vLc1
...
  t0v0cL ... t15v0cL t0v1cL ... t15v1cL ... t0vLcL ... t15vLcL
  t16v0c0 ... t31v0c0 t16v1c0 ... t31v1c0 ... t16vLc0 ... t31vLc0
  t16v0c1 ... t31v0c1 t16v1c1 ... t31v1c1 ... t16vLc1 ... t31vLc1
...
  t16v0cL ... t31v0cL t16v1cL ... t31v1cL ... t16vLcL ... t31vLcL

...

  t48v0c0 ... t63v0c0 t48v1c0 ... t63v1c0 ... t48vLc0 ... t63vLc0
  t48v0c1 ... t63v0c1 t48v1c1 ... t63v1c1 ... t48vLc1 ... t63vLc1
...
  t48v0cL ... t63v0cL t48v1cL ... t63v1cL ... t48vLcL ... t63vLcL

where tNN indicates the thread number, vNN the vertex number (in the order 
of
EMIT_VERTEX), and cNN the output component (vL and cL are the last vertex 
and
component, respectively).

The vertex streams are laid out sequentially.

The swizzling by 16 threads is hard-coded in the way the VGT generates the
offset passed into the GS copy shader, and the jump every 16 threads is
calculated from VGT_GSVS_RING_OFFSET_n and VGT_GSVS_RING_ITEMSIZE in a way
that makes it difficult to deviate from this layout (at least that's what
I've experimentally confirmed on VI after first trying to go the simpler
route of just interleaving the vertex streams).

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=edf034ac142f2ae10befdf331b170373ff456495
Author: Nicolai Hähnle 
Date:   Fri Dec 2 21:20:49 2016 +0100

radeonsi: do not write non-existent components through the GSVS ring

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af976f12a56d11face02fe74ef0f112ec26d4c69
Author: Nicolai Hähnle 
Date:   Tue Nov 29 16:27:10 2016 +0100

radeonsi: only write values belonging to the stream when emitting GS vertex

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdf1bf1cb5422a944205ea30b2eb203a73bdd736
Author: Nicolai Hähnle 
Date:   Tue Nov 29 16:25:21 2016 +0100

radeonsi: generate an explicit switch instruction over vertex streams

SimplifyCFG generates a switch instruction anyway when all four streams
are present, but is simultaneously not smart enough to eliminate some
redundant jumps that it generates.

The generated assembly is still a bit silly, probably because the
control flow annotation doesn't know how to handle a switch with uniform
condition.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bae929f96ee57ec55d15fae87bf80c45a8bd7e4d
Author: Nicolai Hähnle 
Date:   Tue Nov 29 16:03:56 2016 +0100

radeonsi: fetch only outputs of current vertex stream from the GSVS ring

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dfb69cac3354ecb338987b02f635de0bfdcf37d2
Author: Nicolai Hähnle 
Date:   Tue Nov 29 15:55:00 2016 +0100

radeonsi: only export from GS copy shader for vertex stream 0
   

Mesa (master): 26 new commits

2016-07-30 Thread Rob Clark
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e713a9e61311249dfd6f76f3ab73da951b81239d
Author: franci...@gmail.com 
Date:   Sat Jul 30 09:49:59 2016 +0200

freedreno/a4xx: fix comparison out of range warnings

Signed-off-by: Francesco Ansanelli 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43492c7f2c56b618903b0f802071a6462ea8a435
Author: franci...@gmail.com 
Date:   Sat Jul 30 09:49:58 2016 +0200

freedreno/a3xx: fix comparison out of range warnings

Signed-off-by: Francesco Ansanelli 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=089cc74b6a402432fc268ddd29eb4639f4b170c4
Author: franci...@gmail.com 
Date:   Sat Jul 30 09:49:57 2016 +0200

freedreno/a2xx: fix comparison out of range warnings

Signed-off-by: Francesco Ansanelli 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fa68fdc90656048a8e51103f59502a3c6ab1a29
Author: franci...@gmail.com 
Date:   Sat Jul 30 08:20:58 2016 +0200

freedreno/ir3: init ir3_shader_key with memset()

To silence missing initializers warning

Signed-off-by: Francesco Ansanelli 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a63bac9271cf4984b4b8c0158e99fffa7f78c8bb
Author: Eric Engestrom 
Date:   Sat Jul 30 01:33:56 2016 +0100

gallium/freedreno: move cast to avoid integer overflow

Previously, the bitshift would be performed on a simple int (32 bits on
most systems), overflow, and then be cast to 64 bits.

CovID: 1362461
Signed-off-by: Eric Engestrom 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3563c4d16138360fd8756576e0c9c825ed6cec86
Author: Eric Engestrom 
Date:   Sat Jul 30 01:23:09 2016 +0100

freedreno/a2xx: remove duplicate assignment

CovID: 1362445, 1362446
Signed-off-by: Eric Engestrom 
Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d64a003c5059feebcb70b607311d380acc45962
Author: Rob Clark 
Date:   Fri Jul 22 17:55:59 2016 -0400

freedreno: defer flush_queue allocation

Some apps, like warsow, create a bazillion contexts but don't render on
most of them.

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4175606474acda62775c41fa95a577e0796ff17f
Author: Rob Clark 
Date:   Wed Jul 20 14:50:14 2016 -0400

freedreno: add some hw query traces

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e684c32d2fdda204b79661ecf26881eae133d64a
Author: Rob Clark 
Date:   Tue Jul 19 18:24:57 2016 -0400

freedreno: some locking

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=010e4b2d52d5b5ab1eb866dfa0a2df5b984c343d
Author: Rob Clark 
Date:   Thu Jul 21 13:51:36 2016 -0400

os: add pipe_mutex_assert_locked()

Would be nice if we could also have lockdep, like in the linux kernel.
But this is better than nothing.

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f0eb6952790bffe2670f26d399f15acec199cac
Author: Rob Clark 
Date:   Tue Jul 19 13:22:01 2016 -0400

freedreno: drop needs_rb_fbd

We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this
in fd_context is wrong when the gmem code executes asynchronously from
the flush_queue worker.  But in fact we don't really need to track it at
all.  We cannot assume previous value at the beginning of the batch
(because of other processes potentially using the GPU), so just drop the
tracking and emit it in _tile_init().

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6bfe1c7734cfbf41a763797527db6cb49fa1566
Author: Rob Clark 
Date:   Tue Jul 19 12:08:42 2016 -0400

freedreno: move needs_wfi into batch

This is also used in gmem code, which executes from the "bottom half"
(ie. from the flush_queue worker thread), so it cannot be in fd_context.

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0739bbceecbb66ffbcf14e5b73e6df222794c264
Author: Rob Clark 
Date:   Thu Jul 14 16:44:34 2016 -0400

  

Mesa (master): 26 new commits

2016-01-07 Thread Marek Olšák
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bca18057a359f98b5db0a6453abe4dc7dd70a31d
Author: Marek Olšák 
Date:   Wed Jan 6 02:30:13 2016 +0100

radeonsi: adjust the parameters of si_shader_dump

The function will be extended to dump all binaries shaders will consist of,
so si_shader* makes sense here.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a51b010e5a250bd533c95447f6f2d8132345e67
Author: Marek Olšák 
Date:   Sun Jan 3 17:18:04 2016 +0100

radeonsi: move si_shader_dump call out of si_compile_llvm

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0df5f4c19f2c084fe65b13f5712433c91ad83d0
Author: Marek Olšák 
Date:   Sun Jan 3 17:05:05 2016 +0100

radeonsi: inline si_shader_binary_read

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9c031f3d0ed28a65b78748ed1e6e2ec29336451
Author: Marek Olšák 
Date:   Sun Jan 3 17:03:24 2016 +0100

radeonsi: move si_shader_dump call out of si_shader_binary_read

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8b34fe093594ad7c0428c55efae2f479b543a62
Author: Marek Olšák 
Date:   Sun Jan 3 16:39:24 2016 +0100

radeonsi: separate shader dumping code to si_shader_dump and *_dump_stats

Eventually, I'd like to dump stats for several combined binaries, which is
why you don't see a binary parameter in si_shader_dump_stats

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccd7d7e13d708e6f4128bc09b42dd88bd606d49b
Author: Marek Olšák 
Date:   Mon Dec 28 00:53:29 2015 +0100

radeonsi: add si_shader_destroy_binary

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c9f104567c3b072aa103902ee5868a08ded4835
Author: Marek Olšák 
Date:   Mon Dec 28 01:45:00 2015 +0100

radeonsi: don't pass si_shader to si_compile_llvm

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54ed83669e637ebfe269fc88d2e3924401b2a827
Author: Marek Olšák 
Date:   Sun Dec 27 23:47:00 2015 +0100

radeonsi: move si_shader_binary_upload out of si_compile_llvm

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f20a76a4fd7eb176f2f3c09b7596a05be1961b75
Author: Marek Olšák 
Date:   Sun Dec 27 23:35:08 2015 +0100

radeonsi: always keep shader code, rodata, and relocs in memory

We won't compile shaders in draw calls, but we will concatenate shader
binaries according to states in draw calls, so keep the binaries.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=63345cfc3a8a0f2d9bb16deef2a24cebe9045642
Author: Marek Olšák 
Date:   Mon Dec 28 01:45:00 2015 +0100

radeonsi: don't pass si_shader to si_shader_binary_read

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d3a96448a6ce28a9955ef7b4d5c62228703e4a3
Author: Marek Olšák 
Date:   Mon Dec 28 01:45:00 2015 +0100

radeonsi: don't pass si_shader to si_shader_binary_read_config

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20b9b5d7f527ca29f603242dc5355bd2e29c654d
Author: Marek Olšák 
Date:   Mon Dec 28 00:14:05 2015 +0100

radeonsi: add struct si_shader_config

There will be 1 config per variant, which will be a union of configs
from {prolog, main, epilog}. For now, just add the structure.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=890873d1061973e813969f20f00807a94a7fa2e8
Author: Marek Olšák 
Date:   Sun Dec 27 20:05:19 2015 +0100

radeonsi: move NULL exporting into a separate function

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a72ed2f6bc3c4e2aa1a317d960d009ff2dda0bc1
Author: Marek Olšák 
Date:   Sun Dec 27 20:02:41 2015 +0100

radeonsi: move MRT color exporting into a separate function

This will be used by a fragment shader epilog.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ffe3d3772eaa5f14890a2fd2b77b173cb669f3f
Author: Marek Olšák 

Mesa (master): 26 new commits

2015-09-23 Thread Ian Romanick
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aae0c88797e7e44c55873b3e97cceed5c6e6cded
Author: Ville Syrjälä 
Date:   Mon Mar 23 14:47:28 2015 +0200

i915: Make hw_prim[] const

The table used to map the GL primitive to the hw primitive never
changes so make it const.

Signed-off-by: Ville Syrjälä 
Reviewed-by: Ian Romanick 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=84fec757de2f8c6ba47f2f56077993d62538711a
Author: Ville Syrjälä 
Date:   Mon Mar 23 14:47:23 2015 +0200

t_dd_dmatmp: Make the render_tab[]s const

These tables hold function pointers and they never change so
make them const.

Signed-off-by: Ville Syrjälä 
Reviewed-by: Ian Romanick 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abbaf3301f2405adf61d2804706c00a391a1336e
Author: Ian Romanick 
Date:   Mon Sep 14 17:57:15 2015 -0700

mesa: Remove unused HAVE_TRI_STRIP_1 defines

Defined to 0 in a few places, but it's not used anywhere.

Signed-off-by: Ian Romanick 
Reviewed-by: Brian Paul 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d830965057bc01734dcca415969ebb6950f2e58c
Author: Ian Romanick 
Date:   Mon Sep 14 17:29:50 2015 -0700

t_dd_dmatmp: Constify dmasz

Signed-off-by: Ian Romanick 
Reviewed-by: Brian Paul 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e9968f184dd1f9727d1095aa45936d5c6ec9f16
Author: Ian Romanick 
Date:   Mon Sep 14 17:26:10 2015 -0700

t_dd_dmatmp: Silence comparison between signed and unsigned integer 
expression warnings

../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:83:28: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
  nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:83:55: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
  nr = MIN2(currentsz, count - j);
   ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:116:25: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
 ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:116:52: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:140:25: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
 ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:140:52: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h: In function 
'intel_render_line_loop_verts':
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:174:28: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
  nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:174:55: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
  nr = MIN2(currentsz, count - j);
   ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:224:25: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
 ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:224:52: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:255:25: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
 ^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:255:52: warning: signed and 
unsigned type in conditional expression [-Wsign-compare]
   nr = MIN2(currentsz, count - j);
^
../../../../../src/mesa/tnl_dd/t_dd_dmatmp.h:281:25: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   nr = MIN2(currentsz, count - j + 1);
  

Mesa (master): 26 new commits

2015-07-14 Thread Samuel Iglesias Gonsálvez
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea633db65ffa684ea5237b8cb5bd96fbc1a7769a
Author: Samuel Iglesias Gonsalvez sigles...@igalia.com
Date:   Wed Jul 8 17:30:44 2015 +0200

glsl: Lower shader storage buffer object loads to GLSL IR instrinsics

Extend the existing lower_ubo_reference pass to also detect SSBO loads
and lower them to __intrinsic_load_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez sigles...@igalia.com
Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1966ea57728a1c05300982ddd83de989e363613c
Author: Samuel Iglesias Gonsalvez sigles...@igalia.com
Date:   Wed Jul 8 17:03:06 2015 +0200

glsl: Lower shader storage buffer object writes to GLSL IR instrinsics

Extend the existing lower_ubo_reference pass to also detect SSBO writes
and lower them to __intrinsic_store_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez sigles...@igalia.com
Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a66ee6fc1fa1e64f2d9a22271187d4462d9e042
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Fri Apr 24 11:17:15 2015 +0200

glsl: Don't do copy propagation on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5dfea83ee6bf85fb3962679d043eb06b33bfd4c1
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Fri Apr 24 11:15:48 2015 +0200

glsl: Don't do constant variable on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bd985714816fad20c99b4e6ea762df17b46
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Fri Apr 24 11:14:17 2015 +0200

glsl: Don't do constant propagation on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5360ff30c4de966422fde6a574e3959c81bf5037
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Mon Apr 6 10:19:50 2015 +0200

glsl: Do not kill dead assignments to buffer variables or SSBO declarations.

If we kill dead assignments we lose the buffer writes.

Also, we never kill UBO declarations even if they are never referenced
by the shader, they are always considered active. Although the spec
does not seem say this specifically for SSBOs, it is probably implied
since SSBOs are pretty much the same as UBOs, only that you can write
to them.

v2:
- Fix the comment (Jordan)

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ad92589f29466383c0218aa4a73bff52019c4be
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Mon Apr 6 09:37:58 2015 +0200

glsl: Don't do tree grafting on buffer variables

Otherwise we can lose writes into the buffers backing the variables.

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=173ed05a6d9e851b2b7b2f9f2d8993e5da115c40
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Thu Mar 19 11:42:33 2015 +0100

mesa: Implement _mesa_BindBufferRange for target GL_SHADER_STORAGE_BUFFER

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a1d58bd6129d61ec4efb79cc6f2b61ac777b85b
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Thu Mar 19 11:37:43 2015 +0100

mesa: Implement _mesa_BindBufferBase for target GL_SHADER_STORAGE_BUFFER

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

URL:

Mesa (master): 26 new commits

2015-06-21 Thread Rob Clark
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=66a93a0ff9aa402c37aa9d00b4489715d611b496
Author: Rob Clark robcl...@freedesktop.org
Date:   Sat Jun 13 09:14:31 2015 -0400

freedreno/ir3: pass sz to split_dest()

For query_levels, we generate a getinfo with writemask of (z), which RA
will consider as size==3.  But we were still generating four fanouts.
Which meant that RA would see it as two different register classes,
depending on the path to definer.  Ie. on the getinfo instruction itself
it would see size==3, but when chasing back through the fanouts it would
see size==4.

Easiest way to solve that is to just generate the chain of neighboring
fanouts to have the correct size in the first place.

Note: we may eventually want split_dest() to take start/end or wrmask
instead, since really we only need size==1.  But RA is not clever enough
for that, query_levels is not that common, and the other two registers
that get allocated are never used so those register slots can be
immediately re-used.  So bunch of work for probably no real gain.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ee4d51e7a68f8f2dcb52a0e2f9af81fdbe078a2
Author: Rob Clark robcl...@freedesktop.org
Date:   Fri Jun 12 14:27:44 2015 -0400

freedreno/ir3/nir: add more opcodes

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43048c7093c367897fbcbb3ca8580e9c122cd6f6
Author: Rob Clark robcl...@freedesktop.org
Date:   Mon Jun 8 14:45:47 2015 -0400

freedreno/ir3: only unminify txf coords on a3xx

Seems like a4xx gets this right.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f008082b184072159e5aedc7fc103efba8740ed
Author: Rob Clark robcl...@freedesktop.org
Date:   Mon Jun 8 14:23:49 2015 -0400

freedreno: remove int sampler shader variants

We get this information from NIR (which gets it from sview decl in tgsi
when translating from tgsi), so no need to maintain shader variants for
this.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=457f7c2a2a93b45396ac66e0d4b3896d2db8fdf3
Author: Rob Clark robdcl...@gmail.com
Date:   Tue Jun 9 17:17:06 2015 -0400

freedreno/ir3: block reshuffling and loops!

This shuffles things around to allow the shader to have multiple basic
blocks.  We drop the entire CFG structure from nir and just preserve the
blocks.  At scheduling we know whether to schedule conditional branches
or unconditional jumps at the end of the block based on the # of block
successors.  (Dropping jumps to the following instruction, etc.)

One slight complication is that variables (load_var/store_var, ie.
arrays) are not in SSA form, so we have to figure out where to put the
phi's ourself.  For this, we use the predecessor set information from
nir_block.  (We could perhaps use NIR's dominance frontier information
to help with this?)

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=660d5c1646f5d63f9626b24beabc9cfc318849d4
Author: Rob Clark robcl...@freedesktop.org
Date:   Mon Jun 1 12:35:19 2015 -0400

freedreno/ir3: a4xx encodes larger immed offset

Without this, negative branch/jump offsets look like very large positive
offsets.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d646d3ae9d221104db0e9daec33ef470b1bdd957
Author: Rob Clark robcl...@freedesktop.org
Date:   Mon May 25 10:59:21 2015 -0400

freedreno/ir3: simplify find_neighbors stop condition

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8fb5f8a011e1db78af3ceaf91c5cb3b1acaee14
Author: Rob Clark robcl...@freedesktop.org
Date:   Mon May 25 10:30:54 2015 -0400

freedreno/ir3: move inputs/outputs to shader

These belong in the shader, rather than the block.  Mostly a lot of
churn and nothing too interesting.  But splitting this out from the
rest of ir3_block reshuffling to cut down the noise in the later
patch.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d52fb2f5ad828f879286b9068023b82b9897bc17
Author: Rob Clark robcl...@freedesktop.org
Date:   Fri May 1 12:21:12 2015 -0400

freedreno/ir3/ra: use register_allocate

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=694beb8b830c993e9bfb744655be3dbd558ab3a8
Author: Rob Clark robcl...@freedesktop.org
Date:   Sat May 23 13:37:41 2015 -0400

freedreno/ir3: introduce ir3_compiler object

Right now, just 

Mesa (master): 26 new commits

2015-04-05 Thread Rob Clark
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b0b81339b9c3806981ee2ec7c08501bbd8bb7a3
Author: Rob Clark robcl...@freedesktop.org
Date:   Thu Mar 12 17:18:33 2015 -0400

freedreno/ir3: add NIR compiler

The NIR compiler frontend is an alternative to the TGSI f/e, producing
the same ir3 IR and using the same backend passes for scheduling, etc.

It is not enabled by default yet, as there are still some regressions.
To enable, use 'FD_MESA_DEBUG=nir'.  It is enough to use with, for
example, xonotic or supertuxkart.

With the NIR f/e, scalarizing and a number of other lowering steps
happen in NIR, so we don't have to do them in ir3.  Which simplifies the
f/e and allows the lowered instructions to pass through other
optimization stages.

Signed-off-by: Rob Clark robcl...@freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=700d949ea162a5036ffc3056adaa8eb3fecc9c2e
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Tue Mar 3 20:36:39 2015 -0500

freedreno/a3xx: don't decode srgb on mem2gmem

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b060b56772cdb349478757382de036a20a2402ba
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Sat Apr 4 02:53:52 2015 -0400

freedreno/a3xx: pass sprite coord mode through to program emit

Use the correct sprite replacement depending on the flip of the coord
mode, using either T or 1-T depending on whether we have an upper-left or
lower-left coordinate origin. This fixes all the point sprite piglits.

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1de72dfc8a2014069edd1b3d3d46dad478d0680a
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Tue Mar 31 11:51:00 2015 -0400

freedreno/a3xx: add UBO support

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7811f56c205b113dd820034a99ff3aaa20af636
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Sat Apr 4 13:37:45 2015 -0400

freedreno/ir3: insert nop between sfu/mem operations

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=14dfd8cc4344a1bb15a63179b497d14eaec9cc0d
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Fri Apr 3 22:29:44 2015 -0400

freedreno: dirty context when reallocating a bound bo

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bde2045fa247b4d1de98a3bc7585d1b60f9b58b7
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Fri Apr 3 02:15:17 2015 -0400

freedreno: keep track of buffer valid ranges

Copies nouveau_buffer and radeon_buffer. This allows a write to proceed
to an uninitialized part of a buffer even when the GPU is using the
previously-initialized portions.

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dacf22e0a34d4dc2595f3cb0dbee52318dc9d0d7
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Thu Apr 2 20:48:44 2015 -0400

freedreno: mark resources as being read so that writes flush the queue

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e1445c8f3df7608ba4522f8d088170de4ec788c
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Fri Apr 3 23:39:38 2015 -0400

freedreno: don't bother setting resource timestamps

Waiting on a bo being ready is handled in fd_bo_cpu_prep. No need to
keep separate timestamps around.

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fee3061d531a9f4068952209926ad518aab07ee
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Fri Apr 3 02:25:58 2015 -0400

freedreno: add a reading flag to indicate gpu is reading rsc

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea0952a9db1b5887f915d8f750f5fa9c45719976
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Thu Apr 2 22:28:21 2015 -0400

freedreno: fix resource flushing confusion

A resource flush is an upload of a hypothetically-staging texture to the
GPU. For a UMA system, this will largely be a no-op or
cache-maintenance. Move the render flush logic into transfer_map where
it belongs, and clear out the transfer_flush function.

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfb0a8eb6967065be92e40ba620fc6fededde51a
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Thu Apr 2 22:26:03 2015 -0400

freedreno: remove tex_resource

pipe_sampler_view already contains a texture, remove the redundant
tex_resource member which pointed at the same thing.

Signed-off-by: Ilia Mirkin 

Mesa (master): 26 new commits

2014-03-31 Thread Emil Velikov
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d681b22ed77274a805c6c8e81925c18eeb57a968
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Tue Mar 11 17:58:08 2014 +

automake: ask the linker to do garbage collection

By doing GC the linker removes all the symbols that are not referenced
and/or used by the final library. This results in a saving of ~100K
up-to ~600K per (stripped) binary (classic vs gallium drivers).

If interested one can ask the compiler to print the sections that are
removed using -Wl,--print-gc-sections.

v2: Check if ld supports the flag before using it.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Acked-by: Matt Turner matts...@gmail.com (v1)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d187a150d45cbf5bd3476eab49be5057382c2c86
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Thu Mar 13 05:44:33 2014 +

automake: add -Wl,--no-undefined to all libraries

... apart from the dri drivers.
With this final change we can build mesa without fear that
the resulting libraries will have unresolved symbols.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=902dc61f886c0d719ce25894bbc8032ede0f409b
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Thu Mar 27 20:32:41 2014 +

gallium/targets: add missing library dependencies

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=354a5cad74c38d2211e7f0ad485cc302fe51b3f0
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Mon Mar 31 13:05:14 2014 +0100

pipe-loader: reorder PIPE_LIBS

Reorder -lm, -lrt, -lpthreads and -ldl to be consistent with the
rest of mesa.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0177ff0039613f5fbfffa90c9971cdef17550206
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Thu Mar 27 20:21:52 2014 +

pipe-loader: use PTHREAD_LIBS over -lpthread

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=501af7a1a0eab0d5d1d7427cbdbe50e783e5f447
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Wed Mar 12 01:49:20 2014 +

dri/i965: use CLOCK_LIBS over -lrt

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5503c227d98c6030455cc94197d462a066294f37
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Thu Mar 13 02:32:29 2014 +

automake: consistently use -no-undefined

Set the flag for all but the dri targets. They have missing
glapi symbols which are required for the normal operation with
the X server.

Jon, I fear that you'll need to carry the no-undefined hunk
locally when building the dri drivers under cygwin.

Cc: Jon TURNEY jon.tur...@dronecode.org.uk
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c8d8119caf99fffcfb2f50763267ae0a9ed8738
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Tue Mar 11 16:05:53 2014 +

targets/egl-static: move the common LDFLAGS into AM_LDFLAGS

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3232732019703cf0aec419a9ee11dd47ac798e0
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Mar 28 12:22:44 2014 +

targets/omx: do not link against the trace driver

Unused due to the missing GALLIUM_TRACE define.

Requested-by: Christian König christian.koe...@amd.com
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0484b8446a02a4b77d5a1dab89f6e0b8af831027
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Tue Mar 11 15:24:07 2014 +

gallium/targets: explicitly include a dummy.cpp and remove all the LINK 
mayhem

Explicitly setting the linker variable was required for old and broken
build toolchains. At this point this should no longer be needed, and
setting the sources lists will trigger generation of the correct LINK
variables.

Explicitly include dummy.cpp to use g++ to link the static library which
in most cases is based upon C++ code.

v2: Reword commit message.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:

Mesa (master): 26 new commits

2014-02-11 Thread Emil Velikov
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=908a711313b7b87c6475a2635af83341559406d2
Author: Ilia Mirkin imir...@alum.mit.edu
Date:   Tue Feb 11 00:42:26 2014 -0500

nv30,nvc0: only claim a single viewport

It should be possible to make this be 16 on nvc0.

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Reviewed-by: Emil Velikov emil.l.veli...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82cd6e6317dc9f2c66bee1fcc0521c97afcadd75
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Feb 8 04:06:19 2014 +

st/clover: use VISIBILITY_CXXFLAGS where approapriate

Use the c++ visibility flags when building cpp files.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ed32c9af948b5f724c88cefe5bb83e195c56f6a
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Feb 8 03:56:38 2014 +

omx: use VISIBILITY_CFLAGS to control exported symbols

Initial step of cleaning the exported symbols from targets/omx

 - Mark omx_component_library_Setup as public

v2: Keep export-symbols-regex

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Christian König christian.koe...@amd.com (v1)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eda9a66f7e509261f2b9e24099fd65d43f31f122
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Feb 8 02:56:32 2014 +

osmesa: drop obsolete AM_CXXFLAGS

There is no cpp files during the build process, thus we
can safely drop the unused cxxflags.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=927b9e8eb831e644e3029428e35035875c19d431
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Feb 8 01:40:40 2014 +

st/vdpau: automake: export only PUBLIC symbols

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=255b39f17ac3e84ae1db55bda37881f76d1ac8b3
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Feb 7 16:37:50 2014 +

st/vdpau: do not export VdpPresentationQueueTargetCreateX11

The function pointer is retrieved via VdpGetProcAddress just
like all the other vdpau functions and should not be exported.

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d84e0eb40676ff47356496c5ff9d354b863bea96
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Feb 7 19:06:02 2014 +

wayland-egl: automake: add symbol test

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=64055637830336686bebed4db370ce83ede5c679
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Feb 7 18:48:21 2014 +

st/egl: automake: avoid exporting all symbols

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11926e8997aedec191efdbd057dccfd4214268f6
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Feb 7 18:44:19 2014 +

targets/egl-static: automake: don't export local symbols

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c7f75f70a833d861c835aac2c008e03599f7b50
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Fri Feb 7 16:08:04 2014 +

gbm: automake: add symbol tests

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33b9c0d46527563d5a5e0f1f4f4017cf799f5782
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Jan 25 17:59:36 2014 +

targets/gbm: automake: do not export internal symbols

Add VISIBILITY_CFLAGS to automake build, so that
only required symbols are exported.

v2: Rebase

Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=10e5ffd4961055ebba5be4d85a93cc66cdd5a635
Author: Emil Velikov emil.l.veli...@gmail.com
Date:   Sat Jan 25 17:19:10 2014 +

gbm: do not export _gbm_mesa_get_device

This symbol is internal and was never part of the API.
Unused by any of the gbm backends, it makes sense to
simply not export it.

Cc: Kristian Høgsberg k...@bitplanet.net
Signed-off-by: Emil Velikov 

Mesa (master): 26 new commits

2013-07-03 Thread Kenneth Graunke
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=764afc48cf8a762f8c48209ba724103d421f0ac1
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Tue Jul 2 15:53:35 2013 -0700

i965: Move the rest of intel_tex_layout.c into brw_tex_layout.c.

The texture alignment unit functions are called from brw_tex_layout.c,
so it makes sense to put them there.  Since the only caller of
intel_get_texture_alignment_unit() is in brw_tex_layout.c, it could be
made into a static function.  However, this patch instead simply folds
it into the caller, as it's only two lines anyway.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Chad Versace chad.vers...@linux.intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=466aa712b695010371228f6032bbed210ca206b2
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Tue Jul 2 15:06:10 2013 -0700

i965: Push intel_get_texture_alignment_unit call into brw_miptree_layout

intel_miptree_create_layout() calls intel_get_texture_alignment_unit()
and then immediately calls brw_miptree_layout().  There are no other
callers.

intel_get_texture_alignment_unit() populates the miptree's alignment
unit fields, which are used by brw_miptree_layout() to determine where
to place each miplevel.  Since brw_miptree_layout() needs those to be
present, it makes sense to have it initialize them as the first step.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Chad Versace chad.vers...@linux.intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4c3c0dc940fb021cef237451b50fb762a97f792
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:56:22 2013 -0700

i965: Declare for-loop counters in the loop in brw_tex_layout.c.

The driver is compiled in C99 mode, so this is not a problem.  It's
slighlty tidier.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccf312fd127df16757108cc35905c1dc524a4dac
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:49:20 2013 -0700

i965: Remove use of GLuint/GLint in brw_tex_layout.c.

Using GL types is silly; this isn't even remotely API-facing.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed95e396f38bbad647152e9357f1da03fdc449eb
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:47:28 2013 -0700

i965: Tidy the brw_tex_layout.c copyright and file header comments.

This uses Doxygen style for the file comments, and generally makes it
more consistent with the rest of the driver.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ea87fde3124caf3adc51114a3386890dbf5e637
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:25:12 2013 -0700

i965: Move i945_texture_layout_2d to brw_tex_layout.c

This consolidates the miptree layout logic in a single file.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1920209970bba432f2a8c6ccbe2fb84d007e5e93
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:06:47 2013 -0700

i965: Remove fallthrough for Gen4 cube map layout.

Now that both 2DArray and Cube layouts are taken care of by helper
functions, it's easy to just call the right function for each
generation.  This is a little cleaner than falling through.

This also reworks the comments.  Referencing Volume 1 of the BSpec
isn't very helpful, since that's only available inside Intel, and it
doesn't even use volume numbers.  Also, Ironlake...finally sounds a
bit strange considering that almost all hardware uses the 2D array
approach.  At this point, Gen4 is the only special case.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e4007a1b34ad29ef6441d9b20d0999c32350bd6
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 15:00:07 2013 -0700

i965: Combine GL_TEXTURE_CUBE_MAP_ARRAY case with the other array cases.

These do the exact same thing; combining them is tidier.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc51f15b320235c06bf666cf870e9995d6cecc6b
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Fri Jun 28 14:50:30 2013 -0700

i965: Pull 3D texture layout code 

Mesa (master): 26 new commits

2012-12-06 Thread Ian Romanick
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76f13f80e6ac7dcc7747b22eb513acbe1c2a5760
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Mon Nov 19 22:36:28 2012 -0800

glsl: Add missing semicolon in the grammar

This may not be strictly necessary, but every other rule in the grammar ends
with a semicolon.  It also appears that this was supposed to be commited 
with
the original patch that changed this rule, but the wrong version of the 
patch
was accidentally pushed.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=62c0938639401dbf75c61ed7f6f10fd860994cfd
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Fri Nov 9 12:26:42 2012 -0800

glsl: Allow layout qualifiers in GLSL 3.00 ES

Note that while 'packed' is a reserved word in GLSL ES, row_major is not.
This means that we have to use the string-based matching for that.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=486f9556548292e776781e85052ec4122180891d
Author: Paul Berry stereotype...@gmail.com
Date:   Sat Aug 4 15:42:33 2012 -0700

glsl: Create builtin function profiles for GLSL 3.00 ES.

Nearly all of the builtin functions in GLSL 3.00 ES are already
implemented in Mesa; this patch enables them.

A few functions are not implemented yet; those have been commented
out, with a FIXME comment to act as a reminder of what still needs to
be implemented.  Here is the complete list: packSnorm2x16,
unpackSnorm2x16, packUnorm2x16, unpackUnorm2x16, packHalf2x16,
unpackHalf2x16.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a69f66353010d3fe8c666bd4adee26139f32efa
Author: Paul Berry stereotype...@gmail.com
Date:   Mon Aug 6 14:36:31 2012 -0700

glsl: add determinant() functions.

These functions are defined in GLSL 1.50 and GLES 3.00 ES.

The formulas have been extracted from the existing implementation of
inverse().

Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d6d22100abf4512865c316f3ad6a3bd25dd28c1
Author: Paul Berry stereotype...@gmail.com
Date:   Sat Aug 4 10:43:53 2012 -0700

glsl: Make builtin function profiles for GLSL ES use es in the filename.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8dec1bfedd27ae45632b0e08fb5996ff60d042b6
Author: Paul Berry stereotype...@gmail.com
Date:   Sat Aug 4 10:29:49 2012 -0700

glsl: Add builtin variables for GLSL 3.00 ES.

This patch also adds assertions so that when we add new GLSL versions,
we'll notice that we need to update the builtin variables.

[v2, idr]: s/Frab/Frag/  Noticed by Eric.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com [v1]
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7949eefcba39d48edd8af53f2d88d58f8cd5381
Author: Paul Berry stereotype...@gmail.com
Date:   Thu Aug 2 13:38:57 2012 -0700

glsl: Populate built-in types correctly for GLSL 3.00 ES.

This patch implements all of the built-in types for GLSL 3.00 ES.
This is almost exactly the same as the set of built-in types for GLSL
1.30, except ate 1D samplers are skipped, and samplerCubeShadow is
added.

This patch also addes an assertion so that when we add new GLSL
versions, we'll notice that we need to update the types.

In review, Eric noted:

This change looks correct.  The overall interaction of profiles is
getting ugly, though.  I'm imagining a restructure of the symbol
table population so that there's a big list of types, and each
#version has a nice list of strings of type names copy and pasted
out of its spec.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Acked-by: Carl Worth cwo...@cworth.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e10a5c5e46e8fe91d206dee360ba12b7dc916b3
Author: Paul 

Mesa (master): 26 new commits

2012-06-13 Thread Ian Romanick
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f18d3fe0cb459e5370625057024b84edbadfb097
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:50:54 2012 -0700

glapi: Remove GL_NV_vertex_array_range from the dispatch table

There is no GLX protocol for these functions.  Open-source Linux
driver have not supported this extension for many years, and it seems
unlikely at this point that this support will return.  There's no
reason to have slots for these functions in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=69d1851757424c530d36ae93fba462db5cf3f731
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:46:54 2012 -0700

glapi: Remove GL_NV_fence from the dispatch table

There is no GLX protocol for these functions.  No open-source Linux
driver has ever supported this extension, and it seems unlikely at
this point that one ever will.  There's no reason to have slots for
these functions in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6db7cf29b5229d8cb206973c0283d56a1e025c93
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:41:08 2012 -0700

glapi: Remove GL_NV_register_combiners from the dispatch table

There is no GLX protocol for these functions.  No open-source Linux
driver has ever supported this extension, and it seems unlikely at
this point that one ever will.  There's no reason to have slots for
these functions in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6002909a38f45b0b8e99e158d222be6d347f898
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:32:27 2012 -0700

glapi: Remove GL_APPLE_texture_range from the dispatch table

There is no GLX protocol for these functions, and no Linux driver has
ever supported this extension.  There's no reason to have slots for
these functions in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e62c4c765c6ff81807b460ad3a7009618ae6cb77
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:23:36 2012 -0700

glapi: Remove GL_SGIX_pixel_texture from the dispatch table

There is no GLX protocol for this function.  Open-source Linux driver
have not supported this extension for many years, and it seems
unlikely at this point that this support will return.  There's no
reason to have slots for this function in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=933714aabe5464f6168909738f9ffe712e457f26
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 12:15:11 2012 -0700

glapi: Remove GL_SGIS_pixel_texture from the dispatch table

There is no GLX protocol for these functions, and no Linux driver has
ever supported this extension.  There's no reason to have slots for
these functions in the dispatch table.

The unit tests (GetProcAddress::TableDidntShrink and others) are also 
updated.

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a29ad2b421b75a1727b3460db27b9f57e0bb226d
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Tue May 29 11:28:11 2012 -0700

mesa/tests: Add tests for the generated dispatch table

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fecdcc587a192c0ea4e13d59321691b8981c249
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Fri May 25 08:26:33 2012 -0700

mesa/tests: Add tests for _mesa_lookup_enum_by_{name,nr} functions

Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Brian Paul bri...@vmware.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e08f9080ff6ca8af025b40f328f3279cf40a
Author: Ian Romanick 

Mesa (master): 26 new commits

2010-10-23 Thread Brian Paul
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8740b77ac30298c1742107e2afc4edabca562f0
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:27:19 2010 -0600

softpipe: remove 32bpp color restriction

The comment was out of date.  The tile cache does handle 32-bit colors.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6ac8d5353dda1b859dbc1219ca4e91c9183ae85
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:23:05 2010 -0600

st/mesa: be smarter choosing texture format for glDrawPixels()

This lets us get an integer texture format for integer pixel formats.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=efd9e2431237499d72d9e651c807cab8e3d0076b
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:19:12 2010 -0600

mesa: display list support for GL_EXT_texture_integer

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=98bb70ac842e6898c0e2f78940549be5fb910eda
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:02:11 2010 -0600

mesa: plug in GL_EXT_texture_integer functions

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01e13a7d75b166ccd3ee1f52c60b35a0557bf1ee
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:01:56 2010 -0600

mesa: regenerated API files for GL_EXT_texture_integer

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd6f17c21af4f61ac16f56e451e6766485c89d92
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:01:25 2010 -0600

glapi: include/build EXT_texture_integer.xml

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d73c4a9d559376eb2b71becfe9873e0da7564c0
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 10:00:36 2010 -0600

glapi: GL_EXT_texture_integer API

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=646afcc34045cd482e79ded241aac23082e65f6c
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:45:24 2010 -0600

mesa: simplify target_can_be_compressed() function

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=77ca2044a0b14cfe089763d6e0b548bd9eaf9358
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:43:50 2010 -0600

st/mesa: add format selection for signed/unsigned integer formats

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d72bf5e79dfb820309ef28b1f7fe39864d884886
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:40:49 2010 -0600

mesa: added cases for GL_EXT_texture_integer

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a60512f849f052a7abc2ad0aa42a0c152e5c5e6
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:39:07 2010 -0600

mesa: added cases for GL_EXT_texture_integer formats

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7d18374dd97ee78e80d1e65c7b97f7611ebd2c8
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:38:45 2010 -0600

mesa: compute _IntegerColor field in _mesa_test_framebuffer_completeness()

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9968a3960f7824e9cfffc366494b19834eff5d40
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:37:39 2010 -0600

mesa: added glGet query for GL_RGBA_INTEGER_MODE_EXT

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f681ea4741c8136b2c169ff17c9d5b49b1d791ba
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:37:06 2010 -0600

mesa: added new gl_framebuffer::_IntegerColor field

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ee07a0a27f515c11ae6d3061565863da757a8ed
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:36:44 2010 -0600

mesa: added new gl_extensions::EXT_gpu_shader4 field

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4250882ccf8326ba9074c671110370534489caa6
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:35:37 2010 -0600

softpipe: added some texture sample debug code (disabled)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2502ee673893394cfa01f1f26ab9b657a3ccb2dc
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:35:01 2010 -0600

mesa: new glDrawPixels error check for integer formats

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=013d5ffeec3af5665c81c6a7a8370d21699ca609
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:33:36 2010 -0600

mesa: added _mesa_is_fragment_shader_active() helper

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1e97dc264c95e515b13db7406c15d46f423488d
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:32:08 2010 -0600

mesa: minor reformatting, clean-ups

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5ed39e7e6dd31ea60477475d97d8a5ce6946ccc
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:27:12 2010 -0600

mesa: _mesa_is_format_integer() function

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0bc8eeb3224eec1e713fb9885f5d02c21b30c14
Author: Brian Paul bri...@vmware.com
Date:   Sat Oct 23 09:26:10 2010 -0600

mesa: 

Mesa (master): 26 new commits

2010-09-28 Thread Zhenyu Wang
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45b37c4b12bb328e804a2b58c90e0099240879d3
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Tue Sep 28 15:50:59 2010 +0800

i965: fallback bitmap operation on sandybridge

Need to bring back correct fb write with header to set pixel
write mask. Fallback for now.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3074b61f64601be4620f1fb3c48c7c6024d3fd57
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Mon Sep 27 09:58:09 2010 +0800

i965: fix occlusion query on sandybridge

Fix pipe control command for depth stall and PS_DEPTH_COUNT write.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec99833e928baf8dc8c958e3df6f3bbdce922794
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Sun Sep 26 14:36:14 2010 +0800

i965: fix point sprite on sandybridge

Need to set point sprite function in fixed SF state now on sandybridge.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b6b0bf24a043035d7ada0c966e01df6327dc529
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Tue Sep 28 15:35:22 2010 +0800

i965: fix scissor state on sandybridge

Fix incorrect scissor rect struct and missed scissor state pointer
setting for sandybridge.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f3059fcc0cfb797830eb5e0755b5b4ec3fd218b
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Sun Sep 26 13:17:18 2010 +0800

i965: enable polygon offset on sandybridge

Depth offset function is moved to SF stage on sandybridge.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=15a8e7ec90433eea72416793c263febff078c888
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Sat Sep 25 10:50:24 2010 +0800

i965: fix pixel w interpolation on sandybridge

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85fa900b932243785e528e73fe119c27fa1988c4
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Sat Sep 25 10:48:52 2010 +0800

i965: don't do calculation for delta_xy on sandybridge

Sandybridge doesn't have Xstart/Ystart in payload header.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c58bf2cee5b0f14a585089084fec7767f33887a7
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 16:26:27 2010 +0800

i965: only allow SIMD8 kernel on sandybridge now

Until we fixed SIMD16 kernel, force to SIMD8 on sandybridge now.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=18c3b754f974751550dc9505d50535365beac8f3
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 15:08:09 2010 +0800

i965: sandybridge pipe control workaround before write cache flush

Must issue a pipe control with any non-zero post sync op before
write cache flush = 1 pipe control.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8033f1b1ea118f3f47b7f3de557b7a8dcf11082
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Thu Sep 16 09:50:02 2010 +0800

i965: Add all device ids for sandybridge

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=81aae67e58f7c3123724e629a81e2c937864e3be
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Sun Sep 26 13:13:32 2010 +0800

i965: fix const register count for sandybridge

Sandybridge's PS constant buffer payload size is decided from
push const buffer command, incorrect size would cause wrong data
in payload for position and vertex attributes. This fixes coefficients
for tex2d/tex3d.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=956f866030f7bea5fc4a2de28c72e60bdc3a5b3d
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 14:17:06 2010 +0800

i965: Fix sampler on sandybridge

Sandybridge has not much change on texture sampler with Ironlake.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5a3b25bb954db49dcb5e7737018979782d2edba
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Tue Sep 28 14:54:26 2010 +0800

i965: fix jump count on sandybridge

Jump count is for 64bit long each, so one instruction requires 2
like on Ironlake.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c39a9fcb2c76897e9b5aff68ce197a411c4e25c
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 14:47:05 2010 +0800

i965: VS use SPF mode on sandybridge for now

Until conditional instructions were fixed, use SPF mode instead for now.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7401a98e29eaaa80fc42e18b126988683b090543
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 14:40:16 2010 +0800

i965: add sandybridge viewport state bo into validation list

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0b1d7b2b8d35f30793d811d7b5a693e9ea17596
Author: Zhenyu Wang zhen...@linux.intel.com
Date:   Fri Sep 17 14:25:43 2010 +0800

i965: ignore quads for GS kernel on sandybridge

Sandybridge's VF would convert quads to polygon which not required
  

Mesa (master): 26 new commits

2009-10-05 Thread Brian Paul
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=722ae91722342ae8d32244a0e0c3a8ad1fdae4e2
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 14:43:38 2009 -0600

i965g: remove 965/brw files from XLIB_WINSYS_SOURCES

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55770d09c18c4d33403abb97dfef4f897efbbe2a
Merge: f00da2a3ff59c1a7104ac25a1c6eba5a6050ad68 
79892e7976fbb91ae426f5868d5f453e977c1f17
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 14:42:08 2009 -0600

Merge branch 'mesa_7_6_branch'

Conflicts:

src/gallium/auxiliary/util/u_cpu_detect.c

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79892e7976fbb91ae426f5868d5f453e977c1f17
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 14:26:16 2009 -0600

intel: use driReadDrawable in do_copy_texsubimage()

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b7ec94c0db4140f72682f70262baf77be683816
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 14:25:36 2009 -0600

intel: use driReadDrawable, not driDrawable in do_blit_readpixels()

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b29dcbb5e1f0641cdfab22b5e578d933e9dbf35
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 14:07:29 2009 -0600

intel: remove a buffer equality test in _mesa_make_current()

Before, if we called glXMakeCurrent() to change a context's window binding
while an FBO was bound, we weren't updating the intel-driDrawable and
intel-driReadDrawable fields.  This could cause us to dereference a null
pointer elsewhere.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8768bbc9de1441384cecc147d51c9ee6431b924
Author: Brian Paul bri...@vmware.com
Date:   Mon Oct 5 11:10:31 2009 -0600

mesa: fix return value when clipping {Read,Draw}Pixels height = 0

Signed-off-by: Ben Skeggs bske...@redhat.com

(cherry picked from master, commit 7aeaca33c331f70d507fc83583b13b8d9fc3e847)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a15d9ca9ccfeebfcea148fc61ead3a70541e2a76
Author: Jon TURNEY jon.tur...@dronecode.org.uk
Date:   Fri Jul 24 20:33:25 2009 +0100

Fix building of GLSL demos which use M_PI

Some math.h files do not define M_PI, in which case, provide our own 
definition

Signed-off-by: Jon TURNEY jon.tur...@dronecode.org.uk

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43750f1575e366e2a92b71bffceee90d7f1a2b3e
Author: Michel Dänzer daen...@vmware.com
Date:   Mon Oct 5 12:31:51 2009 +0200

Use _mesa_select_tex_image() rather than hardcoding face 0.

Fixes crash loading a map in sauerbraten with

hwmipmap 1

in ~/.sauerbraten/config.cfg.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3856c3cc46813ad96ae6f02dec19460193d986ac
Author: Frederic Crozat fcro...@mandriva.com
Date:   Sun Oct 4 17:46:40 2009 -0400

r200: remove subpixel offset from viewport

Fixes bug fdo 20340 for r200.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbe384c86afeaf5995cddd286a76e1fd789e18f1
Author: Nicolai Hähnle nhaeh...@gmail.com
Date:   Sat Oct 3 01:26:38 2009 +0200

r300: Workaround problem on R500 with very large fragment programs

The non-KMS interface is to blame here. In theory, a proper fix
could be produced that works for the KMS interface only, but it
require cleaning a lot of mess. Easier to just do it right in r300g.

Signed-off-by: Nicolai Hähnle nhaeh...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c01a77d304776153e968d68617a2c84e3af3
Author: Brian Paul bri...@vmware.com
Date:   Fri Oct 2 09:58:16 2009 -0600

docs: document default texture binding fix

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1bddd159f364fa04ddec22f568fbfeb775d3b47
Author: Brian Paul bri...@vmware.com
Date:   Fri Oct 2 09:55:07 2009 -0600

mesa: fix incorrect default texture binding in unbind_texobj_from_texunits()

If we deleted a currently bound texture, we were always reverting the 
texture
binding to the default 1D texture rather than the proper default texture.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85ee0ef9a72e4ffd6ed0a2442b1272a43508d257
Author: Brian Paul bri...@vmware.com
Date:   Fri Oct 2 07:52:27 2009 -0600

gallium/xlib: use bitwise-and to test GLX_RGBA_BIT in choose_visual()

The parameter is a bitmask.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=584b0879ac2ec2420ea6866e47eb90e1a980e758
Author: Brian Paul bri...@vmware.com
Date:   Fri Oct 2 07:51:15 2009 -0600

xlib: use bitwise-and to test GLX_RGBA_BIT in choose_visual()

The parameter is a bitmask.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abc12d0636a5f7fb938c0305cb1b642d5ec0afce
Author: Brian Paul bri...@vmware.com
Date:   Fri Oct 2 07:47:49 2009 -0600

gallium/xlib: return GLX_RGBA_BIT or GLX_COLOR_INDEX_BIT in get_config()

This reverts