Mesa (master): freedreno: update registers
Module: Mesa Branch: master Commit: 766a68cdb9bff2c37ff43792056c484cfe50d75b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=766a68cdb9bff2c37ff43792056c484cfe50d75b Author: Rob Clark Date: Wed Oct 9 12:16:03 2019 -0700 freedreno: update registers Signed-off-by: Rob Clark Reviewed-by: Kristian H. Kristensen --- src/freedreno/registers/a6xx.xml | 23 ++- src/freedreno/vulkan/tu_pipeline.c | 2 +- src/gallium/drivers/freedreno/a6xx/fd6_program.c | 2 +- 3 files changed, 24 insertions(+), 3 deletions(-) diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index b7cfecdc121..00618de0b2a 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -2934,7 +2934,28 @@ to upconvert to 32b float internally? - + + + + + + + + + + + + + + + + + + + diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index 03df9f97dfa..8a51fb05553 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -454,7 +454,7 @@ tu6_emit_fs_config(struct tu_cs *cs, const struct ir3_shader_variant *fs) if (fs->instrlen) sp_fs_config |= A6XX_SP_FS_CONFIG_ENABLED; - tu_cs_emit_pkt4(cs, REG_A6XX_SP_UNKNOWN_A99E, 1); + tu_cs_emit_pkt4(cs, REG_A6XX_SP_FS_PREFETCH_CNTL, 1); tu_cs_emit(cs, 0); tu_cs_emit_pkt4(cs, REG_A6XX_SP_UNKNOWN_A9A8, 1); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c index 493ee67a088..084a05ea952 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c @@ -359,7 +359,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen, /* I believe this is related to pre-dispatch texture fetch.. we probably * should't turn it on by accident: */ - OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A99E, 1); + OUT_PKT4(ring, REG_A6XX_SP_FS_PREFETCH_CNTL, 1); OUT_RING(ring, 0x0); OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A9A8, 1); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): freedreno: update registers
Module: Mesa Branch: master Commit: 44f3c1cf01167c599d40f6ac35152b406cfbd51d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44f3c1cf01167c599d40f6ac35152b406cfbd51d Author: Rob Clark Date: Thu Jul 25 15:25:22 2019 -0700 freedreno: update registers Pull in some updates of VSC regs Signed-off-by: Rob Clark Reviewed-by: Eric Anholt --- src/freedreno/registers/a6xx.xml | 33 + src/freedreno/registers/adreno_pm4.xml | 13 + 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index a001c9ae631..6868ed5528b 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -1771,6 +1771,16 @@ to upconvert to 32b float internally? TODO now there seem to be two buffers of VSC data (both referenced by CP_SET_BIN_DATA packet. Not sure what this new DATA2 one is, but seems to have the larger pitch. + + The "DATA2" buffer is probably actually the main visibility stream; it + is at least the larger of the two. + + For VSC_DATA_PITCH, 0x20 actually seems to be sufficient (although blob + uses something somewhat larger) for many cases, although required value + can ramp up somewhat higher. Values less than 0x20 trigger GPU hangs + even with small amount of geometry (so possibly 0x20 is minimum + alignment or something like that). So far I can't seem to find any- + thing that needs values larger than 0x20 --> @@ -1781,10 +1791,25 @@ to upconvert to 32b float internally? - + + + Seems to be a bitmap of which tiles mapped to the VSC + pipe contain geometry. + + I suppose we can connect a maximum of 32 tiles to a + single VSC pipe. + + + + + + + Has the size of data written to corresponding VSC_DATA2 + buffer. + + + + Has the size of data written to corresponding VSC pipe, ie. diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml index dfb50bfdaf9..06175d3e1ad 100644 --- a/src/freedreno/registers/adreno_pm4.xml +++ b/src/freedreno/registers/adreno_pm4.xml @@ -41,6 +41,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> + + + @@ -1156,5 +1159,15 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + + + + + + + + ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
