Mesa (9.1): i965/vs: Gen4/5: enable front colors if back colors are written
Module: Mesa
Branch: 9.1
Commit: 4f26ea56120cffaa1a0c2337423cf08b835dffb8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f26ea56120cffaa1a0c2337423cf08b835dffb8
Author: Chris Forbes
Date: Sun Jul 7 23:13:07 2013 +1200
i965/vs: Gen4/5: enable front colors if back colors are written
Fixes undefined results if a back color is written, but the
corresponding front color is not, and only backfacing primitives are
drawn. Results are still undefined if a frontfacing primitive is drawn,
but that's OK.
The other reasonable way to fix this would have been to just pick
the one color slot that was populated, but that dilutes the value of
the tests.
On Gen6+, the fixed function clipper and triangle setup already take
care of this.
Fixes 11 piglits:
spec/glsl-1.10/execution/interpolation/interpolation-none-gl_Back*Color-*
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
(cherry picked from commit 1ec66f2fb2fea0497efebc1db83c75ec95a816a4)
---
src/mesa/drivers/dri/i965/brw_vs.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/dri/i965/brw_vs.c
index 0234ebb..950fca4 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -271,6 +271,14 @@ do_vs_prog(struct brw_context *brw,
c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
}
+ if (intel->gen < 6) {
+ /* if back colors are written, allocate slots for front colors too */
+ if (c.prog_data.outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_COL0);
+ if (c.prog_data.outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_COL1);
+ }
+
brw_compute_vue_map(brw, &c);
if (0) {
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Mesa (master): i965 Gen4/5: Introduce 'interpolation map' alongside the VUE map
Module: Mesa
Branch: master
Commit: 9f51499d28f80cbbafa4c1489637e1a6a68d9345
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f51499d28f80cbbafa4c1489637e1a6a68d9345
Author: Chris Forbes
Date: Sun Jul 7 02:56:14 2013 +1200
i965 Gen4/5: Introduce 'interpolation map' alongside the VUE map
The interpolation map (in brw->interpolation_mode) is a new auxiliary
structure alongside the post-GS VUE map, which describes the
interpolation modes for each VUE slot, for use by the clip and SF
stages.
This patch introduces a new state atom to compute the interpolation map,
and adjusts the program keys for the clip and SF stages, but it is not
actually used yet.
[V1-2]: Signed-off-by: Olivier Galibert
V3: Updated for vue_map changes, intel -> brw merge, etc. (Chris Forbes)
V4: Compute interpolation map as a new state atom rather than tacking it
on the front of the clip setup
V5: Rework commit message, make interpolation_mode_map a struct.
Signed-off-by: Chris Forbes
Reviewed-by: Paul Berry
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources|1 +
src/mesa/drivers/dri/i965/brw_clip.c |8 ++-
src/mesa/drivers/dri/i965/brw_clip.h |1 +
src/mesa/drivers/dri/i965/brw_context.h | 15
src/mesa/drivers/dri/i965/brw_interpolation_map.c | 85 +
src/mesa/drivers/dri/i965/brw_sf.c|7 ++-
src/mesa/drivers/dri/i965/brw_sf.h|1 +
src/mesa/drivers/dri/i965/brw_state.h |1 +
src/mesa/drivers/dri/i965/brw_state_upload.c |3 +
9 files changed, 120 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
b/src/mesa/drivers/dri/i965/Makefile.sources
index 1f401fe..ac8487b 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -62,6 +62,7 @@ i965_FILES = \
brw_gs.c \
brw_gs_emit.c \
brw_gs_state.c \
+ brw_interpolation_map.c \
brw_lower_texture_gradients.cpp \
brw_misc_state.c \
brw_program.c \
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c
b/src/mesa/drivers/dri/i965/brw_clip.c
index 2ebf3f6..7621675 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -141,6 +141,10 @@ brw_upload_clip_prog(struct brw_context *brw)
/* Populate the key:
*/
+
+ /* BRW_NEW_INTERPOLATION_MAP */
+ key.interpolation_mode = brw->interpolation_mode;
+
/* BRW_NEW_REDUCED_PRIMITIVE */
key.primitive = brw->reduced_primitive;
/* BRW_NEW_VUE_MAP_GEOM_OUT */
@@ -256,7 +260,9 @@ const struct brw_tracked_state brw_clip_prog = {
_NEW_TRANSFORM |
_NEW_POLYGON |
_NEW_BUFFERS),
- .brw = (BRW_NEW_REDUCED_PRIMITIVE | BRW_NEW_VUE_MAP_GEOM_OUT)
+ .brw = (BRW_NEW_REDUCED_PRIMITIVE |
+BRW_NEW_VUE_MAP_GEOM_OUT |
+BRW_NEW_INTERPOLATION_MAP)
},
.emit = brw_upload_clip_prog
};
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h
b/src/mesa/drivers/dri/i965/brw_clip.h
index 02259d4..e0d75b0 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.h
+++ b/src/mesa/drivers/dri/i965/brw_clip.h
@@ -43,6 +43,7 @@
*/
struct brw_clip_prog_key {
GLbitfield64 attrs;
+ struct interpolation_mode_map interpolation_mode;
GLuint primitive:4;
GLuint nr_userclip:4;
GLuint do_flat_shading:1;
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 2ab150b..7b5fd13 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -154,6 +154,7 @@ enum brw_state_id {
BRW_STATE_STATS_WM,
BRW_STATE_UNIFORM_BUFFER,
BRW_STATE_META_IN_PROGRESS,
+ BRW_STATE_INTERPOLATION_MAP,
};
#define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
@@ -186,6 +187,7 @@ enum brw_state_id {
#define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
#define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
#define BRW_NEW_META_IN_PROGRESS(1 << BRW_STATE_META_IN_PROGRESS)
+#define BRW_NEW_INTERPOLATION_MAP (1 << BRW_STATE_INTERPOLATION_MAP)
struct brw_state_flags {
/** State update flags signalled by mesa internals */
@@ -411,6 +413,14 @@ void brw_compute_vue_map(struct brw_context *brw, struct
brw_vue_map *vue_map,
GLbitfield64 slots_valid, bool userclip_active);
+/*
+ * Mapping of VUE map slots to interpolation modes.
+ */
+struct interpolation_mode_map {
+ unsigned char mode[BRW_VARYING_SLOT_COUNT];
+};
+
+
struct brw_sf_prog_data {
GLuint urb_read_length;
GLuint total_grf;
@@ -1203,6 +1213,11 @@ struct brw_context
uint32_t render_target_format[MESA_FORMAT_COUNT];
bool format_supported_as_render_target[MESA_FORMAT_COUNT];
+ /* Interpolation modes, one byte per vue slot.
+* Used Gen4/5 by the clip|sf|wm st
Mesa (master): i965: Add helper functions for interpolation map
Module: Mesa
Branch: master
Commit: 3b5fe704e182abce581518f43ea45d1cfb76f423
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b5fe704e182abce581518f43ea45d1cfb76f423
Author: Chris Forbes
Date: Wed Jul 31 22:28:13 2013 +1200
i965: Add helper functions for interpolation map
V6: real bools
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 7b5fd13..00dd2b4 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -420,6 +420,24 @@ struct interpolation_mode_map {
unsigned char mode[BRW_VARYING_SLOT_COUNT];
};
+static inline bool brw_any_flat_varyings(struct interpolation_mode_map *map)
+{
+ for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++)
+ if (map->mode[i] == INTERP_QUALIFIER_FLAT)
+ return true;
+
+ return false;
+}
+
+static inline bool brw_any_noperspective_varyings(struct
interpolation_mode_map *map)
+{
+ for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++)
+ if (map->mode[i] == INTERP_QUALIFIER_NOPERSPECTIVE)
+ return true;
+
+ return false;
+}
+
struct brw_sf_prog_data {
GLuint urb_read_length;
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Mesa (master): i965 Gen4/5: clip: correctly handle flat varyings
Module: Mesa
Branch: master
Commit: f0feb32eaf8d4b35e5c3a47ef90aa876b231ada6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0feb32eaf8d4b35e5c3a47ef90aa876b231ada6
Author: Chris Forbes
Date: Sun Jul 7 19:47:19 2013 +1200
i965 Gen4/5: clip: correctly handle flat varyings
Previously we only gave special treatment to the builtin color varyings.
This patch adds support for arbitrary flat-shaded varyings, which is
required for GLSL 1.30.
Based on Olivier Galibert's patch from last year:
http://lists.freedesktop.org/archives/mesa-dev/2012-July/024340.html
V5: Move key.do_flat_shading to brw_clip_compile.has_flat_shading
V6: Real bools.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_clip.c |5 ++-
src/mesa/drivers/dri/i965/brw_clip.h |7 ++--
src/mesa/drivers/dri/i965/brw_clip_line.c |6 ++--
src/mesa/drivers/dri/i965/brw_clip_tri.c | 18 +-
src/mesa/drivers/dri/i965/brw_clip_unfilled.c |2 +-
src/mesa/drivers/dri/i965/brw_clip_util.c | 46 +
6 files changed, 30 insertions(+), 54 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c
b/src/mesa/drivers/dri/i965/brw_clip.c
index 7621675..1c2a4bc 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -70,6 +70,9 @@ static void compile_clip_prog( struct brw_context *brw,
c.key = *key;
c.vue_map = brw->vue_map_geom_out;
+ c.has_flat_shading =
+ brw_any_flat_varyings(&key->interpolation_mode);
+
/* nr_regs is the number of registers filled by reading data from the VUE.
* This program accesses the entire VUE, so nr_regs needs to be the size of
* the VUE (measured in pairs, since two slots are stored in each
@@ -149,8 +152,8 @@ brw_upload_clip_prog(struct brw_context *brw)
key.primitive = brw->reduced_primitive;
/* BRW_NEW_VUE_MAP_GEOM_OUT */
key.attrs = brw->vue_map_geom_out.slots_valid;
+
/* _NEW_LIGHT */
- key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT);
key.pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
/* _NEW_TRANSFORM (also part of VUE map)*/
key.nr_userclip = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h
b/src/mesa/drivers/dri/i965/brw_clip.h
index e0d75b0..ecbf741 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.h
+++ b/src/mesa/drivers/dri/i965/brw_clip.h
@@ -46,7 +46,6 @@ struct brw_clip_prog_key {
struct interpolation_mode_map interpolation_mode;
GLuint primitive:4;
GLuint nr_userclip:4;
- GLuint do_flat_shading:1;
GLuint pv_first:1;
GLuint do_unfilled:1;
GLuint fill_cw:2; /* includes cull information */
@@ -121,6 +120,8 @@ struct brw_clip_compile {
bool need_direction;
struct brw_vue_map vue_map;
+
+ bool has_flat_shading;
};
/**
@@ -173,8 +174,8 @@ void brw_clip_kill_thread(struct brw_clip_compile *c);
struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c );
struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c );
-void brw_clip_copy_colors( struct brw_clip_compile *c,
- GLuint to, GLuint from );
+void brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c,
+ GLuint to, GLuint from );
void brw_clip_init_clipmask( struct brw_clip_compile *c );
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c
b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 9ce80b8..9001d36 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -272,11 +272,11 @@ void brw_emit_line_clip( struct brw_clip_compile *c )
brw_clip_line_alloc_regs(c);
brw_clip_init_ff_sync(c);
- if (c->key.do_flat_shading) {
+ if (c->has_flat_shading) {
if (c->key.pv_first)
- brw_clip_copy_colors(c, 1, 0);
+ brw_clip_copy_flatshaded_attributes(c, 1, 0);
else
- brw_clip_copy_colors(c, 0, 1);
+ brw_clip_copy_flatshaded_attributes(c, 0, 1);
}
clip_and_emit_line(c);
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c
b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index bea0853..19179c1 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -190,8 +190,8 @@ void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
brw_IF(p, BRW_EXECUTE_1);
{
- brw_clip_copy_colors(c, 1, 0);
- brw_clip_copy_colors(c, 2, 0);
+ brw_clip_copy_flatshaded_attributes(c, 1, 0);
+ brw_clip_copy_flatshaded_attributes(c, 2, 0);
}
brw_ELSE(p);
{
@@ -203,19 +203,19 @@ void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
brw_imm_ud(_3DPRIM_TRIFAN));
brw_IF(p, BRW_EXECUTE_1);
{
- brw_clip_copy_colors(c, 0, 1);
- b
Mesa (master): i965 Gen4/5: Generalize SF interpolation setup for GLSL1.3
Module: Mesa
Branch: master
Commit: 21922cb70d0a2de23f6080c8b9c4324cba5a2fff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=21922cb70d0a2de23f6080c8b9c4324cba5a2fff
Author: Chris Forbes
Date: Sun Jul 7 01:53:45 2013 +1200
i965 Gen4/5: Generalize SF interpolation setup for GLSL1.3
Previously the SF only handled the builtin color varying specially.
This patch generalizes that support to cover user-defined varyings,
driven by the interpolation mode array set up alongside the VUE map.
Based on the following patches from Olivier Galibert:
- http://lists.freedesktop.org/archives/mesa-dev/2012-July/024335.html
- http://lists.freedesktop.org/archives/mesa-dev/2012-July/024339.html
With this patch, all the GLSL 1.3 interpolation tests that do not clip
(spec/glsl-1.30/execution/interpolation/*-none.shader_test) pass.
V5: Move key.do_flat_shading to brw_sf_compile.has_flat_shading; drop
vestigial hunks.
V6: Real bools.
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs.cpp|2 +-
src/mesa/drivers/dri/i965/brw_sf.c |2 +-
src/mesa/drivers/dri/i965/brw_sf.h |2 +-
src/mesa/drivers/dri/i965/brw_sf_emit.c | 149 +--
4 files changed, 85 insertions(+), 70 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index afd29de..a81e97f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1048,7 +1048,7 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
inst->predicate = BRW_PREDICATE_NORMAL;
inst->predicate_inverse = true;
}
- if (brw->gen < 6) {
+ if (brw->gen < 6 && interpolation_mode ==
INTERP_QUALIFIER_SMOOTH) {
emit(BRW_OPCODE_MUL, attr, attr, this->pixel_w);
}
attr.reg_offset++;
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c
b/src/mesa/drivers/dri/i965/brw_sf.c
index b062c0b..1634078 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.c
+++ b/src/mesa/drivers/dri/i965/brw_sf.c
@@ -81,6 +81,7 @@ static void compile_sf_prog( struct brw_context *brw,
c.prog_data.urb_read_length = c.nr_attr_regs;
c.prog_data.urb_entry_size = c.nr_setup_regs * 2;
+ c.has_flat_shading = brw_any_flat_varyings(&key->interpolation_mode);
/* Which primitive? Or all three?
*/
@@ -193,7 +194,6 @@ brw_upload_sf_prog(struct brw_context *brw)
key.interpolation_mode = brw->interpolation_mode;
/* _NEW_LIGHT | _NEW_PROGRAM */
- key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT);
key.do_twoside_color = ((ctx->Light.Enabled && ctx->Light.Model.TwoSide) ||
ctx->VertexProgram._TwoSideEnabled);
diff --git a/src/mesa/drivers/dri/i965/brw_sf.h
b/src/mesa/drivers/dri/i965/brw_sf.h
index d65f495..09880fe 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.h
+++ b/src/mesa/drivers/dri/i965/brw_sf.h
@@ -50,7 +50,6 @@ struct brw_sf_prog_key {
uint8_t point_sprite_coord_replace;
GLuint primitive:2;
GLuint do_twoside_color:1;
- GLuint do_flat_shading:1;
GLuint frontface_ccw:1;
GLuint do_point_sprite:1;
GLuint do_point_coord:1;
@@ -96,6 +95,7 @@ struct brw_sf_compile {
int urb_entry_read_offset;
struct brw_vue_map vue_map;
+ bool has_flat_shading;
};
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c
b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index bd68f68..0131de5 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -44,6 +44,15 @@
/**
+ * Determine the vue slot corresponding to the given half of the given
register.
+ */
+static inline int vert_reg_to_vue_slot(struct brw_sf_compile *c, GLuint reg,
+ int half)
+{
+ return (reg + c->urb_entry_read_offset) * 2 + half;
+}
+
+/**
* Determine the varying corresponding to the given half of the given
* register. half=0 means the first half of a register, half=1 means the
* second half.
@@ -51,11 +60,24 @@
static inline int vert_reg_to_varying(struct brw_sf_compile *c, GLuint reg,
int half)
{
- int vue_slot = (reg + c->urb_entry_read_offset) * 2 + half;
+ int vue_slot = vert_reg_to_vue_slot(c, reg, half);
return c->vue_map.slot_to_varying[vue_slot];
}
/**
+ * Determine the register corresponding to the given vue slot
+ */
+static struct brw_reg get_vue_slot(struct brw_sf_compile *c,
+ struct brw_reg vert,
+ int vue_slot)
+{
+ GLuint off = vue_slot / 2 - c->urb_entry_read_offset;
+ GLuint sub = vue_slot % 2;
+
+ return brw_vec4_grf(vert.nr + off, sub * 4);
+}
+
+/**
* Determine the register corresponding to the given varying.
*/
static struct brw_reg get_varying(struct brw_sf_compile *c,
@@ -64,10 +86,7 @@ static struct brw_reg get_vary
Mesa (master): i965 Gen4/5: clip: Don't mangle flat varyings
Module: Mesa
Branch: master
Commit: 3eef7fec677f40eef1674e44e7ebd836bc7f8612
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3eef7fec677f40eef1674e44e7ebd836bc7f8612
Author: Chris Forbes
Date: Sun Jul 7 22:22:57 2013 +1200
i965 Gen4/5: clip: Don't mangle flat varyings
This patch ensures that integers will pass through unscathed. Doing
(useless) computations on them is risky, especially when their bit
patterns correspond to values like inf or nan.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
Reviewed-by: Paul Berry
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_clip_util.c | 53 +---
1 files changed, 32 insertions(+), 21 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c
b/src/mesa/drivers/dri/i965/brw_clip_util.c
index b188bf7..8500b8b 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -269,28 +269,39 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
* header), so interpolate:
*
*New = attr0 + t*attr1 - t*attr0
+ *
+ * Unless the attribute is flat shaded -- in which case just copy
+ * from one of the sources (doesn't matter which; already copied from
pv)
*/
- struct brw_reg tmp = get_tmp(c);
- struct brw_reg t =
-c->key.interpolation_mode.mode[slot] ==
INTERP_QUALIFIER_NOPERSPECTIVE ?
-t_nopersp : t0;
-
-brw_MUL(p,
-vec4(brw_null_reg()),
-deref_4f(v1_ptr, delta),
-t);
-
-brw_MAC(p,
-tmp,
-negate(deref_4f(v0_ptr, delta)),
-t);
-
-brw_ADD(p,
-deref_4f(dest_ptr, delta),
-deref_4f(v0_ptr, delta),
-tmp);
-
- release_tmp(c, tmp);
+ GLuint interp = c->key.interpolation_mode.mode[slot];
+
+ if (interp != INTERP_QUALIFIER_FLAT) {
+struct brw_reg tmp = get_tmp(c);
+struct brw_reg t =
+ interp == INTERP_QUALIFIER_NOPERSPECTIVE ? t_nopersp : t0;
+
+brw_MUL(p,
+ vec4(brw_null_reg()),
+ deref_4f(v1_ptr, delta),
+ t);
+
+brw_MAC(p,
+ tmp,
+ negate(deref_4f(v0_ptr, delta)),
+ t);
+
+brw_ADD(p,
+ deref_4f(dest_ptr, delta),
+ deref_4f(v0_ptr, delta),
+ tmp);
+
+release_tmp(c, tmp);
+ }
+ else {
+brw_MOV(p,
+ deref_4f(dest_ptr, delta),
+ deref_4f(v0_ptr, delta));
+ }
}
}
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Mesa (master): i965 Gen4/5: clip: Add support for noperspective varyings
Module: Mesa
Branch: master
Commit: 3f6fb5e1dd684434979ffca418184574e5c086f3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f6fb5e1dd684434979ffca418184574e5c086f3
Author: Chris Forbes
Date: Sun Jul 7 21:42:39 2013 +1200
i965 Gen4/5: clip: Add support for noperspective varyings
Adds support for interpolating noperspective varyings linearly in screen
space when clipping.
Based on Olivier Galibert's patch from last year:
http://lists.freedesktop.org/archives/mesa-dev/2012-July/024341.html
At this point all -fixed and -vertex interpolation tests work.
V5: Add brw_clip_compile.has_noperspective_shading rather than another
key flag.
V6: Real bools.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
Acked-by: Paul Berry
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_clip.c |2 +
src/mesa/drivers/dri/i965/brw_clip.h |1 +
src/mesa/drivers/dri/i965/brw_clip_util.c | 120 ++---
3 files changed, 113 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c
b/src/mesa/drivers/dri/i965/brw_clip.c
index 1c2a4bc..de5ff11 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -72,6 +72,8 @@ static void compile_clip_prog( struct brw_context *brw,
c.has_flat_shading =
brw_any_flat_varyings(&key->interpolation_mode);
+ c.has_noperspective_shading =
+ brw_any_noperspective_varyings(&key->interpolation_mode);
/* nr_regs is the number of registers filled by reading data from the VUE.
* This program accesses the entire VUE, so nr_regs needs to be the size of
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h
b/src/mesa/drivers/dri/i965/brw_clip.h
index ecbf741..2b02f85 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.h
+++ b/src/mesa/drivers/dri/i965/brw_clip.h
@@ -122,6 +122,7 @@ struct brw_clip_compile {
struct brw_vue_map vue_map;
bool has_flat_shading;
+ bool has_noperspective_shading;
};
/**
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c
b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 9d77d1e..b188bf7 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -128,6 +128,8 @@ static void brw_clip_project_vertex( struct
brw_clip_compile *c,
/* Interpolate between two vertices and put the result into a0.0.
* Increment a0.0 accordingly.
+ *
+ * Beware that dest_ptr can be equal to v0_ptr!
*/
void brw_clip_interp_vertex( struct brw_clip_compile *c,
struct brw_indirect dest_ptr,
@@ -137,7 +139,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
bool force_edgeflag)
{
struct brw_compile *p = &c->func;
- struct brw_reg tmp = get_tmp(c);
+ struct brw_reg t_nopersp, v0_ndc_copy;
GLuint slot;
/* Just copy the vertex header:
@@ -148,12 +150,107 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
*/
brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
- /* Iterate over each attribute (could be done in pairs?)
+
+ /* First handle the 3D and NDC interpolation, in case we
+* need noperspective interpolation. Doing it early has no
+* performance impact in any case.
+*/
+
+ /* Take a copy of the v0 NDC coordinates, in case dest == v0. */
+ if (c->has_noperspective_shading) {
+ GLuint offset = brw_varying_to_offset(&c->vue_map,
+ BRW_VARYING_SLOT_NDC);
+ v0_ndc_copy = get_tmp(c);
+ brw_MOV(p, v0_ndc_copy, deref_4f(v0_ptr, offset));
+ }
+
+ /* Compute the new 3D position
+*
+* dest_hpos = v0_hpos * (1 - t0) + v1_hpos * t0
+*/
+ {
+ GLuint delta = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
+ struct brw_reg tmp = get_tmp(c);
+ brw_MUL(p, vec4(brw_null_reg()), deref_4f(v1_ptr, delta), t0);
+ brw_MAC(p, tmp, negate(deref_4f(v0_ptr, delta)), t0);
+ brw_ADD(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta), tmp);
+ release_tmp(c, tmp);
+ }
+
+ /* Recreate the projected (NDC) coordinate in the new vertex header */
+ brw_clip_project_vertex(c, dest_ptr);
+
+ /* If we have noperspective attributes,
+* we need to compute the screen-space t
+*/
+ if (c->has_noperspective_shading) {
+ GLuint delta = brw_varying_to_offset(&c->vue_map,
+BRW_VARYING_SLOT_NDC);
+ struct brw_reg tmp = get_tmp(c);
+ t_nopersp = get_tmp(c);
+
+ /* t_nopersp = vec4(v1.xy, dest.xy) */
+ brw_MOV(p, t_nopersp, deref_4f(v1_ptr, delta));
+ brw_MOV(p, tmp, deref_4f(dest_ptr, delta));
+ brw_set_access_mode(p, BRW_ALIGN_16);
+ brw_MOV(p,
+ brw_writemask(t_nopersp, WRITEMASK_ZW),
+ brw_swizzle(tmp, 0, 1, 0, 1));
+
+ /* t_nopersp = vec4(v1.xy, dest.xy) - v0.xyxy */
+ brw_ADD(p, t_nopersp, t_nopersp,
+
Mesa (master): De-tab and align comments in gl_texture_object
Module: Mesa
Branch: master
Commit: 986ae4306cea787ed0c71a52b6e92fce14a2a498
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=986ae4306cea787ed0c71a52b6e92fce14a2a498
Author: Corey Richardson
Date: Wed Jul 31 10:14:22 2013 -0400
De-tab and align comments in gl_texture_object
Reviewed-by: Brian Paul
Reviewed-by: Matt Turner
Signed-off-by: Corey Richardson
---
src/mesa/main/mtypes.h | 45 +++--
1 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 5bb6807..91c3abf 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -1152,31 +1152,32 @@ struct gl_sampler_object
*/
struct gl_texture_object
{
- _glthread_Mutex Mutex; /**< for thread safety */
- GLint RefCount; /**< reference count */
- GLuint Name;/**< the user-visible texture object ID
*/
- GLenum Target; /**< GL_TEXTURE_1D, GL_TEXTURE_2D, etc. */
+ _glthread_Mutex Mutex; /**< for thread safety */
+ GLint RefCount; /**< reference count */
+ GLuint Name;/**< the user-visible texture object ID */
+ GLenum Target; /**< GL_TEXTURE_1D, GL_TEXTURE_2D, etc. */
struct gl_sampler_object Sampler;
- GLenum DepthMode; /**< GL_ARB_depth_texture */
-
- GLfloat Priority; /**< in [0,1] */
- GLint BaseLevel;/**< min mipmap level, OpenGL 1.2 */
- GLint MaxLevel; /**< max mipmap level, OpenGL 1.2 */
- GLint ImmutableLevels; /**< ES 3.0 / ARB_texture_view */
- GLint _MaxLevel;/**< actual max mipmap level (q in the spec) */
- GLfloat _MaxLambda; /**< = _MaxLevel - BaseLevel (q - b in spec) */
- GLint CropRect[4]; /**< GL_OES_draw_texture */
- GLenum Swizzle[4]; /**< GL_EXT_texture_swizzle */
- GLuint _Swizzle; /**< same as Swizzle, but SWIZZLE_* format */
- GLboolean GenerateMipmap;/**< GL_SGIS_generate_mipmap */
- GLboolean _BaseComplete; /**< Is the base texture level valid? */
- GLboolean _MipmapComplete; /**< Is the whole mipmap valid? */
- GLboolean _IsIntegerFormat; /**< Does the texture store integer values? */
- GLboolean _RenderToTexture; /**< Any rendering to this texture? */
- GLboolean Purgeable; /**< Is the buffer purgeable under memory
pressure? */
- GLboolean Immutable; /**< GL_ARB_texture_storage */
+ GLenum DepthMode; /**< GL_ARB_depth_texture */
+
+ GLfloat Priority; /**< in [0,1] */
+ GLint BaseLevel;/**< min mipmap level, OpenGL 1.2 */
+ GLint MaxLevel; /**< max mipmap level, OpenGL 1.2 */
+ GLint ImmutableLevels; /**< ES 3.0 / ARB_texture_view */
+ GLint _MaxLevel;/**< actual max mipmap level (q in the spec) */
+ GLfloat _MaxLambda; /**< = _MaxLevel - BaseLevel (q - b in spec) */
+ GLint CropRect[4]; /**< GL_OES_draw_texture */
+ GLenum Swizzle[4]; /**< GL_EXT_texture_swizzle */
+ GLuint _Swizzle;/**< same as Swizzle, but SWIZZLE_* format */
+ GLboolean GenerateMipmap; /**< GL_SGIS_generate_mipmap */
+ GLboolean _BaseComplete;/**< Is the base texture level valid? */
+ GLboolean _MipmapComplete; /**< Is the whole mipmap valid? */
+ GLboolean _IsIntegerFormat; /**< Does the texture store integer values? */
+ GLboolean _RenderToTexture; /**< Any rendering to this texture? */
+ GLboolean Purgeable;/**< Is the buffer purgeable under memory
+pressure? */
+ GLboolean Immutable;/**< GL_ARB_texture_storage */
/** Actual texture images, indexed by [cube face] and [mipmap level] */
struct gl_texture_image *Image[MAX_FACES][MAX_TEXTURE_LEVELS];
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Mesa (master): Correct clamping of TEXTURE_{MAX, BASE}_LEVEL
Module: Mesa
Branch: master
Commit: abdbd02e5928c881510da0f76b4e49fd92ddfe50
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abdbd02e5928c881510da0f76b4e49fd92ddfe50
Author: Corey Richardson
Date: Wed Jul 31 10:46:12 2013 -0400
Correct clamping of TEXTURE_{MAX, BASE}_LEVEL
Previously, if TEXTURE_IMMUTABLE_FORMAT was TRUE, the levels were allowed to
be set like usual, but ARB_texture_storage states:
> if TEXTURE_IMMUTABLE_FORMAT is TRUE, then level_base is clamped to the range
> [0, - 1] and level_max is then clamped to the range [level_base,
> - 1], where is the parameter passed the call to
> TexStorage* for the texture object
Reviewed-by: Matt Turner
Signed-off-by: Corey Richardson
---
src/mesa/main/texparam.c | 22 --
1 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/texparam.c b/src/mesa/main/texparam.c
index 3210995..757ae80 100644
--- a/src/mesa/main/texparam.c
+++ b/src/mesa/main/texparam.c
@@ -386,7 +386,13 @@ set_tex_parameteri(struct gl_context *ctx,
return GL_FALSE;
}
incomplete(ctx, texObj);
- texObj->BaseLevel = params[0];
+
+ /** See note about ARB_texture_storage below */
+ if (texObj->Immutable)
+ texObj->BaseLevel = MIN2(texObj->ImmutableLevels - 1, params[0]);
+ else
+ texObj->BaseLevel = params[0];
+
return GL_TRUE;
case GL_TEXTURE_MAX_LEVEL:
@@ -399,7 +405,19 @@ set_tex_parameteri(struct gl_context *ctx,
return GL_FALSE;
}
incomplete(ctx, texObj);
- texObj->MaxLevel = params[0];
+
+ /** From ARB_texture_storage:
+ * However, if TEXTURE_IMMUTABLE_FORMAT is TRUE, then level_base is
+ * clamped to the range [0, - 1] and level_max is then clamped
to
+ * the range [level_base, - 1], where is the parameter
+ * passed the call to TexStorage* for the texture object.
+ */
+ if (texObj->Immutable)
+ texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel,
+ texObj->ImmutableLevels - 1);
+ else
+ texObj->MaxLevel = params[0];
+
return GL_TRUE;
case GL_GENERATE_MIPMAP_SGIS:
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Mesa (9.1): get-pick-list: Ignore commits which CC mesa-stable unless they say "9.1"
Module: Mesa Branch: 9.1 Commit: a33ecd80749902ca72f4a42feadb509eae551e1b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a33ecd80749902ca72f4a42feadb509eae551e1b Author: Carl Worth Date: Thu Aug 1 13:34:30 2013 -0700 get-pick-list: Ignore commits which CC mesa-stable unless they say "9.1" With the recent creation of the 9.2 branch, we're now seeing a steady flow of new patches to mesa-stable@ intended for that branch. To avoid wasting effort trying to apply these to 9.1, we now require developers to specifically mention "9.1" to target the 9.1 branch. --- bin/get-pick-list.sh |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/bin/get-pick-list.sh b/bin/get-pick-list.sh index 0902fd0..0409341 100755 --- a/bin/get-pick-list.sh +++ b/bin/get-pick-list.sh @@ -14,7 +14,7 @@ git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\ sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked # Grep for commits that were marked as a candidate for the stable tree. -git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*mesa-stable\)' HEAD..origin/master |\ +git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*9\.1.*mesa-stable\)' HEAD..origin/master |\ while read sha do # Check to see whether the patch is on the ignore list. ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (9.1): Bump version to 9.1.6
Module: Mesa Branch: 9.1 Commit: 985e25402f4fb86ebd03741a0bc554e399a7b974 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=985e25402f4fb86ebd03741a0bc554e399a7b974 Author: Carl Worth Date: Thu Aug 1 14:15:38 2013 -0700 Bump version to 9.1.6 --- Makefile.am |2 +- configure.ac|2 +- src/mesa/main/version.h |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile.am b/Makefile.am index 9c03dd8..fba8556 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,7 +36,7 @@ check-local: # Rules for making release tarballs -PACKAGE_VERSION=9.1.5 +PACKAGE_VERSION=9.1.6 PACKAGE_DIR = Mesa-$(PACKAGE_VERSION) PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION) diff --git a/configure.ac b/configure.ac index 452b24f..550ee05 100644 --- a/configure.ac +++ b/configure.ac @@ -6,7 +6,7 @@ dnl Tell the user about autoconf.html in the --help output m4_divert_once([HELP_END], [ See docs/autoconf.html for more details on the options for Mesa.]) -AC_INIT([Mesa], [9.1.5], +AC_INIT([Mesa], [9.1.6], [https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa]) AC_CONFIG_AUX_DIR([bin]) AC_CONFIG_MACRO_DIR([m4]) diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index a069798..6eab691 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -35,7 +35,7 @@ struct gl_context; #define MESA_MAJOR 9 #define MESA_MINOR 1 #define MESA_PATCH 4 -#define MESA_VERSION_STRING "9.1.5" +#define MESA_VERSION_STRING "9.1.6" /* To make version comparison easy */ #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (9.1): docs: Add release notes for 9.1.6 release
Module: Mesa Branch: 9.1 Commit: 1ed76d697fccba03e72b1a48f3ce866984fa3899 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ed76d697fccba03e72b1a48f3ce866984fa3899 Author: Carl Worth Date: Thu Aug 1 14:21:21 2013 -0700 docs: Add release notes for 9.1.6 release --- docs/relnotes-9.1.6.html | 166 ++ 1 files changed, 166 insertions(+), 0 deletions(-) diff --git a/docs/relnotes-9.1.6.html b/docs/relnotes-9.1.6.html new file mode 100644 index 000..1e55b8e --- /dev/null +++ b/docs/relnotes-9.1.6.html @@ -0,0 +1,166 @@ +http://www.w3.org/TR/html4/loose.dtd";> + + + + Mesa Release Notes + + + + + + The Mesa 3D Graphics Library + + + + + +Mesa 9.1.6 Release Notes / August 1, 2013 + + +Mesa 9.1.6 is a bug fix release which fixes bugs found since the 9.1.5 release. + + +Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.1. OpenGL +3.1 is only available if requested at context creation +because GL_ARB_compatibility is not supported. + + +MD5 checksums + +TBD + + +New features +None. + +Bug fixes + +This list is likely incomplete. + + + +https://bugs.freedesktop.org/show_bug.cgi?id=47824";>Bug 47824 - osmesa using --enable-shared-glapi depends on libgl + +https://bugs.freedesktop.org/show_bug.cgi?id=62362";>Bug 62362 - Crash when using Wayland EGL platform + +https://bugs.freedesktop.org/show_bug.cgi?id=63435";>Bug 63435 - [Regression since 9.0] Flickering in EGL OpenGL full-screen window with swap interval 1 + +https://bugs.freedesktop.org/show_bug.cgi?id=64087";>Bug 64087 - Webgl conformance shader-with-non-reserved-words crash when mesa is compiled without --enable-debug + +https://bugs.freedesktop.org/show_bug.cgi?id=64330";>Bug 64330 - WebGL snake demo crash in loop_analysis.cpp:506: bool is_loop_terminator(ir_if*): assertion „inst != __null“ failed. + +https://bugs.freedesktop.org/show_bug.cgi?id=65236";>Bug 65236 - [i965] Rendering artifacts in VDrift/GL2 + +https://bugs.freedesktop.org/show_bug.cgi?id=66558";>Bug 66558 - RS690: 3D artifacts when playing SuperTuxKart + +https://bugs.freedesktop.org/show_bug.cgi?id=66847";>Bug 66847 - compilation broken with llvm 3.3 + +https://bugs.freedesktop.org/show_bug.cgi?id=66850";>Bug 66850 - glGenerateMipmap crashes when using GL_TEXTURE_2D_ARRAY with compressed internal format + +https://bugs.freedesktop.org/show_bug.cgi?id=66921";>Bug 66921 - [r300g] Heroes of Newerth: HiZ related corruption + +https://bugs.freedesktop.org/show_bug.cgi?id=67283";>Bug 67283 - VDPAU doesn't work on hybrid laptop through DRI_PRIME + + + +Changes +The full set of changes can be viewed by using the following GIT command: + + + git log mesa-9.1.4..mesa-9.1.5 + + +Andreas Boll (1): + + configure.ac: Require llvm-3.2 for r600g/radeonsi llvm backends + + +Brian Paul (4): + + mesa: handle 2D texture arrays in get_tex_rgba_compressed() + meta: handle 2D texture arrays in decompress_texture_image() + mesa: implement mipmap generation for compressed 2D array textures + mesa: improve free() cleanup in generate_mipmap_compressed() + + +Carl Worth (7): + + docs: Add 9.1.5 release md5sums + Merge 'origin/9.1' into stable + cherry-ignore: Drop 13 patches from the pick list + get-pick-list.sh: Include commits mentionining "CC: mesa-stable..." in pick list + get-pick-list: Allow for non-whitespace between "CC:" and "mesa-stable" + get-pick-list: Ignore commits which CC mesa-stable unless they say "9.1" + Bump version to 9.1.6 + + +Chris Forbes (5): + + i965/Gen4: Zero extra coordinates for ir_tex + i965/vs: Fix flaky texture swizzling + i965/vs: set up sampler state pointer for Gen4/5. + i965/vs: Put lod parameter in the correct place for Gen4 + i965/vs: Gen4/5: enable front colors if back colors are written + + +Christoph Bumiller (1): + + nv50,nvc0: s/uint16/uint32 for constant buffer offset + + +Dave Airlie (1): + + gallium/vl: add prime support + + +Eric Anholt (1): + + egl: Restore "bogus" DRI2 invalidate event code. + + +Jeremy Huddleston Sequoia (1): + + Apple: glFlush() is not needed with CGLFlushDrawable() + + +Kenneth Graunke (1): + + glsl: Classify "layout" like other identifiers. + + +Kristian Høgsberg (1): + + egl-wayland: Fix left-over wl_display_roundtrip() usage + + +Maarten Lankhorst (2): + + osmesa: link against static libglapi library too to get the gl exports + nvc0: force use of correct firmware file + + +Marek Olšák (4): + + r300g/swtcl: fix geometry corruption by uploading indices to a buffer + r300g/swtcl: fix a lockup in MSAA resolve + Revert "r300g: allow HiZ with a 16-bit zbuffer" + r600g: increase array size for shader inputs and outputs + + +Matt Turner (2): + + i965: NULL check prog on shader compilation failure. + i965/vs: Print
Mesa (9.1): docs: Add 9.1.6 release md5sums
Module: Mesa Branch: 9.1 Commit: ebc926a2067e6faa98e7f5008363202d5b2bbc21 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebc926a2067e6faa98e7f5008363202d5b2bbc21 Author: Carl Worth Date: Thu Aug 1 14:41:17 2013 -0700 docs: Add 9.1.6 release md5sums --- docs/relnotes-9.1.6.html |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/docs/relnotes-9.1.6.html b/docs/relnotes-9.1.6.html index 1e55b8e..965ee55 100644 --- a/docs/relnotes-9.1.6.html +++ b/docs/relnotes-9.1.6.html @@ -30,7 +30,9 @@ because GL_ARB_compatibility is not supported. MD5 checksums -TBD +443a2a352667294b53d56cb1a74114e9 MesaLib-9.1.6.tar.bz2 +08d3069cccd6821e5f33e0840bca0718 MesaLib-9.1.6.tar.gz +90aa7a6d9878cdbfcb055312f356d6b9 MesaLib-9.1.6.zip New features ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa: tag mesa-9.1.6: Mesa 9.1.6 release
Module: Mesa Branch: refs/tags/mesa-9.1.6 Tag:18955e14b9c85fb9f31e3ed9df106fd98f3af433 URL: http://cgit.freedesktop.org/mesa/mesa/tag/?id=18955e14b9c85fb9f31e3ed9df106fd98f3af433 Tagger: Carl Worth Date: Thu Aug 1 14:31:28 2013 -0700 Mesa 9.1.6 release ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965: Delete the BATCH_LOCALS macro.
Module: Mesa
Branch: master
Commit: fcb4ab6db12ec4287e5520c5148adfc2df079e19
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fcb4ab6db12ec4287e5520c5148adfc2df079e19
Author: Kenneth Graunke
Date: Sun Jul 7 19:17:02 2013 -0700
i965: Delete the BATCH_LOCALS macro.
This hasn't done anything in a long time, and it's only used in a couple
places...which means we couldn't use it without doing a bunch of work
anyway.
Signed-off-by: Kenneth Graunke
Reviewed-by: Matt Turner
---
src/mesa/drivers/dri/i965/intel_batchbuffer.h |4
src/mesa/drivers/dri/i965/intel_blit.c|2 --
2 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index e151eb6..15a9ca1 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -144,10 +144,6 @@ intel_batchbuffer_advance(struct brw_context *brw)
void intel_batchbuffer_cached_advance(struct brw_context *brw);
-/* Here are the crusty old macros, to be removed:
- */
-#define BATCH_LOCALS
-
#define BEGIN_BATCH(n) intel_batchbuffer_begin(brw, n, false)
#define BEGIN_BATCH_BLT(n) intel_batchbuffer_begin(brw, n, true)
#define OUT_BATCH(d) intel_batchbuffer_emit_dword(brw, d)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c
b/src/mesa/drivers/dri/i965/intel_blit.c
index 8cb8c73..b5857bb 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -284,7 +284,6 @@ intelEmitCopyBlit(struct brw_context *brw,
drm_intel_bo *aper_array[3];
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
- BATCH_LOCALS;
if (dst_tiling != I915_TILING_NONE) {
if (dst_offset & 4095)
@@ -537,7 +536,6 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
uint32_t BR13, CMD;
int pitch, cpp;
drm_intel_bo *aper_array[2];
- BATCH_LOCALS;
pitch = region->pitch;
cpp = region->cpp;
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Mesa (master): docs: Import 9.1.6 release notes, add news item.
Module: Mesa Branch: master Commit: 964b89e42a7d66202f38f39ceccd1776b72f52fd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=964b89e42a7d66202f38f39ceccd1776b72f52fd Author: Carl Worth Date: Thu Aug 1 15:12:25 2013 -0700 docs: Import 9.1.6 release notes, add news item. --- docs/index.html |6 ++ docs/relnotes.html |1 + docs/relnotes/9.1.6.html | 166 ++ 3 files changed, 173 insertions(+), 0 deletions(-) diff --git a/docs/index.html b/docs/index.html index f0c5170..30f58ab 100644 --- a/docs/index.html +++ b/docs/index.html @@ -16,6 +16,12 @@ News +August 1, 2013 + +Mesa 9.1.6 is released. +This is a bug fix release. + + July 17, 2013 Mesa 9.1.5 is released. diff --git a/docs/relnotes.html b/docs/relnotes.html index 3d391c0..e33835a 100644 --- a/docs/relnotes.html +++ b/docs/relnotes.html @@ -22,6 +22,7 @@ The release notes summarize what's new or changed in each Mesa release. 9.2 release notes +9.1.6 release notes 9.1.5 release notes 9.1.4 release notes 9.1.3 release notes diff --git a/docs/relnotes/9.1.6.html b/docs/relnotes/9.1.6.html new file mode 100644 index 000..ffc9522 --- /dev/null +++ b/docs/relnotes/9.1.6.html @@ -0,0 +1,166 @@ +http://www.w3.org/TR/html4/loose.dtd";> + + + + Mesa Release Notes + + + + + + The Mesa 3D Graphics Library + + + + + +Mesa 9.1.6 Release Notes / August 1, 2013 + + +Mesa 9.1.6 is a bug fix release which fixes bugs found since the 9.1.5 release. + + +Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.1. OpenGL +3.1 is only available if requested at context creation +because GL_ARB_compatibility is not supported. + + +MD5 checksums + +TBD + + +New features +None. + +Bug fixes + +This list is likely incomplete. + + + +https://bugs.freedesktop.org/show_bug.cgi?id=47824";>Bug 47824 - osmesa using --enable-shared-glapi depends on libgl + +https://bugs.freedesktop.org/show_bug.cgi?id=62362";>Bug 62362 - Crash when using Wayland EGL platform + +https://bugs.freedesktop.org/show_bug.cgi?id=63435";>Bug 63435 - [Regression since 9.0] Flickering in EGL OpenGL full-screen window with swap interval 1 + +https://bugs.freedesktop.org/show_bug.cgi?id=64087";>Bug 64087 - Webgl conformance shader-with-non-reserved-words crash when mesa is compiled without --enable-debug + +https://bugs.freedesktop.org/show_bug.cgi?id=64330";>Bug 64330 - WebGL snake demo crash in loop_analysis.cpp:506: bool is_loop_terminator(ir_if*): assertion „inst != __null“ failed. + +https://bugs.freedesktop.org/show_bug.cgi?id=65236";>Bug 65236 - [i965] Rendering artifacts in VDrift/GL2 + +https://bugs.freedesktop.org/show_bug.cgi?id=66558";>Bug 66558 - RS690: 3D artifacts when playing SuperTuxKart + +https://bugs.freedesktop.org/show_bug.cgi?id=66847";>Bug 66847 - compilation broken with llvm 3.3 + +https://bugs.freedesktop.org/show_bug.cgi?id=66850";>Bug 66850 - glGenerateMipmap crashes when using GL_TEXTURE_2D_ARRAY with compressed internal format + +https://bugs.freedesktop.org/show_bug.cgi?id=66921";>Bug 66921 - [r300g] Heroes of Newerth: HiZ related corruption + +https://bugs.freedesktop.org/show_bug.cgi?id=67283";>Bug 67283 - VDPAU doesn't work on hybrid laptop through DRI_PRIME + + + +Changes +The full set of changes can be viewed by using the following GIT command: + + + git log mesa-9.1.4..mesa-9.1.5 + + +Andreas Boll (1): + + configure.ac: Require llvm-3.2 for r600g/radeonsi llvm backends + + +Brian Paul (4): + + mesa: handle 2D texture arrays in get_tex_rgba_compressed() + meta: handle 2D texture arrays in decompress_texture_image() + mesa: implement mipmap generation for compressed 2D array textures + mesa: improve free() cleanup in generate_mipmap_compressed() + + +Carl Worth (7): + + docs: Add 9.1.5 release md5sums + Merge 'origin/9.1' into stable + cherry-ignore: Drop 13 patches from the pick list + get-pick-list.sh: Include commits mentionining "CC: mesa-stable..." in pick list + get-pick-list: Allow for non-whitespace between "CC:" and "mesa-stable" + get-pick-list: Ignore commits which CC mesa-stable unless they say "9.1" + Bump version to 9.1.6 + + +Chris Forbes (5): + + i965/Gen4: Zero extra coordinates for ir_tex + i965/vs: Fix flaky texture swizzling + i965/vs: set up sampler state pointer for Gen4/5. + i965/vs: Put lod parameter in the correct place for Gen4 + i965/vs: Gen4/5: enable front colors if back colors are written + + +Christoph Bumiller (1): + + nv50,nvc0: s/uint16/uint32 for constant buffer offset + + +Dave Airlie (1): + + gallium/vl: add prime support + + +Eric Anholt (1): + + egl: Restore "bogus" DRI2 invalidate event code. + + +Jeremy Huddleston Sequoia (1): + + Apple: glFlush() is not needed with CGLFlushD
Mesa (master): docs: Add md5sums to 9.1.6 release notes
Module: Mesa Branch: master Commit: 7f2f63409a6c030130aab71b9a7528ea4e5252b1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f2f63409a6c030130aab71b9a7528ea4e5252b1 Author: Carl Worth Date: Thu Aug 1 15:45:04 2013 -0700 docs: Add md5sums to 9.1.6 release notes --- docs/relnotes/9.1.6.html |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/docs/relnotes/9.1.6.html b/docs/relnotes/9.1.6.html index ffc9522..6687787 100644 --- a/docs/relnotes/9.1.6.html +++ b/docs/relnotes/9.1.6.html @@ -30,7 +30,9 @@ because GL_ARB_compatibility is not supported. MD5 checksums -TBD +443a2a352667294b53d56cb1a74114e9 MesaLib-9.1.6.tar.bz2 +08d3069cccd6821e5f33e0840bca0718 MesaLib-9.1.6.tar.gz +90aa7a6d9878cdbfcb055312f356d6b9 MesaLib-9.1.6.zip New features ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium: clarify shift behavior with shift count >= 32
Module: Mesa Branch: master Commit: 606132b4def69f7c5fa0fa436259e2fd163b0768 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=606132b4def69f7c5fa0fa436259e2fd163b0768 Author: Roland Scheidegger Date: Tue Jul 30 17:08:01 2013 +0200 gallium: clarify shift behavior with shift count >= 32 Previously, nothing was said what happens with shift counts exceeding bit width of the values to shift. In theory 3 behaviors are possible: 1) undefined (classic c definition) 2) just shift out all bits (so result is zero, or -1 potentially for ashr) 3) mask the shift count to bit width - 1 API's either require 3) or are ok with 1). In particular, GLSL (as well as a couple uninteresting legacy GL extensions) is happy with undefined, whereas both OpenCL and d3d10 require 3). Consequently, most hw also implements 3). So, for simplicity we just specify that 3) is required rather than saying undefined and then needing state trackers to work around it. Also while here specify shift count as a vector, not scalar. As far as I can tell this was a doc bug, neither state trackers nor drivers used scalar shift count. Reviewed-by: Jose Fonseca --- src/gallium/docs/source/tgsi.rst | 30 ++ 1 files changed, 18 insertions(+), 12 deletions(-) diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst index 0557ce0..8506b7e 100644 --- a/src/gallium/docs/source/tgsi.rst +++ b/src/gallium/docs/source/tgsi.rst @@ -1254,41 +1254,47 @@ Support for these opcodes indicated by PIPE_SHADER_CAP_INTEGERS (all of them?) .. opcode:: SHL - Shift Left + The shift count is masked with 0x1f before the shift is applied. + .. math:: - dst.x = src0.x << src1.x + dst.x = src0.x << (0x1f & src1.x) - dst.y = src0.y << src1.x + dst.y = src0.y << (0x1f & src1.y) - dst.z = src0.z << src1.x + dst.z = src0.z << (0x1f & src1.z) - dst.w = src0.w << src1.x + dst.w = src0.w << (0x1f & src1.w) .. opcode:: ISHR - Arithmetic Shift Right (of Signed Integer) + The shift count is masked with 0x1f before the shift is applied. + .. math:: - dst.x = src0.x >> src1.x + dst.x = src0.x >> (0x1f & src1.x) - dst.y = src0.y >> src1.x + dst.y = src0.y >> (0x1f & src1.y) - dst.z = src0.z >> src1.x + dst.z = src0.z >> (0x1f & src1.z) - dst.w = src0.w >> src1.x + dst.w = src0.w >> (0x1f & src1.w) .. opcode:: USHR - Logical Shift Right + The shift count is masked with 0x1f before the shift is applied. + .. math:: - dst.x = src0.x >> (unsigned) src1.x + dst.x = src0.x >> (unsigned) (0x1f & src1.x) - dst.y = src0.y >> (unsigned) src1.x + dst.y = src0.y >> (unsigned) (0x1f & src1.y) - dst.z = src0.z >> (unsigned) src1.x + dst.z = src0.z >> (unsigned) (0x1f & src1.z) - dst.w = src0.w >> (unsigned) src1.x + dst.w = src0.w >> (unsigned) (0x1f & src1.w) .. opcode:: UCMP - Integer Conditional Move ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): tgsi: obey clarified shift behavior
Module: Mesa
Branch: master
Commit: 7a72bef47e8731276ac4ca0b8c4d6d50366c1ec2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a72bef47e8731276ac4ca0b8c4d6d50366c1ec2
Author: Roland Scheidegger
Date: Tue Jul 30 17:16:17 2013 +0200
tgsi: obey clarified shift behavior
c shifts are undefined for shift counts exceeding (or matching) bit width,
so need to apply a mask (on x86 it actually would usually probably work as
shifts do masking on int domain shifts - unless some auto-vectorizer would
come along at last as simd domain does not mask the shift count).
Reviewed-by: Jose Fonseca
---
src/gallium/auxiliary/tgsi/tgsi_exec.c | 39 ++-
1 files changed, 27 insertions(+), 12 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c
b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 3ac6901..d991d4b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -3198,10 +3198,15 @@ micro_shl(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] << src1->u[0];
- dst->u[1] = src0->u[1] << src1->u[1];
- dst->u[2] = src0->u[2] << src1->u[2];
- dst->u[3] = src0->u[3] << src1->u[3];
+ unsigned masked_count;
+ masked_count = src1->u[0] & 0x1f;
+ dst->u[0] = src0->u[0] << masked_count;
+ masked_count = src1->u[1] & 0x1f;
+ dst->u[1] = src0->u[1] << masked_count;
+ masked_count = src1->u[2] & 0x1f;
+ dst->u[2] = src0->u[2] << masked_count;
+ masked_count = src1->u[3] & 0x1f;
+ dst->u[3] = src0->u[3] << masked_count;
}
static void
@@ -3307,10 +3312,15 @@ micro_ishr(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->i[0] = src0->i[0] >> src1->i[0];
- dst->i[1] = src0->i[1] >> src1->i[1];
- dst->i[2] = src0->i[2] >> src1->i[2];
- dst->i[3] = src0->i[3] >> src1->i[3];
+ unsigned masked_count;
+ masked_count = src1->i[0] & 0x1f;
+ dst->i[0] = src0->i[0] >> masked_count;
+ masked_count = src1->i[1] & 0x1f;
+ dst->i[1] = src0->i[1] >> masked_count;
+ masked_count = src1->i[2] & 0x1f;
+ dst->i[2] = src0->i[2] >> masked_count;
+ masked_count = src1->i[3] & 0x1f;
+ dst->i[3] = src0->i[3] >> masked_count;
}
static void
@@ -3449,10 +3459,15 @@ micro_ushr(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] >> src1->u[0];
- dst->u[1] = src0->u[1] >> src1->u[1];
- dst->u[2] = src0->u[2] >> src1->u[2];
- dst->u[3] = src0->u[3] >> src1->u[3];
+ unsigned masked_count;
+ masked_count = src1->u[0] & 0x1f;
+ dst->u[0] = src0->u[0] >> masked_count;
+ masked_count = src1->u[1] & 0x1f;
+ dst->u[1] = src0->u[1] >> masked_count;
+ masked_count = src1->u[2] & 0x1f;
+ dst->u[2] = src0->u[2] >> masked_count;
+ masked_count = src1->u[3] & 0x1f;
+ dst->u[3] = src0->u[3] >> masked_count;
}
static void
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Mesa (master): gallivm: obey clarified shift behavior
Module: Mesa
Branch: master
Commit: e7ed70a52e2d0efc11d1e9fe19938bc431f947c1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7ed70a52e2d0efc11d1e9fe19938bc431f947c1
Author: Roland Scheidegger
Date: Tue Jul 30 21:26:27 2013 +0200
gallivm: obey clarified shift behavior
llvm shifts are undefined for shift counts exceeding (or matching) bit width,
so need to apply a mask for the tgsi shift instructions.
v2: only use mask for the tgsi shift instructions, not for the build shift
helpers. None of the internal callers need this behavior, and while llvm can
optimize away the masking for constants there are legitimate cases where it
might not be able to do so even if we know that shift count must be smaller
than type width (currently all such callers do not use the build shift
helpers).
Reviewed-by: Zack Rusin
Reviewed-by: Jose Fonseca
---
src/gallium/auxiliary/gallivm/lp_bld_bitarit.c |8 +-
src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 24 +++-
2 files changed, 24 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_bitarit.c
b/src/gallium/auxiliary/gallivm/lp_bld_bitarit.c
index 97ae162..9892d7a 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_bitarit.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_bitarit.c
@@ -168,6 +168,7 @@ lp_build_not(struct lp_build_context *bld, LLVMValueRef a)
/**
* Shift left.
+ * Result is undefined if the shift count is not smaller than the type width.
*/
LLVMValueRef
lp_build_shl(struct lp_build_context *bld, LLVMValueRef a, LLVMValueRef b)
@@ -189,6 +190,7 @@ lp_build_shl(struct lp_build_context *bld, LLVMValueRef a,
LLVMValueRef b)
/**
* Shift right.
+ * Result is undefined if the shift count is not smaller than the type width.
*/
LLVMValueRef
lp_build_shr(struct lp_build_context *bld, LLVMValueRef a, LLVMValueRef b)
@@ -214,23 +216,25 @@ lp_build_shr(struct lp_build_context *bld, LLVMValueRef
a, LLVMValueRef b)
/**
* Shift left with immediate.
+ * The immediate shift count must be smaller than the type width.
*/
LLVMValueRef
lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm)
{
LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm);
- assert(imm <= bld->type.width);
+ assert(imm < bld->type.width);
return lp_build_shl(bld, a, b);
}
/**
* Shift right with immediate.
+ * The immediate shift count must be smaller than the type width.
*/
LLVMValueRef
lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm)
{
LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm);
- assert(imm <= bld->type.width);
+ assert(imm < bld->type.width);
return lp_build_shr(bld, a, b);
}
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
index d16ccae..f461661 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
@@ -1203,8 +1203,12 @@ ishr_emit_cpu(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
- emit_data->output[emit_data->chan] = lp_build_shr(&bld_base->int_bld,
- emit_data->args[0], emit_data->args[1]);
+ struct lp_build_context *int_bld = &bld_base->int_bld;
+ LLVMValueRef mask = lp_build_const_vec(int_bld->gallivm, int_bld->type,
+ int_bld->type.width - 1);
+ LLVMValueRef masked_count = lp_build_and(int_bld, emit_data->args[1], mask);
+ emit_data->output[emit_data->chan] = lp_build_shr(int_bld,
emit_data->args[0],
+ masked_count);
}
/* TGSI_OPCODE_ISLT (CPU Only) */
@@ -1439,8 +1443,12 @@ shl_emit_cpu(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
- emit_data->output[emit_data->chan] = lp_build_shl(&bld_base->uint_bld,
- emit_data->args[0], emit_data->args[1]);
+ struct lp_build_context *uint_bld = &bld_base->uint_bld;
+ LLVMValueRef mask = lp_build_const_vec(uint_bld->gallivm, uint_bld->type,
+ uint_bld->type.width - 1);
+ LLVMValueRef masked_count = lp_build_and(uint_bld, emit_data->args[1],
mask);
+ emit_data->output[emit_data->chan] = lp_build_shl(uint_bld,
emit_data->args[0],
+ masked_count);
}
/* TGSI_OPCODE_SIN (CPU Only) */
@@ -1647,8 +1655,12 @@ ushr_emit_cpu(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
- emit_data->output[emit_data->chan] = lp_build_shr(&bld_base->uint_bld,
- emit_data->args[0], emit_data->args[1]);
+ struct lp_build_context *uint_bld = &bld_base->uint_bld;
+ LLVMValueRef mask = lp_build_const_vec(uint_bld->gallivm, uint_bld->type,
+
Mesa (master): 36 new commits
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34c55b59251a9c6e9979c1c0094c5158ce3503cb Author: Paul Berry Date: Sun Jul 28 21:48:55 2013 -0700 main: Warn that geometry shader support is experimental. Geometry shader support in the Mesa front end is still fairly preliminary. Many features are untested, and the following things are known not to work: - The gl_in interface block - The gl_ClipDistance input - Transform feedback of geometry shader outputs - Constants that are new in GLSL 1.50 (e.g. gl_MaxGeometryInputComponents) This isn't a problem, since no back-end drivers currently enable geometry shaders. However, to make sure no one gets the wrong impression, emit a nasty warning to let the user know that geometry shader support isn't complete. Reviewed-by: Kenneth Graunke Reviewed-by: Ian Romanick URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cfefe6965d50d8b1b494396d7b3b16d87bb2060 Author: Paul Berry Date: Tue Jul 30 21:13:48 2013 -0700 glsl: Implement rules for geometry shader input sizes. Section 4.3.8.1 (Input Layout Qualifiers) of the GLSL 1.50 spec contains some tricky rules for how the sizes of geometry shader input arrays are related to the input layout specification. In essence, those rules boil down to the following: - If an input array declaration does not specify a size, and it follows an input layout declaration, it is sized according to the input layout. - If an input layout declaration follows an input array declaration that didn't specify a size, the input array declaration is given a size at the time the input layout declaration appears. - All input layout declarations and input array sizes must ultimately match. Inconsistencies are reported as soon as they are detected, at compile time if the inconsistency is within one compilation unit, otherwise at link time. - At least one compilation unit must contain an input layout declaration. (Note: the geom_array_resize_visitor class was contributed by Bryan Cain .) Reviewed-by: Ian Romanick Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20ae8e0c9168d900246d5940e07cf668dba8f0ce Author: Paul Berry Date: Wed Jul 24 14:57:24 2013 -0700 glsl: Allow geometry shader input instance arrays to be unsized. Reviewed-by: Kenneth Graunke Reviewed-by: Ian Romanick URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1f1d8522c4650f55fac3a57466c9788f80f82f6 Author: Paul Berry Date: Mon Jul 22 11:44:24 2013 -0700 glsl: Permit non-ubo input interface arrays to use non-const indexing. From the GLSL ES 3.00 spec: "All indexes used to index a uniform block array must be constant integral expressions." Similar text exists in GLSL specs since 1.50. When we implemented this, the only type of interface block supported by Mesa was uniform blocks, so we required all indexes used to index any interface block to be constant integral expressions. Now that we are adding interface block support for GLSL 1.50, we need a more specific check. Reviewed-by: Ian Romanick Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6065a87bce0c3fb0d9694c381c5a31b63e1f0300 Author: Eric Anholt Date: Wed Jun 12 18:12:40 2013 -0700 glsl: Cross-validate GS layout qualifiers while intrastage linking. This gets piglit's geometry-basic test running. TODO: Still need to validate that the GS layout qualifiers don't get used in places they shouldn't (like an interface block, or a particular shader input or output) Reviewed-by: Ian Romanick Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=010a6a8fd343537101e7ac5e8dfcf9b07fc841fb Author: Eric Anholt Date: Wed Jun 12 17:21:44 2013 -0700 glsl: Export the compiler's GS layout qualifiers to the gl_shader. Next step is to validate them at link time. v2 (Paul Berry ): Don't attempt to export the layout qualifiers in the event of a compile error, since some of them are set up by ast_to_hir(), and ast_to_hir() isn't guaranteed to have run in the event of a compile error. Reviewed-by: Kenneth Graunke v3 (Paul Berry ): Use PRIM_UNKNOWN to represent "not set in this shader". Reviewed-by: Ian Romanick URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=624b7bac76c3f70a3a110d114a3c1c327d3dad5f Author: Eric Anholt Date: Wed Jun 12 14:03:49 2013 -0700 glsl: Parse the GLSL 1.50 GS layout qualifiers. Limited semantic checking (compatibility between declarations, checking that they're in the right shader target, etc.) is done. v2: Remove
