[Mesa-dev] [Bug 39286] Segfault in pipe_get_tile_z
https://bugs.freedesktop.org/show_bug.cgi?id=39286 --- Comment #2 from Sven Arvidsson s...@whiz.se 2011-07-17 04:06:12 PDT --- Yes, it's working fine now, thanks! -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] g3dvl: check for existence of header/libs
On Jul 15, 2011 12:06 PM, Andy Furniss andy...@ukfsn.org wrote: Andy Furniss wrote: I have another problem though, vdpau-softpipe is not using my LD_LIBRARY_PATH so fails to find where my lvdpau is. As you can see from below r600 does use it and adds -L/home/andy/Src/Xorg-git/modular/lib and links OK. Maybe this doesn't come from LD_LIBRARY_PATH and instead it works by luck as my libdrm is in the same place - I guess it comes from pkgconfig as the r600 Makefile has - DRIVER_LIBS = $(shell pkg-config libdrm --libs) -lXfixes Yeah, that's he reason. You want to use LDFLAGS at build time. LD_LIBRARY_PATH is used at run time. -- Dan ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 39307] New: vdpau advertises support for MPEG1, but it's unimplemented
https://bugs.freedesktop.org/show_bug.cgi?id=39307 Summary: vdpau advertises support for MPEG1, but it's unimplemented Product: Mesa Version: git Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Other AssignedTo: mesa-dev@lists.freedesktop.org ReportedBy: aaalmo...@gmail.com According to vdpauinfo, MPEG1 profile is supported, but in decode.c:258 the switch doesn't have a branch for PIPE_VIDEO_PROFILE_MPEG1. The result is that the playback starts, but every frame is dropped (without any error message). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa 7.11 release candidate 1
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 07/08/2011 07:06 PM, Ian Romanick wrote: Mesa 7.11-rc1 has been released. This is a release candidate for the 7.11 development release. The tag in the GIT repository for Mesa 7.11-rc1 is 'mesa-7.11-rc1'. Mesa 7.11-rc1 is available for download at ftp://freedesktop.org/pub/mesa/7.11/ md5sums: bf6ac6e4f2ee23328b6d319a3344097d MesaLib-7.11-rc1.tar.gz b5dbc735ce705d5e36f74cf03d084512 MesaLib-7.11-rc1.tar.bz2 4b9cb99475cf3df965aa22d50b17e7ff MesaLib-7.11-rc1.zip 0d5c7bc63fe5b6aef801ced6143d5968 MesaGLUT-7.11-rc1.tar.gz 1194e352249d7890e60ced38cab98263 MesaGLUT-7.11-rc1.tar.bz2 a6a6c8884fad011c7bad9250691bac21 MesaGLUT-7.11-rc1.zip RC2 was supposed to be last Friday. It didn't happen because I ran out of time. I'm going to try again on Monday 7/18. The main thing that I didn't get done was resolving the issues with the tarballs that Stephan Raue and Andreas Radke reported on the mailing list. What are your IRC handles? I may ping you on Monday. I'm guessing that there will be an RC3 on Friday 7/22, and final on 7/29 come hell or high water. -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org/ iEYEARECAAYFAk4jO3gACgkQX1gOwKyEAw+9bgCgi4u+3Xst89w3Y43uqvCwP80p SHEAn2jg+dM0l37QTOlO8qfERNHUo2dU =+9fd -END PGP SIGNATURE- ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/2] glsl: Make prototype_string publicly available
From: Ian Romanick ian.d.roman...@intel.com Also clarify the documentation for one of the parameters. --- src/glsl/ast_function.cpp |6 -- src/glsl/ir.h |4 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp index 60a2c61..bdb73f4 100644 --- a/src/glsl/ast_function.cpp +++ b/src/glsl/ast_function.cpp @@ -62,8 +62,10 @@ process_parameters(exec_list *instructions, exec_list *actual_parameters, * * \param return_type Return type of the function. May be \c NULL. * \param nameName of the function. - * \param parameters Parameter list for the function. This may be either a - *formal or actual parameter list. Only the type is used. + * \param parameters List of \c ir_instruction nodes representing the + *parameter list for the function. This may be either a + *formal (\c ir_variable) or actual (\c ir_rvalue) + *parameter list. Only the type is used. * * \return * A ralloced string representing the prototype of the function. diff --git a/src/glsl/ir.h b/src/glsl/ir.h index 80ad3dd..9f27738 100644 --- a/src/glsl/ir.h +++ b/src/glsl/ir.h @@ -1669,4 +1669,8 @@ ir_has_call(ir_instruction *ir); extern void do_set_program_inouts(exec_list *instructions, struct gl_program *prog); +extern char * +prototype_string(const glsl_type *return_type, const char *name, +exec_list *parameters); + #endif /* IR_H */ -- 1.7.4.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] glsl: Reject shaders that contain static recursion
From: Ian Romanick ian.d.roman...@intel.com The GLSL 1.20 and later specs say: Recursion is not allowed, not even statically. Static recursion is present if the static function call graph of the program contains cycles. Recursion is detected and rejected both a compile-time and at link-time. The complie-time check happens to detect some cases that may be removed by various optimization passes. The spec doesn't seem to allow this, but other vendors (e.g., NVIDIA) appear to only check at link-time after all optimizations. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33885 --- src/glsl/Makefile |1 + src/glsl/ast_to_hir.cpp |2 + src/glsl/ir.h | 26 ++ src/glsl/ir_function_detect_recursion.cpp | 356 + src/glsl/linker.cpp |4 + 5 files changed, 389 insertions(+), 0 deletions(-) create mode 100644 src/glsl/ir_function_detect_recursion.cpp diff --git a/src/glsl/Makefile b/src/glsl/Makefile index e0776c1..d1422c2 100644 --- a/src/glsl/Makefile +++ b/src/glsl/Makefile @@ -39,6 +39,7 @@ CXX_SOURCES = \ ir.cpp \ ir_expression_flattening.cpp \ ir_function_can_inline.cpp \ + ir_function_detect_recursion.cpp \ ir_function.cpp \ ir_hierarchical_visitor.cpp \ ir_hv_accept.cpp \ diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 2e54e8c..843d755 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -83,6 +83,8 @@ _mesa_ast_to_hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) foreach_list_typed (ast_node, ast, link, state-translation_unit) ast-hir(instructions, state); + + detect_recursion_unlinked(state, instructions); } diff --git a/src/glsl/ir.h b/src/glsl/ir.h index 9f27738..50a9d6e 100644 --- a/src/glsl/ir.h +++ b/src/glsl/ir.h @@ -1635,6 +1635,32 @@ visit_exec_list(exec_list *list, ir_visitor *visitor); */ void validate_ir_tree(exec_list *instructions); +struct _mesa_glsl_parse_state; +struct gl_shader_program; + +/** + * Detect whether an unlinked shader contains static recursion + * + * If the list of instructions is determined to contain static recursion, + * \c _mesa_glsl_error will be called to emit error messages for each function + * that is in the recursion cycle. + */ +void +detect_recursion_unlinked(struct _mesa_glsl_parse_state *state, + exec_list *instructions); + +/** + * Detect whether a linked shader contains static recursion + * + * If the list of instructions is determined to contain static recursion, + * \c link_error_printf will be called to emit error messages for each function + * that is in the recursion cycle. In addition, + * \c gl_shader_program::LinkStatus will be set to false. + */ +void +detect_recursion_linked(struct gl_shader_program *prog, + exec_list *instructions); + /** * Make a clone of each IR instruction in a list * diff --git a/src/glsl/ir_function_detect_recursion.cpp b/src/glsl/ir_function_detect_recursion.cpp new file mode 100644 index 000..b82c659 --- /dev/null +++ b/src/glsl/ir_function_detect_recursion.cpp @@ -0,0 +1,356 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the Software), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file ir_function_detect_recursion.cpp + * Determine whether a shader contains static recursion. + * + * Consider the (possibly disjoint) graph of function calls in a shader. If a + * program contains recursion, this graph will contain a cycle. If a function + * is part of a cycle, it will have a caller and it will have a callee (it + * calls another function). + * + * To detect recursion, the function call graph is constructed. The graph is + * repeatedly reduced by removing any function that either has no callees + * (leaf functions) or
Re: [Mesa-dev] [PATCH 1/2] glsl: Make prototype_string publicly available
On Sun, 17 Jul 2011 13:03:24 -0700, Ian Romanick i...@freedesktop.org wrote: From: Ian Romanick ian.d.roman...@intel.com Also clarify the documentation for one of the parameters. Reviewed-by: Eric Anholt e...@anholt.net pgpanllojMr1w.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] Initial Common Subexpression Elimination implementation.
From: Vincent Lejeune v...@ovi.com
The algorithm can spot non adjacent operands.
Limitations :
- only works on basic block
- only works on binary expressions
---
src/glsl/Makefile |1 +
src/glsl/glsl_parser_extras.cpp |7 +-
src/glsl/ir_optimization.h|1 +
src/glsl/list.h |4 +-
src/glsl/opt_common_subexpression_elimination.cpp | 665 +
5 files changed, 674 insertions(+), 4 deletions(-)
create mode 100644 src/glsl/opt_common_subexpression_elimination.cpp
diff --git a/src/glsl/Makefile b/src/glsl/Makefile
index 4100414..68b98b2 100644
--- a/src/glsl/Makefile
+++ b/src/glsl/Makefile
@@ -83,6 +83,7 @@ CXX_SOURCES = \
opt_structure_splitting.cpp \
opt_swizzle_swizzle.cpp \
opt_tree_grafting.cpp \
+ opt_common_subexpression_elimination.cpp \
s_expression.cpp
LIBS = \
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index d9aa300..0a57386 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -776,7 +776,9 @@ do_common_optimization(exec_list *ir, bool linked, unsigned
max_unroll_iteration
{
GLboolean progress = GL_FALSE;
- progress = lower_instructions(ir, SUB_TO_ADD_NEG) || progress;
+
+ progress = do_common_subexpression_elimination(ir) || progress;
+ /*progress = lower_instructions(ir, SUB_TO_ADD_NEG) || progress;
if (linked) {
progress = do_function_inlining(ir) || progress;
@@ -807,12 +809,13 @@ do_common_optimization(exec_list *ir, bool linked,
unsigned max_unroll_iteration
progress = optimize_redundant_jumps(ir) || progress;
+
loop_state *ls = analyze_loop_variables(ir);
if (ls-loop_found) {
progress = set_loop_controls(ir, ls) || progress;
progress = unroll_loops(ir, ls, max_unroll_iterations) || progress;
}
- delete ls;
+ delete ls;*/
return progress;
}
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index dd26567..3604e4e 100644
--- a/src/glsl/ir_optimization.h
+++ b/src/glsl/ir_optimization.h
@@ -71,3 +71,4 @@ bool lower_variable_index_to_cond_assign(exec_list
*instructions,
bool lower_input, bool lower_output, bool lower_temp, bool lower_uniform);
bool lower_quadop_vector(exec_list *instructions, bool dont_lower_swz);
bool optimize_redundant_jumps(exec_list *instructions);
+bool do_common_subexpression_elimination(exec_list *instructions);
diff --git a/src/glsl/list.h b/src/glsl/list.h
index 1d46365..2478ab3 100644
--- a/src/glsl/list.h
+++ b/src/glsl/list.h
@@ -122,8 +122,8 @@ struct exec_node {
void remove()
{
- next-prev = prev;
- prev-next = next;
+ next-prev = prev;
+ prev-next = next;
next = NULL;
prev = NULL;
}
diff --git a/src/glsl/opt_common_subexpression_elimination.cpp
b/src/glsl/opt_common_subexpression_elimination.cpp
new file mode 100644
index 000..a360ecf
--- /dev/null
+++ b/src/glsl/opt_common_subexpression_elimination.cpp
@@ -0,0 +1,665 @@
+#include ir.h
+#include ir_visitor.h
+#include ir_hierarchical_visitor.h
+#include ir_basic_block.h
+#include ir_optimization.h
+#include glsl_types.h
+
+#include iostream
+#include cstring
+using namespace std;
+
+/*
+ * Do local CSE at the moment
+ */
+
+typedef struct _pattern
+{
+ ir_variable* operand1;
+ ir_expression_operation operation;
+ ir_variable* operand2;
+} pattern;
+
+void display_pattern(const pattern p)
+{
+ coutp.operand1-name p.operation p.operand2-name endl;
+}
+
+int list_size(const exec_list* lst)
+{
+ int result=0;
+ foreach_list_const(tmp,lst)
+ {
+ result++;
+ }
+ return result;
+}
+
+class element : public exec_node
+{
+public:
+ pattern element_pattern;
+ exec_list* dereferences;
+
+ element(pattern p,void* mem_ctx):element_pattern(p)
+ {
+ dereferences = new (mem_ctx) exec_list();
+ }
+
+ ~element()
+ {
+
+ }
+};
+
+class box:public exec_node
+{
+public:
+ void* content;
+
+ box(void* c):content(c)
+ {
+
+ }
+};
+
+bool find(exec_list* lst,void* ptr)
+{
+ foreach_list_const(tmp,lst)
+ {
+ if(tmp == ptr)
+ return true;
+ }
+ return false;
+}
+
+class list_pattern
+{
+ friend class expressions_recorder;
+protected:
+ void* mem_ctx;
+ exec_list* inner_list; // element* list
+
+ bool equal_pattern(pattern p1, pattern p2) const
+ {
+ return p1.operation == p2.operation p1.operand1 ==
p2.operand1 p1.operand2 == p2.operand2;
+ }
+
+ element* select_by_pattern(pattern p)
+ {
+ foreach_list(iterator,inner_list)
+ {
+ element* current_node = (element*) iterator;
+
[Mesa-dev] Mesa 7.11 Release Candidate 1 tarball issue
Another problem in the RC1 tarballs appears to be src/mesa/depend. This contains a pile of references to /usr/lib/gcc/x86_64-redhat-linux/4.6.0/include and will fail if you are not on that system. With that removed I am able to build the RC1 tarballs, but that doesn't mean there isn't something else wrong in the parts that I didn't build. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/10] i965: Reserve scratch space for debugger communication
Since the debug system routine will share scratch space with threads
doing register spilling, we must offset the registers to accommodate.
This is more easily accomplished (and less bug prone) in Mesa.
The debugger will only work with the new fragment shader backend.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 15 +--
src/mesa/drivers/dri/i965/brw_wm_emit.c |2 ++
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 1d89b8f..2cd613a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -455,6 +455,17 @@ fs_visitor::generate_discard(fs_inst *inst)
}
}
+static GLuint
+brw_get_scratch_offset(struct brw_context *brw, fs_inst *inst)
+{
+ /* Split buffer 50-50 */
+ if (brw-wm.debugging) {
+ return inst-offset + (brw-wm.scratch_bo-size / brw-wm_max_threads) /
2;
+ } else {
+ return inst-offset;
+ }
+}
+
void
fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src)
{
@@ -464,7 +475,7 @@ fs_visitor::generate_spill(fs_inst *inst, struct brw_reg
src)
retype(brw_message_reg(inst-base_mrf + 1), BRW_REGISTER_TYPE_UD),
retype(src, BRW_REGISTER_TYPE_UD));
brw_oword_block_write_scratch(p, brw_message_reg(inst-base_mrf), 1,
-inst-offset);
+brw_get_scratch_offset(brw, inst));
}
void
@@ -486,7 +497,7 @@ fs_visitor::generate_unspill(fs_inst *inst, struct brw_reg
dst)
brw_MOV(p, brw_null_reg(), dst);
brw_oword_block_read_scratch(p, dst, brw_message_reg(inst-base_mrf), 1,
- inst-offset);
+ brw_get_scratch_offset(brw, inst));
if (intel-gen == 4 !intel-is_g4x) {
/* gen4 errata: destination from a send can't be used as a
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c
b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index f61757a..4ac94ee 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1560,6 +1560,8 @@ static void emit_spill( struct brw_wm_compile *c,
mov (1) r0.21:d0x0080:d { Align1 NoMask }
send (16) null.01:uw m1 r0.08;8,1:uw 0x053003ff:ud
{ Align1 }
*/
+ if (p-brw-wm.debugging)
+ abort();
brw_oword_block_write_scratch(p, brw_message_reg(1), 2, slot);
}
--
1.7.6
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[Mesa-dev] [PATCH 04/10] i965: setup system routine
Upload the system routine as part of the invariant state if debugging.
Remove SIP setting if not debugging to make it more friendly for others
that may be debugging shaders or media kernels.
v2: removed comment per Chris
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index bc8ef78..5563ade 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -652,10 +652,14 @@ static void upload_invarient_state( struct brw_context
*brw )
}
}
- BEGIN_BATCH(2);
- OUT_BATCH(CMD_STATE_SIP 16 | (2 - 2));
- OUT_BATCH(0);
- ADVANCE_BATCH();
+ /* The system routine must be set after a change to Instruction base */
+ if (brw-wm.debugging) {
+ assert(brw-wm.sip_offset != 0);
+ BEGIN_BATCH(2);
+ OUT_BATCH(CMD_STATE_SIP 16 | (2 - 2));
+ OUT_BATCH(brw-wm.sip_offset);
+ ADVANCE_BATCH();
+ }
BEGIN_BATCH(1);
OUT_BATCH(brw-CMD_VF_STATISTICS 16 |
--
1.7.6
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[Mesa-dev] [PATCH 05/10] i965: emit breakpoints
Provide a function to allow emitting breakpoints in the instruction
oword. Use breakpoints when debugging.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
src/mesa/drivers/dri/i965/brw_eu.c |6 ++
src/mesa/drivers/dri/i965/brw_eu.h |1 +
src/mesa/drivers/dri/i965/brw_wm.c |3 +++
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c
b/src/mesa/drivers/dri/i965/brw_eu.c
index c1f2520..1af232c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -150,6 +150,12 @@ void brw_set_acc_write_control(struct brw_compile *p,
GLuint value)
p-current-header.acc_wr_control = value;
}
+void brw_set_breakpoint(struct brw_compile *p)
+{
+ if (p-brw-intel.gen = 6)
+ p-current-header.debug_control = 1;
+}
+
void brw_push_insn_state( struct brw_compile *p )
{
assert(p-current != p-stack[BRW_EU_MAX_INSN_STACK-1]);
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 72d50ea..ec7019f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -793,6 +793,7 @@ void brw_set_predicate_control( struct brw_compile *p,
GLuint pc );
void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse);
void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional );
void brw_set_acc_write_control(struct brw_compile *p, GLuint value);
+void brw_set_breakpoint( struct brw_compile *p );
void brw_init_compile(struct brw_context *, struct brw_compile *p,
void *mem_ctx);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index b97542f..459e33f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -229,6 +229,9 @@ bool do_wm_prog(struct brw_context *brw,
brw_init_compile(brw, c-func, c);
+ if (brw-wm.debugging)
+ brw_set_breakpoint(c-func);
+
if (prog prog-FragmentProgram) {
if (!brw_wm_fs_emit(brw, c, prog))
return false;
--
1.7.6
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[Mesa-dev] [PATCH 00/10] fs debugging: incorporated Chris' feedback
This is the revised patch series for fragment shader debugging. There is no major change, though of interest are: * forcewaked acts more like a daemon * forcewaked isn't needed for debugging only there for sample * i915 detection is now done by stating i915_forcewake_user_lock * register range checking fails for gen2/gen3 drm: intel/Makefile.am |3 ++- intel/intel_debug.h | 44 2 files changed, 46 insertions(+), 1 deletions(-) mesa: src/mesa/drivers/dri/i965/Makefile |1 + src/mesa/drivers/dri/i965/brw_context.h |6 + src/mesa/drivers/dri/i965/brw_eu.c |6 + src/mesa/drivers/dri/i965/brw_eu.h |1 + src/mesa/drivers/dri/i965/brw_fs_emit.cpp| 15 +- src/mesa/drivers/dri/i965/brw_misc_state.c | 12 +- src/mesa/drivers/dri/i965/brw_state.h|6 +- src/mesa/drivers/dri/i965/brw_state_cache.c | 49 +- src/mesa/drivers/dri/i965/brw_state_upload.c | 18 +- src/mesa/drivers/dri/i965/brw_wm.c | 27 +- src/mesa/drivers/dri/i965/brw_wm.h |2 + src/mesa/drivers/dri/i965/brw_wm_debug.c | 108 + src/mesa/drivers/dri/i965/brw_wm_emit.c |2 + src/mesa/drivers/dri/i965/gen6_wm_sr.c | 31 + src/mesa/drivers/dri/i965/gen_wm_sr.g4a |32826 ++ 15 files changed, 33087 insertions(+), 23 deletions(-) intel-gpu-tools: configure.ac |1 + debugger/Makefile.am | 12 + debugger/debug_rdata.c | 141 +++ debugger/eudb.c | 604 ++ debugger/system_routine/Makefile | 84 debugger/system_routine/eviction_macro.c | 48 +++ debugger/system_routine/pre_cpp.py | 123 ++ debugger/system_routine/sr.g4a | 277 ++ debugger/system_routine/test.g4a | 64 lib/Makefile.am |1 + lib/debug.h | 92 + lib/intel_chipset.h |8 + lib/intel_gpu_tools.h| 27 ++ lib/intel_mmio.c | 162 - lib/intel_reg.h |4 + lib/intel_reg_map.c | 178 + tools/Makefile.am|1 + tools/forcewaked.c | 106 ++ 18 files changed, 1932 insertions(+), 1 deletions(-) Thanks. Ben ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] st/mesa: Handle GL_MAP_INVALIDATE_BUFFER_BIT in st_bufferobj_map_range().
Alternatively, individual drivers could actually implement
PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE. As far as I can tell only svga
currently implements that, and st_bufferobj_map_range() seems to be the main
user. I wonder if in general PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is something
that should just be handled by the state trackers.
As for the actual implementation, we could also try a map with
PIPE_TRANSFER_DONTBLOCK first, and avoid invalidating _NEW_BUFFER_OBJECT in
some cases. I'm not sure if that's worth it without doing more benchmarking
though, since in the typical case GL_MAP_INVALIDATE_BUFFER_BIT will probably
imply that the buffer is in use.
Signed-off-by: Henri Verbeet hverb...@gmail.com
---
src/mesa/state_tracker/st_cb_bufferobjects.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_bufferobjects.c
b/src/mesa/state_tracker/st_cb_bufferobjects.c
index 7374bb0..7aa859e 100644
--- a/src/mesa/state_tracker/st_cb_bufferobjects.c
+++ b/src/mesa/state_tracker/st_cb_bufferobjects.c
@@ -332,6 +332,21 @@ st_bufferobj_map_range(struct gl_context *ctx, GLenum
target,
obj-Pointer = st_bufferobj_zero_length;
}
else {
+ if (flags PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
+ struct pipe_resource *buffer;
+
+ buffer = pipe_buffer_create(pipe-screen,
+ st_obj-buffer-bind,
+ st_obj-buffer-usage,
+ st_obj-buffer-width0);
+ if (buffer) {
+st_invalidate_state(ctx, _NEW_BUFFER_OBJECT);
+pipe_resource_reference(st_obj-buffer, NULL);
+st_obj-buffer = buffer;
+flags = ~PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
+ }
+ }
+
obj-Pointer = pipe_buffer_map_range(pipe,
st_obj-buffer,
offset, length,
--
1.7.2.5
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Re: [Mesa-dev] [PATCH 2/2] st/mesa: Handle GL_MAP_INVALIDATE_BUFFER_BIT in st_bufferobj_map_range().
PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE was added recently, and is the preferred
interface, because:
- it can give better performance when the kernel memory manager supports; it
requires less kernel roundtrips than try-map + create + map + dereference.
- it also allows the drivers to do more fancy implementations when kernel
doesn't, e.g., keep a round robin of buffers, to avoid consst, which can be
freed when memory is low
Preferably, all drivers should implement PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
-- they can simply internally do the try-map + create + map + dereference if
there's no way pass that flag to the kernel map ioctl.
If there are strong reasons to not support PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
in certain drivers, then a new PIPE CAP should be added, so that drivers that
do support don't limited to the lowest common denominator.
Note that this can happen in other places as well:
- glBufferData
- glTexImage of single level textures.
Jose
- Original Message -
Alternatively, individual drivers could actually implement
PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE. As far as I can tell only svga
currently implements that, and st_bufferobj_map_range() seems to be
the main
user. I wonder if in general PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is
something
that should just be handled by the state trackers.
As for the actual implementation, we could also try a map with
PIPE_TRANSFER_DONTBLOCK first, and avoid invalidating
_NEW_BUFFER_OBJECT in
some cases. I'm not sure if that's worth it without doing more
benchmarking
though, since in the typical case GL_MAP_INVALIDATE_BUFFER_BIT will
probably
imply that the buffer is in use.
Signed-off-by: Henri Verbeet hverb...@gmail.com
---
src/mesa/state_tracker/st_cb_bufferobjects.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_bufferobjects.c
b/src/mesa/state_tracker/st_cb_bufferobjects.c
index 7374bb0..7aa859e 100644
--- a/src/mesa/state_tracker/st_cb_bufferobjects.c
+++ b/src/mesa/state_tracker/st_cb_bufferobjects.c
@@ -332,6 +332,21 @@ st_bufferobj_map_range(struct gl_context *ctx,
GLenum target,
obj-Pointer = st_bufferobj_zero_length;
}
else {
+ if (flags PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
+ struct pipe_resource *buffer;
+
+ buffer = pipe_buffer_create(pipe-screen,
+ st_obj-buffer-bind,
+ st_obj-buffer-usage,
+ st_obj-buffer-width0);
+ if (buffer) {
+st_invalidate_state(ctx, _NEW_BUFFER_OBJECT);
+pipe_resource_reference(st_obj-buffer, NULL);
+st_obj-buffer = buffer;
+flags = ~PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
+ }
+ }
+
obj-Pointer = pipe_buffer_map_range(pipe,
st_obj-buffer,
offset, length,
--
1.7.2.5
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Re: [Mesa-dev] [PATCH] i965: fix timer query on gen6+
-Original Message-
From: Eric Anholt [mailto:e...@anholt.net]
Sent: 2011年7月17日 8:08
To: Zou, Nanhai; mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH] i965: fix timer query on gen6+
On Fri, 15 Jul 2011 18:07:51 +0800, Zou Nan hai nanhai@intel.com wrote:
on gen6+, PIPE_CONTROL reported timestamp counter is a
64 bits value, toggles every 80 ns
@@ -58,7 +58,10 @@ brw_queryobj_get_results(struct brw_query_object *query)
drm_intel_bo_map(query-bo, GL_FALSE);
results = query-bo-virtual;
if (query-Base.Target == GL_TIME_ELAPSED_EXT) {
- query-Base.Result += 1000 * ((results[1] 32) - (results[0]
32));
+ if (gen = 6)
+ query-Base.Result += 80 * (results[1] - results[0]);
+ else
+ query-Base.Result += 1000 * ((results[1] 32) - (results[0]
32));
You've mangled the whitespace here. Also, bits 32:63 appear to be
reserved and should be ignored.
I can't find that information in bspec. Bspec says it is a 64 bit value.
Thanks
Zou Nanhai
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