Re: [Mesa-dev] [PATCH] Avoid null pointer dereference when glXSwapBuffers is called with no bound context
The patch could fix the segmentation fault issue while calling function
glXSwapBuffers without active current context.
Tested-by: Sun Yi yi@intel.com
-Original Message-
From: mesa-dev-bounces+yi.sun=intel@lists.freedesktop.org
[mailto:mesa-dev-bounces+yi.sun=intel@lists.freedesktop.org] On Behalf
Of Brian Paul
Sent: Thursday, January 12, 2012 9:38 AM
To: Anuj Phogat
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH] Avoid null pointer dereference when
glXSwapBuffers is called with no bound context
On 01/11/2012 06:06 PM, Anuj Phogat wrote:
Calling glXSwapBuffers with no bound context causes segmentation fault in
function intelDRI2Flush. All the gl calls should be ignored after setting
the
current context to null. So the contents of framebuffer stay unchanged.
But the driver should not seg fault.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44614
Reported-by: Yi Sunyi@intel.com
Signed-off-by: Anuj Phogatanuj.pho...@gmail.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index ce96ddd..03c2a1e 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -115,13 +115,15 @@ intelDRI2Flush(__DRIdrawable *drawable)
GET_CURRENT_CONTEXT(ctx);
struct intel_context *intel = intel_context(ctx);
- if (intel-gen 4)
- INTEL_FIREVERTICES(intel);
+ if (intel != NULL) {
+ if (intel-gen 4)
+INTEL_FIREVERTICES(intel);
- intel-need_throttle = true;
+ intel-need_throttle = true;
- if (intel-batch.used)
- intel_batchbuffer_flush(intel);
+ if (intel-batch.used)
+intel_batchbuffer_flush(intel);
+ }
}
static const struct __DRI2flushExtensionRec intelFlushExtension = {
Someone from Intel should probably review this, but in the future
please prefix your commit message with the component being changed.
And try to keep lines in your commit message under 76 characters:
For example, something like:
intel: fix glXSwapBuffers crash when there's no context
Thanks.
-Brian
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Re: [Mesa-dev] [PATCH 7.11] gallium/dri: Handle xserver that doesn't send needless DRI2 invalidate events
On Fri, Jan 13, 2012 at 09:10:15AM +, Dave Airlie wrote:
On Sun, Dec 18, 2011 at 4:22 PM, Ville Syrjälä syrj...@sci.fi wrote:
Ever since xserver commit 531869448d07e00ae241120b59f35709d59c,
the server no longer sends invalidate events to clients, unless they
have performed a GetBuffers request since the drawable was last
invalidated.
If the drawable gets invalidated immediately after the GetBuffers
request was processed by the X server, it's possible that Xlib
will process the invalidate event while waiting for the GetBuffers
reply. So the server, thinking the client knows that the buffers
are invalid, is waiting for another GetBuffers request before
sending any more invalidate events. The client, on the other hand,
believes the buffers to be valid, and thus is expecting to receive
another invalidate event before it has to send another GetBuffers
request. The end result is that the client never again sends
a GetBuffers request.
To avoid this problem, take a snapshot of lastStamp before
doing GetBuffers, and retry if the snapshot and the current
lastStamp no longer match after the GetBuffers reply has been
processed.
Signed-off-by: Ville Syrjälä syrj...@sci.fi
---
It looks like master should already handle this, as there's a
retry loop inside st_framebuffer_validate(). I didn't test that
in practice though.
I'd really like to know if master can handle it before pulling a patch
that isn't in master into 7.11.
I now managed to test master as well, and in fact it's also affected
by this bug.
After thinking about it a bit more I can see why that is.
st_framebuffer_validate() has the retry loop all right, but when it
calls dri_st_framebuffer_validate() during the retry,
dri_st_framebuffer_validate() thinks that the buffers are valid and
doesn't call allocate_textures(). Hence the retry loop actually does
nothing useful in this case.
So the 7.11 fix can be applied to master as well (the patch applies to
master cleanly), or we could go for a slightly more simple fix for
master due to the pre-existing retry loop. I'll leave that decision up
to someone else.
This is the simple approach:
diff --git a/src/gallium/state_trackers/dri/common/dri_drawable.c
b/src/gallium/state_trackers/dri/common/dri_drawable.c
index 65b3d04..6effb11 100644
--- a/src/gallium/state_trackers/dri/common/dri_drawable.c
+++ b/src/gallium/state_trackers/dri/common/dri_drawable.c
@@ -53,6 +53,7 @@ dri_st_framebuffer_validate(struct st_framebuffer_iface
*stfbi,
unsigned statt_mask, new_mask;
boolean new_stamp;
int i;
+ unsigned int lastStamp;
statt_mask = 0x0;
for (i = 0; i count; i++)
@@ -66,7 +67,8 @@ dri_st_framebuffer_validate(struct st_framebuffer_iface
*stfbi,
* client stamp. It has the value of the server stamp when last
* checked.
*/
- new_stamp = (drawable-texture_stamp != drawable-dPriv-lastStamp);
+ lastStamp = drawable-dPriv-lastStamp;
+ new_stamp = (drawable-texture_stamp != lastStamp);
if (new_stamp || new_mask || screen-broken_invalidate) {
if (new_stamp drawable-update_drawable_info)
@@ -80,7 +82,7 @@ dri_st_framebuffer_validate(struct st_framebuffer_iface
*stfbi,
statt_mask |= (1 i);
}
- drawable-texture_stamp = drawable-dPriv-lastStamp;
+ drawable-texture_stamp = lastStamp;
drawable-texture_mask = statt_mask;
}
To verify my bugfix I used xtrace like so:
xtrace -n -k | tee mesa.log | grep -B1 Invalidate | grep Get
When the bug is tripped that will print the GetBuffers reply that was
being processed when the bad InvalidateBuffers event was received.
Using that xtrace incantation and glxgears I verified that both the
original patch and the simple patch fix the bug.
--
Ville Syrjälä
syrj...@sci.fi
http://www.sci.fi/~syrjala/
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Re: [Mesa-dev] [PATCH 0/4] nvfx: rework render temps code and fixes
[Sorry I only replied on nouveau ml, I saw the crosspost to mesa ml later, so I repost there] Le Tue, 10 Jan 2012 12:41:00 +0100 Lucas Stach d...@lynxeye.de a écrit: This patch series silences some unknown cap warnings and fixes up coding style (patch 1+4). The most important part of this series are the two patches in the middle. They rework the state_fb code, so that we are able to render to not 64 byte aligned targets, as this is the only real use-case for render temporaries this allows us to drop temp code completely and simplifies a lot of cases. This is only tested on nv49, but there should be nothing different in this area for other nv3x or nv4x gpus. I plan on working on top of that in the following days, so please review and apply as time permits. Thanks, Lucas Hello, I just tried on my NV34 the whole series. Here is what I noticed: - Seems rendering is a bit slower (in ioquake3, in the first map q3dm0, rendering the mirror and the portal causes more audio stuttering) but it it just my feeling. - ut2004demo hangs at start (display just one frame in the nvidia licence plate part), but the system does not crash, and the game can be killed. Do you want me to check which of your patches makes ut2004 hanging? -- Patrice Mandin WWW: http://pmandin.atari.org/ Programmeur Linux, Atari Spécialité: Développement, jeux who writes the code, decides ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/7] r600g: support for some integer ops
Tested on evergreen and I hope everything should work on r600/r700, though it needs to be tested (with glsl 1.30, gl 3.0, and PIPE_SHADER_CAP_INTEGERS enabled). I haven't tried to support cayman, can't test it anyway - probably some minor changes will be required to use this code with cayman. r600g: fix F2I on evergreen r600g: add FLT_TO_UINT opcode for evergreen r600g: implement F2U on evergreen r600g: implement IABS on r600-evergreen r600g: implement ISSG on r600-evergreen r600g: implement IDIV/UDIV on r600-evergreen r600g: add support for ISHR/USHR/SHL on r600-evergreen src/gallium/drivers/r600/r600_asm.c | 14 +- src/gallium/drivers/r600/r600_opcodes.h |2 +- src/gallium/drivers/r600/r600_shader.c | 414 ++- 3 files changed, 413 insertions(+), 17 deletions(-) -- 1.7.7.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/7] r600g: fix F2I on evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_shader.c | 51 +++-
1 files changed, 50 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 1633082..ee69c54 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2020,6 +2020,55 @@ static int tgsi_pow(struct r600_shader_ctx *ctx)
return tgsi_helper_tempx_replicate(ctx);
}
+static int tgsi_f2i(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+ unsigned write_mask = inst-Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
+
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
+
+ alu.dst.sel = ctx-temp_reg;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(alu.src[0], ctx-src[0], i);
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT);
+
+ tgsi_dst(ctx, inst-Dst[0], i, alu.dst);
+
+ alu.src[0].sel = ctx-temp_reg;
+ alu.src[0].chan = i;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ return 0;
+}
+
static int tgsi_ssg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
@@ -3940,7 +3989,7 @@ static struct r600_shader_tgsi_instruction
eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_END, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_end}, /* aka HALT */
/* gap */
{118, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
- {TGSI_OPCODE_F2I, 0,
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2},
+ {TGSI_OPCODE_F2I, 0,
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_f2i},
{TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
{TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT,
tgsi_op2},
{TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT,
tgsi_op2},
--
1.7.7.5
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[Mesa-dev] [PATCH 2/7] r600g: add FLT_TO_UINT opcode for evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com --- src/gallium/drivers/r600/r600_asm.c |3 +++ src/gallium/drivers/r600/r600_opcodes.h |2 +- 2 files changed, 4 insertions(+), 1 deletions(-) diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index fd4ec43..3b281c6 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -105,6 +105,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode * case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT: + case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE: @@ -178,6 +179,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode * case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT: + case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE: @@ -514,6 +516,7 @@ static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT || alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT || alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT || + alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT || alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS || alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE || alu-inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED || diff --git a/src/gallium/drivers/r600/r600_opcodes.h b/src/gallium/drivers/r600/r600_opcodes.h index bc000ed..a64df59 100644 --- a/src/gallium/drivers/r600/r600_opcodes.h +++ b/src/gallium/drivers/r600/r600_opcodes.h @@ -363,7 +363,7 @@ #define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_64 0x0097 #define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED_64 0x0098 #define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_64 0x0099 -/* TODO Fill in more ALU */ +#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x009A #define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x009B #define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x009C /* TODO Fill in more ALU */ -- 1.7.7.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/7] r600g: implement F2U on evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_shader.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index ee69c54..71ac027 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2052,7 +2052,7 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx)
continue;
memset(alu, 0, sizeof(struct r600_bytecode_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT);
+ alu.inst = ctx-inst_info-r600_opcode;
tgsi_dst(ctx, inst-Dst[0], i, alu.dst);
@@ -3997,7 +3997,7 @@ static struct r600_shader_tgsi_instruction
eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT,
tgsi_op2},
{TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
{TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT,
tgsi_op2_swap},
- {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
+ {TGSI_OPCODE_F2U, 0,
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_f2i},
{TGSI_OPCODE_U2F, 0,
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2},
{TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT,
tgsi_op2},
{TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
--
1.7.7.5
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[Mesa-dev] [PATCH 4/7] r600g: implement IABS on r600-evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_shader.c | 60
1 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 71ac027..9a0f76b 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2069,6 +2069,64 @@ static int tgsi_f2i(struct r600_shader_ctx *ctx)
return 0;
}
+static int tgsi_iabs(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+ unsigned write_mask = inst-Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
+
+ /* tmp = -src */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = ctx-temp_reg;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(alu.src[1], ctx-src[0], i);
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ /* dst = (src = 0 ? src : tmp) */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+ alu.dst.write = 1;
+
+ tgsi_dst(ctx, inst-Dst[0], i, alu.dst);
+
+ r600_bytecode_src(alu.src[0], ctx-src[0], i);
+ r600_bytecode_src(alu.src[1], ctx-src[0], i);
+ alu.src[2].sel = ctx-temp_reg;
+ alu.src[2].chan = i;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
+
+
static int tgsi_ssg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
@@ -3857,6 +3915,7 @@ static struct r600_shader_tgsi_instruction
r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_UARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT,
tgsi_r600_arl},
{TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
{TGSI_OPCODE_LAST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
};
@@ -4029,6 +4088,7 @@ static struct r600_shader_tgsi_instruction
eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT,
tgsi_eg_arl},
{TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
};
--
1.7.7.5
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[Mesa-dev] [PATCH 5/7] r600g: implement ISSG on r600-evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_shader.c | 63
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 9a0f76b..0e672de 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2125,6 +2125,67 @@ static int tgsi_iabs(struct r600_shader_ctx *ctx)
return 0;
}
+static int tgsi_issg(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+ unsigned write_mask = inst-Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
+
+ /* tmp = (src = 0 ? src : -1) */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = ctx-temp_reg;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(alu.src[0], ctx-src[0], i);
+ r600_bytecode_src(alu.src[1], ctx-src[0], i);
+ alu.src[2].sel = V_SQ_ALU_SRC_M_1_INT;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ /* dst = (tmp 0 ? 1 : tmp) */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT);
+ alu.is_op3 = 1;
+ alu.dst.write = 1;
+
+ tgsi_dst(ctx, inst-Dst[0], i, alu.dst);
+
+ alu.src[0].sel = ctx-temp_reg;
+ alu.src[0].chan = i;
+
+ alu.src[1].sel = V_SQ_ALU_SRC_1_INT;
+
+ alu.src[2].sel = ctx-temp_reg;
+ alu.src[2].chan = i;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
static int tgsi_ssg(struct r600_shader_ctx *ctx)
@@ -3916,6 +3977,7 @@ static struct r600_shader_tgsi_instruction
r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT,
tgsi_r600_arl},
{TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
+ {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg},
{TGSI_OPCODE_LAST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
};
@@ -4089,6 +4151,7 @@ static struct r600_shader_tgsi_instruction
eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT,
tgsi_eg_arl},
{TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
+ {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
};
--
1.7.7.5
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[Mesa-dev] [PATCH 6/7] r600g: implement IDIV/UDIV on r600-evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_shader.c | 226 +++-
1 files changed, 222 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 0e672de..376be56 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2020,6 +2020,224 @@ static int tgsi_pow(struct r600_shader_ctx *ctx)
return tgsi_helper_tempx_replicate(ctx);
}
+static int tgsi_idiv(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst =
ctx-parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+ unsigned write_mask = inst-Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
+ int tmp0 = ctx-temp_reg;
+ int tmp1 = r600_get_temp(ctx);
+ int unsigned_op = (ctx-inst_info-tgsi_opcode == TGSI_OPCODE_UDIV);
+
+ /* tmp0 = float(src0) */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+
+ if (unsigned_op)
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT);
+ else
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(alu.src[0], ctx-src[0], i);
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ if (!unsigned_op) {
+ /* tmp1 = tmp0=0 ? 0.5 : -0.5 for int*/
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = i;
+
+ alu.src[1].sel = V_SQ_ALU_SRC_0_5;
+
+ if (unsigned_op)
+ alu.src[2].sel = V_SQ_ALU_SRC_0;
+ else {
+ alu.src[2].sel = V_SQ_ALU_SRC_0_5;
+ alu.src[2].neg = 1;
+ }
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+ }
+
+ /* tmp0 = tmp0 + tmp1 for int */
+ /* tmp0 = tmp0 + 0.5 for uint */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = i;
+
+ if (unsigned_op)
+ alu.src[1].sel = V_SQ_ALU_SRC_0_5;
+ else {
+ alu.src[1].sel = tmp1;
+ alu.src[1].chan = i;
+ }
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ /* tmp1 = float(src1) */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+
+ if (unsigned_op)
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT);
+ else
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(alu.src[0], ctx-src[1], i);
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ /* tmp1 = 1.0/src1 */
+ for (i = 0; i 4; i++) {
+ if (!(write_mask (1i)))
+ continue;
+
+ memset(alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
+
+
[Mesa-dev] [PATCH 7/7] r600g: add support for ISHR/USHR/SHL on r600-evergreen
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
---
src/gallium/drivers/r600/r600_asm.c| 11 +++
src/gallium/drivers/r600/r600_shader.c | 12 ++--
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c
b/src/gallium/drivers/r600/r600_asm.c
index 3b281c6..23350e2 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -86,6 +86,9 @@ static inline unsigned int
r600_bytecode_get_num_operands(struct r600_bytecode *
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT:
+ case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT:
+ case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT:
+ case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT:
return 2;
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
@@ -161,6 +164,9 @@ static inline unsigned int
r600_bytecode_get_num_operands(struct r600_bytecode *
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT:
return 2;
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
@@ -505,10 +511,7 @@ static int is_alu_trans_unit_inst(struct r600_bytecode
*bc, struct r600_bytecode
/* Note that FLT_TO_INT_* instructions are vector-only
instructions
* on Evergreen, despite what the documentation says.
FLT_TO_INT
* can do both vector and scalar. */
- return alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT ||
- alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT ||
- alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT ||
- alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT ||
+ return alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT ||
alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT ||
alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT ||
alu-inst ==
EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT ||
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 376be56..87f42c0 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -4118,7 +4118,7 @@ static struct r600_shader_tgsi_instruction
r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_I2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT,
tgsi_op2_trans},
{TGSI_OPCODE_NOT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT,
tgsi_op2},
{TGSI_OPCODE_TRUNC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC,
tgsi_op2},
- {TGSI_OPCODE_SHL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
+ {TGSI_OPCODE_SHL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT,
tgsi_op2_trans},
/* gap */
{88,0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
{TGSI_OPCODE_AND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT,
tgsi_op2},
@@ -4160,7 +4160,7 @@ static struct r600_shader_tgsi_instruction
r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_IMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT,
tgsi_op2},
{TGSI_OPCODE_INEG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT,
tgsi_op2},
{TGSI_OPCODE_ISGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT,
tgsi_op2},
- {TGSI_OPCODE_ISHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
+ {TGSI_OPCODE_ISHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT,
tgsi_op2_trans},
{TGSI_OPCODE_ISLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT,
tgsi_op2},
{TGSI_OPCODE_F2U, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT,
tgsi_op2},
{TGSI_OPCODE_U2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT,
tgsi_op2_trans},
@@ -4173,7 +4173,7 @@ static struct r600_shader_tgsi_instruction
r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UMUL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT,
tgsi_op2},
{TGSI_OPCODE_USEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT,
tgsi_op2},
{TGSI_OPCODE_USGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT,
tgsi_op2},
- {TGSI_OPCODE_USHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
tgsi_unsupported},
+ {TGSI_OPCODE_USHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT,
tgsi_op2_trans},
[Mesa-dev] [Bug 40612] Mesa-demos: build error against current Mesa git master
https://bugs.freedesktop.org/show_bug.cgi?id=40612 --- Comment #1 from LoneVVolf lonew...@xs4all.nl 2012-01-15 08:01:05 PST --- I have found the same bug still exists, see http://lists.freedesktop.org/archives/mesa-dev/2012-January/017434.html -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/4] i965: Convert the build to using automake.
On Thu, Jan 12, 2012 at 20:52:33 -0500, Matt Turner wrote: On Thu, Jan 12, 2012 at 7:08 PM, Eric Anholt e...@anholt.net wrote: This does introduce a warning by the automake build system, that the missing-symbols test build is non-portable. That's true -- Mac OS X can't take something built as a loadable module and just link it as a library. Of course, we aren't building this on OS X at all, so it would be nice to be able to suppress it, but I haven't found a way. Still, the build is going to be much quieter than we have ever had before, so I think this is a fair tradeoff until we find a way to shut that warning up. --- If you want to still put i965_dri.so into the lib/ directory, here's what I've done for libglsl.so: all-local: libglsl.la if test ! -f $(top_srcdir)/$(LIB_DIR)/libglsl.so; then \ $(MKDIR_P) $(top_srcdir)/$(LIB_DIR); \ ln .libs/libglsl.so $(top_srcdir)/$(LIB_DIR)/libglsl.so; \ fi libglsl.so in srcdir? that sounds like it should be builddir instead. Not that mesa builds out of tree so far, but maybe automake will let us fix that. Cheers, Julien ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Avoid null pointer dereference when glXSwapBuffers is called with no bound context
On 01/11/2012 05:38 PM, Brian Paul wrote:
On 01/11/2012 06:06 PM, Anuj Phogat wrote:
Calling glXSwapBuffers with no bound context causes segmentation fault in
function intelDRI2Flush. All the gl calls should be ignored after
setting the
current context to null. So the contents of framebuffer stay unchanged.
But the driver should not seg fault.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44614
Reported-by: Yi Sunyi@intel.com
Signed-off-by: Anuj Phogatanuj.pho...@gmail.com
---
src/mesa/drivers/dri/intel/intel_screen.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index ce96ddd..03c2a1e 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -115,13 +115,15 @@ intelDRI2Flush(__DRIdrawable *drawable)
GET_CURRENT_CONTEXT(ctx);
struct intel_context *intel = intel_context(ctx);
- if (intel-gen 4)
- INTEL_FIREVERTICES(intel);
+ if (intel != NULL) {
+ if (intel-gen 4)
+ INTEL_FIREVERTICES(intel);
- intel-need_throttle = true;
+ intel-need_throttle = true;
- if (intel-batch.used)
- intel_batchbuffer_flush(intel);
+ if (intel-batch.used)
+ intel_batchbuffer_flush(intel);
+ }
}
static const struct __DRI2flushExtensionRec intelFlushExtension = {
Someone from Intel should probably review this, but in the future please
prefix your commit message with the component being changed. And try to
keep lines in your commit message under 76 characters:
For example, something like:
intel: fix glXSwapBuffers crash when there's no context
Thanks.
-Brian
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
I'd echo Brian's comment as well. When in doubt about a prefix, 'git
log' on that file will show you what other people have used.
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[Mesa-dev] RFC: New TGSI-LLVM conversion interface
Hi, The following patches add a new TGSI-LLVM interface to Gallium and adapt lp_bld_tgsi_soa.c to use the new interface. You can also find an updated version of the r600g LLVM backend that uses this interface here: git://people.freedesktop.org/~tstellar/mesa r600g-llvm-shader-Jan15-2012 Just a quick overview of the interface, implementors can: + Write functions for converting TGSI loads and stores to LLVM IR (lp_build_tgsi_context::emit_fetch_functions[TGSI_FILE_COUNT], lp_build_tgsi_context::emit_store) + Define Opcode Actions (struct lp_build_opcode_action) for generating LLVM IR from TGSI opcodes. Most TGSI opcodes have default Opcode Actions defined, so the implementor can reuse them or write his or her own. + Optionally define functions (lp_build_tgsi_context::emit_prologue, lp_build_tgsi_context:emit_epilogue) for inserting LLVM IR at the beginning or end of programs. Looking forward to questions and comments. Thanks, Tom Stellard ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/6] tgsi: Add output_type to struct tgsi_opcode_info
From: Tom Stellard thomas.stell...@amd.com
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 323
src/gallium/auxiliary/tgsi/tgsi_info.h | 34
2 files changed, 195 insertions(+), 162 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 5b26d8f..43f4f69 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -31,169 +31,168 @@
static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{
- { 1, 1, 0, 0, 0, 0, ARL, TGSI_OPCODE_ARL },
- { 1, 1, 0, 0, 0, 0, MOV, TGSI_OPCODE_MOV },
- { 1, 1, 0, 0, 0, 0, LIT, TGSI_OPCODE_LIT },
- { 1, 1, 0, 0, 0, 0, RCP, TGSI_OPCODE_RCP },
- { 1, 1, 0, 0, 0, 0, RSQ, TGSI_OPCODE_RSQ },
- { 1, 1, 0, 0, 0, 0, EXP, TGSI_OPCODE_EXP },
- { 1, 1, 0, 0, 0, 0, LOG, TGSI_OPCODE_LOG },
- { 1, 2, 0, 0, 0, 0, MUL, TGSI_OPCODE_MUL },
- { 1, 2, 0, 0, 0, 0, ADD, TGSI_OPCODE_ADD },
- { 1, 2, 0, 0, 0, 0, DP3, TGSI_OPCODE_DP3 },
- { 1, 2, 0, 0, 0, 0, DP4, TGSI_OPCODE_DP4 },
- { 1, 2, 0, 0, 0, 0, DST, TGSI_OPCODE_DST },
- { 1, 2, 0, 0, 0, 0, MIN, TGSI_OPCODE_MIN },
- { 1, 2, 0, 0, 0, 0, MAX, TGSI_OPCODE_MAX },
- { 1, 2, 0, 0, 0, 0, SLT, TGSI_OPCODE_SLT },
- { 1, 2, 0, 0, 0, 0, SGE, TGSI_OPCODE_SGE },
- { 1, 3, 0, 0, 0, 0, MAD, TGSI_OPCODE_MAD },
- { 1, 2, 0, 0, 0, 0, SUB, TGSI_OPCODE_SUB },
- { 1, 3, 0, 0, 0, 0, LRP, TGSI_OPCODE_LRP },
- { 1, 3, 0, 0, 0, 0, CND, TGSI_OPCODE_CND },
- { 0, 0, 0, 0, 0, 0, , 20 }, /* removed */
- { 1, 3, 0, 0, 0, 0, DP2A, TGSI_OPCODE_DP2A },
- { 0, 0, 0, 0, 0, 0, , 22 }, /* removed */
- { 0, 0, 0, 0, 0, 0, , 23 }, /* removed */
- { 1, 1, 0, 0, 0, 0, FRC, TGSI_OPCODE_FRC },
- { 1, 3, 0, 0, 0, 0, CLAMP, TGSI_OPCODE_CLAMP },
- { 1, 1, 0, 0, 0, 0, FLR, TGSI_OPCODE_FLR },
- { 1, 1, 0, 0, 0, 0, ROUND, TGSI_OPCODE_ROUND },
- { 1, 1, 0, 0, 0, 0, EX2, TGSI_OPCODE_EX2 },
- { 1, 1, 0, 0, 0, 0, LG2, TGSI_OPCODE_LG2 },
- { 1, 2, 0, 0, 0, 0, POW, TGSI_OPCODE_POW },
- { 1, 2, 0, 0, 0, 0, XPD, TGSI_OPCODE_XPD },
- { 0, 0, 0, 0, 0, 0, , 32 }, /* removed */
- { 1, 1, 0, 0, 0, 0, ABS, TGSI_OPCODE_ABS },
- { 1, 1, 0, 0, 0, 0, RCC, TGSI_OPCODE_RCC },
- { 1, 2, 0, 0, 0, 0, DPH, TGSI_OPCODE_DPH },
- { 1, 1, 0, 0, 0, 0, COS, TGSI_OPCODE_COS },
- { 1, 1, 0, 0, 0, 0, DDX, TGSI_OPCODE_DDX },
- { 1, 1, 0, 0, 0, 0, DDY, TGSI_OPCODE_DDY },
- { 0, 0, 0, 0, 0, 0, KILP, TGSI_OPCODE_KILP },
- { 1, 1, 0, 0, 0, 0, PK2H, TGSI_OPCODE_PK2H },
- { 1, 1, 0, 0, 0, 0, PK2US, TGSI_OPCODE_PK2US },
- { 1, 1, 0, 0, 0, 0, PK4B, TGSI_OPCODE_PK4B },
- { 1, 1, 0, 0, 0, 0, PK4UB, TGSI_OPCODE_PK4UB },
- { 1, 2, 0, 0, 0, 0, RFL, TGSI_OPCODE_RFL },
- { 1, 2, 0, 0, 0, 0, SEQ, TGSI_OPCODE_SEQ },
- { 1, 2, 0, 0, 0, 0, SFL, TGSI_OPCODE_SFL },
- { 1, 2, 0, 0, 0, 0, SGT, TGSI_OPCODE_SGT },
- { 1, 1, 0, 0, 0, 0, SIN, TGSI_OPCODE_SIN },
- { 1, 2, 0, 0, 0, 0, SLE, TGSI_OPCODE_SLE },
- { 1, 2, 0, 0, 0, 0, SNE, TGSI_OPCODE_SNE },
- { 1, 2, 0, 0, 0, 0, STR, TGSI_OPCODE_STR },
- { 1, 2, 1, 0, 0, 0, TEX, TGSI_OPCODE_TEX },
- { 1, 4, 1, 0, 0, 0, TXD, TGSI_OPCODE_TXD },
- { 1, 2, 1, 0, 0, 0, TXP, TGSI_OPCODE_TXP },
- { 1, 1, 0, 0, 0, 0, UP2H, TGSI_OPCODE_UP2H },
- { 1, 1, 0, 0, 0, 0, UP2US, TGSI_OPCODE_UP2US },
- { 1, 1, 0, 0, 0, 0, UP4B, TGSI_OPCODE_UP4B },
- { 1, 1, 0, 0, 0, 0, UP4UB, TGSI_OPCODE_UP4UB },
- { 1, 3, 0, 0, 0, 0, X2D, TGSI_OPCODE_X2D },
- { 1, 1, 0, 0, 0, 0, ARA, TGSI_OPCODE_ARA },
- { 1, 1, 0, 0, 0, 0, ARR, TGSI_OPCODE_ARR },
- { 0, 1, 0, 0, 0, 0, BRA, TGSI_OPCODE_BRA },
- { 0, 0, 0, 1, 0, 0, CAL, TGSI_OPCODE_CAL },
- { 0, 0, 0, 0, 0, 0, RET, TGSI_OPCODE_RET },
- { 1, 1, 0, 0, 0, 0, SSG, TGSI_OPCODE_SSG },
- { 1, 3, 0, 0, 0, 0, CMP, TGSI_OPCODE_CMP },
- { 1, 1, 0, 0, 0, 0, SCS, TGSI_OPCODE_SCS },
- { 1, 2, 1, 0, 0, 0, TXB, TGSI_OPCODE_TXB },
- { 1, 1, 0, 0, 0, 0, NRM, TGSI_OPCODE_NRM },
- { 1, 2, 0, 0, 0, 0, DIV, TGSI_OPCODE_DIV },
- { 1, 2, 0, 0, 0, 0, DP2, TGSI_OPCODE_DP2 },
- { 1, 2, 1, 0, 0, 0, TXL, TGSI_OPCODE_TXL },
- { 0, 0, 0, 0, 0, 0, BRK, TGSI_OPCODE_BRK },
- { 0, 1, 0, 1, 0, 1, IF, TGSI_OPCODE_IF },
- { 1, 1, 0, 0, 0, 1, , 75 }, /* removed */
- { 0, 1, 0, 0, 0, 1, , 76 }, /* removed */
- { 0, 0, 0, 1, 1, 1, ELSE, TGSI_OPCODE_ELSE },
- { 0, 0, 0, 0, 1, 0, ENDIF, TGSI_OPCODE_ENDIF },
- { 1, 0, 0, 0, 1, 0, , 79 }, /* removed */
- { 0, 0, 0, 0, 1, 0, , 80 }, /* removed */
- { 0, 1, 0, 0, 0, 0, PUSHA, TGSI_OPCODE_PUSHA },
- { 1, 0, 0, 0, 0, 0, POPA, TGSI_OPCODE_POPA },
- { 1, 1, 0, 0, 0, 0, CEIL, TGSI_OPCODE_CEIL },
- { 1, 1, 0, 0, 0, 0, I2F, TGSI_OPCODE_I2F },
- { 1, 1, 0, 0, 0, 0, NOT, TGSI_OPCODE_NOT },
- { 1, 1, 0, 0, 0, 0, TRUNC, TGSI_OPCODE_TRUNC },
- { 1, 2, 0, 0, 0, 0, SHL, TGSI_OPCODE_SHL },
- { 0, 0, 0, 0, 0, 0, , 88 }, /* removed */
- { 1, 2, 0, 0, 0, 0, AND, TGSI_OPCODE_AND },
- { 1, 2, 0, 0, 0, 0, OR, TGSI_OPCODE_OR },
- {
[Mesa-dev] [PATCH 2/6] gallivm: Add function lp_bld_gather_values()
From: Tom Stellard thomas.stell...@amd.com
---
src/gallium/auxiliary/gallivm/lp_bld_gather.c | 17 +
src/gallium/auxiliary/gallivm/lp_bld_gather.h |4
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_gather.c
b/src/gallium/auxiliary/gallivm/lp_bld_gather.c
index 0dc81b1..1bdd4e4 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_gather.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_gather.c
@@ -147,3 +147,20 @@ lp_build_gather(struct gallivm_state *gallivm,
return res;
}
+
+LLVMValueRef
+lp_build_gather_values(struct gallivm_state * gallivm,
+ LLVMValueRef * values,
+ unsigned value_count)
+{
+ LLVMTypeRef vec_type = LLVMVectorType(LLVMTypeOf(values[0]), value_count);
+ LLVMBuilderRef builder = gallivm-builder;
+ LLVMValueRef vec = LLVMGetUndef(vec_type);
+ unsigned i;
+
+ for (i = 0; i value_count; i++) {
+ LLVMValueRef index = lp_build_const_int32(gallivm, i);
+ vec = LLVMBuildInsertElement(builder, vec, values[i], index, );
+ }
+ return vec;
+}
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_gather.h
b/src/gallium/auxiliary/gallivm/lp_bld_gather.h
index 5b04131..8e4c07d 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_gather.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_gather.h
@@ -57,5 +57,9 @@ lp_build_gather(struct gallivm_state *gallivm,
LLVMValueRef base_ptr,
LLVMValueRef offsets);
+LLVMValueRef
+lp_build_gather_values(struct gallivm_state * gallivm,
+ LLVMValueRef * values,
+ unsigned value_count);
#endif /* LP_BLD_GATHER_H_ */
--
1.7.3.4
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[Mesa-dev] [PATCH 5/6] gallium: Move duplicated helper macros to tgsi_exec.h
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 219 +++
src/gallium/auxiliary/tgsi/tgsi_exec.h | 13 ++
src/gallium/auxiliary/tgsi/tgsi_ppc.c | 78 -
3 files changed, 148 insertions(+), 162 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 84a2676..1ad0b74 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -63,19 +63,6 @@
#include lp_bld_printf.h
-#define FOR_EACH_CHANNEL( CHAN )\
- for (CHAN = 0; CHAN NUM_CHANNELS; CHAN++)
-
-#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST)-Dst[0].Register.WriteMask (1 (CHAN)))
-
-#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
-
-#define FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
- FOR_EACH_CHANNEL( CHAN )\
- IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
-
#define NUM_CHANNELS 4
#define LP_MAX_INSTRUCTIONS 256
@@ -839,7 +826,7 @@ emit_fetch_predicate(
unsigned chan;
if (!inst-Instruction.Predicate) {
- FOR_EACH_CHANNEL( chan ) {
+ TGSI_FOR_EACH_CHANNEL( chan ) {
pred[chan] = NULL;
}
return;
@@ -853,7 +840,7 @@ emit_fetch_predicate(
index = inst-Predicate.Index;
assert(index LP_MAX_TGSI_PREDS);
- FOR_EACH_CHANNEL( chan ) {
+ TGSI_FOR_EACH_CHANNEL( chan ) {
unsigned swizzle = swizzles[chan];
/*
@@ -1203,7 +1190,7 @@ emit_kil(
memset(terms, 0, sizeof terms);
- FOR_EACH_CHANNEL( chan_index ) {
+ TGSI_FOR_EACH_CHANNEL( chan_index ) {
unsigned swizzle;
/* Unswizzle channel */
@@ -1217,7 +1204,7 @@ emit_kil(
}
mask = NULL;
- FOR_EACH_CHANNEL( chan_index ) {
+ TGSI_FOR_EACH_CHANNEL( chan_index ) {
if(terms[chan_index]) {
LLVMValueRef chan_mask;
@@ -1408,14 +1395,14 @@ emit_instruction(
assert(info-num_dst = 1);
if (info-num_dst) {
- FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
dst0[chan_index] = bld-base.undef;
}
}
switch (inst-Instruction.Opcode) {
case TGSI_OPCODE_ARL:
- FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
tmp0 = emit_fetch( bld, inst, 0, chan_index );
tmp0 = lp_build_floor(bld-base, tmp0);
dst0[chan_index] = tmp0;
@@ -1423,20 +1410,20 @@ emit_instruction(
break;
case TGSI_OPCODE_MOV:
- FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
dst0[chan_index] = emit_fetch( bld, inst, 0, chan_index );
}
break;
case TGSI_OPCODE_LIT:
- if( IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_X ) ) {
+ if(TGSI_IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_X ) ) {
dst0[TGSI_CHAN_X] = bld-base.one;
}
- if( IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Y ) ) {
+ if(TGSI_IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Y ) ) {
src0 = emit_fetch( bld, inst, 0, TGSI_CHAN_X );
dst0[TGSI_CHAN_Y] = lp_build_max( bld-base, src0, bld-base.zero);
}
- if( IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Z ) ) {
+ if(TGSI_IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Z ) ) {
/* XMM[1] = SrcReg[0]. */
tmp1 = emit_fetch( bld, inst, 0, TGSI_CHAN_Y );
/* XMM[1] = max(XMM[1], 0) */
@@ -1448,7 +1435,7 @@ emit_instruction(
tmp2 = lp_build_cmp(bld-base, PIPE_FUNC_GREATER, tmp0,
bld-base.zero);
dst0[TGSI_CHAN_Z] = lp_build_select(bld-base, tmp2, tmp1,
bld-base.zero);
}
- if( IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_W ) ) {
+ if(TGSI_IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_W ) ) {
dst0[TGSI_CHAN_W] = bld-base.one;
}
break;
@@ -1457,7 +1444,7 @@ emit_instruction(
/* TGSI_OPCODE_RECIP */
src0 = emit_fetch( bld, inst, 0, TGSI_CHAN_X );
res = lp_build_rcp(bld-base, src0);
- FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
dst0[chan_index] = res;
}
break;
@@ -1467,47 +1454,47 @@ emit_instruction(
src0 = emit_fetch( bld, inst, 0, TGSI_CHAN_X );
src0 = lp_build_abs(bld-base, src0);
res = lp_build_rsqrt(bld-base, src0);
- FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
+ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
dst0[chan_index] = res;
}
break;
case TGSI_OPCODE_EXP:
- if (IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_X ) ||
- IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Y ) ||
- IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_Z )) {
+ if (TGSI_IS_DST0_CHANNEL_ENABLED( inst, TGSI_CHAN_X ) ||
+ TGSI_IS_DST0_CHANNEL_ENABLED( inst,
[Mesa-dev] [PATCH] util: Silence GCC unused-but-set-variable warning.
Fix this GCC 4.6 warning with 64-bit builds.
u_debug_stack.c: In function ‘debug_backtrace_capture’:
u_debug_stack.c:45:17: warning: variable ‘frame_pointer’ set but not
used [-Wunused-but-set-variable]
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/auxiliary/util/u_debug_stack.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_debug_stack.c
b/src/gallium/auxiliary/util/u_debug_stack.c
index 24e039f..558b911 100644
--- a/src/gallium/auxiliary/util/u_debug_stack.c
+++ b/src/gallium/auxiliary/util/u_debug_stack.c
@@ -86,6 +86,8 @@ debug_backtrace_capture(struct debug_stack_frame *backtrace,
frame_pointer = next_frame_pointer;
}
+#else
+ (void) frame_pointer;
#endif
while(nr_frames) {
--
1.7.8.3
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[Mesa-dev] [PATCH] llvmpipe: Remove unused variable 'packed' from lp_test_round.
Fix this GCC warning. lp_test_round.c: In function ‘test_round’: lp_test_round.c:126:13: warning: variable ‘packed’ set but not used [-Wunused-but-set-variable] Signed-off-by: Vinson Lee v...@freedesktop.org --- src/gallium/drivers/llvmpipe/lp_test_round.c |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/llvmpipe/lp_test_round.c b/src/gallium/drivers/llvmpipe/lp_test_round.c index 4edee4a..8adb259 100644 --- a/src/gallium/drivers/llvmpipe/lp_test_round.c +++ b/src/gallium/drivers/llvmpipe/lp_test_round.c @@ -123,7 +123,6 @@ test_round(struct gallivm_state *gallivm, unsigned verbose, FILE *fp) char *error = NULL; test_round_t round_func, trunc_func, floor_func, ceil_func; float unpacked[4]; - unsigned packed; boolean success = TRUE; int i; @@ -145,7 +144,6 @@ test_round(struct gallivm_state *gallivm, unsigned verbose, FILE *fp) ceil_func = (test_round_t) pointer_to_func(LLVMGetPointerToGlobal(engine, test_ceil)); memset(unpacked, 0, sizeof unpacked); - packed = 0; if (0) LLVMDumpModule(module); -- 1.7.8.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/4] Use AC_PROG_YACC/LEX
On 12-01-14 11:16 AM, Matt Turner wrote: Needed for automake. Using AC_PROG_PATH(bison/flex) causes automake to fail to build .y and .l files. It is up to the builder to use bison/flex instead of yacc/lex. Signed-off-by: Matt Turner matts...@gmail.com --- configs/autoconf.in |4 ++-- configure.ac| 13 - 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/configs/autoconf.in b/configs/autoconf.in index 3e5da79..f5b5a94 100644 --- a/configs/autoconf.in +++ b/configs/autoconf.in @@ -62,8 +62,8 @@ PYTHON2 = @PYTHON2@ PYTHON_FLAGS = -t -O -O # Flex and Bison for GLSL compiler -FLEX = @FLEX@ -BISON = @BISON@ +FLEX = @LEX@ +BISON = @YACC@ # Library names (base name) GL_LIB = @GL_LIB@ diff --git a/configure.ac b/configure.ac index 388e180..97c0f3e 100644 --- a/configure.ac +++ b/configure.ac @@ -53,11 +53,14 @@ if test x$MKDEP = x; then AC_MSG_ERROR([makedepend is required to build Mesa]) fi -AC_PATH_PROG([FLEX], [flex]) -test x$FLEX = x AC_MSG_ERROR([flex is needed to build Mesa]) - -AC_PATH_PROG([BISON], [bison]) -test x$BISON = x AC_MSG_ERROR([bison is needed to build Mesa]) +AC_PROG_YACC +AC_PATH_PROG([YACC_INST], $YACC) +if test ! -f $srcdir/gram.c; then +if test -z $YACC_INST; then +AC_MSG_ERROR([yacc not found - unable to compile gram.y]) +fi +fi +AC_PROG_LEX Have you tested this patch? The files gram.c and gram.y are the files from the modules where the code was obtained. You need to replace this with an actual filename from mesa, for example, glcpp-parse.y with the propoer subdirs. The reasons for this test is to allow building from a tarball when bison/flex are not available, but the generated code is. dnl Our fallback install-sh is a symlink to minstall. Use the existing dnl configuration in that case. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
