Re: [Mesa-dev] ir_builder take 2
On 04/09/2012 02:22 PM, Eric Anholt wrote:
Here's the udpated ir_builder changeset. Now at +140 lines, I think
I'll still land it given that idr has said he's interested in it for
the ARB programs to GLSL conversion work. It now uses C++ tricks
(noted in a big comment) to get compile-time type checking and
ir_dereference_variable generation. Oh, and it actually passes
piglit.
Eric,
This series is fantastic! The code is so much more readable. You can
actually just read through it and understand what's going on now,
without getting lost in derefs, deref copies, and bizarre 2, 2, 2, 3, 3
swizzle representations.
This has my wholehearted approval. For the series:
Reviewed-by: Kenneth Graunke
As a follow-on clean-up, it'd be really sweet to see:
operand(float x)
{
return new(...) ir_constant(x);
}
because then you could just do: mul(temp, 0.5). So simple and clean! :)
Of course, that assumes you have a mem_ctx to put where I wrote "...",
and...well...you don't.
It makes me wonder if we want to rework this to thread a memory context
through somehow, rather than using ralloc_parent. Classes, explicit
argument, or #define hackery, I guess. Who knows if it's worth it.
I'd love to play around with this more sometime, at any rate.
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Re: [Mesa-dev] [PATCH 4/6] glsl: Make a little tracking class for emitting IR lists.
On 04/09/2012 02:22 PM, Eric Anholt wrote:
This lets us significantly shorten p->instructions->push_tail(ir), and
will be used in a few more places.
---
src/glsl/ir_builder.cpp |6 +++
src/glsl/ir_builder.h|8
src/mesa/main/ff_fragment_shader.cpp | 78 --
3 files changed, 42 insertions(+), 50 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 29cc9bc..98ac3c1 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -28,6 +28,12 @@ using namespace ir_builder;
namespace ir_builder {
+void
+ir_factory::emit(ir_instruction *ir)
+{
+ instructions->push_tail(ir);
+}
+
ir_swizzle *
swizzle(operand a, int swizzle, int components)
{
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index d2c729a..350f9a3 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -50,6 +50,14 @@ public:
ir_rvalue *val;
};
+class ir_factory {
+public:
+ void emit(ir_instruction *ir);
+
+ exec_list *instructions;
+ void *mem_ctx;
+};
+
ir_expression *expr(ir_expression_operation op, operand a, operand b);
ir_expression *add(operand a, operand b);
ir_expression *sub(operand a, operand b);
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index bc77ebd..555df42 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -511,12 +511,11 @@ static GLuint make_state_key( struct gl_context *ctx,
struct state_key *key )
/** State used to build the fragment program:
*/
-struct texenv_fragment_program {
+class texenv_fragment_program : public ir_factory {
+public:
struct gl_shader_program *shader_program;
struct gl_shader *shader;
- exec_list *instructions;
exec_list *top_instructions;
- void *mem_ctx;
struct state_key *state;
ir_variable *src_texture[MAX_TEXTURE_COORD_UNITS];
@@ -827,10 +826,9 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
ir_variable *temp_var = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
"texenv_combine",
ir_var_temporary);
- p->instructions->push_tail(temp_var);
+ p->emit(temp_var);
ir_dereference *deref;
- ir_assignment *assign;
ir_rvalue *val;
/* Emit the RGB and A combine ops
@@ -846,8 +844,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val));
}
else if (key->unit[unit].ModeRGB == MODE_DOT3_RGBA_EXT ||
key->unit[unit].ModeRGB == MODE_DOT3_RGBA) {
@@ -859,8 +856,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (rgb_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val));
}
else {
/* Need to do something to stop from re-emitting identical
@@ -874,8 +870,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (rgb_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_XYZ);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_XYZ));
val = emit_combine(p, unit,
key->unit[unit].NumArgsA,
@@ -885,8 +880,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (alpha_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_W);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_W));
}
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
@@ -923,7 +917,6 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
static void load_texture( struct texenv_fragment_program *p, GLuint unit )
{
ir_dereference *deref;
- ir_assignment *assign;
if (p->src_texture[unit])
return;
@@ -948,12 +941,11 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
p->src_texture[unit] = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
"dummy_tex",
ir_var_temporary);
- p->instructions->push_tail(p->src_texture[unit]);
+ p->emit(p->sr
Re: [Mesa-dev] [PATCH 1/6] glsl: Create an ir_builder helper for hand-generating IR.
On 04/09/2012 02:22 PM, Eric Anholt wrote:
The C++ constructors with placement new, while functional, are
extremely verbose, leading to generation of simple GLSL IR expressions
like (a * b + c * d) expanding to many lines of code and using lots of
temporary variables. By creating a new ir_builder.h that puts simple
generators in our namespace and taking advantage of ralloc_parent(),
we can generate much more compact code, at a minor runtime cost.
---
src/glsl/Makefile.sources|1 +
src/glsl/ir_builder.cpp | 69 ++
src/glsl/ir_builder.h| 35 ++
src/mesa/main/ff_fragment_shader.cpp | 128 --
4 files changed, 151 insertions(+), 82 deletions(-)
create mode 100644 src/glsl/ir_builder.cpp
create mode 100644 src/glsl/ir_builder.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 06728da..4e3b074 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -26,6 +26,7 @@ LIBGLSL_CXX_FILES := \
glsl_symbol_table.cpp \
hir_field_selection.cpp \
ir_basic_block.cpp \
+ ir_builder.cpp \
ir_clone.cpp \
ir_constant_expression.cpp \
ir.cpp \
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
new file mode 100644
index 000..c699e24
--- /dev/null
+++ b/src/glsl/ir_builder.cpp
@@ -0,0 +1,69 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "ir_builder.h"
+
+using namespace ir_builder;
+
+namespace ir_builder {
+
+ir_expression *
+expr(ir_expression_operation op,
+ ir_rvalue *a, ir_rvalue *b)
+{
+ void *mem_ctx = ralloc_parent(a);
+
+ return new(mem_ctx) ir_expression(op, a->as_rvalue(), b->as_rvalue());
:) You just want ir_expression(op, a, b) here.
Harmless, though, since you delete this code in the next patch anyway.
With or without that change,
Reviewed-by: Kenneth Graunke
+}
+
+ir_expression *add(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_add, a, b);
+}
+
+ir_expression *sub(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_sub, a, b);
+}
+
+ir_expression *mul(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_mul, a, b);
+}
+
+ir_expression *dot(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_dot, a, b);
+}
+
+ir_expression *
+saturate(ir_rvalue *a)
+{
+ void *mem_ctx = ralloc_parent(a);
+
+ return expr(ir_binop_max,
+ expr(ir_binop_min, a, new(mem_ctx) ir_constant(1.0f)),
+ new(mem_ctx) ir_constant(0.0f));
+}
+
+} /* namespace ir_builder */
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
new file mode 100644
index 000..5d6f476
--- /dev/null
+++ b/src/glsl/ir_builder.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
[Mesa-dev] [Bug 39219] libgl conflict with xbmc causes lock up on xbmc exit
https://bugs.freedesktop.org/show_bug.cgi?id=39219 --- Comment #12 from Shawn Landden 2012-04-09 22:27:00 PDT --- xserver-xorg-video-radeon (1:6.14.99+git20120330.de2419e5-0ubuntu0sarvatt2) ... xserver-xorg-core (2:1.12.0.901+git20120406+server-1.12-branch.259aa5a6-0ubuntu0ricotz2) ... libdrm2 (2.4.33+git20120403.43704256-0ubuntu0ricotz) ... libgl1-mesa-dri (8.0.2+git20120330+8.0.54f73916-0ubuntu0sarvatt) ... -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 39219] libgl conflict with xbmc causes lock up on xbmc exit
https://bugs.freedesktop.org/show_bug.cgi?id=39219 Shawn Landden changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED | --- Comment #11 from Shawn Landden 2012-04-09 22:25:47 PDT --- I'm getting this problem with XBMC from the xserssion and ubuntu precise xorg-edgers can i get a commit sha1 for the supposed fix? backtrace in hang: #0 0x7f2ae9fd6148 in pthread_join (threadid=139821913728768, thread_return=0x0) at pthread_join.c:89 #1 0x0068306b in CXHandle::~CXHandle() () #2 0x00683109 in CXHandle::~CXHandle() () #3 0x00682e86 in CloseHandle(CXHandle*) () #4 0x00e6d504 in CThread::~CThread() () #5 0x7f2ae5ed3921 in __run_exit_handlers (status=0, listp=0x7f2ae624e688, run_list_atexit=true) at exit.c:78 #6 0x7f2ae5ed39a5 in __GI_exit (status=) at exit.c:100 #7 0x7f2ae5eb9774 in __libc_start_main (main=0x660530 , argc=2, ubp_av=0x7fffd704e9d8, init=, fini=, rtld_fini=, stack_end=0x7fffd704e9c8) at libc-start.c:258 #8 0x00661319 in _start () -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mapi: Fix Android build
On 04/09/2012 05:05 PM, Chad Versace wrote:
> The Android build was broken by
> commit ca760181b4420696c7e86aa2951d7203522ad1e8
> Author: Kristian Høgsberg
> Date: Fri Mar 16 12:55:40 2012 -0400
> Subject: shared-glapi: Convert to automake
>
> The guilty change in that commit was changing the variable pattern in
> sources.mak from
> FOO_FILE := bar.c
> to
> FOO_FILE := $(TOP)/src/mapi/mapi/bar.c
>
> Source file paths in Android makefiles must be relative to the makefile.
> To fix this, I reverted the variable pattern back to `FOO_FILE := bar.c`.
>
> CC: Kristian Høgsberg
> Signed-off-by: Chad Versace
> ---
> src/mapi/Android.mk |2 +-
> src/mapi/es1api/Makefile |4 ++--
> src/mapi/glapi/Makefile |8
> src/mapi/mapi/sources.mak | 22 +++---
> src/mapi/shared-glapi/Makefile.am |3 ++-
> src/mapi/vgapi/Makefile |4 ++--
> 6 files changed, 22 insertions(+), 21 deletions(-)
NAK this patch. After a clean build of Mesa with this patch applied,
dlopen("libGL.so") fails.
Chad Versace
chad.vers...@linux.intel.com
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[Mesa-dev] [PATCH] mapi: Fix Android build
The Android build was broken by commit ca760181b4420696c7e86aa2951d7203522ad1e8 Author: Kristian Høgsberg Date: Fri Mar 16 12:55:40 2012 -0400 Subject: shared-glapi: Convert to automake The guilty change in that commit was changing the variable pattern in sources.mak from FOO_FILE := bar.c to FOO_FILE := $(TOP)/src/mapi/mapi/bar.c Source file paths in Android makefiles must be relative to the makefile. To fix this, I reverted the variable pattern back to `FOO_FILE := bar.c`. CC: Kristian Høgsberg Signed-off-by: Chad Versace --- src/mapi/Android.mk |2 +- src/mapi/es1api/Makefile |4 ++-- src/mapi/glapi/Makefile |8 src/mapi/mapi/sources.mak | 22 +++--- src/mapi/shared-glapi/Makefile.am |3 ++- src/mapi/vgapi/Makefile |4 ++-- 6 files changed, 22 insertions(+), 21 deletions(-) diff --git a/src/mapi/Android.mk b/src/mapi/Android.mk index b75361f..4f41142 100644 --- a/src/mapi/Android.mk +++ b/src/mapi/Android.mk @@ -38,7 +38,7 @@ include $(CLEAR_VARS) abi_header := shared-glapi/glapi_mapi_tmp.h -LOCAL_SRC_FILES := $(MAPI_GLAPI_FILES) +LOCAL_SRC_FILES := $(addprefix mapi/, $(MAPI_GLAPI_FILES)) LOCAL_CFLAGS := \ -DMAPI_MODE_GLAPI \ diff --git a/src/mapi/es1api/Makefile b/src/mapi/es1api/Makefile index a9c9123..782dbaa 100644 --- a/src/mapi/es1api/Makefile +++ b/src/mapi/es1api/Makefile @@ -41,8 +41,8 @@ esapi_CPPFLAGS := \ -DMAPI_ABI_HEADER=\"$(ESAPI)/glapi_mapi_tmp.h\" include $(MAPI)/sources.mak -esapi_SOURCES := $(MAPI_BRIDGE_FILES) -esapi_OBJECTS := $(notdir $(MAPI_BRIDGE_FILES:.c=.o)) +esapi_SOURCES := $(addprefix $(MAPI)/, $(MAPI_BRIDGE_FILES)) +esapi_OBJECTS := $(esapi_SOURCES:.c=.o) esapi_CPPFLAGS += -DMAPI_MODE_BRIDGE esapi_LIB_DEPS := -L$(TOP)/$(LIB_DIR) -l$(GLAPI_LIB) $(esapi_LIB_DEPS) diff --git a/src/mapi/glapi/Makefile b/src/mapi/glapi/Makefile index 211f384..14f4d2a 100644 --- a/src/mapi/glapi/Makefile +++ b/src/mapi/glapi/Makefile @@ -19,18 +19,18 @@ ifeq ($(SHARED_GLAPI),1) glapi_CPPFLAGS += \ -DMAPI_MODE_BRIDGE \ -DMAPI_ABI_HEADER=\"glapi/glapi_mapi_tmp.h\" -glapi_SOURCES := $(MAPI_BRIDGE_FILES) +glapi_SOURCES := $(addprefix $(MAPI)/, $(MAPI_BRIDGE_FILES)) glapi_GLAPI_OBJECTS := glapi_ASM_OBJECTS := -glapi_MAPI_OBJECTS := $(notdir $(MAPI_BRIDGE_FILES:.c=.o)) +glapi_MAPI_OBJECTS := $(glapi_SOURCES:.c=.o) else glapi_CPPFLAGS += -DMAPI_MODE_UTIL -glapi_SOURCES := $(GLAPI_SOURCES) $(MAPI_UTIL_FILES) +glapi_SOURCES := $(GLAPI_SOURCES) $(addprefix $(MAPI)/, $(MAPI_UTIL_FILES)) glapi_GLAPI_OBJECTS := $(GLAPI_SOURCES:.c=.o) glapi_ASM_OBJECTS := $(GLAPI_ASM_SOURCES:.S=.o) -glapi_MAPI_OBJECTS := $(notdir $(MAPI_UTIL_FILES:.c=.o)) +glapi_MAPI_OBJECTS := $($(addprefix $(MAPI)/, $(MAPI_UTIL_FILES)):.c=.o) endif # SHARED_GLAPI glapi_OBJECTS := \ diff --git a/src/mapi/mapi/sources.mak b/src/mapi/mapi/sources.mak index 56f4afd..4add6c4 100644 --- a/src/mapi/mapi/sources.mak +++ b/src/mapi/mapi/sources.mak @@ -15,22 +15,22 @@ #this mode, compile MAPI_BRIDGE_FILES with MAPI_MODE_BRIDGE defined. MAPI_UTIL_FILES = \ - $(TOP)/src/mapi/mapi/u_current.c \ - $(TOP)/src/mapi/mapi/u_execmem.c + u_current.c \ + u_execmem.c MAPI_FILES = \ - $(TOP)/src/mapi/mapi/entry.c \ - $(TOP)/src/mapi/mapi/mapi.c \ - $(TOP)/src/mapi/mapi/stub.c \ - $(TOP)/src/mapi/mapi/table.c \ + entry.c \ + mapi.c \ + stub.c \ + table.c \ $(MAPI_UTIL_FILES) MAPI_GLAPI_FILES = \ - $(TOP)/src/mapi/mapi/entry.c \ - $(TOP)/src/mapi/mapi/mapi_glapi.c \ - $(TOP)/src/mapi/mapi/stub.c \ - $(TOP)/src/mapi/mapi/table.c \ + entry.c \ + mapi_glapi.c \ + stub.c \ + table.c \ $(MAPI_UTIL_FILES) MAPI_BRIDGE_FILES = \ - $(TOP)/src/mapi/mapi/entry.c + entry.c diff --git a/src/mapi/shared-glapi/Makefile.am b/src/mapi/shared-glapi/Makefile.am index a80ba1f..130479e 100644 --- a/src/mapi/shared-glapi/Makefile.am +++ b/src/mapi/shared-glapi/Makefile.am @@ -2,10 +2,11 @@ TOP = $(top_srcdir) GLAPI = $(top_srcdir)/src/mapi/glapi +MAPI = $(top_srcdir)/src/mapi/mapi include $(top_srcdir)/src/mapi/mapi/sources.mak lib_LTLIBRARIES = libglapi.la -libglapi_la_SOURCES = $(MAPI_GLAPI_FILES) +libglapi_la_SOURCES = $(addprefix $(MAPI)/, $(MAPI_GLAPI_FILES)) libglapi_la_LDFLAGS = -no-undefined include $(GLAPI)/gen/glapi_gen.mk diff --git a/src/mapi/vgapi/Makefile b/src/mapi/vgapi/Makefile index 91766f0..5628029 100644 --- a/src/mapi/vgapi/Makefile +++ b/src/mapi/vgapi/Makefile @@ -10,8 +10,8 @@ VG_LIB_PATCH = 0 MAPI := $(TOP)/src/mapi/mapi include $(MAPI)/sources.mak -VGAPI_SOURCES := $(MAPI_FILES) -VGAPI_OBJECTS := $(notdir $(MAPI_FILES:.c=.o)) +VGAPI_SOURCES := $(addprefix $(MAPI)/, $(MAPI_FILES)) +VGAPI_OBJECTS := $(VGAPI_SOURCES:.c=.o) VGAPI_CPPFLAGS := -DMAPI_ABI_HEADER=\"vgapi/vgapi_tmp.h\" -- 1.7.7.
Re: [Mesa-dev] [PATCH] r600g: check gpr count limit
On Mon, Apr 9, 2012 at 4:44 PM, Vadim Girlin wrote:
> This should help to prevent gpu lockups.
> See https://bugs.freedesktop.org/show_bug.cgi?id=48472
>
> Signed-off-by: Vadim Girlin
Reviewed-by: Alex Deucher
Should probably also add a note that this should be applied to the
stable branches as well.
> ---
> src/gallium/drivers/r600/r600_shader.c | 8
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_shader.c
> b/src/gallium/drivers/r600/r600_shader.c
> index 1adf344..4932dcc 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -1266,6 +1266,14 @@ static int r600_shader_from_tgsi(struct r600_context *
> rctx, struct r600_pipe_sh
> if (ctx.bc->chip_class == CAYMAN)
> cm_bytecode_add_cf_end(ctx.bc);
>
> + /* check GPR limit - we have 124 = 128 - 4
> + * (4 are reserved as alu clause temporary registers) */
> + if (ctx.bc->ngpr > 124) {
> + R600_ERR("GPR limit exceeded - shader requires %d
> registers\n", ctx.bc->ngpr);
> + r = -ENOMEM;
> + goto out_err;
> + }
> +
> free(ctx.literals);
> tgsi_parse_free(&ctx.parse);
> return 0;
> --
> 1.7.7.6
>
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Re: [Mesa-dev] [PATCH 6/9] i965: fix typo
On 04/01/2012 03:24 PM, nobled wrote: > Noticed by clang: > > brw_wm_surface_state.c:330:30: warning: initializer overrides prior > initialization of this subobject [-Winitializer-overrides] > [MESA_FORMAT_Z24_S8] = 0, > ^ > brw_wm_surface_state.c:326:30: note: previous initialization is here > [MESA_FORMAT_Z24_S8] = 0, > ^ > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > index 51d3a46..314e2e6 100644 > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > @@ -327,7 +327,7 @@ brw_format_for_mesa_format(gl_format mesa_format) >[MESA_FORMAT_S8_Z24] = 0, >[MESA_FORMAT_Z16] = 0, >[MESA_FORMAT_X8_Z24] = 0, > - [MESA_FORMAT_Z24_S8] = 0, > + [MESA_FORMAT_Z24_X8] = 0, >[MESA_FORMAT_Z32] = 0, >[MESA_FORMAT_S8] = 0, > Please annotate the commit messsge with Note: This is a candidate for the 8.0 branch. Looks good. It's Reviewed-by: Chad Versace ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] main: Fix memory leak in _mesa_make_extension_string()
On 04/09/2012 02:23 PM, Chad Versace wrote: I forgot to free the string returned by strdup(). Note: This is a candidate for the stable branches. CC: Johannes Obermayr Signed-off-by: Chad Versace I think the tag should be "mesa:", not "main:". Other than that, Reviewed-by: Ian Romanick --- src/mesa/main/extensions.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index 8c262af..3ce4cd5 100644 --- a/src/mesa/main/extensions.c +++ b/src/mesa/main/extensions.c @@ -750,6 +750,8 @@ get_extension_override( struct gl_context *ctx ) } } + free(env); + /* Remove trailing space. */ len = strlen(extra_exts); if (extra_exts[len - 1] == ' ') ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48424] Fix warnings/errors reported by clang's scan-build tool
https://bugs.freedesktop.org/show_bug.cgi?id=48424 --- Comment #2 from Chad Versace 2012-04-09 14:30:44 UTC --- Thanks for doing this. Here's my review of mesa/main/extensions.c. mesa/main/extensions.c:730: Thanks. I just submitted a patch for this memory leak. You're CC'd. mesa/main/extensions.c:866: false positive -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] main: Fix memory leak in _mesa_make_extension_string()
I forgot to free the string returned by strdup(). Note: This is a candidate for the stable branches. CC: Johannes Obermayr Signed-off-by: Chad Versace --- src/mesa/main/extensions.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index 8c262af..3ce4cd5 100644 --- a/src/mesa/main/extensions.c +++ b/src/mesa/main/extensions.c @@ -750,6 +750,8 @@ get_extension_override( struct gl_context *ctx ) } } + free(env); + /* Remove trailing space. */ len = strlen(extra_exts); if (extra_exts[len - 1] == ' ') -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/6] glsl: Add a helper for ir_builder to make dereferences for assignments.
v2: Fix writemask setup for non-vec4 assignments.
---
src/glsl/ir_builder.cpp | 18 ++
src/glsl/ir_builder.h| 24 +
src/mesa/main/ff_fragment_shader.cpp | 66 +-
3 files changed, 59 insertions(+), 49 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 98ac3c1..0c8a15b 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -34,6 +34,24 @@ ir_factory::emit(ir_instruction *ir)
instructions->push_tail(ir);
}
+ir_assignment *
+assign(deref lhs, operand rhs, int writemask)
+{
+ void *mem_ctx = ralloc_parent(lhs.val);
+
+ ir_assignment *assign = new(mem_ctx) ir_assignment(lhs.val,
+ rhs.val,
+ NULL, writemask);
+
+ return assign;
+}
+
+ir_assignment *
+assign(deref lhs, operand rhs)
+{
+ return assign(lhs, rhs, (1 << lhs.val->type->vector_elements) - 1);
+}
+
ir_swizzle *
swizzle(operand a, int swizzle, int components)
{
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index 350f9a3..af9d160 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -50,6 +50,27 @@ public:
ir_rvalue *val;
};
+/** Automatic generator for ir_dereference_variable on assignment LHS.
+ *
+ * \sa operand
+ */
+class deref {
+public:
+ deref(ir_dereference *val)
+ : val(val)
+ {
+ }
+
+ deref(ir_variable *var)
+ {
+ void *mem_ctx = ralloc_parent(var);
+ val = new(mem_ctx) ir_dereference_variable(var);
+ }
+
+
+ ir_dereference *val;
+};
+
class ir_factory {
public:
void emit(ir_instruction *ir);
@@ -58,6 +79,9 @@ public:
void *mem_ctx;
};
+ir_assignment *assign(deref lhs, operand rhs);
+ir_assignment *assign(deref lhs, operand rhs, int writemask);
+
ir_expression *expr(ir_expression_operation op, operand a, operand b);
ir_expression *add(operand a, operand b);
ir_expression *sub(operand a, operand b);
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index 555df42..ee106cd 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -843,8 +843,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (rgb_saturate)
val = saturate(val);
- deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- p->emit(new(p->mem_ctx) ir_assignment(deref, val));
+ p->emit(assign(temp_var, val));
}
else if (key->unit[unit].ModeRGB == MODE_DOT3_RGBA_EXT ||
key->unit[unit].ModeRGB == MODE_DOT3_RGBA) {
@@ -855,8 +854,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
val = smear(p, val);
if (rgb_saturate)
val = saturate(val);
- deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- p->emit(new(p->mem_ctx) ir_assignment(deref, val));
+ p->emit(assign(temp_var, val));
}
else {
/* Need to do something to stop from re-emitting identical
@@ -869,8 +867,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
val = swizzle_xyz(smear(p, val));
if (rgb_saturate)
val = saturate(val);
- deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_XYZ));
+ p->emit(assign(temp_var, val, WRITEMASK_XYZ));
val = emit_combine(p, unit,
key->unit[unit].NumArgsA,
@@ -879,8 +876,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
val = swizzle_w(smear(p, val));
if (alpha_saturate)
val = saturate(val);
- deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_W));
+ p->emit(assign(temp_var, val, WRITEMASK_W));
}
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
@@ -943,9 +939,7 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
ir_var_temporary);
p->emit(p->src_texture[unit]);
- deref = new(p->mem_ctx) ir_dereference_variable(p->src_texture[unit]);
- p->emit(new(p->mem_ctx) ir_assignment(deref,
- new(p->mem_ctx) ir_constant(0.0f)));
+ p->emit(assign(p->src_texture[unit], new(p->mem_ctx) ir_constant(0.0f)));
return ;
}
@@ -1036,8 +1030,7 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
texcoord = texcoord->clone(p->mem_ctx, NULL);
tex->projector = swizzle_w(texcoord);
- deref = new(p->mem_ctx) ir_dereference_variable(p->src_texture[unit]);
- p->emit(new(p->mem_ctx) ir_assignment(deref, tex));
+ p->emit(assign(p->src_texture[unit], tex));
}
static void
@@ -1115,7 +1108,6 @@ load_texunit_bumpmap( struct texenv_fragment_program *p,
GLuint unit )
* dest = A
[Mesa-dev] [PATCH 6/6] glsl: Add a helper for generating temporary variables in ir_builder.
---
src/glsl/ir_builder.cpp | 11 +
src/glsl/ir_builder.h|1 +
src/mesa/main/ff_fragment_shader.cpp | 42 +-
3 files changed, 23 insertions(+), 31 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 0c8a15b..9a16c90 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -34,6 +34,17 @@ ir_factory::emit(ir_instruction *ir)
instructions->push_tail(ir);
}
+ir_variable *
+ir_factory::make_temp(const glsl_type *type, const char *name)
+{
+ ir_variable *var;
+
+ var = new(mem_ctx) ir_variable(type, name, ir_var_temporary);
+ emit(var);
+
+ return var;
+}
+
ir_assignment *
assign(deref lhs, operand rhs, int writemask)
{
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index af9d160..0ebcbab 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -74,6 +74,7 @@ public:
class ir_factory {
public:
void emit(ir_instruction *ir);
+ ir_variable *make_temp(const glsl_type *type, const char *name);
exec_list *instructions;
void *mem_ctx;
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index ee106cd..3c91b1a 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -823,11 +823,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
else
alpha_saturate = GL_FALSE;
- ir_variable *temp_var = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
- "texenv_combine",
- ir_var_temporary);
- p->emit(temp_var);
-
+ ir_variable *temp_var = p->make_temp(glsl_type::vec4_type,
"texenv_combine");
ir_dereference *deref;
ir_rvalue *val;
@@ -934,9 +930,8 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
}
if (!p->state->unit[unit].enabled) {
- p->src_texture[unit] = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
-"dummy_tex",
-ir_var_temporary);
+ p->src_texture[unit] = p->make_temp(glsl_type::vec4_type,
+ "dummy_tex");
p->emit(p->src_texture[unit]);
p->emit(assign(p->src_texture[unit], new(p->mem_ctx) ir_constant(0.0f)));
@@ -1001,10 +996,8 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
break;
}
- p->src_texture[unit] = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
- "tex",
- ir_var_temporary);
- p->emit(p->src_texture[unit]);
+ p->src_texture[unit] = p->make_temp(glsl_type::vec4_type,
+ "tex");
ir_texture *tex = new(p->mem_ctx) ir_texture(ir_tex);
@@ -1113,9 +1106,7 @@ load_texunit_bumpmap( struct texenv_fragment_program *p,
GLuint unit )
texcoord = smear(p, texcoord);
/* bump_texcoord = texcoord */
- ir_variable *bumped = new(p->mem_ctx) ir_variable(texcoord->type,
-"bump_texcoord",
-ir_var_temporary);
+ ir_variable *bumped = p->make_temp(texcoord->type, "bump_texcoord");
p->emit(bumped);
p->emit(assign(bumped, texcoord));
@@ -1150,10 +1141,7 @@ emit_fog_instructions(struct texenv_fragment_program *p,
* only affect rgb so we're hanging on to the .a value of fragcolor
* this way.
*/
- ir_variable *fog_result = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
-"fog_result",
-ir_var_auto);
- p->emit(fog_result);
+ ir_variable *fog_result = p->make_temp(glsl_type::vec4_type, "fog_result");
p->emit(assign(fog_result, fragcolor));
fragcolor = swizzle_xyz(fog_result);
@@ -1163,9 +1151,7 @@ emit_fog_instructions(struct texenv_fragment_program *p,
params = p->shader->symbols->get_variable("gl_Fog");
f = new(p->mem_ctx) ir_dereference_variable(fogcoord);
- ir_variable *f_var = new(p->mem_ctx) ir_variable(glsl_type::float_type,
- "fog_factor", ir_var_auto);
- p->emit(f_var);
+ ir_variable *f_var = p->make_temp(glsl_type::float_type, "fog_factor");
switch (key->fog_mode) {
case FOG_LINEAR:
@@ -1194,10 +1180,7 @@ emit_fog_instructions(struct texenv_fragment_program *p,
* can do this like FOG_EXP but with a squaring after the
* multiply by density.
*/
- ir_variable *temp_var = new(p->mem_ctx)
ir_variable(glsl_type::float_type,
- "fog_temp",
- ir_var_auto);
-
[Mesa-dev] [PATCH 3/6] glsl: Add common swizzles to ir_builder.
Now we can fold a bunch of our expression setup in ff_fragment_shader
into single-line, parseable commits.
v2: Make it actually work. I wasn't setting num_components in the
mask structure, and not setting up a mask structure is way easier.
---
src/glsl/ir_builder.cpp | 80 ++
src/glsl/ir_builder.h| 12 +
src/mesa/main/ff_fragment_shader.cpp | 66
3 files changed, 110 insertions(+), 48 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index a867eb4..29cc9bc 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -22,11 +22,91 @@
*/
#include "ir_builder.h"
+#include "program/prog_instruction.h"
using namespace ir_builder;
namespace ir_builder {
+ir_swizzle *
+swizzle(operand a, int swizzle, int components)
+{
+ void *mem_ctx = ralloc_parent(a.val);
+
+ return new(mem_ctx) ir_swizzle(a.val,
+ GET_SWZ(swizzle, 0),
+ GET_SWZ(swizzle, 1),
+ GET_SWZ(swizzle, 2),
+ GET_SWZ(swizzle, 3),
+ components);
+}
+
+ir_swizzle *
+swizzle_(operand a)
+{
+ return swizzle(a, SWIZZLE_, 4);
+}
+
+ir_swizzle *
+swizzle_(operand a)
+{
+ return swizzle(a, SWIZZLE_, 4);
+}
+
+ir_swizzle *
+swizzle_(operand a)
+{
+ return swizzle(a, SWIZZLE_, 4);
+}
+
+ir_swizzle *
+swizzle_(operand a)
+{
+ return swizzle(a, SWIZZLE_, 4);
+}
+
+ir_swizzle *
+swizzle_x(operand a)
+{
+ return swizzle(a, SWIZZLE_, 1);
+}
+
+ir_swizzle *
+swizzle_y(operand a)
+{
+ return swizzle(a, SWIZZLE_, 1);
+}
+
+ir_swizzle *
+swizzle_z(operand a)
+{
+ return swizzle(a, SWIZZLE_, 1);
+}
+
+ir_swizzle *
+swizzle_w(operand a)
+{
+ return swizzle(a, SWIZZLE_, 1);
+}
+
+ir_swizzle *
+swizzle_xy(operand a)
+{
+ return swizzle(a, SWIZZLE_XYZW, 2);
+}
+
+ir_swizzle *
+swizzle_xyz(operand a)
+{
+ return swizzle(a, SWIZZLE_XYZW, 3);
+}
+
+ir_swizzle *
+swizzle_xyzw(operand a)
+{
+ return swizzle(a, SWIZZLE_XYZW, 4);
+}
+
ir_expression *
expr(ir_expression_operation op, operand a, operand b)
{
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index 78b119d..d2c729a 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -57,4 +57,16 @@ ir_expression *mul(operand a, operand b);
ir_expression *dot(operand a, operand b);
ir_expression *saturate(operand a);
+ir_swizzle *swizzle_(operand a);
+ir_swizzle *swizzle_(operand a);
+ir_swizzle *swizzle_(operand a);
+ir_swizzle *swizzle_(operand a);
+ir_swizzle *swizzle_x(operand a);
+ir_swizzle *swizzle_y(operand a);
+ir_swizzle *swizzle_z(operand a);
+ir_swizzle *swizzle_w(operand a);
+ir_swizzle *swizzle_xy(operand a);
+ir_swizzle *swizzle_xyz(operand a);
+ir_swizzle *swizzle_xyzw(operand a);
+
} /* namespace ir_builder */
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index 2d56d3b..bc77ebd 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -627,12 +627,10 @@ emit_combine_source(struct texenv_fragment_program *p,
return sub(new(p->mem_ctx) ir_constant(1.0f), src);
case OPR_SRC_ALPHA:
- return src->type->is_scalar()
-? src : (ir_rvalue *) new(p->mem_ctx) ir_swizzle(src, 3, 3, 3, 3, 1);
+ return src->type->is_scalar() ? src : swizzle_w(src);
case OPR_ONE_MINUS_SRC_ALPHA: {
- ir_rvalue *const scalar = (src->type->is_scalar())
-? src : (ir_rvalue *) new(p->mem_ctx) ir_swizzle(src, 3, 3, 3, 3, 1);
+ ir_rvalue *const scalar = src->type->is_scalar() ? src : swizzle_w(src);
return sub(new(p->mem_ctx) ir_constant(1.0f), scalar);
}
@@ -695,7 +693,7 @@ smear(struct texenv_fragment_program *p, ir_rvalue *val)
if (!val->type->is_scalar())
return val;
- return new(p->mem_ctx) ir_swizzle(val, 0, 0, 0, 0, 4);
+ return swizzle_(val);
}
static ir_rvalue *
@@ -743,13 +741,11 @@ emit_combine(struct texenv_fragment_program *p,
case MODE_DOT3_RGB: {
tmp0 = mul(src[0], new(p->mem_ctx) ir_constant(2.0f));
tmp0 = add(tmp0, new(p->mem_ctx) ir_constant(-1.0f));
- tmp0 = new(p->mem_ctx) ir_swizzle(smear(p, tmp0), 0, 1, 2, 3, 3);
tmp1 = mul(src[1], new(p->mem_ctx) ir_constant(2.0f));
tmp1 = add(tmp1, new(p->mem_ctx) ir_constant(-1.0f));
- tmp1 = new(p->mem_ctx) ir_swizzle(smear(p, tmp1), 0, 1, 2, 3, 3);
- return dot(tmp0, tmp1);
+ return dot(swizzle_xyz(smear(p, tmp0)), swizzle_xyz(smear(p, tmp1)));
}
case MODE_MODULATE_ADD_ATI:
return add(mul(src[0], src[2]), src[1]);
@@ -874,8 +870,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
key->unit[unit].NumArgsRGB,
key->unit[unit].ModeRGB,
key->unit[uni
[Mesa-dev] [PATCH 4/6] glsl: Make a little tracking class for emitting IR lists.
This lets us significantly shorten p->instructions->push_tail(ir), and
will be used in a few more places.
---
src/glsl/ir_builder.cpp |6 +++
src/glsl/ir_builder.h|8
src/mesa/main/ff_fragment_shader.cpp | 78 --
3 files changed, 42 insertions(+), 50 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 29cc9bc..98ac3c1 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -28,6 +28,12 @@ using namespace ir_builder;
namespace ir_builder {
+void
+ir_factory::emit(ir_instruction *ir)
+{
+ instructions->push_tail(ir);
+}
+
ir_swizzle *
swizzle(operand a, int swizzle, int components)
{
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index d2c729a..350f9a3 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -50,6 +50,14 @@ public:
ir_rvalue *val;
};
+class ir_factory {
+public:
+ void emit(ir_instruction *ir);
+
+ exec_list *instructions;
+ void *mem_ctx;
+};
+
ir_expression *expr(ir_expression_operation op, operand a, operand b);
ir_expression *add(operand a, operand b);
ir_expression *sub(operand a, operand b);
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index bc77ebd..555df42 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -511,12 +511,11 @@ static GLuint make_state_key( struct gl_context *ctx,
struct state_key *key )
/** State used to build the fragment program:
*/
-struct texenv_fragment_program {
+class texenv_fragment_program : public ir_factory {
+public:
struct gl_shader_program *shader_program;
struct gl_shader *shader;
- exec_list *instructions;
exec_list *top_instructions;
- void *mem_ctx;
struct state_key *state;
ir_variable *src_texture[MAX_TEXTURE_COORD_UNITS];
@@ -827,10 +826,9 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
ir_variable *temp_var = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
"texenv_combine",
ir_var_temporary);
- p->instructions->push_tail(temp_var);
+ p->emit(temp_var);
ir_dereference *deref;
- ir_assignment *assign;
ir_rvalue *val;
/* Emit the RGB and A combine ops
@@ -846,8 +844,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val));
}
else if (key->unit[unit].ModeRGB == MODE_DOT3_RGBA_EXT ||
key->unit[unit].ModeRGB == MODE_DOT3_RGBA) {
@@ -859,8 +856,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (rgb_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val));
}
else {
/* Need to do something to stop from re-emitting identical
@@ -874,8 +870,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (rgb_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_XYZ);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_XYZ));
val = emit_combine(p, unit,
key->unit[unit].NumArgsA,
@@ -885,8 +880,7 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
if (alpha_saturate)
val = saturate(val);
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
- assign = new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_W);
- p->instructions->push_tail(assign);
+ p->emit(new(p->mem_ctx) ir_assignment(deref, val, NULL, WRITEMASK_W));
}
deref = new(p->mem_ctx) ir_dereference_variable(temp_var);
@@ -923,7 +917,6 @@ emit_texenv(struct texenv_fragment_program *p, GLuint unit)
static void load_texture( struct texenv_fragment_program *p, GLuint unit )
{
ir_dereference *deref;
- ir_assignment *assign;
if (p->src_texture[unit])
return;
@@ -948,12 +941,11 @@ static void load_texture( struct texenv_fragment_program
*p, GLuint unit )
p->src_texture[unit] = new(p->mem_ctx) ir_variable(glsl_type::vec4_type,
"dummy_tex",
ir_var_temporary);
- p->instructions->push_tail(p->src_texture[unit]);
+ p->emit(p->src_texture[unit]);
deref = new(p->mem_ctx) ir_dereference_variable(p->s
[Mesa-dev] [PATCH 1/6] glsl: Create an ir_builder helper for hand-generating IR.
The C++ constructors with placement new, while functional, are
extremely verbose, leading to generation of simple GLSL IR expressions
like (a * b + c * d) expanding to many lines of code and using lots of
temporary variables. By creating a new ir_builder.h that puts simple
generators in our namespace and taking advantage of ralloc_parent(),
we can generate much more compact code, at a minor runtime cost.
---
src/glsl/Makefile.sources|1 +
src/glsl/ir_builder.cpp | 69 ++
src/glsl/ir_builder.h| 35 ++
src/mesa/main/ff_fragment_shader.cpp | 128 --
4 files changed, 151 insertions(+), 82 deletions(-)
create mode 100644 src/glsl/ir_builder.cpp
create mode 100644 src/glsl/ir_builder.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 06728da..4e3b074 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -26,6 +26,7 @@ LIBGLSL_CXX_FILES := \
glsl_symbol_table.cpp \
hir_field_selection.cpp \
ir_basic_block.cpp \
+ ir_builder.cpp \
ir_clone.cpp \
ir_constant_expression.cpp \
ir.cpp \
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
new file mode 100644
index 000..c699e24
--- /dev/null
+++ b/src/glsl/ir_builder.cpp
@@ -0,0 +1,69 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "ir_builder.h"
+
+using namespace ir_builder;
+
+namespace ir_builder {
+
+ir_expression *
+expr(ir_expression_operation op,
+ ir_rvalue *a, ir_rvalue *b)
+{
+ void *mem_ctx = ralloc_parent(a);
+
+ return new(mem_ctx) ir_expression(op, a->as_rvalue(), b->as_rvalue());
+}
+
+ir_expression *add(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_add, a, b);
+}
+
+ir_expression *sub(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_sub, a, b);
+}
+
+ir_expression *mul(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_mul, a, b);
+}
+
+ir_expression *dot(ir_rvalue *a, ir_rvalue *b)
+{
+ return expr(ir_binop_dot, a, b);
+}
+
+ir_expression *
+saturate(ir_rvalue *a)
+{
+ void *mem_ctx = ralloc_parent(a);
+
+ return expr(ir_binop_max,
+ expr(ir_binop_min, a, new(mem_ctx) ir_constant(1.0f)),
+ new(mem_ctx) ir_constant(0.0f));
+}
+
+} /* namespace ir_builder */
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
new file mode 100644
index 000..5d6f476
--- /dev/null
+++ b/src/glsl/ir_builder.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "ir.h"
+
+namespace ir_builder {
+
+ir_expression *expr(ir_expression_operation op, ir_rvalue *a, ir_rvalue *b);
+ir_expression *add(ir_rvalue *a, ir_rvalue *b);
+ir_expre
[Mesa-dev] [PATCH 2/6] glsl: Let ir_builder expressions take un-dereferenced variables.
Having to explicitly dereference is irritating and bloats the code,
when the compiler can detect and do the right thing.
v2: Use a little shim class to produce the automatic dereference
generation at compile time as opposed to runtime, while also
allowing compile-time type checking.
---
src/glsl/ir_builder.cpp | 19 +
src/glsl/ir_builder.h| 37 --
src/mesa/main/ff_fragment_shader.cpp | 19 ++---
3 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index c699e24..a867eb4 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -28,38 +28,37 @@ using namespace ir_builder;
namespace ir_builder {
ir_expression *
-expr(ir_expression_operation op,
- ir_rvalue *a, ir_rvalue *b)
+expr(ir_expression_operation op, operand a, operand b)
{
- void *mem_ctx = ralloc_parent(a);
+ void *mem_ctx = ralloc_parent(a.val);
- return new(mem_ctx) ir_expression(op, a->as_rvalue(), b->as_rvalue());
+ return new(mem_ctx) ir_expression(op, a.val, b.val);
}
-ir_expression *add(ir_rvalue *a, ir_rvalue *b)
+ir_expression *add(operand a, operand b)
{
return expr(ir_binop_add, a, b);
}
-ir_expression *sub(ir_rvalue *a, ir_rvalue *b)
+ir_expression *sub(operand a, operand b)
{
return expr(ir_binop_sub, a, b);
}
-ir_expression *mul(ir_rvalue *a, ir_rvalue *b)
+ir_expression *mul(operand a, operand b)
{
return expr(ir_binop_mul, a, b);
}
-ir_expression *dot(ir_rvalue *a, ir_rvalue *b)
+ir_expression *dot(operand a, operand b)
{
return expr(ir_binop_dot, a, b);
}
ir_expression *
-saturate(ir_rvalue *a)
+saturate(operand a)
{
- void *mem_ctx = ralloc_parent(a);
+ void *mem_ctx = ralloc_parent(a.val);
return expr(ir_binop_max,
expr(ir_binop_min, a, new(mem_ctx) ir_constant(1.0f)),
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index 5d6f476..78b119d 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -25,11 +25,36 @@
namespace ir_builder {
-ir_expression *expr(ir_expression_operation op, ir_rvalue *a, ir_rvalue *b);
-ir_expression *add(ir_rvalue *a, ir_rvalue *b);
-ir_expression *sub(ir_rvalue *a, ir_rvalue *b);
-ir_expression *mul(ir_rvalue *a, ir_rvalue *b);
-ir_expression *dot(ir_rvalue *a, ir_rvalue *b);
-ir_expression *saturate(ir_rvalue *a);
+/**
+ * This little class exists to let the helper expression generators
+ * take either an ir_rvalue * or an ir_variable * to be automatically
+ * dereferenced, while still providing compile-time type checking.
+ *
+ * You don't have to explicitly call the constructor -- C++ will see
+ * that you passed an ir_variable, and silently call the
+ * operand(ir_variable *var) constructor behind your back.
+ */
+class operand {
+public:
+ operand(ir_rvalue *val)
+ : val(val)
+ {
+ }
+
+ operand(ir_variable *var)
+ {
+ void *mem_ctx = ralloc_parent(var);
+ val = new(mem_ctx) ir_dereference_variable(var);
+ }
+
+ ir_rvalue *val;
+};
+
+ir_expression *expr(ir_expression_operation op, operand a, operand b);
+ir_expression *add(operand a, operand b);
+ir_expression *sub(operand a, operand b);
+ir_expression *mul(operand a, operand b);
+ir_expression *dot(operand a, operand b);
+ir_expression *saturate(operand a);
} /* namespace ir_builder */
diff --git a/src/mesa/main/ff_fragment_shader.cpp
b/src/mesa/main/ff_fragment_shader.cpp
index cfee334..2d56d3b 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -1112,13 +1112,10 @@ load_texunit_bumpmap( struct texenv_fragment_program
*p, GLuint unit )
GLuint bumpedUnitNr = key->unit[unit].OptRGB[1].Source - SRC_TEXTURE0;
ir_rvalue *bump;
ir_rvalue *texcoord;
- ir_variable *rot_mat_0_var, *rot_mat_1_var;
- ir_dereference_variable *rot_mat_0, *rot_mat_1;
+ ir_variable *rot_mat_0, *rot_mat_1;
- rot_mat_0_var = p->shader->symbols->get_variable("gl_BumpRotMatrix0MESA");
- rot_mat_1_var = p->shader->symbols->get_variable("gl_BumpRotMatrix1MESA");
- rot_mat_0 = new(p->mem_ctx) ir_dereference_variable(rot_mat_0_var);
- rot_mat_1 = new(p->mem_ctx) ir_dereference_variable(rot_mat_1_var);
+ rot_mat_0 = p->shader->symbols->get_variable("gl_BumpRotMatrix0MESA");
+ rot_mat_1 = p->shader->symbols->get_variable("gl_BumpRotMatrix1MESA");
ir_variable *tc_array = p->shader->symbols->get_variable("gl_TexCoord");
assert(tc_array);
@@ -1262,9 +1259,7 @@ emit_fog_instructions(struct texenv_fragment_program *p,
ir_assignment *assign = new(p->mem_ctx) ir_assignment(temp, f);
p->instructions->push_tail(assign);
- f = new(p->mem_ctx) ir_dereference_variable(temp_var);
- temp = new(p->mem_ctx) ir_dereference_variable(temp_var);
- f = mul(f, temp);
+ f = mul(temp_var, temp_var);
f = new(p->mem_ctx) ir_expression(ir_unop_neg, f);
f = new(p->mem_
[Mesa-dev] ir_builder take 2
Here's the udpated ir_builder changeset. Now at +140 lines, I think I'll still land it given that idr has said he's interested in it for the ARB programs to GLSL conversion work. It now uses C++ tricks (noted in a big comment) to get compile-time type checking and ir_dereference_variable generation. Oh, and it actually passes piglit. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Stop lying about cpp and height of a stencil buffer.
One comment.
On 04/09/2012 09:43 AM, Paul Berry wrote:
> When using a separate stencil buffer, i965 requires that the pitch of
> the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
> the actual pitch.
>
> Previously this was accomplished by doubling the "cpp" and "pitch"
> values stored in the intel_region data structure, and halving the
> height. However, this was confusing, and it led to a subtle (but
> benign) bug: since a stencil buffer is W-tiled, its true height must
> be aligned to a multiple of 64; we were accidentally aligning its faux
> height to a multiple of 64, causing memory to be wasted.
>
> Note that for window system stencil buffers, the X server also doubles
> the cpp and pitch values. To facilitate fixing this X server bug in
> the future, we fix the cpp and pitch values we receive from the X
> server only if cpp has the "incorrect" value of 2.
> ---
> src/mesa/drivers/dri/i965/brw_misc_state.c | 11 ---
> src/mesa/drivers/dri/i965/gen7_misc_state.c| 16 ++-
> src/mesa/drivers/dri/intel/intel_context.c | 35 +--
> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 24 ++--
> src/mesa/drivers/dri/intel/intel_screen.c | 24 ++--
> 5 files changed, 65 insertions(+), 45 deletions(-)
>
[snip]
> --- a/src/mesa/drivers/dri/intel/intel_context.c
> +++ b/src/mesa/drivers/dri/intel/intel_context.c
> @@ -1251,17 +1251,34 @@
> intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
>
> int buffer_width;
> int buffer_height;
> + int buffer_cpp = buffer->cpp;
> + int buffer_pitch = buffer->pitch;
> if (buffer->attachment == __DRI_BUFFER_STENCIL) {
> - /* The stencil buffer has quirky pitch requirements. From Section
> - * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
> - *The pitch must be set to 2x the value computed based on width, as
> - *the stencil buffer is stored with two rows interleaved.
> + /* Stencil buffers use W tiling, a tiling format that the DRM functions
> + * don't properly account for. Therefore, when we allocate a stencil
> + * buffer that is private to Mesa (see intel_miptree_create), we round
> + * the height and width up to the next multiple of the tile size
> (64x64)
> + * and then ask DRM to allocate an untiled buffer. Consequently, the
> + * height and the width stored in the stencil buffer's region structure
> + * are always multiples of 64, even if the stencil buffer itself is
> + * smaller.
> *
> - * To satisfy the pitch requirement, the X driver allocated the region
> - * with the following dimensions.
> + * To avoid inconsistencies between how we represent private buffers
> and
> + * buffers shared with the window system, round up the height and width
> + * for window system buffers too.
> */
> buffer_width = ALIGN(drawable->w, 64);
> - buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
> + buffer_height = ALIGN(drawable->h, 64);
> +
> + /* As of 4/6/2012, the X server lies and sends cpp and pitch values
The Xserver doesn't do this. Intel's Xorg driver, aka xf86-video-intel, does. I
would
instead say "Beginning in xf86-video-intel 2.16, the ddx driver lies...".
(DDX means "device-dependent X").
> +* that are two times too large for stencil buffers. Hopefully this
> +* will be fixed someday, but for now detect the bug by checking if
> cpp
> +* is 2, and fixing cpp and pitch if it is.
> +*/
> + if (buffer_cpp == 2) {
> + buffer_cpp = 1;
> + buffer_pitch /= 2;
> + }
> } else {
> buffer_width = drawable->w;
> buffer_height = drawable->h;
Other than the Xserver/ddx confusion,
Reviewed-by: Chad Versace
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Re: [Mesa-dev] [PATCH] i965: Stop lying about cpp and height of a stencil buffer.
On 9 April 2012 10:59, Kenneth Graunke wrote:
> On 04/09/2012 09:43 AM, Paul Berry wrote:
>
>> When using a separate stencil buffer, i965 requires that the pitch of
>> the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
>> the actual pitch.
>>
>> Previously this was accomplished by doubling the "cpp" and "pitch"
>> values stored in the intel_region data structure, and halving the
>> height. However, this was confusing, and it led to a subtle (but
>> benign) bug: since a stencil buffer is W-tiled, its true height must
>> be aligned to a multiple of 64; we were accidentally aligning its faux
>> height to a multiple of 64, causing memory to be wasted.
>>
>> Note that for window system stencil buffers, the X server also doubles
>> the cpp and pitch values. To facilitate fixing this X server bug in
>> the future, we fix the cpp and pitch values we receive from the X
>> server only if cpp has the "incorrect" value of 2.
>>
>
> Paul,
>
> This seems like a nice clean-up. I'm glad to see this.
>
> I reviewed the code and it seems to make sense, but I'd really want to see
> Chad or Eric's review on it before it gets pushed.
>
> Acked-by: Kenneth Graunke
>
> One small comment below:
>
>
> diff --git a/src/mesa/drivers/dri/intel/**intel_context.c
>> b/src/mesa/drivers/dri/intel/**intel_context.c
>> index 16a9887..fc3258b 100644
>> --- a/src/mesa/drivers/dri/intel/**intel_context.c
>> +++ b/src/mesa/drivers/dri/intel/**intel_context.c
>> @@ -1251,17 +1251,34 @@
>> intel_process_dri2_buffer_**with_separate_stencil(struct
>> intel_context *intel,
>>
>> int buffer_width;
>> int buffer_height;
>> + int buffer_cpp = buffer->cpp;
>> + int buffer_pitch = buffer->pitch;
>> if (buffer->attachment == __DRI_BUFFER_STENCIL) {
>> - /* The stencil buffer has quirky pitch requirements. From Section
>> - * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
>> - *The pitch must be set to 2x the value computed based on
>> width, as
>> - *the stencil buffer is stored with two rows interleaved.
>> + /* Stencil buffers use W tiling, a tiling format that the DRM
>> functions
>> + * don't properly account for. Therefore, when we allocate a
>> stencil
>> + * buffer that is private to Mesa (see intel_miptree_create), we
>> round
>> + * the height and width up to the next multiple of the tile size
>> (64x64)
>> + * and then ask DRM to allocate an untiled buffer. Consequently,
>> the
>> + * height and the width stored in the stencil buffer's region
>> structure
>> + * are always multiples of 64, even if the stencil buffer itself is
>> + * smaller.
>> *
>> - * To satisfy the pitch requirement, the X driver allocated the
>> region
>> - * with the following dimensions.
>> + * To avoid inconsistencies between how we represent private
>> buffers and
>> + * buffers shared with the window system, round up the height and
>> width
>> + * for window system buffers too.
>> */
>> buffer_width = ALIGN(drawable->w, 64);
>> - buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
>> + buffer_height = ALIGN(drawable->h, 64);
>> +
>> + /* As of 4/6/2012, the X server lies and sends cpp and pitch
>> values
>> +* that are two times too large for stencil buffers. Hopefully
>> this
>> +* will be fixed someday, but for now detect the bug by checking
>> if cpp
>> +* is 2, and fixing cpp and pitch if it is.
>> +*/
>> + if (buffer_cpp == 2) {
>> + buffer_cpp = 1;
>> + buffer_pitch /= 2;
>> + }
>> } else {
>> buffer_width = drawable->w;
>> buffer_height = drawable->h;
>>
>
> I was going to suggest saying "xserver 1.12 lies and sends..." rather than
> using a date...but...I don't think it's the X server that's really at
> fault. Isn't it xf86-video-intel (sometimes called the DDX)?
>
> So, maybe "As of 4/6/2012, the DDX lies and sends cpp and pitch values"?
>
(After some discussion with Chad) how about: "xf86-video-intel versions
2.17.0 and earlier lie and send Hopefully this will be fixed in a
future version of xf86-video-intel."
>
> Sadly, I'm not sure how to fix that without breaking new DDX + old Mesa.
>
Chad and I have had some discussion about this. We are hoping to add
GetParam and SetParam messages to the DDX protocol, to allow Mesa and the
DDX to exchange arbitrary integer parameters describing protocol/behavior
options. GetParam() will return 0 when queried about a parameter that it
does not recognize. The idea is that at startup, Mesa will query the DDX
with GetParam to ask "are you capable of telling the truth about cpp and
pitch of stencil buffers?" If it gets back a 1 (meaning yes), it will then
send a SetParam message to say "henceforth, please tell the truth about cpp
and pitch of stencil buffers." Not the prettiest thing in the world, I
know, but it would allo
[Mesa-dev] [PATCH] r600g: check gpr count limit
This should help to prevent gpu lockups.
See https://bugs.freedesktop.org/show_bug.cgi?id=48472
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_shader.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 1adf344..4932dcc 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1266,6 +1266,14 @@ static int r600_shader_from_tgsi(struct r600_context *
rctx, struct r600_pipe_sh
if (ctx.bc->chip_class == CAYMAN)
cm_bytecode_add_cf_end(ctx.bc);
+ /* check GPR limit - we have 124 = 128 - 4
+* (4 are reserved as alu clause temporary registers) */
+ if (ctx.bc->ngpr > 124) {
+ R600_ERR("GPR limit exceeded - shader requires %d registers\n",
ctx.bc->ngpr);
+ r = -ENOMEM;
+ goto out_err;
+ }
+
free(ctx.literals);
tgsi_parse_free(&ctx.parse);
return 0;
--
1.7.7.6
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Re: [Mesa-dev] [PATCH 1/7] mesa: add support for ARB_blend_func_extended (v3)
On Tue, 3 Apr 2012 14:16:51 +0100, Dave Airlie wrote: > From: Dave Airlie > > Add implementations of the two API functions, > Add a new strings to uint mapping for index bindings > Add the blending mode validation for SRC1 + SRC_ALPHA_SATURATE > Add get for MAX_DUAL_SOURCE_DRAW_BUFFERS > > v2: > Add check in valid_to_render to address case in spec ERRORS. > > v3: > Add index to ir.h so this patch compiles on its own > fixup comment > > The GLSL patch will setup the indices. Other than Brian's comment about performance concerns (though I'm fine with it being fixed up in a follow-on patch), Reviewed-by: Eric Anholt pgpoScJ4ltiza.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/7] glsl: add support for ARB_blend_func_extended (v2)
On Tue, 3 Apr 2012 14:16:52 +0100, Dave Airlie wrote: > From: Dave Airlie > > This adds index support to the GLSL compiler. > > I'm not 100% sure of my approach here, esp without how output ordering > happens wrt location, index pairs, in the "mark" function. > > Since current hw doesn't ever have a location > 0 with an index > 0, > we don't have to work out if the output ordering the hw requires is > location, index, location, index or location, location, index, index. > But we have no hw to know, so punt on it for now. > > v2: index requires layout - catch and error > setup explicit index properly. I don't like this magic 4 that's unexplained. It seems like the second fragment output should have a totally separate ir_variable->location assigned. Whether that's in a separate space like FRAG_RESULT_DUALSRC_0 that comes after all the FRAG_RESULT_DATAn, or whether it's just FRAG_RESULT_DATA1 since we're not anticipating dual source max buffers going beyond 1, 4 doesn't seem like the right number. pgpjbqfz4GNeN.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Stop lying about cpp and height of a stencil buffer.
On 04/09/2012 09:43 AM, Paul Berry wrote:
When using a separate stencil buffer, i965 requires that the pitch of
the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
the actual pitch.
Previously this was accomplished by doubling the "cpp" and "pitch"
values stored in the intel_region data structure, and halving the
height. However, this was confusing, and it led to a subtle (but
benign) bug: since a stencil buffer is W-tiled, its true height must
be aligned to a multiple of 64; we were accidentally aligning its faux
height to a multiple of 64, causing memory to be wasted.
Note that for window system stencil buffers, the X server also doubles
the cpp and pitch values. To facilitate fixing this X server bug in
the future, we fix the cpp and pitch values we receive from the X
server only if cpp has the "incorrect" value of 2.
Paul,
This seems like a nice clean-up. I'm glad to see this.
I reviewed the code and it seems to make sense, but I'd really want to
see Chad or Eric's review on it before it gets pushed.
Acked-by: Kenneth Graunke
One small comment below:
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
b/src/mesa/drivers/dri/intel/intel_context.c
index 16a9887..fc3258b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -1251,17 +1251,34 @@ intel_process_dri2_buffer_with_separate_stencil(struct
intel_context *intel,
int buffer_width;
int buffer_height;
+ int buffer_cpp = buffer->cpp;
+ int buffer_pitch = buffer->pitch;
if (buffer->attachment == __DRI_BUFFER_STENCIL) {
- /* The stencil buffer has quirky pitch requirements. From Section
- * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
- *The pitch must be set to 2x the value computed based on width, as
- *the stencil buffer is stored with two rows interleaved.
+ /* Stencil buffers use W tiling, a tiling format that the DRM functions
+ * don't properly account for. Therefore, when we allocate a stencil
+ * buffer that is private to Mesa (see intel_miptree_create), we round
+ * the height and width up to the next multiple of the tile size (64x64)
+ * and then ask DRM to allocate an untiled buffer. Consequently, the
+ * height and the width stored in the stencil buffer's region structure
+ * are always multiples of 64, even if the stencil buffer itself is
+ * smaller.
*
- * To satisfy the pitch requirement, the X driver allocated the region
- * with the following dimensions.
+ * To avoid inconsistencies between how we represent private buffers and
+ * buffers shared with the window system, round up the height and width
+ * for window system buffers too.
*/
buffer_width = ALIGN(drawable->w, 64);
- buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
+ buffer_height = ALIGN(drawable->h, 64);
+
+ /* As of 4/6/2012, the X server lies and sends cpp and pitch values
+* that are two times too large for stencil buffers. Hopefully this
+* will be fixed someday, but for now detect the bug by checking if cpp
+* is 2, and fixing cpp and pitch if it is.
+*/
+ if (buffer_cpp == 2) {
+ buffer_cpp = 1;
+ buffer_pitch /= 2;
+ }
} else {
buffer_width = drawable->w;
buffer_height = drawable->h;
I was going to suggest saying "xserver 1.12 lies and sends..." rather
than using a date...but...I don't think it's the X server that's really
at fault. Isn't it xf86-video-intel (sometimes called the DDX)?
So, maybe "As of 4/6/2012, the DDX lies and sends cpp and pitch values"?
Sadly, I'm not sure how to fix that without breaking new DDX + old Mesa.
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[Mesa-dev] [PATCH] i965: Stop lying about cpp and height of a stencil buffer.
When using a separate stencil buffer, i965 requires that the pitch of
the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
the actual pitch.
Previously this was accomplished by doubling the "cpp" and "pitch"
values stored in the intel_region data structure, and halving the
height. However, this was confusing, and it led to a subtle (but
benign) bug: since a stencil buffer is W-tiled, its true height must
be aligned to a multiple of 64; we were accidentally aligning its faux
height to a multiple of 64, causing memory to be wasted.
Note that for window system stencil buffers, the X server also doubles
the cpp and pitch values. To facilitate fixing this X server bug in
the future, we fix the cpp and pitch values we receive from the X
server only if cpp has the "incorrect" value of 2.
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 11 ---
src/mesa/drivers/dri/i965/gen7_misc_state.c| 16 ++-
src/mesa/drivers/dri/intel/intel_context.c | 35 +--
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 24 ++--
src/mesa/drivers/dri/intel/intel_screen.c | 24 ++--
5 files changed, 65 insertions(+), 45 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 3479333..62bcc93 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -326,10 +326,6 @@ static void emit_depthbuffer(struct brw_context *brw)
* 3DSTATE_DEPTH_BUFFER: namely the tile walk, surface type, width, and
* height.
*
- * Since the stencil buffer has quirky pitch requirements, its region
- * was allocated with half height and double cpp. So we need
- * a multiplier of 2 to obtain the surface's real height.
- *
* Enable the hiz bit because it and the separate stencil bit must have
* the same value. From Section 2.11.5.6.1.1 3DSTATE_DEPTH_BUFFER, Bit
* 1.21 "Separate Stencil Enable":
@@ -435,7 +431,12 @@ static void emit_depthbuffer(struct brw_context *brw)
struct intel_region *region = stencil_mt->region;
BEGIN_BATCH(3);
OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2));
-OUT_BATCH(region->pitch * region->cpp - 1);
+ /* The stencil buffer has quirky pitch requirements. From Vol 2a,
+ * 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
+ *The pitch must be set to 2x the value computed based on width,
as
+ *the stencil buffer is stored with two rows interleaved.
+ */
+OUT_BATCH(2 * region->pitch * region->cpp - 1);
OUT_RELOC(region->bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 5da6434..3a6144f 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -143,8 +143,22 @@ static void emit_depthbuffer(struct brw_context *brw)
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
+ /* The stencil buffer has quirky pitch requirements. From the Graphics
+ * BSpec: vol2a.11 3D Pipeline Windower > Early Depth/Stencil Processing
+ * > Depth/Stencil Buffer State > 3DSTATE_STENCIL_BUFFER [DevIVB+],
+ * field "Surface Pitch":
+ *
+ *The pitch must be set to 2x the value computed based on width, as
+ *the stencil buffer is stored with two rows interleaved.
+ *
+ * (Note that it is not 100% clear whether this intended to apply to
+ * Gen7; the BSpec flags this comment as "DevILK,DevSNB" (which would
+ * imply that it doesn't), however the comment appears on a "DevIVB+"
+ * page (which would imply that it does). Experiments with the hardware
+ * indicate that it does.
+ */
OUT_BATCH(enabled |
- (stencil_mt->region->pitch * stencil_mt->region->cpp - 1));
+ (2 * stencil_mt->region->pitch * stencil_mt->region->cpp - 1));
OUT_RELOC(stencil_mt->region->bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
b/src/mesa/drivers/dri/intel/intel_context.c
index 16a9887..fc3258b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -1251,17 +1251,34 @@ intel_process_dri2_buffer_with_separate_stencil(struct
intel_context *intel,
int buffer_width;
int buffer_height;
+ int buffer_cpp = buffer->cpp;
+ int buffer_pitch = buffer->pitch;
if (buffer->attachment == __DRI_BUFFER_STENCIL) {
- /* The stencil buffer has quirky pitch requirements. From Section
- * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
- *The pitch must be s
Re: [Mesa-dev] [PATCH 1/2] i965: Remove vestiges of function call support from the old VS backend.
On Mon, 2 Apr 2012 14:30:52 -0700, Kenneth Graunke wrote: > This never worked. brwProgramStringNotify also explicitly rejects > programs that use CAL and RET. So there's no need for this to exist. > > Signed-off-by: Kenneth Graunke This series is: Reviewed-by: Eric Anholt pgp3FWBfVmK7w.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] x86-64: Don't print "Initializing x86-64 optimizations" in debug builds.
On Mon, 2 Apr 2012 14:56:14 -0700, Kenneth Graunke wrote: > In "release" builds, Mesa would print this message if the MESA_DEBUG > variable was set. Make it so for debug builds as well. > > I build debug builds all the time, but I'm not debugging this. > > Signed-off-by: Kenneth Graunke Anything to make this message die. Reviewed-by: Eric Anholt pgpw6suHI1wvM.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] r600g: disable I2F conversion for InstanceID if integers are supported
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_shader.c | 27 ---
1 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 1adf344..bfae51c 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -194,6 +194,7 @@ struct r600_shader_ctx {
boolean clip_vertex_write;
unsignedcv_output;
int fragcoord_input;
+ int native_integers;
};
struct r600_shader_tgsi_instruction {
@@ -500,20 +501,22 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
case TGSI_FILE_SYSTEM_VALUE:
if (d->Semantic.Name == TGSI_SEMANTIC_INSTANCEID) {
- struct r600_bytecode_alu alu;
- memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ if (!ctx->native_integers) {
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(struct
r600_bytecode_alu));
- alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
- alu.src[0].sel = 0;
- alu.src[0].chan = 3;
+ alu.inst =
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+ alu.src[0].sel = 0;
+ alu.src[0].chan = 3;
- alu.dst.sel = 0;
- alu.dst.chan = 3;
- alu.dst.write = 1;
- alu.last = 1;
+ alu.dst.sel = 0;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+ alu.last = 1;
- if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
- return r;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
break;
} else if (d->Semantic.Name == TGSI_SEMANTIC_VERTEXID)
break;
@@ -818,6 +821,8 @@ static int r600_shader_from_tgsi(struct r600_context *
rctx, struct r600_pipe_sh
ctx.bc = &shader->bc;
ctx.shader = shader;
+ ctx.native_integers = (rctx->screen->glsl_feature_level >= 130);
+
r600_bytecode_init(ctx.bc, rctx->chip_class, rctx->family);
ctx.tokens = tokens;
tgsi_scan_shader(tokens, &ctx.info);
--
1.7.7.6
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[Mesa-dev] [PATCH 1/2] r600g: store glsl_feature_level in the r600_screen
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_pipe.c |3 ++-
src/gallium/drivers/r600/r600_pipe.h |1 +
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 35553f4..6486640 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -411,7 +411,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum
pipe_cap param)
return 1;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return debug_get_bool_option("R600_GLSL130", FALSE) ? 130 : 120;
+ return rscreen->glsl_feature_level;
/* Supported except the original R600. */
case PIPE_CAP_INDEP_BLEND_ENABLE:
@@ -879,6 +879,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys
*ws)
pipe_mutex_init(rscreen->fences.mutex);
rscreen->use_surface_alloc = debug_get_bool_option("R600_SURF", TRUE);
+ rscreen->glsl_feature_level = debug_get_bool_option("R600_GLSL130",
FALSE) ? 130 : 120;
return &rscreen->screen;
}
diff --git a/src/gallium/drivers/r600/r600_pipe.h
b/src/gallium/drivers/r600/r600_pipe.h
index a84f9cc..47849d2 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -124,6 +124,7 @@ struct r600_screen {
unsignednum_contexts;
booluse_surface_alloc;
+ int glsl_feature_level;
/* for thread-safe write accessing to num_contexts */
pipe_mutex mutex_num_contexts;
--
1.7.7.6
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[Mesa-dev] [PATCH 8/8] r600g: implement pipe_screen::get_driver_name
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_pipe.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 7c40e50..35553f4 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -364,6 +364,11 @@ static const char *r600_get_family_name(enum radeon_family
family)
}
}
+static const char* r600_get_driver_name(struct pipe_screen* pscreen)
+{
+ return "r600g";
+}
+
static const char* r600_get_name(struct pipe_screen* pscreen)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
@@ -839,6 +844,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys
*ws)
}
rscreen->screen.destroy = r600_destroy_screen;
+ rscreen->screen.get_driver_name = r600_get_driver_name;
rscreen->screen.get_name = r600_get_name;
rscreen->screen.get_vendor = r600_get_vendor;
rscreen->screen.get_param = r600_get_param;
--
1.7.7.6
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[Mesa-dev] [PATCH 7/8] st/mesa: handle force_glsl_extensions_warn
Signed-off-by: Vadim Girlin --- src/mesa/state_tracker/st_extensions.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 0c98611..47e2373 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -629,4 +629,7 @@ void st_init_extensions(struct st_context *st, const driOptionCache * optionCach break; } } + + if (driQueryOptionb(optionCache, "force_glsl_extensions_warn")) + ctx->Const.ForceGLSLExtensionsWarn = 1; } -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 6/8] st/dri: add force_glsl_extensions_warn option to dri configuration
Signed-off-by: Vadim Girlin --- src/gallium/state_trackers/dri/common/dri_screen.c | 11 ++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c b/src/gallium/state_trackers/dri/common/dri_screen.c index 24efbde..3c6d24b 100644 --- a/src/gallium/state_trackers/dri/common/dri_screen.c +++ b/src/gallium/state_trackers/dri/common/dri_screen.c @@ -41,6 +41,8 @@ #include "util/u_debug.h" +#undef false + PUBLIC const char __driConfigOptions[] = DRI_CONF_BEGIN DRI_CONF_SECTION_PERFORMANCE @@ -58,9 +60,16 @@ PUBLIC const char __driConfigOptions[] = DRI_CONF_PP_JIMENEZMLAA(0, 0, 32) DRI_CONF_PP_JIMENEZMLAA_COLOR(0, 0, 32) DRI_CONF_SECTION_END + + DRI_CONF_SECTION_DEBUG + DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false) + DRI_CONF_SECTION_END + DRI_CONF_END; -static const uint __driNConfigOptions = 9; +#define false 0 + +static const uint __driNConfigOptions = 10; static const __DRIconfig ** dri_fill_in_modes(struct dri_screen *screen, -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/8] st/mesa: pass the configuration options to st_init_extensions
Signed-off-by: Vadim Girlin
---
src/mesa/state_tracker/st_context.c|9 +
src/mesa/state_tracker/st_context.h|3 ++-
src/mesa/state_tracker/st_extensions.c |2 +-
src/mesa/state_tracker/st_extensions.h |2 +-
src/mesa/state_tracker/st_manager.c|2 +-
5 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/src/mesa/state_tracker/st_context.c
b/src/mesa/state_tracker/st_context.c
index a3fd4db..1e76501 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -111,7 +111,7 @@ st_get_msaa(void)
static struct st_context *
-st_create_context_priv( struct gl_context *ctx, struct pipe_context *pipe )
+st_create_context_priv( struct gl_context *ctx, struct pipe_context *pipe,
const driOptionCache * optionCache )
{
uint i;
struct st_context *st = ST_CALLOC_STRUCT( st_context );
@@ -171,7 +171,7 @@ st_create_context_priv( struct gl_context *ctx, struct
pipe_context *pipe )
/* GL limits and extensions */
st_init_limits(st);
- st_init_extensions(st);
+ st_init_extensions(st, optionCache);
return st;
}
@@ -179,7 +179,8 @@ st_create_context_priv( struct gl_context *ctx, struct
pipe_context *pipe )
struct st_context *st_create_context(gl_api api, struct pipe_context *pipe,
const struct gl_config *visual,
- struct st_context *share)
+ struct st_context *share,
+ const driOptionCache * optionCache)
{
struct gl_context *ctx;
struct gl_context *shareCtx = share ? share->ctx : NULL;
@@ -204,7 +205,7 @@ struct st_context *st_create_context(gl_api api, struct
pipe_context *pipe,
if (debug_get_option_mesa_mvp_dp4())
_mesa_set_mvp_with_dp4( ctx, GL_TRUE );
- return st_create_context_priv(ctx, pipe);
+ return st_create_context_priv(ctx, pipe, optionCache);
}
diff --git a/src/mesa/state_tracker/st_context.h
b/src/mesa/state_tracker/st_context.h
index da03719..b9a229a 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -281,7 +281,8 @@ st_get_msaa(void);
extern struct st_context *
st_create_context(gl_api api, struct pipe_context *pipe,
const struct gl_config *visual,
- struct st_context *share);
+ struct st_context *share,
+ const driOptionCache * optionCache);
extern void
st_destroy_context(struct st_context *st);
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index afea0ea..0c98611 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -325,7 +325,7 @@ static void init_format_extensions(struct st_context *st,
* features or can be built on top of other gallium features.
* Some fine tuning may still be needed.
*/
-void st_init_extensions(struct st_context *st)
+void st_init_extensions(struct st_context *st, const driOptionCache *
optionCache)
{
struct pipe_screen *screen = st->pipe->screen;
struct gl_context *ctx = st->ctx;
diff --git a/src/mesa/state_tracker/st_extensions.h
b/src/mesa/state_tracker/st_extensions.h
index aa9b2b2..bb79336 100644
--- a/src/mesa/state_tracker/st_extensions.h
+++ b/src/mesa/state_tracker/st_extensions.h
@@ -34,7 +34,7 @@ struct st_context;
extern void st_init_limits(struct st_context *st);
-extern void st_init_extensions(struct st_context *st);
+extern void st_init_extensions(struct st_context *st, const driOptionCache *
optionCache);
#endif /* ST_EXTENSIONS_H */
diff --git a/src/mesa/state_tracker/st_manager.c
b/src/mesa/state_tracker/st_manager.c
index d54b7ed..c0c3f1a 100644
--- a/src/mesa/state_tracker/st_manager.c
+++ b/src/mesa/state_tracker/st_manager.c
@@ -635,7 +635,7 @@ st_api_create_context(struct st_api *stapi, struct
st_manager *smapi,
}
st_visual_to_context_mode(&attribs->visual, &mode);
- st = st_create_context(api, pipe, &mode, shared_ctx);
+ st = st_create_context(api, pipe, &mode, shared_ctx, attribs->optionCache);
if (!st) {
*error = ST_CONTEXT_ERROR_NO_MEMORY;
pipe->destroy(pipe);
--
1.7.7.6
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[Mesa-dev] [PATCH 4/8] st/dri: pass optionCache in the st_context_attribs
Signed-off-by: Vadim Girlin --- .../state_trackers/dri/common/dri_context.c|2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gallium/state_trackers/dri/common/dri_context.c b/src/gallium/state_trackers/dri/common/dri_context.c index 780cab1..bf115e9 100644 --- a/src/gallium/state_trackers/dri/common/dri_context.c +++ b/src/gallium/state_trackers/dri/common/dri_context.c @@ -114,6 +114,8 @@ dri_create_context(gl_api api, const struct gl_config * visual, driParseConfigFiles(&ctx->optionCache, &screen->optionCache, sPriv->myNum, driverName); + attribs.optionCache = &ctx->optionCache; + dri_fill_st_visual(&attribs.visual, screen, visual); ctx->st = stapi->create_context(stapi, &screen->base, &attribs, &ctx_err, st_share); -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/8] gallium: add optionCache to st_context_attribs
This will be used to pass the configuration options through the context creation calls. Signed-off-by: Vadim Girlin --- src/gallium/include/state_tracker/st_api.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/src/gallium/include/state_tracker/st_api.h b/src/gallium/include/state_tracker/st_api.h index 3af1dfc..053fb5a 100644 --- a/src/gallium/include/state_tracker/st_api.h +++ b/src/gallium/include/state_tracker/st_api.h @@ -27,6 +27,7 @@ #ifndef _ST_API_H_ #define _ST_API_H_ +#include "drivers/dri/common/xmlconfig.h" #include "pipe/p_compiler.h" #include "pipe/p_format.h" @@ -243,6 +244,8 @@ struct st_context_attribs * The visual of the framebuffers the context will be bound to. */ struct st_visual visual; + + struct driOptionCache * optionCache; }; /** -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/8] st/dri: use pipe_screen::get_driver_name to select the config
If optional pipe_screen::get_driver_name is implemented, then use returned
string to select the configuration, instead of "dri".
Signed-off-by: Vadim Girlin
---
.../state_trackers/dri/common/dri_context.c| 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/src/gallium/state_trackers/dri/common/dri_context.c
b/src/gallium/state_trackers/dri/common/dri_context.c
index e07e168..780cab1 100644
--- a/src/gallium/state_trackers/dri/common/dri_context.c
+++ b/src/gallium/state_trackers/dri/common/dri_context.c
@@ -36,6 +36,7 @@
#include "dri_context.h"
#include "pipe/p_context.h"
+#include "pipe/p_screen.h"
#include "state_tracker/st_context.h"
static void
@@ -64,6 +65,8 @@ dri_create_context(gl_api api, const struct gl_config *
visual,
struct st_context_iface *st_share = NULL;
struct st_context_attribs attribs;
enum st_context_error ctx_err = 0;
+ struct pipe_screen * pscreen = screen->base.screen;
+ const char *driverName;
memset(&attribs, 0, sizeof(attribs));
switch (api) {
@@ -103,8 +106,13 @@ dri_create_context(gl_api api, const struct gl_config *
visual,
ctx->cPriv = cPriv;
ctx->sPriv = sPriv;
+ if (pscreen->get_driver_name)
+ driverName = pscreen->get_driver_name(pscreen);
+ else
+ driverName = "dri";
+
driParseConfigFiles(&ctx->optionCache,
- &screen->optionCache, sPriv->myNum, "dri");
+ &screen->optionCache, sPriv->myNum, driverName);
dri_fill_st_visual(&attribs.visual, screen, visual);
ctx->st = stapi->create_context(stapi, &screen->base, &attribs, &ctx_err,
--
1.7.7.6
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[Mesa-dev] [PATCH 1/8] gallium: add get_driver_name to pipe_screen
Returned string will be used as the driver name for driconf lookup.
Signed-off-by: Vadim Girlin
---
src/gallium/include/pipe/p_screen.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/src/gallium/include/pipe/p_screen.h
b/src/gallium/include/pipe/p_screen.h
index 45c441b..9467157 100644
--- a/src/gallium/include/pipe/p_screen.h
+++ b/src/gallium/include/pipe/p_screen.h
@@ -67,6 +67,7 @@ struct pipe_transfer;
struct pipe_screen {
void (*destroy)( struct pipe_screen * );
+ const char *(*get_driver_name)( struct pipe_screen * );
const char *(*get_name)( struct pipe_screen * );
--
1.7.7.6
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[Mesa-dev] [PATCH 0/8] [RFC] improve driconf support for gallium
These patches allow to use driver-specific driconf settings, and to handle these options in the state tracker. It's then used to handle force_glsl_extensions_warn option, so we could use it e.g. for unigine applications. gallium: add get_driver_name to pipe_screen st/dri: use pipe_screen::get_driver_name to select the config gallium: add optionCache to st_context_attribs st/dri: pass optionCache in the st_context_attribs st/mesa: pass the configuration options to st_init_extensions st/dri: add force_glsl_extensions_warn option to dri configuration st/mesa: handle force_glsl_extensions_warn r600g: implement pipe_screen::get_driver_name src/gallium/drivers/r600/r600_pipe.c |6 ++ src/gallium/include/pipe/p_screen.h|1 + src/gallium/include/state_tracker/st_api.h |3 +++ .../state_trackers/dri/common/dri_context.c| 12 +++- src/gallium/state_trackers/dri/common/dri_screen.c | 11 ++- src/mesa/state_tracker/st_context.c|9 + src/mesa/state_tracker/st_context.h|3 ++- src/mesa/state_tracker/st_extensions.c |5 - src/mesa/state_tracker/st_extensions.h |2 +- src/mesa/state_tracker/st_manager.c|2 +- 10 files changed, 44 insertions(+), 10 deletions(-) -- 1.7.7.6 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] st/mesa: Fix uninitialized members in glsl_to_tgsi_visitor constructor.
On 04/08/2012 11:40 PM, Vinson Lee wrote: Fixes uninitialized member defects reported by Coverity. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vinson Lee --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp |4 1 file changed, 4 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 6745554..ae8533e 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -2815,6 +2815,10 @@ glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() indirect_addr_temps = false; indirect_addr_consts = false; mem_ctx = ralloc_context(NULL); + ctx = NULL; + prog = NULL; + shader_program = NULL; + options = NULL; } glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor() Reviewed-by: Brian Paul ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 6/7] softpipe: add dual source blending support
On 04/09/2012 09:14 AM, Dave Airlie wrote: On Wed, Apr 4, 2012 at 4:16 PM, Brian Paul wrote: On 04/03/2012 07:16 AM, Dave Airlie wrote: From: Dave Airlie This adds support for a single dual source blending MRT to softpipe. Why can't we do dual-source blending to all RTs? The problem is currently TGSI can't encode (location, index) color shader outputs, So the shader outputs would have to be mapped from a 1 dimensional array to something 2 dimensional, either defining alternate output colors as primary/secondary, or the secondary color as being an array after the primary color outputs. So I checked the hw, and none of it does this, they all report 1 dual source MRT, so I see no reason to make gallium care until someone creates hw that cares. OK. Maybe you could add this info as a comment somewhere (if it's not there already and I missed it). -Brian ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 6/7] softpipe: add dual source blending support
On Wed, Apr 4, 2012 at 4:16 PM, Brian Paul wrote: > On 04/03/2012 07:16 AM, Dave Airlie wrote: >> >> From: Dave Airlie >> >> This adds support for a single dual source blending MRT to softpipe. > > > Why can't we do dual-source blending to all RTs? The problem is currently TGSI can't encode (location, index) color shader outputs, So the shader outputs would have to be mapped from a 1 dimensional array to something 2 dimensional, either defining alternate output colors as primary/secondary, or the secondary color as being an array after the primary color outputs. So I checked the hw, and none of it does this, they all report 1 dual source MRT, so I see no reason to make gallium care until someone creates hw that cares. Dave. > > -Brian > ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 44405] Spring RTS crashes using r600g (5670, Redwood), kernel rejects relocations
https://bugs.freedesktop.org/show_bug.cgi?id=44405 José Fonseca changed: What|Removed |Added CC||bri...@vmware.com, ||jfons...@vmware.com --- Comment #16 from José Fonseca 2012-04-09 02:20:29 PDT --- (In reply to comment #14) > AFAICS the game uses additional gl context for loading the resources in the > separate thread. After destroying that context some pipe_surface is destroyed > in the "pipe_surface_reference" using the "surf->context->surface_destroy" > function pointer from the already destroyed context. > > There is a workaround - multithreaded loading can be disabled by adding > "LoadingMT = 0" to the game config (~/.springrc). Brian recently looked into this sort of issues. He commited a few workarounds, which might have help here too. But an extensive cleanup will be necessary to fully address this issue. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
