[Mesa-dev] [PATCH 1/2] i965/fs: Assert that messages lengths are in range.
If we accidentally create a message long enough that base_mrf + mlen
BRW_MAX_MRF, instruction scheduling would access past the end of the
last_mrf_write array.
Add assertions to catch cases where we would do that. Use the Elements
macro rather than using BRW_MAX_MRF directly since we may rework that
someday (as it's platform specific).
Note that we currently -do- create bogus messages, so this failure will
cause assertion failures in some cases (such as gzdoom). That said, it
would previously crash, so it's not really a regression.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48218
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
.../dri/i965/brw_fs_schedule_instructions.cpp |4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
index 910f329..b5a8acb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
@@ -290,6 +290,8 @@ instruction_scheduler::calculate_deps()
}
}
+ assert(inst-base_mrf + inst-mlen int(Elements(last_mrf_write)));
+
for (int i = 0; i inst-mlen; i++) {
/* It looks like the MRF regs are released in the send
* instruction once it's sent, not when the result comes
@@ -370,6 +372,8 @@ instruction_scheduler::calculate_deps()
}
}
+ assert(inst-base_mrf + inst-mlen int(Elements(last_mrf_write)));
+
for (int i = 0; i inst-mlen; i++) {
/* It looks like the MRF regs are released in the send
* instruction once it's sent, not when the result comes
--
1.7.9.5
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 Michel Dänzer mic...@daenzer.net changed: What|Removed |Added CC||obi12...@googlemail.com --- Comment #7 from Michel Dänzer mic...@daenzer.net 2012-04-24 00:49:44 UTC --- *** Bug 49083 has been marked as a duplicate of this bug. *** -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] intel: Return success when asked to allocate a 0-width/height renderbuffer.
On 04/23/2012 03:11 PM, Eric Anholt wrote: It seems silly that GL lets you allocate these given that they're framebuffer attachment incomplete, but the webgl conformance tests actually go looking to see if the getters on 0-width/height depth/stencil renderbuffers return good values. By failing out here, they all got smashed to 0, which turned out to be correct for all the getters they tested except for GL_RENDERBUFFER_INTERNAL_FORMAT. Now, by succeeding but not making a miptree, that one also returns the expected value. --- src/mesa/drivers/dri/intel/intel_fbo.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 2d1a798..5872ece 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -237,6 +237,9 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer _mesa_lookup_enum_by_nr(internalFormat), _mesa_get_format_name(rb-Format), width, height); + if (width == 0 || height == 0) + return true; + irb-mt = intel_miptree_create_for_renderbuffer(intel, rb-Format, width, height); if (!irb-mt) Seems reasonable. If it makes more tests pass and doesn't cause regressions, we should do it. Besides, it's entirely pointless and not going to affect real applications anyway. Acked-by: Kenneth Graunke kenn...@whitecape.org ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #9 from Michel Dänzer mic...@daenzer.net 2012-04-24 00:53:34 PDT --- FWIW, the environment variable DRAW_USE_LLVM=0 should work around the crash at a potential performance penalty. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #8 from Ionut Biru biru.io...@gmail.com 2012-04-24 00:51:09 PDT --- We have couples of valgrid logs https://bugs.archlinux.org/task/29202?getfile=8642 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #12 from Alen Skondro askon...@gmail.com 2012-04-24 01:21:29 PDT --- try MALLOC_CHECK_=1 gnome-control-center -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #13 from raphael.roc...@gmail.com raphael.roc...@gmail.com 2012-04-24 01:40:04 PDT --- (In reply to comment #12) try MALLOC_CHECK_=1 gnome-control-center Damned. Worked, got 10+ errors like this : *** glibc detected *** gnome-control-center: free(): invalid pointer: 0x7f36260d74d8 *** -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #14 from Serg Sergiu sergser...@gmail.com 2012-04-24 02:15:53 PDT --- Created attachment 60515 -- https://bugs.freedesktop.org/attachment.cgi?id=60515 valgrind log -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] WebGL WG interested in 1.0.1 conformance test results on real drivers
On Mon, 23 Apr 2012 10:30:41 -0700 (PDT), Benoit Jacob bja...@mozilla.com wrote: - Original Message - On Sat, 21 Apr 2012 08:09:33 -0700 (PDT), Benoit Jacob bja...@mozilla.com wrote: conformance/programs/program-test.html: 1 tests failed PASS linking should fail with in-use formerly good program, with new bad shader attached FAIL getError expected: NO_ERROR. Was INVALID_OPERATION : drawing with a valid program shouldn't generate a GL error This sounded like it was going to be a Mesa bug, but this testcase passes: This is indeed Mesa's bug: on failure, glLinkProgram should leave a previously-successfully-linked program intact. The testcase in your email doesn't seem to be re-linking the program with the bad shader, which would explain why it doesn't reproduce this issue. It should? I read the opposite in this quote from the GL 3.0 spec: Linking will also fail if one or more of the shader objects, attached to program are not compiled successfully, or if more active uniform or active sampler variables are used in program than allowed (see section 2.20.3). If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Thanks, I hadn't questioned that the test might be wrong, but now I agree with you. Also, the same phrasing is found in the OpenGL ES 2.0.25 spec page 30: If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Reporting this to the WebGL mailing list. I did find this gem later: If that program object that is in use is re-linked unsuccessfully, the link status will be set to FALSE, but existing executable and associated state will remain part of the current rendering state until a subsequent call to UseProgram removes it from use. Maybe they're testing that. I wonder what possible use was imagined for forcing that sort of complexity on driver developers. pgpItOMxZLE7V.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/3] mesa: require GL_MAX_SAMPLES = 4 for GL 3.0
On 04/22/2012 11:47 PM, Kenneth Graunke wrote: On 04/22/2012 01:43 AM, nobled wrote: As noted in commit be4e46b21a60cfdc826bf89d1078df54966115b1, this was missing before. NOTE: This is a candidate for the 8.0 branch. --- src/mesa/main/version.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c index 82cc54b..607230b 100644 --- a/src/mesa/main/version.c +++ b/src/mesa/main/version.c @@ -124,6 +124,7 @@ compute_version(struct gl_context *ctx) ctx-Extensions.EXT_texture_sRGB); const GLboolean ver_3_0 = (ver_2_1 ctx-Const.GLSLVersion= 130 + ctx-Const.MaxSamples= 4 ctx-Extensions.ARB_color_buffer_float ctx-Extensions.ARB_depth_buffer_float ctx-Extensions.ARB_half_float_pixel We can't really cherry-pick this to 8.0, as it would cause i965 to suddenly advertise 2.1 instead of 3.0. The missing/incorrect MSAA support has to stay a known issue for 8.0. Are you sure about that? I thought we already lied by saying that there were 4 samples. That said, I'm fine with this for master/8.1, as I think we'll have real MSAA support. Reviewed-by: Kenneth Graunke kenn...@whitecape.org ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/2] Add support for GL_EXT_texture_rg for GLES2.
On 04/20/2012 04:59 PM, Gwenole Beauchesne wrote: Hi, Those patches implement the optional GL_EXT_texture_rg extension for OpenGL ES 2.x on Intel GenX. Do we have ES2-specific test cases for this? Since there are extra layers of enum filtering for ES, we really need test cases for ES2 before enabling any of these kinds of extensions. Regards, Gwenole Beauchesne (2): mesa: add GL_EXT_texture_rg extension for OpenGL ES 2.x. intel: enable GL_EXT_texture_rg for OpenGL ES 2.x. include/GLES2/gl2ext.h | 13 + src/mapi/glapi/gen/es_EXT.xml|8 src/mesa/drivers/dri/intel/intel_extensions_es.c |1 + src/mesa/main/APIspec.xml|1 + src/mesa/main/extensions.c |1 + 5 files changed, 24 insertions(+), 0 deletions(-) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glsl parser: Select typelist as early as possible.
On 04/20/2012 08:20 AM, Olivier Galibert wrote:
Guys, it's a bugfix, it's five lines changed, and it's falling through
the cracks... Can someone have a look?
From my reply on 4/13:
Do you have a specific test case in mind that fails without this
patch but passes with?
OG.
On Wed, Apr 11, 2012 at 10:56:51AM +0200, Olivier Galibert wrote:
Type selection must be extended w.r.t version and extension lines as
soon as it is possible, and in any case before the lookahead is done
to check the nature of the next line. Otherwise code such as:
#version 400
dmat2 function inverse(dmat2 m) { ... }
fails because dmat2 has already been lexed as a NEW_IDENTIFIER
before _mesa_glsl_initialize_types is called.
Signed-off-by: Olivier Galibertgalib...@pobox.com
---
src/glsl/glsl_parser.yy |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
[Sorry, resent with the correct subject...]
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 64506b6..9a0af95 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -233,9 +233,6 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state
*st, const char *msg)
translation_unit:
version_statement extension_statement_list
- {
- _mesa_glsl_initialize_types(state);
- }
external_declaration_list
{
delete state-symbols;
@@ -285,6 +282,7 @@ version_statement:
state-version_string,
state-supported_version_string);
}
+ _mesa_glsl_initialize_types(state);
}
;
@@ -322,6 +320,7 @@ extension_statement:
if (!_mesa_glsl_process_extension($2, @2, $4, @4, state)) {
YYERROR;
}
+ _mesa_glsl_initialize_types(state);
}
;
--
1.7.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/2] Add support for GL_EXT_texture_rg for GLES2.
Hi, 2012/4/24 Ian Romanick i...@freedesktop.org: On 04/20/2012 04:59 PM, Gwenole Beauchesne wrote: Those patches implement the optional GL_EXT_texture_rg extension for OpenGL ES 2.x on Intel GenX. Do we have ES2-specific test cases for this? Since there are extra layers of enum filtering for ES, we really need test cases for ES2 before enabling any of these kinds of extensions. My testcase was Wayland/Weston for which I submitted patches. :) I am also cleaning up the rest of my Intel changes around regions hashing and other attributes. There are probably piglit tests we could reuse for ES2? Regards, Gwenole. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 nobled nob...@dreamwidth.org changed: What|Removed |Added Attachment #60515|text/x-log |text/plain mime type|| -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] WebGL WG interested in 1.0.1 conformance test results on real drivers
- Original Message - On Mon, 23 Apr 2012 10:30:41 -0700 (PDT), Benoit Jacob bja...@mozilla.com wrote: - Original Message - On Sat, 21 Apr 2012 08:09:33 -0700 (PDT), Benoit Jacob bja...@mozilla.com wrote: conformance/programs/program-test.html: 1 tests failed PASS linking should fail with in-use formerly good program, with new bad shader attached FAIL getError expected: NO_ERROR. Was INVALID_OPERATION : drawing with a valid program shouldn't generate a GL error This sounded like it was going to be a Mesa bug, but this testcase passes: This is indeed Mesa's bug: on failure, glLinkProgram should leave a previously-successfully-linked program intact. The testcase in your email doesn't seem to be re-linking the program with the bad shader, which would explain why it doesn't reproduce this issue. It should? I read the opposite in this quote from the GL 3.0 spec: Linking will also fail if one or more of the shader objects, attached to program are not compiled successfully, or if more active uniform or active sampler variables are used in program than allowed (see section 2.20.3). If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Thanks, I hadn't questioned that the test might be wrong, but now I agree with you. Also, the same phrasing is found in the OpenGL ES 2.0.25 spec page 30: If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Reporting this to the WebGL mailing list. I did find this gem later: If that program object that is in use is re-linked unsuccessfully, the link status will be set to FALSE, but existing executable and associated state will remain part of the current rendering state until a subsequent call to UseProgram removes it from use. Maybe they're testing that. I wonder what possible use was imagined for forcing that sort of complexity on driver developers. Yes, the public_webgl list got a reply quoting that sentence as the reason for the unit test's behavior. I must say I sympathize with you on this, but since it's what the spec says and what a majority of GL implementations do, let's keep it that way. Cheers, Benoit ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] mesa: generate GL_INVALID_VALUE when bufSize 0
On 04/22/2012 09:44 AM, nobled wrote:
Though not explicit in the GL_ARB_robustness extension,
the GL standard says:
If a negative number is provided where an argument of type sizei or
sizeiptr is specified, the error INVALID_VALUE is generated.
While the extension says that GL_INVALID_OPERATION is given
when the required space is greater thanbufSize, and this
Which error do other implementations generate? If there's a clear
trend, we should follow that. If there's not a clear trend, I can file
a bug against the spec for being ambiguous.
would be technically true for all negative values, defer to the
above language. This error check seems to apply even when a PBO
is bound, while insufficient but non-negative values of bufSize
are ignored.
This also fixes a bug in _mesa_validate_pbo_access() where the
signed value clientMemSize was blindly cast to an unsigned value.
When bufSize/clientMemSize were negative, it would be cast to
a value greater than INT_MAX and no error would have been given,
not even the incorrect GL_INVALID_OPERATION. Oops.
NOTE: This is a candidate for the 8.0 branch.
---
src/mesa/main/eval.c| 18 ++
src/mesa/main/pbo.c | 15 +++
src/mesa/main/pixel.c |6 ++
src/mesa/main/readpix.c |6 ++
src/mesa/main/texgetimage.c | 16 +++-
src/mesa/main/uniform_query.cpp |9 -
6 files changed, 68 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/eval.c b/src/mesa/main/eval.c
index e651715..8c25295 100644
--- a/src/mesa/main/eval.c
+++ b/src/mesa/main/eval.c
@@ -563,6 +563,12 @@ _mesa_GetnMapdvARB( GLenum target, GLenum query,
GLsizei bufSize, GLdouble *v )
return;
}
+ if (bufSize 0) {
+ _mesa_error( ctx, GL_INVALID_VALUE,
+ glGetnMapdvARB(bufSize = %d), bufSize );
+ return;
+ }
+
map1d = get_1d_map(ctx, target);
map2d = get_2d_map(ctx, target);
ASSERT(map1d || map2d);
@@ -655,6 +661,12 @@ _mesa_GetnMapfvARB( GLenum target, GLenum query,
GLsizei bufSize, GLfloat *v )
return;
}
+ if (bufSize 0) {
+ _mesa_error( ctx, GL_INVALID_VALUE,
+ glGetnMapfvARB(bufSize = %d), bufSize );
+ return;
+ }
+
map1d = get_1d_map(ctx, target);
map2d = get_2d_map(ctx, target);
ASSERT(map1d || map2d);
@@ -749,6 +761,12 @@ _mesa_GetnMapivARB( GLenum target, GLenum query,
GLsizei bufSize, GLint *v )
return;
}
+ if (bufSize 0) {
+ _mesa_error( ctx, GL_INVALID_VALUE,
+ glGetnMapivARB(bufSize = %d), bufSize );
+ return;
+ }
+
map1d = get_1d_map(ctx, target);
map2d = get_2d_map(ctx, target);
ASSERT(map1d || map2d);
diff --git a/src/mesa/main/pbo.c b/src/mesa/main/pbo.c
index d8fa919..0fe5394 100644
--- a/src/mesa/main/pbo.c
+++ b/src/mesa/main/pbo.c
@@ -71,6 +71,9 @@ _mesa_validate_pbo_access(GLuint dimensions,
/* unsigned, to detect overflow/wrap-around */
uintptr_t start, end, offset, size;
+ /* This should be error-checked by all callers beforehand. */
+ assert(clientMemSize= 0);
+
/* If no PBO is bound, 'ptr' is a pointer to client memory containing
'clientMemSize' bytes.
If a PBO is bound, 'ptr' is an offset into the bound PBO.
@@ -180,6 +183,12 @@ _mesa_map_validate_pbo_source(struct gl_context *ctx,
{
ASSERT(dimensions == 1 || dimensions == 2 || dimensions == 3);
+ if (clientMemSize 0) {
+ _mesa_error( ctx, GL_INVALID_VALUE,
+ %s(bufSize = %d), where, clientMemSize );
+ return NULL;
+ }
+
if (!_mesa_validate_pbo_access(dimensions, unpack, width, height, depth,
format, type, clientMemSize, ptr)) {
if (_mesa_is_bufferobj(unpack-BufferObj)) {
@@ -276,6 +285,12 @@ _mesa_map_validate_pbo_dest(struct gl_context *ctx,
{
ASSERT(dimensions == 1 || dimensions == 2 || dimensions == 3);
+ if (clientMemSize 0) {
+ _mesa_error( ctx, GL_INVALID_VALUE,
+ %s(bufSize = %d), where, clientMemSize );
+ return NULL;
+ }
+
if (!_mesa_validate_pbo_access(dimensions, unpack, width, height, depth,
format, type, clientMemSize, ptr)) {
if (_mesa_is_bufferobj(unpack-BufferObj)) {
diff --git a/src/mesa/main/pixel.c b/src/mesa/main/pixel.c
index 450c936..be6a19d 100644
--- a/src/mesa/main/pixel.c
+++ b/src/mesa/main/pixel.c
@@ -153,6 +153,12 @@ validate_pbo_access(struct gl_context *ctx,
{
GLboolean ok;
+ if (clientMemSize 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ glGetnPixelMap*vARB(bufSize = %d), clientMemSize);
+ return GL_FALSE;
+ }
+
/* Note, need to use DefaultPacking and Unpack's buffer object */
_mesa_reference_buffer_object(ctx,
ctx-DefaultPacking.BufferObj,
diff --git a/src/mesa/main/readpix.c
Re: [Mesa-dev] WebGL WG interested in 1.0.1 conformance test results on real drivers
On 04/24/2012 01:57 AM, Eric Anholt wrote: On Mon, 23 Apr 2012 10:30:41 -0700 (PDT), Benoit Jacobbja...@mozilla.com wrote: - Original Message - On Sat, 21 Apr 2012 08:09:33 -0700 (PDT), Benoit Jacob bja...@mozilla.com wrote: conformance/programs/program-test.html: 1 tests failed PASS linking should fail with in-use formerly good program, with new bad shader attached FAIL getError expected: NO_ERROR. Was INVALID_OPERATION : drawing with a valid program shouldn't generate a GL error This sounded like it was going to be a Mesa bug, but this testcase passes: This is indeed Mesa's bug: on failure, glLinkProgram should leave a previously-successfully-linked program intact. The testcase in your email doesn't seem to be re-linking the program with the bad shader, which would explain why it doesn't reproduce this issue. It should? I read the opposite in this quote from the GL 3.0 spec: Linking will also fail if one or more of the shader objects, attached to program are not compiled successfully, or if more active uniform or active sampler variables are used in program than allowed (see section 2.20.3). If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Thanks, I hadn't questioned that the test might be wrong, but now I agree with you. Also, the same phrasing is found in the OpenGL ES 2.0.25 spec page 30: If LinkProgram failed, any information about a previous link of that program object is lost. Thus, a failed link does not restore the old state of program. Reporting this to the WebGL mailing list. I did find this gem later: If that program object that is in use is re-linked unsuccessfully, the link status will be set to FALSE, but existing executable and associated state will remain part of the current rendering state until a subsequent call to UseProgram removes it from use. Maybe they're testing that. I wonder what possible use was imagined for forcing that sort of complexity on driver developers. I have a theory that may or may not be valid. Program objects are shared. The behavior implied by this bit of spec language is that relinking a program in one context won't break rendering in another context that is using that program. It's also possible that the language was written with the assumption that there was no such thing as state-dependent recompiles. Linking the program generates an executable, and you're done, right? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/2] egl/android: Add support for RGBX_8888 used in Android native buffers
Add new format __DRI_IMAGE_FORMAT_XBGR to __DRI_IMAGE.
HAL_PIXEL_FORMAT_RGBX_ now maps to __DRI_IMAGE_FORMAT_XBGR.
Signed-off-by: Sean V Kelley sean.v.kel...@linux.intel.com
---
include/GL/internal/dri_interface.h |1 +
src/egl/drivers/dri2/platform_android.c |2 ++
2 files changed, 3 insertions(+)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index da83666..eafbe10 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -906,6 +906,7 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FORMAT_XRGB 0x1002
#define __DRI_IMAGE_FORMAT_ARGB 0x1003
#define __DRI_IMAGE_FORMAT_ABGR 0x1004
+#define __DRI_IMAGE_FORMAT_XBGR 0x1005
#define __DRI_IMAGE_USE_SHARE 0x0001
#define __DRI_IMAGE_USE_SCANOUT0x0002
diff --git a/src/egl/drivers/dri2/platform_android.c
b/src/egl/drivers/dri2/platform_android.c
index 1998941..66142cd 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -311,6 +311,8 @@ dri2_create_image_android_native_buffer(_EGLDisplay *disp,
format = __DRI_IMAGE_FORMAT_ABGR;
break;
case HAL_PIXEL_FORMAT_RGBX_:
+ format = __DRI_IMAGE_FORMAT_XBGR;
+ break;
case HAL_PIXEL_FORMAT_RGB_888:
case HAL_PIXEL_FORMAT_RGBA_5551:
case HAL_PIXEL_FORMAT_RGBA_:
--
1.7.9.5
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] i965: Support Android RGBX8888 format for EGL generated images
Enabled MESA_FORMAT_RGBX_REV for RGBX. Android software requires RGBX format to be supported for software rendering. That requires EGL to be capable of generating images from this format. Signed-off-by: Sean V Kelley sean.v.kel...@linux.intel.com --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c |2 ++ src/mesa/drivers/dri/intel/intel_screen.c| 10 ++ 2 files changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 69af0ee..8983195 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -291,6 +291,8 @@ brw_format_for_mesa_format(gl_format mesa_format) [MESA_FORMAT_RGBA_REV] = BRW_SURFACEFORMAT_R8G8B8A8_UNORM, [MESA_FORMAT_ARGB] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM, [MESA_FORMAT_ARGB_REV] = 0, + [MESA_FORMAT_RGBX] = 0, + [MESA_FORMAT_RGBX_REV] = BRW_SURFACEFORMAT_R8G8B8X8_UNORM, [MESA_FORMAT_XRGB] = BRW_SURFACEFORMAT_B8G8R8X8_UNORM, [MESA_FORMAT_XRGB_REV] = 0, [MESA_FORMAT_RGB888] = 0, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index e823792..7edf5c1 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -209,6 +209,11 @@ intel_create_image_from_name(__DRIscreen *screen, image-internal_format = GL_RGBA; image-data_type = GL_UNSIGNED_BYTE; break; +case __DRI_IMAGE_FORMAT_XBGR: + image-format = MESA_FORMAT_RGBX_REV; + image-internal_format = GL_RGB; + image-data_type = GL_UNSIGNED_BYTE; + break; default: free(image); return NULL; @@ -310,6 +315,11 @@ intel_create_image(__DRIscreen *screen, image-internal_format = GL_RGBA; image-data_type = GL_UNSIGNED_BYTE; break; +case __DRI_IMAGE_FORMAT_XBGR: + image-format = MESA_FORMAT_RGBX_REV; + image-internal_format = GL_RGB; + image-data_type = GL_UNSIGNED_BYTE; + break; default: free(image); return NULL; -- 1.7.9.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/5] dri2: extended DRI image for YUV + interlaced videos
Hi, 2012/4/23 Rob Clark rob.cl...@linaro.org: On Mon, Apr 23, 2012 at 4:54 AM, Gwenole Beauchesne gb.de...@gmail.com wrote: This patch series corresponds to the DRI2 changes needed for my new refactored Wayland and VA/EGL proposals to handle YUV buffers and also a means to differentiate progressive/interlaced contents. fwiw, for x11 side of things, I had previously made some patches to push yuv buffers to xserver via an extension to dri2 proto: I once considered attaching this kind of info right to DRM buffers through appropriate ioctl(), but I backtracked as the fewer dependencies are changed, the better I feel. looks like your changes are mainly intended for wayland, but I suppose there should be some way to make this work in x11 as well, to keep things more similar looking for the stuff on top of the winsys backend.. It's not intended for Wayland only but rather for anybodoy willing to import foreign DRM buffers which could have YUV layout. This indeed implies Wayland but also MESA_drm_image (with some plane id spec), and VA-API for buffers sharing between VA and GL stacks. Mapping individual YUV components is interesting for postprocessing client side.e.g. applying image enhancement filters (sharpening, noise reduction, etc.) to any program that generates YUV or VA surfaces, even if this program is a proprietary plug-in for example. In other words, bringing this filtering logic to the main application (GLX), or even the compositor level (for Wayland). Regards, Gwenole. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/7] intel: implement DRI image extension v4
Hi, This patch series implements the proposed DRI image extension v4 changes to Intel GenX. To be honest, I have not tested the picture structure patch, as I directly adapted it from the VA driver, where interlaced surfaces are correctly handled already. I simplified the hashing stuff to the minimal useful set. i.e. store up to 3 intel_regions into an hash entry. No more variable array of regions. Regards, Gwenole Beauchesne (7): intel: introduce new intel_region_alloc_for_handle2(). intel: allow regions hashing per name + plane id. intel: implement createImageFromName2(). intel: image: add support for more formats. intel: image: add support for interlaced structure. intel: image: handle plane id and offset attributes. intel: image: bump supported interface version. src/mesa/drivers/dri/i965/brw_defines.h |2 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 23 +++- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 16 ++- src/mesa/drivers/dri/intel/intel_regions.c| 148 ++--- src/mesa/drivers/dri/intel/intel_regions.h| 46 ++- src/mesa/drivers/dri/intel/intel_screen.c | 82 +--- 6 files changed, 272 insertions(+), 45 deletions(-) -- 1.7.5.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/7] intel: introduce new intel_region_alloc_for_handle2().
This is an extended version of the original intel_region_alloc_for_handle()
function but with extra attributes for future usage. e.g. picture structure,
offset to bo base, etc.
---
src/mesa/drivers/dri/intel/intel_regions.c | 42 +--
src/mesa/drivers/dri/intel/intel_regions.h | 28 ++-
2 files changed, 53 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c
b/src/mesa/drivers/dri/intel/intel_regions.c
index abea2bd..f10424d 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -160,8 +160,7 @@ intel_region_unmap(struct intel_context *intel, struct
intel_region *region)
static struct intel_region *
intel_region_alloc_internal(struct intel_screen *screen,
- GLuint cpp,
- GLuint width, GLuint height, GLuint pitch,
+ const struct intel_region_attributes *attrs,
uint32_t tiling, drm_intel_bo *buffer)
{
struct intel_region *region;
@@ -170,10 +169,10 @@ intel_region_alloc_internal(struct intel_screen *screen,
if (region == NULL)
return region;
- region-cpp = cpp;
- region-width = width;
- region-height = height;
- region-pitch = pitch;
+ region-cpp = attrs-cpp;
+ region-width = attrs-width;
+ region-height = attrs-height;
+ region-pitch = attrs-pitch;
region-refcount = 1;
region-bo = buffer;
region-tiling = tiling;
@@ -193,6 +192,7 @@ intel_region_alloc(struct intel_screen *screen,
unsigned long flags = 0;
unsigned long aligned_pitch;
struct intel_region *region;
+ struct intel_region_attributes attrs;
if (expect_accelerated_upload)
flags |= BO_ALLOC_FOR_RENDER;
@@ -203,8 +203,11 @@ intel_region_alloc(struct intel_screen *screen,
if (buffer == NULL)
return NULL;
- region = intel_region_alloc_internal(screen, cpp, width, height,
-aligned_pitch / cpp, tiling, buffer);
+ attrs.cpp = cpp;
+ attrs.width = width;
+ attrs.height= height;
+ attrs.pitch = aligned_pitch / cpp;
+ region = intel_region_alloc_internal(screen, attrs, tiling, buffer);
if (region == NULL) {
drm_intel_bo_unreference(buffer);
return NULL;
@@ -229,11 +232,20 @@ intel_region_flink(struct intel_region *region, uint32_t
*name)
return true;
}
+static inline bool
+intel_region_validate_attributes(const struct intel_region *region,
+ const struct intel_region_attributes *attrs)
+{
+return (region-cpp== attrs-cpp
+region-width == attrs-width
+region-height == attrs-height
+region-pitch == attrs-pitch);
+}
+
struct intel_region *
-intel_region_alloc_for_handle(struct intel_screen *screen,
- GLuint cpp,
- GLuint width, GLuint height, GLuint pitch,
- GLuint handle, const char *name)
+intel_region_alloc_for_handle2(struct intel_screen *screen,
+ unsigned int handle, const char *name,
+ const struct intel_region_attributes *attrs)
{
struct intel_region *region, *dummy;
drm_intel_bo *buffer;
@@ -243,8 +255,7 @@ intel_region_alloc_for_handle(struct intel_screen *screen,
region = _mesa_HashLookup(screen-named_regions, handle);
if (region != NULL) {
dummy = NULL;
- if (region-width != width || region-height != height ||
- region-cpp != cpp || region-pitch != pitch) {
+ if (!intel_region_validate_attributes(region, attrs)) {
fprintf(stderr,
Region for name %d already exists but is not compatible\n,
handle);
@@ -265,8 +276,7 @@ intel_region_alloc_for_handle(struct intel_screen *screen,
return NULL;
}
- region = intel_region_alloc_internal(screen, cpp,
- width, height, pitch, tiling, buffer);
+ region = intel_region_alloc_internal(screen, attrs, tiling, buffer);
if (region == NULL) {
drm_intel_bo_unreference(buffer);
return NULL;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h
b/src/mesa/drivers/dri/intel/intel_regions.h
index 4ea970a..00cdab9 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -69,6 +69,17 @@ struct intel_region
struct intel_screen *screen;
};
+/**
+ * A helper structure that defines attributes useful for importing buffers.
+ * See. intel_region_alloc_for_handle().
+ */
+struct intel_region_attributes {
+ GLuint cpp; /** bytes per pixel */
+ GLuint width;/** in pixels */
+ GLuint height; /** in pixels */
+ GLuint pitch;/** in pixels */
+};
+
/* Allocate a refcounted region. Pointers to regions should only be
* copied by calling
[Mesa-dev] [PATCH 2/7] intel: allow regions hashing per name + plane id.
Allow regions to be hashed from a single key (name) and plane id. This
is preparatory work to support multitexturing from a single YUV buffer.
---
src/mesa/drivers/dri/intel/intel_regions.c | 98 ++--
src/mesa/drivers/dri/intel/intel_regions.h |9 +++
src/mesa/drivers/dri/intel/intel_screen.c | 13 +---
3 files changed, 104 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c
b/src/mesa/drivers/dri/intel/intel_regions.c
index f10424d..70619af 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -104,7 +104,95 @@ debug_backtrace(void)
#endif
+/* Region hash utilities */
+#define MAX_PLANES 3
+struct hash_entry {
+struct intel_region *regions[MAX_PLANES];
+unsigned int num_regions;
+};
+
+static inline struct hash_entry *
+hash_entry_new(void)
+{
+return calloc(1, sizeof(struct hash_entry));
+}
+
+static inline void
+hash_entry_destroy(struct hash_entry *e)
+{
+free(e);
+}
+
+static void
+intel_region_hash_destroy_callback(GLuint key, void *data, void *userData)
+{
+hash_entry_destroy(data);
+}
+
+struct _mesa_HashTable *
+intel_region_hash_new(void)
+{
+return _mesa_NewHashTable();
+}
+
+void
+intel_region_hash_destroy(struct _mesa_HashTable **h_ptr)
+{
+struct _mesa_HashTable * const h = *h_ptr;
+
+ /* Some regions may still have references to them at this point, so
+* flush the hash table to prevent _mesa_DeleteHashTable() from
+* complaining about the hash not being empty; */
+ _mesa_HashDeleteAll(h, intel_region_hash_destroy_callback, NULL);
+ _mesa_DeleteHashTable(h);
+ *h_ptr = NULL;
+}
+
+static inline struct intel_region *
+intel_region_hash_lookup(struct _mesa_HashTable *h, uint32_t name, uint32_t id)
+{
+struct hash_entry * const e = _mesa_HashLookup(h, name);
+
+if (e id ARRAY_SIZE(e-regions))
+return e-regions[id];
+return NULL;
+}
+
+static void
+intel_region_hash_insert(struct _mesa_HashTable *h, struct intel_region
*region)
+{
+struct hash_entry *e = _mesa_HashLookup(h, region-name);
+
+if (!e) {
+e = hash_entry_new();
+if (!e)
+return;
+_mesa_HashInsert(h, region-name, e);
+}
+
+if (region-plane_id ARRAY_SIZE(e-regions)) {
+if (!e-regions[region-plane_id])
+e-num_regions++;
+e-regions[region-plane_id] = region;
+}
+}
+
+static void
+intel_region_hash_remove(struct _mesa_HashTable *h, struct intel_region
*region)
+{
+struct hash_entry * const e = _mesa_HashLookup(h, region-name);
+
+if (e region-plane_id ARRAY_SIZE(e-regions)) {
+e-regions[region-plane_id] = NULL;
+e-num_regions--;
+}
+
+if (e-num_regions == 0) {
+_mesa_HashRemove(h, region-name);
+hash_entry_destroy(e);
+}
+}
/* XXX: Thread safety?
*/
@@ -169,6 +257,7 @@ intel_region_alloc_internal(struct intel_screen *screen,
if (region == NULL)
return region;
+ region-plane_id = 0;
region-cpp = attrs-cpp;
region-width = attrs-width;
region-height = attrs-height;
@@ -223,8 +312,7 @@ intel_region_flink(struct intel_region *region, uint32_t
*name)
if (drm_intel_bo_flink(region-bo, region-name))
return false;
- _mesa_HashInsert(region-screen-named_regions,
- region-name, region);
+ intel_region_hash_insert(region-screen-named_regions, region);
}
*name = region-name;
@@ -252,7 +340,7 @@ intel_region_alloc_for_handle2(struct intel_screen *screen,
int ret;
uint32_t bit_6_swizzle, tiling;
- region = _mesa_HashLookup(screen-named_regions, handle);
+ region = intel_region_hash_lookup(screen-named_regions, handle, 0);
if (region != NULL) {
dummy = NULL;
if (!intel_region_validate_attributes(region, attrs)) {
@@ -283,7 +371,7 @@ intel_region_alloc_for_handle2(struct intel_screen *screen,
}
region-name = handle;
- _mesa_HashInsert(screen-named_regions, handle, region);
+ intel_region_hash_insert(screen-named_regions, region);
return region;
}
@@ -325,7 +413,7 @@ intel_region_release(struct intel_region **region_handle)
drm_intel_bo_unreference(region-bo);
if (region-name 0)
-_mesa_HashRemove(region-screen-named_regions, region-name);
+intel_region_hash_remove(region-screen-named_regions, region);
free(region);
}
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h
b/src/mesa/drivers/dri/intel/intel_regions.h
index 00cdab9..acfecd6 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -56,6 +56,7 @@ struct intel_region
{
drm_intel_bo *bo; /** buffer manager's buffer */
GLuint refcount; /** Reference count for region */
+ GLuint plane_id; /** Plane id out of 3 (range: 0..2) */
GLuint cpp; /** bytes per pixel */
GLuint width;/** in pixels */
[Mesa-dev] [PATCH 3/7] intel: implement createImageFromName2().
Add basic implementation for createImageFromName2() as the default
entry-point. i.e. wrap the older createImageFromName() into the new
function.
---
src/mesa/drivers/dri/intel/intel_screen.c | 38 ++--
1 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 7f9d037..d0bf4f5 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -176,11 +176,13 @@ static const struct __DRI2flushExtensionRec
intelFlushExtension = {
};
static __DRIimage *
-intel_create_image_from_name(__DRIscreen *screen,
-int width, int height, int format,
-int name, int pitch, void *loaderPrivate)
+intel_create_image_from_name2(__DRIscreen *screen,
+ int name, unsigned int offset,
+ const __DRIimageAttrs *attrs,
+ void *loaderPrivate)
{
struct intel_screen *intelScreen = screen-driverPrivate;
+struct intel_region_attributes region_attrs;
__DRIimage *image;
int cpp;
@@ -188,7 +190,7 @@ intel_create_image_from_name(__DRIscreen *screen,
if (image == NULL)
return NULL;
-switch (format) {
+switch (attrs-format) {
case __DRI_IMAGE_FORMAT_RGB565:
image-format = MESA_FORMAT_RGB565;
image-internal_format = GL_RGB;
@@ -217,9 +219,12 @@ intel_create_image_from_name(__DRIscreen *screen,
image-data = loaderPrivate;
cpp = _mesa_get_format_bytes(image-format);
-image-region = intel_region_alloc_for_handle(intelScreen,
- cpp, width, height,
- pitch, name, image);
+region_attrs.cpp = cpp;
+region_attrs.width = attrs-width;
+region_attrs.height= attrs-height;
+region_attrs.pitch = attrs-pitch;
+image-region = intel_region_alloc_for_handle2(intelScreen, name, image,
+ region_attrs);
if (image-region == NULL) {
FREE(image);
return NULL;
@@ -229,6 +234,22 @@ intel_create_image_from_name(__DRIscreen *screen,
}
static __DRIimage *
+intel_create_image_from_name(__DRIscreen *screen,
+int width, int height, int format,
+int name, int pitch, void *loaderPrivate)
+{
+__DRIimageAttrs attrs;
+
+attrs.plane_id = 0;
+attrs.format= format;
+attrs.width = width;
+attrs.height= height;
+attrs.pitch = pitch;
+attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
+return intel_create_image_from_name2(screen, name, 0, attrs,
loaderPrivate);
+}
+
+static __DRIimage *
intel_create_image_from_renderbuffer(__DRIcontext *context,
int renderbuffer, void *loaderPrivate)
{
@@ -390,7 +411,8 @@ static struct __DRIimageExtensionRec intelImageExtension = {
intel_create_image,
intel_query_image,
intel_dup_image,
-intel_validate_usage
+intel_validate_usage,
+intel_create_image_from_name2
};
static const __DRIextension *intelScreenExtensions[] = {
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/7] intel: image: add support for more formats.
Add mappings for: - DRI_IMAGE_FORMAT_R8 - DRI_IMAGE_FORMAT_RG88 - DRI_IMAGE_FORMAT_L8 - DRI_IMAGE_FIRLAT_LA88 --- src/mesa/drivers/dri/intel/intel_screen.c | 20 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index d0bf4f5..2453d49 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -211,6 +211,26 @@ intel_create_image_from_name2(__DRIscreen *screen, image-internal_format = GL_RGBA; image-data_type = GL_UNSIGNED_BYTE; break; +case __DRI_IMAGE_FORMAT_R8: + image-format = MESA_FORMAT_R8; + image-internal_format = GL_RED; + image-data_type = GL_UNSIGNED_BYTE; + break; +case __DRI_IMAGE_FORMAT_RG88: + image-format = MESA_FORMAT_GR88; + image-internal_format = GL_RG; + image-data_type = GL_UNSIGNED_BYTE; + break; +case __DRI_IMAGE_FORMAT_L8: + image-format = MESA_FORMAT_L8; + image-internal_format = GL_LUMINANCE; + image-data_type = GL_UNSIGNED_BYTE; + break; +case __DRI_IMAGE_FORMAT_LA88: + image-format = MESA_FORMAT_AL88; + image-internal_format = GL_LUMINANCE_ALPHA; + image-data_type = GL_UNSIGNED_BYTE; + break; default: free(image); return NULL; -- 1.7.5.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/7] intel: image: add support for interlaced structure.
---
src/mesa/drivers/dri/i965/brw_defines.h |2 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 -
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 15 -
src/mesa/drivers/dri/intel/intel_regions.c|5
src/mesa/drivers/dri/intel/intel_regions.h|4 +++
src/mesa/drivers/dri/intel/intel_screen.c |3 ++
6 files changed, 48 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 01bad5c..0e927ef 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -259,6 +259,8 @@
#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
#define BRW_SURFACE_CUBEFACE_ENABLES 0x3f
+#define BRW_SURFACE_VERT_LINE_STRIDE_SHIFT 12
+#define BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT 11
#define BRW_SURFACE_BLEND_ENABLED (1 13)
#define BRW_SURFACE_WRITEDISABLE_B_SHIFT 14
#define BRW_SURFACE_WRITEDISABLE_G_SHIFT 15
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 69af0ee..0a6de2b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -642,15 +642,35 @@ brw_update_texture_surface( struct gl_context *ctx,
GLuint unit )
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
uint32_t *surf;
- int width, height, depth;
+ int width, height, depth, vert_line_stride_ofs, vert_line_stride;
intel_miptree_get_dimensions_for_image(firstImage, width, height, depth);
+ /* Interlaced surface
+* XXX: texture addrss control mode must be set to TEXCOORDMODE_CLAMP
+* XXX: mip mode filter must be set to MIPFILTER_NONE
+*/
+ switch (mt-region-structure) {
+ case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+ vert_line_stride_ofs = 1;
+ /* fall-through */
+ case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+ vert_line_stride = 1;
+ height /= 2;
+ break;
+ default:
+ vert_line_stride = 0;
+ vert_line_stride_ofs = 0;
+ break;
+ }
+
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, brw-wm.surf_offset[surf_index]);
surf[0] = (translate_tex_target(tObj-Target) BRW_SURFACE_TYPE_SHIFT |
BRW_SURFACE_MIPMAPLAYOUT_BELOW BRW_SURFACE_MIPLAYOUT_SHIFT |
+ vert_line_stride BRW_SURFACE_VERT_LINE_STRIDE_SHIFT |
+ vert_line_stride_ofs BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT |
BRW_SURFACE_CUBEFACE_ENABLES |
(translate_tex_format(mt-format,
firstImage-InternalFormat,
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index cbccd2b..c567fb0 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -157,9 +157,20 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint
unit)
gen7_set_surface_tiling(surf, intelObj-mt-region-tiling);
+ /* Interlaced surface
+* XXX: mip mode filter must be set to MIPFILTER_NONE
+*/
+ switch (mt-region-structure) {
+ case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+ surf-ss0.vert_line_stride_ofs = 1;
+ /* fall-through */
+ case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+ surf-ss0.vert_line_stride = 1;
+ height /= 2;
+ break;
+ }
+
/* ss0 remaining fields:
-* - vert_line_stride (exists on gen6 but we ignore it)
-* - vert_line_stride_ofs (exists on gen6 but we ignore it)
* - surface_array_spacing
* - render_cache_read_write (exists on gen6 but ignored here)
*/
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c
b/src/mesa/drivers/dri/intel/intel_regions.c
index 70619af..218be30 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -258,6 +258,7 @@ intel_region_alloc_internal(struct intel_screen *screen,
return region;
region-plane_id = 0;
+ region-structure = attrs-structure;
region-cpp = attrs-cpp;
region-width = attrs-width;
region-height = attrs-height;
@@ -292,6 +293,7 @@ intel_region_alloc(struct intel_screen *screen,
if (buffer == NULL)
return NULL;
+ attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
attrs.cpp = cpp;
attrs.width = width;
attrs.height= height;
@@ -324,6 +326,9 @@ static inline bool
intel_region_validate_attributes(const struct intel_region *region,
const struct intel_region_attributes *attrs)
{
+/* Don't check for picture structure since interlaced contents are
+ * handled at rendering time, so regions remain compatible
+ */
return (region-cpp== attrs-cpp
[Mesa-dev] [PATCH 6/7] intel: image: handle plane id and offset attributes.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |1 +
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |1 +
src/mesa/drivers/dri/intel/intel_regions.c|7 +--
src/mesa/drivers/dri/intel/intel_regions.h|5 +
src/mesa/drivers/dri/intel/intel_screen.c |6 ++
5 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0a6de2b..cf8210a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -679,6 +679,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint
unit )
BRW_SURFACE_FORMAT_SHIFT));
surf[1] = intelObj-mt-region-bo-offset; /* reloc */
+ surf[1] += intelObj-mt-region-offset;
surf[2] = ((intelObj-_MaxLevel - tObj-BaseLevel) BRW_SURFACE_LOD_SHIFT
|
(width - 1) BRW_SURFACE_WIDTH_SHIFT |
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index c567fb0..dd01feb 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -176,6 +176,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint
unit)
*/
surf-ss1.base_addr = intelObj-mt-region-bo-offset; /* reloc */
+ surf-ss1.base_addr += intelObj-mt-region-offset;
surf-ss2.width = width - 1;
surf-ss2.height = height - 1;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c
b/src/mesa/drivers/dri/intel/intel_regions.c
index 218be30..b4607a5 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -257,7 +257,8 @@ intel_region_alloc_internal(struct intel_screen *screen,
if (region == NULL)
return region;
- region-plane_id = 0;
+ region-plane_id = attrs-plane_id;
+ region-offset = attrs-offset;
region-structure = attrs-structure;
region-cpp = attrs-cpp;
region-width = attrs-width;
@@ -293,6 +294,8 @@ intel_region_alloc(struct intel_screen *screen,
if (buffer == NULL)
return NULL;
+ attrs.plane_id = 0;
+ attrs.offset= 0;
attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
attrs.cpp = cpp;
attrs.width = width;
@@ -345,7 +348,7 @@ intel_region_alloc_for_handle2(struct intel_screen *screen,
int ret;
uint32_t bit_6_swizzle, tiling;
- region = intel_region_hash_lookup(screen-named_regions, handle, 0);
+ region = intel_region_hash_lookup(screen-named_regions, handle,
attrs-plane_id);
if (region != NULL) {
dummy = NULL;
if (!intel_region_validate_attributes(region, attrs)) {
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h
b/src/mesa/drivers/dri/intel/intel_regions.h
index 052ee0b..9dcb901 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -56,6 +56,7 @@ struct intel_buffer_object;
struct intel_region
{
drm_intel_bo *bo; /** buffer manager's buffer */
+ uint32_t offset; /** Offset (in bytes) to the base bo */
GLuint refcount; /** Reference count for region */
GLuint plane_id; /** Plane id out of 3 (range: 0..2) */
GLuint cpp; /** bytes per pixel */
@@ -77,6 +78,8 @@ struct intel_region
* See. intel_region_alloc_for_handle().
*/
struct intel_region_attributes {
+ GLuint plane_id; /** plane id */
+ uint32_t offset; /** Offset (in bytes) to the base bo */
GLuint structure;/** picture structure. See __DRI_IMAGE_STRUCTURE_xxx
*/
GLuint cpp; /** bytes per pixel */
GLuint width;/** in pixels */
@@ -108,6 +111,8 @@ intel_region_alloc_for_handle(struct intel_screen *screen,
{
struct intel_region_attributes attrs;
+attrs.plane_id = 0;
+attrs.offset= 0;
attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
attrs.cpp = cpp;
attrs.width = width;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 84e4e41..a5ac80c 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -239,6 +239,8 @@ intel_create_image_from_name2(__DRIscreen *screen,
image-data = loaderPrivate;
cpp = _mesa_get_format_bytes(image-format);
+region_attrs.plane_id = attrs-plane_id;
+region_attrs.offset= offset;
region_attrs.structure = attrs-structure;
region_attrs.cpp = cpp;
region_attrs.width = attrs-width;
@@ -387,6 +389,10 @@ intel_query_image(__DRIimage *image, int attrib, int
*value)
return image-dri_format;
case __DRI_IMAGE_ATTRIB_STRUCTURE:
return image-region-structure;
+ case __DRI_IMAGE_ATTRIB_OFFSET:
+ return image-region-offset;
+ case __DRI_IMAGE_ATTRIB_PLANE_ID:
+ return image-region-plane_id;
default:
return false;
}
--
1.7.5.4
[Mesa-dev] [PATCH 7/7] intel: image: bump supported interface version.
---
src/mesa/drivers/dri/intel/intel_screen.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index a5ac80c..14296a5 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -433,7 +433,7 @@ intel_validate_usage(__DRIimage *image, unsigned int use)
}
static struct __DRIimageExtensionRec intelImageExtension = {
-{ __DRI_IMAGE, 3 },
+{ __DRI_IMAGE, 4 },
intel_create_image_from_name,
intel_create_image_from_renderbuffer,
intel_destroy_image,
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/3] Update MESA_drm_image extension
Hi, This implements the DRI image v4 extensions to MESA_drm_image. This is useful for testing submission of individual planes. Patch 2 fixes an independent bug, that existed before those changes. In particular, there was a mismatch between what the spec says and what is effectively implemented. The code path from the Wayland extension got it right though. I have not tested on Android. Regards, Gwenole Beauchesne (3): egl_dri2: add dri2_invoke_create_image_from_name() helper. egl_dri2: fix eglCreateImageKHR() with a MESA_drm_image buffer. egl_dri2: add new EGL_MESA_drm_image attributes. docs/MESA_drm_image.spec| 13 + include/EGL/eglext.h| 10 src/egl/drivers/dri2/egl_dri2.c | 101 +++ src/egl/main/eglimage.c | 10 src/egl/main/eglimage.h |3 + 5 files changed, 117 insertions(+), 20 deletions(-) -- 1.7.5.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/3] egl_dri2: add dri2_invoke_create_image_from_name() helper.
Add helper to invoke CreateImageFromName() or CreateImageImageFromName2().
---
src/egl/drivers/dri2/egl_dri2.c | 60 ---
1 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 4a02838..e2fb9f3 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -992,6 +992,24 @@ dri2_create_image_khr_renderbuffer(_EGLDisplay *disp,
_EGLContext *ctx,
return dri2_img-base;
}
+static __DRIimage *
+dri2_invoke_create_image_from_name(struct dri2_egl_display *dpy,
+ int name, uint32_t offset,
+ const __DRIimageAttrs *attrs,
+ void *user_data)
+{
+if (dpy-image-createImageFromName2)
+return dpy-image-createImageFromName2(dpy-dri_screen,
+ name, offset, attrs, user_data);
+
+if (offset 0)
+return NULL;
+
+return dpy-image-createImageFromName(dpy-dri_screen,
+ attrs-width, attrs-height, attrs-format, name,
+ attrs-pitch, user_data);
+}
+
static _EGLImage *
dri2_create_image_drm_name(_EGLDisplay *disp, _EGLContext *ctx,
EGLint name,
@@ -1001,6 +1019,7 @@ dri2_create_image_drm_name(_EGLDisplay *disp, _EGLContext
*ctx,
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img;
+ __DRIimageAttrs imageAttrs;
(void) ctx;
@@ -1015,20 +1034,22 @@ dri2_create_image_drm_name(_EGLDisplay *disp,
_EGLContext *ctx,
return NULL;
}
- dri2_img-dri_image =
- dri2_dpy-image-createImageFromName(dri2_dpy-dri_screen,
- attrs-Width,
- attrs-Height,
- format,
- name,
- pitch,
- dri2_img);
+ imageAttrs.plane_id = 0;
+ imageAttrs.format= format;
+ imageAttrs.width = attrs-Width;
+ imageAttrs.height= attrs-Height;
+ imageAttrs.pitch = pitch;
+ imageAttrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
+ dri2_img-dri_image = dri2_invoke_create_image_from_name(
+ dri2_dpy,
+ name, 0,
+ imageAttrs, dri2_img
+ );
if (dri2_img-dri_image == NULL) {
free(dri2_img);
_eglError(EGL_BAD_ALLOC, dri2_create_image_mesa_drm);
return NULL;
}
-
return dri2_img-base;
}
@@ -1268,26 +1289,31 @@ dri2_wl_reference_buffer(void *user_data, uint32_t name,
{
_EGLDisplay *disp = user_data;
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
- __DRIimage *image;
- int dri_format;
+ __DRIimageAttrs imageAttrs;
+ int dri_format, cpp;
switch (format) {
case WL_DRM_FORMAT_ARGB:
dri_format =__DRI_IMAGE_FORMAT_ARGB;
+ cpp = 4;
break;
case WL_DRM_FORMAT_XRGB:
dri_format = __DRI_IMAGE_FORMAT_XRGB;
+ cpp = 4;
break;
default:
return NULL;
}
- image = dri2_dpy-image-createImageFromName(dri2_dpy-dri_screen,
- width, height,
- dri_format, name, stride / 4,
- NULL);
-
- return image;
+ imageAttrs.plane_id = 0;
+ imageAttrs.format= dri_format;
+ imageAttrs.width = width;
+ imageAttrs.height= height;
+ imageAttrs.pitch = stride / cpp;
+ imageAttrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
+ return dri2_invoke_create_image_from_name(dri2_dpy,
+name, 0,
+imageAttrs, NULL);
}
static void
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/3] egl_dri2: fix eglCreateImageKHR() with a MESA_drm_image buffer.
MESA_drm_image spec mentions that the EGL_DRM_BUFFER_STRIDE_MESA
attribute is expressed in bytes. However, the eglCreateImageKHR()
implementation assumes the attribute is expressed in pixels, which
is what the DRI create image API expects.
---
src/egl/drivers/dri2/egl_dri2.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index e2fb9f3..c4d4f2f 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1073,10 +1073,11 @@ dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp,
_EGLContext *ctx,
return NULL;
}
+ pitch = attrs.DRMBufferStrideMESA;
switch (attrs.DRMBufferFormatMESA) {
case EGL_DRM_BUFFER_FORMAT_ARGB32_MESA:
format = __DRI_IMAGE_FORMAT_ARGB;
- pitch = attrs.DRMBufferStrideMESA;
+ pitch /= 4;
break;
default:
_eglError(EGL_BAD_PARAMETER,
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/3] egl_dri2: add new EGL_MESA_drm_image attributes.
Add EGL_DRM_BUFFER_OFFSET_MESA to specify an offset (in bytes) relative
to the start of the DRM buffer. Likewise, add an EGL_DRM_BUFFER_PLANE_ID_MESA
attribute to specify (name) a plane identifier associated with the generated
image.
Add new image formats:
- EGL_DRM_BUFFER_FORMAT_R8_MESA: 8-bit red
- EGL_DRM_BUFFER_FORMAT_RG8_MESA: 8-bit red + green
- EGL_DRM_BUFFER_FORMAT_L8_MESA: 8-bit luminance
- EGL_DRM_BUFFER_FORMAT_LA8_MESA: 8-bit luminance + alpha
Add picture structure information:
- EGL_DRM_BUFFER_STRUCTURE_TOP_FIELD: interlaced picture, top field
- EGL_DRM_BUFFER_STRUCTURE_BOTTOM_FIELD: interlaced picture, bottom field
- EGL_DRM_BUFFER_STRUCTURE_FRAME: whole picture
---
docs/MESA_drm_image.spec| 13 +++
include/EGL/eglext.h| 10
src/egl/drivers/dri2/egl_dri2.c | 44 ++
src/egl/main/eglimage.c | 10
src/egl/main/eglimage.h |3 ++
5 files changed, 75 insertions(+), 5 deletions(-)
diff --git a/docs/MESA_drm_image.spec b/docs/MESA_drm_image.spec
index 1150a4c..5b4c609 100644
--- a/docs/MESA_drm_image.spec
+++ b/docs/MESA_drm_image.spec
@@ -61,6 +61,10 @@ New Tokens
Accepted as values for the EGL_IMAGE_FORMAT_MESA attribute:
EGL_DRM_BUFFER_FORMAT_ARGB32_MESA 0x31D2
+EGL_DRM_BUFFER_FORMAT_R8_MESA 0x8229
+EGL_DRM_BUFFER_FORMAT_RG8_MESA 0x822B
+EGL_DRM_BUFFER_FORMAT_L8_MESA 0x1909
+EGL_DRM_BUFFER_FORMAT_LA8_MESA 0x190A
Bits accepted in EGL_DRM_BUFFER_USE_MESA:
@@ -76,6 +80,15 @@ New Tokens
EGL_DRM_BUFFER_STRIDE_MESA 0x31D4
EGL_DRM_BUFFER_FORMAT_MESA 0x31D0
+EGL_DRM_BUFFER_PLANE_ID_MESA 0x31D5
+EGL_DRM_BUFFER_OFFSET_MESA 0x31D6
+EGL_DRM_BUFFER_STRUCTURE_MESA 0x31D7
+
+Accepted as values for the EGL_DRM_BUFFER_STRUCTURE_MESA attribute:
+
+EGL_DRM_BUFFER_STRUCTURE_TOP_FIELD 0x0001
+EGL_DRM_BUFFER_STRUCTURE_BOTTOM_FIELD 0x0002
+EGL_DRM_BUFFER_STRUCTURE_FRAME 0x0003
Additions to the EGL 1.4 Specification:
diff --git a/include/EGL/eglext.h b/include/EGL/eglext.h
index a7ea2ea..b5c2b40 100644
--- a/include/EGL/eglext.h
+++ b/include/EGL/eglext.h
@@ -274,6 +274,16 @@ typedef EGLSurface (EGLAPIENTRYP
PFNEGLCREATEPIXMAPSURFACEHIPROC) (EGLDisplay dp
#define EGL_DRM_BUFFER_FORMAT_ARGB32_MESA 0x31D2 /*
EGL_IMAGE_FORMAT_MESA attribute value */
#define EGL_DRM_BUFFER_MESA0x31D3 /*
eglCreateImageKHR target */
#define EGL_DRM_BUFFER_STRIDE_MESA 0x31D4
+#define EGL_DRM_BUFFER_PLANE_ID_MESA 0x31D5
+#define EGL_DRM_BUFFER_OFFSET_MESA 0x31D6
+#define EGL_DRM_BUFFER_STRUCTURE_MESA 0x31D7
+#define EGL_DRM_BUFFER_FORMAT_R8_MESA 0x8229 /*
EGL_IMAGE_FORMAT_MESA attribute value (8-bit red) */
+#define EGL_DRM_BUFFER_FORMAT_RG8_MESA 0x822B /*
EGL_IMAGE_FORMAT_MESA attribute value (8-bit red + green) */
+#define EGL_DRM_BUFFER_FORMAT_L8_MESA 0x1909 /*
EGL_IMAGE_FORMAT_MESA attribute value (8-bit luminance) */
+#define EGL_DRM_BUFFER_FORMAT_LA8_MESA 0x190A /*
EGL_IMAGE_FORMAT_MESA attribute value (8-bit luminance + alpha) */
+#define EGL_DRM_BUFFER_STRUCTURE_TOP_FIELD 0x0001 /*
EGL_DRM_BUFFER_STRUCTURE_MESA attribute value (interlaced, top field) */
+#define EGL_DRM_BUFFER_STRUCTURE_BOTTOM_FIELD 0x0002 /*
EGL_DRM_BUFFER_STRUCTURE_MESA attribute value (interlaced, bottom field) */
+#define EGL_DRM_BUFFER_STRUCTURE_FRAME 0x0003 /*
EGL_DRM_BUFFER_STRUCTURE_MESA attribute value (whole picture) */
#define EGL_DRM_BUFFER_USE_SCANOUT_MESA0x0001 /*
EGL_DRM_BUFFER_USE_MESA bits */
#define EGL_DRM_BUFFER_USE_SHARE_MESA 0x0002 /*
EGL_DRM_BUFFER_USE_MESA bits */
#ifdef EGL_EGLEXT_PROTOTYPES
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index c4d4f2f..016f539 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1010,6 +1010,25 @@ dri2_invoke_create_image_from_name(struct
dri2_egl_display *dpy,
attrs-pitch, user_data);
}
+static unsigned int
+dri2_image_get_picture_structure(uint32_t egl_picture_structure)
+{
+unsigned int picture_structure;
+
+switch (egl_picture_structure) {
+case EGL_DRM_BUFFER_STRUCTURE_TOP_FIELD:
+picture_structure = __DRI_IMAGE_STRUCTURE_TOP_FIELD;
+break;
+case EGL_DRM_BUFFER_STRUCTURE_BOTTOM_FIELD:
+picture_structure = __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD;
+break;
+default:
+picture_structure = __DRI_IMAGE_STRUCTURE_FRAME;
+break;
+}
+return picture_structure;
+}
+
static _EGLImage *
dri2_create_image_drm_name(_EGLDisplay *disp, _EGLContext *ctx,
EGLint name,
@@ -1034,15 +1053,15
Re: [Mesa-dev] [PATCH 2/2] i965/fs: Fix FB writes that tried to use the non-existent m16 register.
On Tue, 24 Apr 2012 00:34:00 -0700, Kenneth Graunke kenn...@whitecape.org wrote: A little analysis shows that the worst-case value for nr is 16: - base_mrf = 2 ... 2 - header present (say gen == 5) ... 4 - SIMD16 mode: += 4 * reg_width ... 12 - source_depth_to_render_target ... 14 - dest_depth_reg ... 16 This resulted in us setting base_mrf to 2 and mlen to 14. In other words, we'd try to use m2..m16. But m16 doesn't exist pre-Gen6. Also, nr is where you'd put the next arg if there was one, right? so nr of 16 should be fine, since you've only loaded up to m15? pgpriy4WiKcLc.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/5] glsl: Fix regression in function out-parameter lvalue detection.
When doing the var-assigned change in
f2475ca424f7e001be50f64dafa5700f6603d684, I overzealously indented the
second block of code into the if (var) test. Revert these blocks to
the way they were before, just taking advantage of var to avoid
re-calling variable_referenced().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49066
---
src/glsl/ast_function.cpp | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 8bf0ba2..58cf685 100644
--- a/src/glsl/ast_function.cpp
+++ b/src/glsl/ast_function.cpp
@@ -153,21 +153,21 @@ verify_parameter_modes(_mesa_glsl_parse_state *state,
}
ir_variable *var = actual-variable_referenced();
-if (var) {
- if (var-read_only) {
- _mesa_glsl_error(loc, state,
- function parameter '%s %s' references the
- read-only variable '%s',
- mode, formal-name,
- actual-variable_referenced()-name);
- return false;
- } else if (!actual-is_lvalue()) {
- _mesa_glsl_error(loc, state,
- function parameter '%s %s' is not an lvalue,
- mode, formal-name);
- return false;
- }
+if (var)
var-assigned = true;
+
+if (var var-read_only) {
+ _mesa_glsl_error(loc, state,
+function parameter '%s %s' references the
+read-only variable '%s',
+mode, formal-name,
+actual-variable_referenced()-name);
+ return false;
+} else if (!actual-is_lvalue()) {
+ _mesa_glsl_error(loc, state,
+function parameter '%s %s' is not an lvalue,
+mode, formal-name);
+ return false;
}
}
--
1.7.10
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/5] mesa: Prevent buffer underrun when handling MESA_GL_EXTENSION_OVERRIDE.
--- src/mesa/main/extensions.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index 5f2c74a..a843a40 100644 --- a/src/mesa/main/extensions.c +++ b/src/mesa/main/extensions.c @@ -754,7 +754,7 @@ get_extension_override( struct gl_context *ctx ) /* Remove trailing space. */ len = strlen(extra_exts); - if (extra_exts[len - 1] == ' ') + if (len 0 extra_exts[len - 1] == ' ') extra_exts[len - 1] = '\0'; return extra_exts; -- 1.7.10 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/5] i965: Add a comment about the state flag for sRGBEnabled.
I thought this might be _NEW_COLOR, but it isn't.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |7 +--
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |7 +--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 69af0ee..67d908c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -959,8 +959,11 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
switch (rb_format) {
case MESA_FORMAT_SARGB8:
- /* without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB
-surfaces to the blend/update as sRGB */
+ /* _NEW_BUFFERS
+ *
+ * Without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB surfaces to the
+ * blend/update as sRGB.
+ */
if (ctx-Color.sRGBEnabled)
format = brw_format_for_mesa_format(rb_format);
else
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index cbccd2b..8f62c04 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -289,8 +289,11 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
switch (rb_format) {
case MESA_FORMAT_SARGB8:
- /* without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB
-surfaces to the blend/update as sRGB */
+ /* _NEW_BUFFERS
+ *
+ * Without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB surfaces to the
+ * blend/update as sRGB.
+ */
if (ctx-Color.sRGBEnabled)
surf-ss0.surface_format = brw_format_for_mesa_format(rb_format);
else
--
1.7.10
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/5] i965/fs: Fix regression in comparison handling from ANDs change.
I had fixed up the logic ops for delayed ANDing, but not equality
comparisons on bools. Fixes new piglit fs-bool-less-compare-true.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48629
---
src/mesa/drivers/dri/i965/brw_fs.h |1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 17 +
2 files changed, 18 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 6d9a042..6b45c4e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -582,6 +582,7 @@ public:
void emit_assignment_writes(fs_reg l, fs_reg r,
const glsl_type *type, bool predicated);
void resolve_ud_negate(fs_reg *reg);
+ void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
struct brw_reg interp_reg(int location, int channel);
int setup_uniform_values(int loc, const glsl_type *type);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 6e8afbe..b086f73 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -395,6 +395,9 @@ fs_visitor::visit(ir_expression *ir)
resolve_ud_negate(op[0]);
resolve_ud_negate(op[1]);
+ resolve_bool_comparison(ir-operands[0], op[0]);
+ resolve_bool_comparison(ir-operands[1], op[1]);
+
inst = emit(BRW_OPCODE_CMP, temp, op[0], op[1]);
inst-conditional_mod = brw_conditional_for_comparison(ir-operation);
break;
@@ -1542,6 +1545,9 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
case ir_binop_all_equal:
case ir_binop_nequal:
case ir_binop_any_nequal:
+resolve_bool_comparison(expr-operands[0], op[0]);
+resolve_bool_comparison(expr-operands[1], op[1]);
+
inst = emit(BRW_OPCODE_CMP, reg_null_cmp, op[0], op[1]);
inst-conditional_mod =
brw_conditional_for_comparison(expr-operation);
@@ -2126,3 +2132,14 @@ fs_visitor::resolve_ud_negate(fs_reg *reg)
emit(BRW_OPCODE_MOV, temp, *reg);
*reg = temp;
}
+
+void
+fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg)
+{
+ if (rvalue-type != glsl_type::bool_type)
+ return;
+
+ fs_reg temp = fs_reg(this, glsl_type::bool_type);
+ emit(BRW_OPCODE_AND, temp, *reg, fs_reg(1));
+ *reg = temp;
+}
--
1.7.10
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/5] glsl: Don't consider unused FS out variables as being statically assigned.
I only considered var-assigned for FragColor and FragData, but
ignored when it was false for out vars. Fixes piglit
write-gl_FragColor-and-not-user-output.frag
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49068
---
src/glsl/ast_to_hir.cpp |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index e24914b..86bb874 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4039,13 +4039,13 @@ detect_conflicting_assignments(struct
_mesa_glsl_parse_state *state,
foreach_list(node, instructions) {
ir_variable *var = ((ir_instruction *)node)-as_variable();
- if (!var)
+ if (!var || !var-assigned)
continue;
if (strcmp(var-name, gl_FragColor) == 0)
-gl_FragColor_assigned = var-assigned;
+gl_FragColor_assigned = true;
else if (strcmp(var-name, gl_FragData) == 0)
-gl_FragData_assigned = var-assigned;
+gl_FragData_assigned = true;
else if (strncmp(var-name, gl_, 3) != 0) {
if (state-target == fragment_shader
(var-mode == ir_var_out || var-mode == ir_var_inout)) {
--
1.7.10
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/2] i965: Fix mipmap offsets for HiZ and separate stencil buffers.
When rendering to a miplevel other than 0 within a color, depth,
stencil, or HiZ buffer, we need to tell the GPU to render to an offset
within the buffer, so that the data is written into the correct
miplevel. We do this using a coarse offset (in pages), and a fine
adjustment (the so-called tile_x and tile_y values, which are
measured in pixels).
We have always computed the coarse offset and fine adjustment using
intel_renderbuffer_tile_offsets() function. This worked fine for
color and combined depth/stencil buffers, but failed to work properly
when HiZ and separate stencil were in use. It failed to work because
there is only one set of fine adjustment controls shared by the HiZ,
depth, and stencil buffers, so we need to choose tile_x and tile_y
values that are compatible with the tiling of all three buffers, and
then compute separate coarse offsets for each buffer.
This patch fixes the HiZ and separate stencil case by replacing the
call to intel_renderbuffer_tile_offsets() with calls to two functions:
intel_region_get_tile_masks(), which determines how much of the
adjustment can be performed using offsets and how much can be
performed using tile_x and tile_y, and
intel_region_get_aligned_offset(), which computes the coarse offset.
intel_region_get_tile_offsets() is still used for color renderbuffers,
so to avoid code duplication, I've re-worked it to use
intel_region_get_tile_masks() and intel_region_get_aligned_offset().
On i965 Gen6, fixes piglit tests
texturing/depthstencil-render-miplevels 1024 X where X is one of
(depth, depth_and_stencil, depth_stencil_single_binding, depth_x,
depth_x_and_stencil, stencil, stencil_and_depth, stencil_and_depth_x).
On i965 Gen7, the variants of
texturing/depthstencil-render-miplevels that contain a stencil
buffer still fail, due to another problem: Gen7 seems to ignore the 3
LSB's of the tile_y adjustment (and possibly also tile_x).
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 96 --
src/mesa/drivers/dri/i965/gen6_hiz.c| 54 +++
src/mesa/drivers/dri/i965/gen7_hiz.c| 54 +++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 79 --
src/mesa/drivers/dri/intel/intel_fbo.c | 27 ++-
src/mesa/drivers/dri/intel/intel_fbo.h | 28
src/mesa/drivers/dri/intel/intel_regions.c | 52 ++
src/mesa/drivers/dri/intel/intel_regions.h |8 ++
8 files changed, 338 insertions(+), 60 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 62bcc93..6d39ca2 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -264,10 +264,45 @@ static void emit_depthbuffer(struct brw_context *brw)
unsigned int len;
bool separate_stencil = false;
+ /* Amount by which drawing should be offset in order to draw to the
+* appropriate miplevel/zoffset/cubeface. We will extract these values
+* from depth_irb or stencil_irb once we determine which is present.
+*/
+ uint32_t draw_x = 0, draw_y = 0;
+
+ /* Masks used to determine how much of the draw_x and draw_y offsets should
+* be performed using the fine adjustment of depth coordinate offset X/Y
+* (dw5 of 3DSTATE_DEPTH_BUFFER). Any remaining coarse adjustment will be
+* performed by changing the base addresses of the buffers.
+*
+* Since the HiZ, depth, and stencil buffers all use the same depth
+* coordinate offset X/Y values, we need to make sure that the coarse
+* adjustment will be possible to apply to all three buffers. Since coarse
+* adjustment can only be applied in multiples of the tile size, we will OR
+* together the tile masks of all the buffers to determine which offsets to
+* perform as fine adjustments.
+*/
+ uint32_t tile_mask_x = 0, tile_mask_y = 0;
+
+ if (depth_irb) {
+ intel_region_get_tile_masks(depth_irb-mt-region,
+ tile_mask_x, tile_mask_y);
+ }
+
if (depth_irb
depth_irb-mt
depth_irb-mt-hiz_mt) {
hiz_region = depth_irb-mt-hiz_mt-region;
+
+ uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
+ intel_region_get_tile_masks(hiz_region,
+ hiz_tile_mask_x, hiz_tile_mask_y);
+
+ /* Each HiZ row represents 2 rows of pixels */
+ hiz_tile_mask_y = hiz_tile_mask_y 1 | 1;
+
+ tile_mask_x |= hiz_tile_mask_x;
+ tile_mask_y |= hiz_tile_mask_y;
}
/* 3DSTATE_DEPTH_BUFFER, 3DSTATE_STENCIL_BUFFER are both
@@ -284,8 +319,21 @@ static void emit_depthbuffer(struct brw_context *brw)
if (stencil_mt-stencil_mt)
stencil_mt = stencil_mt-stencil_mt;
- if (stencil_mt-format == MESA_FORMAT_S8)
+ if (stencil_mt-format == MESA_FORMAT_S8) {
separate_stencil = true;
+
+ /* Separate stencil buffer uses 64x64 tiles. */
+ tile_mask_x |= 63;
+
[Mesa-dev] [PATCH 2/2] fbo: Only reuse depth/stencil attachments if the parameters match.
When the user attaches a texture to one of the depth/stencil
attachment points (GL_STENCIL_ATTACHMENT or GL_DEPTH_ATTACHMENT), we
check to see if the same texture is also attached to the other
attachment point, and if so, we re-use the existing texture
attachment. This is necessary to ensure that if the user later
queries what is attached to GL_DEPTH_STENCIL_ATTACHMENT, they will not
receive an error.
If, however, the user attaches buffers to the two different attachment
points using different parameters (e.g. a different miplevel), then we
can't re-use the existing texture attachment, because it is pointing
to the wrong part of the texture. This might occur as a transitory
condition if, for example, if the user attached miplevel zero of a
texture to GL_STENCIL_ATTACHMENT and GL_DEPTH_ATTACHMENT, rendered to
it, and then later attempted to attach miplevel one of the same
texture to GL_STENCIL_ATTACHMENT and GL_DEPTH_ATTACHMENT.
This patch causes Mesa to check that GL_STENCIL_ATTACHMENT and
GL_DEPTH_ATTACHMENT use the same attachment parameters before
attempting to share the texture attachment.
On i965 Gen6, fixes piglit tests
texturing/depthstencil-render-miplevels 1024 depth_stencil_shared
and texturing/depthstencil-render-miplevels 1024
stencil_depth_shared.
---
src/mesa/main/fbobject.c | 14 +++---
1 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 26ae108..f563694 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2023,7 +2023,11 @@ framebuffer_texture(struct gl_context *ctx, const char
*caller, GLenum target,
_glthread_LOCK_MUTEX(fb-Mutex);
if (texObj) {
if (attachment == GL_DEPTH_ATTACHMENT
- texObj == fb-Attachment[BUFFER_STENCIL].Texture) {
+ texObj == fb-Attachment[BUFFER_STENCIL].Texture
+ level == fb-Attachment[BUFFER_STENCIL].TextureLevel
+ _mesa_tex_target_to_face(textarget) ==
+ fb-Attachment[BUFFER_STENCIL].CubeMapFace
+ zoffset == fb-Attachment[BUFFER_STENCIL].Zoffset) {
/* The texture object is already attached to the stencil attachment
* point. Don't create a new renderbuffer; just reuse the stencil
* attachment's. This is required to prevent a GL error in
@@ -2032,8 +2036,12 @@ framebuffer_texture(struct gl_context *ctx, const char
*caller, GLenum target,
reuse_framebuffer_texture_attachment(fb, BUFFER_DEPTH,
BUFFER_STENCIL);
} else if (attachment == GL_STENCIL_ATTACHMENT
-texObj == fb-Attachment[BUFFER_DEPTH].Texture) {
-/* As above, but with depth and stencil juxtaposed. */
+texObj == fb-Attachment[BUFFER_DEPTH].Texture
+ level == fb-Attachment[BUFFER_DEPTH].TextureLevel
+ _mesa_tex_target_to_face(textarget) ==
+ fb-Attachment[BUFFER_DEPTH].CubeMapFace
+ zoffset == fb-Attachment[BUFFER_DEPTH].Zoffset) {
+/* As above, but with depth and stencil transposed. */
reuse_framebuffer_texture_attachment(fb, BUFFER_STENCIL,
BUFFER_DEPTH);
} else {
--
1.7.7.6
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 Pascal S pascal.sch...@gmail.com changed: What|Removed |Added CC||pascal.sch...@gmail.com --- Comment #15 from Pascal S pascal.sch...@gmail.com 2012-04-24 12:57:41 PDT --- Same behaviour as #13 here, using radeon driver on 9600 card. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 48441] gnome-control-center crashes with nouveau driver
https://bugs.freedesktop.org/show_bug.cgi?id=48441 --- Comment #16 from zebulon zebul...@hotmail.com 2012-04-24 13:01:13 PDT --- using nouveau-dri 8.0.2-1 xf86-video-nouveau 0.0.16_git20120210-1 on archlinux 32 bits DRAW_USE_LLVM=0 gnome-control-center crashes too but MALLOC_CHECK_=1 gnome-control-center works -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] i965/fs: Fix FB writes that tried to use the non-existent m16 register.
On 04/24/2012 10:12 AM, Eric Anholt wrote: On Tue, 24 Apr 2012 00:34:00 -0700, Kenneth Graunkekenn...@whitecape.org wrote: A little analysis shows that the worst-case value for nr is 16: - base_mrf = 2 ... 2 - header present (say gen == 5) ... 4 - SIMD16 mode: += 4 * reg_width ... 12 - source_depth_to_render_target ... 14 - dest_depth_reg ... 16 This resulted in us setting base_mrf to 2 and mlen to 14. In other words, we'd try to use m2..m16. But m16 doesn't exist pre-Gen6. Also, nr is where you'd put the next arg if there was one, right? so nr of 16 should be fine, since you've only loaded up to m15? Drat. You're right... m2 m3 m4 m5 m6 m7 m8 m9 m10 m11 m12 m13 m14 m15 header rr gg bb aaa o-Depth dstDepth That does fit. My assertions in the previous patch are off by one. Back to the drawing board... ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965/fs: Fix FB writes that tried to use the non-existent m16 register.
A little analysis shows that the worst-case value for nr is 17:
- base_mrf = 2 ... 2
- header present (say gen == 5) ... 4
- aa_dest_stencil_reg (stencil test) ... 5
- SIMD16 mode: += 4 * reg_width ... 13
- source_depth_to_render_target ... 15
- dest_depth_reg ... 17
This resulted in us setting base_mrf to 2 and mlen to 15. In other
words, we'd try to use m2..m16. But m16 doesn't exist pre-Gen6. Also,
the instruction scheduler data structures use arrays of size 16, so this
would cause us to access them out of bounds.
While the debugger system routine may need m0 and m1, we don't use it
today, so the simplest solution is just to move base_mrf back to 1.
That way, our worst case message fits in m1..m15, which is legal.
An alternative would be to fail on SIMD16 in this case, but that seems
a bit unfortunate if there's no real need to reserve m0 and m1.
Fixes new piglit test shaders/depth-test-and-write on Ironlake.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48218
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
Turns out the patch was correct, I just can't count :p
With stencil testing enabled, we get an extra nr++ that I missed in my
initial analysis. So the maximum message length is actually 15, not 14.
2 + 15 = 17 == we try to use m2..m16 == BOOM
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 8e98e1b..27ac26a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2009,7 +2009,10 @@ fs_visitor::emit_fb_writes()
{
this-current_annotation = FB write header;
bool header_present = true;
- int base_mrf = 2;
+ /* We can potentially have a message length of up to 15, so we have to set
+* base_mrf to either 0 or 1 in order to fit in m0..m15.
+*/
+ int base_mrf = 1;
int nr = base_mrf;
int reg_width = c-dispatch_width / 8;
--
1.7.9.5
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glsl parser: Select typelist as early as possible.
On Tue, Apr 24, 2012 at 11:48:14AM +0100, Ian Romanick wrote: On 04/20/2012 08:20 AM, Olivier Galibert wrote: Guys, it's a bugfix, it's five lines changed, and it's falling through the cracks... Can someone have a look? From my reply on 4/13: Do you have a specific test case in mind that fails without this patch but passes with? For some reason I never got your answer. And now that I try to build a test case, I can't. So I must have had something else wrong, I guess. Let's put it on ice for now, I'll see later if I can reproduce it. OG. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/9] gallium: add PIPE_CAP_USER_INDEX_BUFFERS and PIPE_CAP_USER_CONSTANT_BUFFERS
--- src/gallium/docs/source/screen.rst |6 ++ src/gallium/drivers/i915/i915_screen.c |2 ++ src/gallium/drivers/llvmpipe/lp_screen.c |2 ++ src/gallium/drivers/nv30/nv30_screen.c |2 ++ src/gallium/drivers/nv50/nv50_screen.c |2 ++ src/gallium/drivers/nvc0/nvc0_screen.c |2 ++ src/gallium/drivers/r300/r300_screen.c |2 ++ src/gallium/drivers/r600/r600_pipe.c |2 ++ src/gallium/drivers/radeonsi/radeonsi_pipe.c |2 ++ src/gallium/drivers/softpipe/sp_screen.c |2 ++ src/gallium/drivers/svga/svga_screen.c |2 ++ src/gallium/include/pipe/p_defines.h |2 ++ 12 files changed, 28 insertions(+), 0 deletions(-) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 05f7e8f..b73c4d2 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -110,6 +110,12 @@ The integer capabilities: * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw limitation. If true, pipe_vertex_element::src_offset must always be aligned to 4. If false, there are no restrictions on src_offset. +* ``PIPE_CAP_USER_INDEX_BUFFERS``: Whether user index buffers are supported. + If not, the state tracker must upload all indices which are not in hw + resources. +* ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user constant buffers are + supported. If not, the state tracker must upload constants which are not in hw + resources. diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 1546ee8..1b3c4be 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -181,6 +181,8 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap) case PIPE_CAP_TGSI_INSTANCEID: case PIPE_CAP_VERTEX_COLOR_CLAMPED: case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; /* Unsupported features (boolean caps). */ diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index 3e0808d..1a3e2bd 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -160,6 +160,8 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: return 0; case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; default: return 0; diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 158fef5..74d425a 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -79,6 +79,8 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; /* nv4x capabilities */ case PIPE_CAP_BLEND_EQUATION_SEPARATE: diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index b348919..ad40cb4 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -151,6 +151,8 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: return 0; /* state trackers will know better */ case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 457d56e..7e6c1d4 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -141,6 +141,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: return 0; /* state trackers will know better */ case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 0803a08..ff9d395 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -106,6 +106,8 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case
[Mesa-dev] [PATCH 2/9] st/mesa: only set index buffer when drawing is indexed
and restructure the code a bit
---
src/mesa/state_tracker/st_draw.c | 46 +
1 files changed, 21 insertions(+), 25 deletions(-)
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index edab76b..c24ae75 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -629,34 +629,31 @@ setup_non_interleaved_attribs(struct gl_context *ctx,
static void
-setup_index_buffer(struct gl_context *ctx,
+setup_index_buffer(struct st_context *st,
const struct _mesa_index_buffer *ib,
struct pipe_index_buffer *ibuffer)
{
- struct st_context *st = st_context(ctx);
struct pipe_context *pipe = st-pipe;
+ struct gl_buffer_object *bufobj = ib-obj;
- memset(ibuffer, 0, sizeof(*ibuffer));
- if (ib) {
- struct gl_buffer_object *bufobj = ib-obj;
-
- ibuffer-index_size = vbo_sizeof_ib_type(ib-type);
+ ibuffer-index_size = vbo_sizeof_ib_type(ib-type);
- /* get/create the index buffer object */
- if (_mesa_is_bufferobj(bufobj)) {
- /* elements/indexes are in a real VBO */
- struct st_buffer_object *stobj = st_buffer_object(bufobj);
- pipe_resource_reference(ibuffer-buffer, stobj-buffer);
- ibuffer-offset = pointer_to_offset(ib-ptr);
- }
- else {
- /* element/indicies are in user space memory */
- ibuffer-buffer =
-pipe_user_buffer_create(pipe-screen, (void *) ib-ptr,
-ib-count * ibuffer-index_size,
-PIPE_BIND_INDEX_BUFFER);
- }
+ /* get/create the index buffer object */
+ if (_mesa_is_bufferobj(bufobj)) {
+ /* indices are in a real VBO */
+ struct st_buffer_object *stobj = st_buffer_object(bufobj);
+ pipe_resource_reference(ibuffer-buffer, stobj-buffer);
+ ibuffer-offset = pointer_to_offset(ib-ptr);
+ }
+ else {
+ /* indices are in user space memory */
+ ibuffer-buffer =
+ pipe_user_buffer_create(pipe-screen, (void *) ib-ptr,
+ ib-count * ibuffer-index_size,
+ PIPE_BIND_INDEX_BUFFER);
}
+
+ cso_set_index_buffer(st-cso_context, ibuffer);
}
@@ -977,7 +974,7 @@ st_draw_vbo(struct gl_context *ctx,
{
struct st_context *st = st_context(ctx);
struct pipe_context *pipe = st-pipe;
- struct pipe_index_buffer ibuffer;
+ struct pipe_index_buffer ibuffer = {0};
struct pipe_draw_info info;
unsigned i, num_instances = 1;
unsigned max_index_plus_base;
@@ -1075,11 +1072,10 @@ st_draw_vbo(struct gl_context *ctx,
}
}
- setup_index_buffer(ctx, ib, ibuffer);
- cso_set_index_buffer(st-cso_context, ibuffer);
-
util_draw_init_info(info);
if (ib) {
+ setup_index_buffer(st, ib, ibuffer);
+
info.indexed = TRUE;
if (min_index != ~0 max_index != ~0) {
info.min_index = min_index;
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/9] st/mesa: make user index buffers optional
---
src/mesa/state_tracker/st_context.c|4 +++-
src/mesa/state_tracker/st_context.h|1 +
src/mesa/state_tracker/st_draw.c |5 +
src/mesa/state_tracker/st_extensions.c |4
4 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/src/mesa/state_tracker/st_context.c
b/src/mesa/state_tracker/st_context.c
index 84aae81..164cc45 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -155,7 +155,9 @@ st_create_context_priv( struct gl_context *ctx, struct
pipe_context *pipe )
st-dirty.mesa = ~0;
st-dirty.st = ~0;
- st-uploader = u_upload_create(st-pipe, 65536, 4, PIPE_BIND_VERTEX_BUFFER);
+ st-uploader = u_upload_create(st-pipe, 128 * 1024, 4,
+ PIPE_BIND_VERTEX_BUFFER |
+ PIPE_BIND_INDEX_BUFFER);
st-cso_context = cso_create_context(pipe);
st_init_vbuf(st);
diff --git a/src/mesa/state_tracker/st_context.h
b/src/mesa/state_tracker/st_context.h
index 3ec98ad..ffd36e6 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -83,6 +83,7 @@ struct st_context
GLboolean sw_primitive_restart;
GLboolean clamp_frag_color_in_shader;
GLboolean clamp_vert_color_in_shader;
+ boolean upload_indices;
/* On old libGL's for linux we need to invalidate the drawables
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index c24ae75..d866fd7 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -61,6 +61,7 @@
#include util/u_format.h
#include util/u_prim.h
#include util/u_draw_quad.h
+#include util/u_upload_mgr.h
#include draw/draw_context.h
#include cso_cache/cso_context.h
@@ -645,6 +646,10 @@ setup_index_buffer(struct st_context *st,
pipe_resource_reference(ibuffer-buffer, stobj-buffer);
ibuffer-offset = pointer_to_offset(ib-ptr);
}
+ else if (st-upload_indices) {
+ u_upload_data(st-uploader, 0, ib-count * ibuffer-index_size,
+ ib-ptr, ibuffer-offset, ibuffer-buffer);
+ }
else {
/* indices are in user space memory */
ibuffer-buffer =
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 1b4bca6..b21f8a1 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -620,6 +620,10 @@ void st_init_extensions(struct st_context *st)
ctx-Extensions.ARB_sync = GL_TRUE;
}
+ if (!screen-get_param(screen, PIPE_CAP_USER_INDEX_BUFFERS)) {
+ st-upload_indices = TRUE;
+ }
+
/* Maximum sample count. */
for (i = 16; i 0; --i) {
if (screen-is_format_supported(screen, PIPE_FORMAT_B8G8R8A8_UNORM,
--
1.7.5.4
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/9] gallium: add PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
This is required for any serious constant buffer support. Constant buffer offsets on ATI and NVIDIA DX10 and DX11 GPUs must be a multiple of 256. In OpenGL, this can be queried via GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT. --- src/gallium/docs/source/screen.rst |2 ++ src/gallium/drivers/i915/i915_screen.c |3 +++ src/gallium/drivers/llvmpipe/lp_screen.c |2 ++ src/gallium/drivers/nv30/nv30_screen.c |2 ++ src/gallium/drivers/nv50/nv50_screen.c |2 ++ src/gallium/drivers/nvc0/nvc0_screen.c |2 ++ src/gallium/drivers/r300/r300_screen.c |3 +++ src/gallium/drivers/r600/r600_pipe.c |3 +++ src/gallium/drivers/radeonsi/radeonsi_pipe.c |3 +++ src/gallium/drivers/softpipe/sp_screen.c |2 ++ src/gallium/drivers/svga/svga_screen.c |2 ++ src/gallium/include/pipe/p_defines.h |3 ++- 12 files changed, 28 insertions(+), 1 deletions(-) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index b73c4d2..f6c6f3f 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -116,6 +116,8 @@ The integer capabilities: * ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user constant buffers are supported. If not, the state tracker must upload constants which are not in hw resources. +* ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required + alignment of pipe_constant_buffer::buffer_offset. diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 1b3c4be..0046860 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -208,6 +208,9 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap) case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: return 0; + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 16; + /* Features we can lie about (boolean caps). */ case PIPE_CAP_OCCLUSION_QUERY: return is-debug.lie ? 1 : 0; diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index 1a3e2bd..40037a5 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -163,6 +163,8 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 16; default: return 0; } diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 74d425a..32cbc55 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -82,6 +82,8 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 16; /* nv4x capabilities */ case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_NPOT_TEXTURES: diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index ad40cb4..20a135b 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -154,6 +154,8 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 256; case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 7e6c1d4..366e6fb 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -144,6 +144,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 256; case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index ff9d395..f84f3e5 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -110,6 +110,9 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_USER_CONSTANT_BUFFERS: return 1; +case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: +return 16; + case PIPE_CAP_GLSL_FEATURE_LEVEL: return
[Mesa-dev] [PATCH 5/9] gallium: change set_constant_buffer to be UBO-friendly
---
src/gallium/auxiliary/postprocess/pp_mlaa.c|4 +-
src/gallium/auxiliary/util/u_inlines.h | 15 ++
src/gallium/auxiliary/vl/vl_compositor.c |2 +-
src/gallium/drivers/galahad/glhd_context.c | 13 +--
src/gallium/drivers/i915/i915_state.c |3 +-
src/gallium/drivers/identity/id_context.c | 13 +--
src/gallium/drivers/llvmpipe/lp_state_fs.c |3 +-
src/gallium/drivers/noop/noop_state.c |2 +-
src/gallium/drivers/nv30/nv30_state.c |3 +-
src/gallium/drivers/nv50/nv50_state.c |3 +-
src/gallium/drivers/nvc0/nvc0_state.c |3 +-
src/gallium/drivers/r300/r300_state.c |3 +-
src/gallium/drivers/r600/evergreen_state.c | 18 +---
src/gallium/drivers/r600/r600_pipe.h | 11 +
src/gallium/drivers/r600/r600_state.c | 18 +---
src/gallium/drivers/r600/r600_state_common.c | 18
src/gallium/drivers/radeonsi/r600_state_common.c |8 +++---
src/gallium/drivers/radeonsi/radeonsi_pipe.h |2 +-
src/gallium/drivers/rbug/rbug_context.c| 13 +--
src/gallium/drivers/softpipe/sp_state_shader.c |3 +-
src/gallium/drivers/svga/svga_pipe_constants.c |3 +-
src/gallium/drivers/trace/tr_context.c | 21 +++
src/gallium/include/pipe/p_context.h |3 +-
src/gallium/include/pipe/p_state.h | 11 ++
.../state_trackers/d3d1x/gd3d11/d3d11_context.h|6 ++--
src/gallium/state_trackers/vega/renderer.c |4 +-
src/gallium/state_trackers/xa/xa_renderer.c|2 +-
src/gallium/state_trackers/xorg/xorg_renderer.c|2 +-
src/gallium/tests/graw/fs-test.c |4 +-
src/gallium/tests/graw/gs-test.c |4 +-
src/gallium/tests/graw/vs-test.c |2 +-
src/mesa/state_tracker/st_atom_constbuf.c | 16 --
32 files changed, 139 insertions(+), 97 deletions(-)
diff --git a/src/gallium/auxiliary/postprocess/pp_mlaa.c
b/src/gallium/auxiliary/postprocess/pp_mlaa.c
index 51bc02e..b61cbaa 100644
--- a/src/gallium/auxiliary/postprocess/pp_mlaa.c
+++ b/src/gallium/auxiliary/postprocess/pp_mlaa.c
@@ -99,8 +99,8 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct
pipe_resource *in,
dimensions[1] = p-framebuffer.height;
}
- p-pipe-set_constant_buffer(p-pipe, PIPE_SHADER_VERTEX, 0, constbuf);
- p-pipe-set_constant_buffer(p-pipe, PIPE_SHADER_FRAGMENT, 0, constbuf);
+ pipe_set_constant_buffer(p-pipe, PIPE_SHADER_VERTEX, 0, constbuf);
+ pipe_set_constant_buffer(p-pipe, PIPE_SHADER_FRAGMENT, 0, constbuf);
mstencil.stencil[0].enabled = 1;
mstencil.stencil[0].valuemask = mstencil.stencil[0].writemask = ~0;
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index 49b4531..651f7c2 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -437,6 +437,21 @@ pipe_transfer_destroy( struct pipe_context *context,
context-transfer_destroy(context, transfer);
}
+static INLINE void
+pipe_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
+ struct pipe_resource *buf)
+{
+ if (buf) {
+ struct pipe_constant_buffer cb;
+ cb.buffer = buf;
+ cb.buffer_offset = 0;
+ cb.buffer_size = buf-width0;
+ pipe-set_constant_buffer(pipe, shader, index, cb);
+ } else {
+ pipe-set_constant_buffer(pipe, shader, index, NULL);
+ }
+}
+
static INLINE boolean util_get_offset(
const struct pipe_rasterizer_state *templ,
diff --git a/src/gallium/auxiliary/vl/vl_compositor.c
b/src/gallium/auxiliary/vl/vl_compositor.c
index cc213b7..0cb1a9f 100644
--- a/src/gallium/auxiliary/vl/vl_compositor.c
+++ b/src/gallium/auxiliary/vl/vl_compositor.c
@@ -1015,7 +1015,7 @@ vl_compositor_render(struct vl_compositor_state *s,
c-pipe-bind_vs_state(c-pipe, c-vs);
c-pipe-set_vertex_buffers(c-pipe, 1, c-vertex_buf);
c-pipe-bind_vertex_elements_state(c-pipe, c-vertex_elems_state);
- c-pipe-set_constant_buffer(c-pipe, PIPE_SHADER_FRAGMENT, 0,
s-csc_matrix);
+ pipe_set_constant_buffer(c-pipe, PIPE_SHADER_FRAGMENT, 0, s-csc_matrix);
c-pipe-bind_rasterizer_state(c-pipe, c-rast);
draw_layers(c, s, dirty_area);
diff --git a/src/gallium/drivers/galahad/glhd_context.c
b/src/gallium/drivers/galahad/glhd_context.c
index 0bb1888..f0bbf4e 100644
--- a/src/gallium/drivers/galahad/glhd_context.c
+++ b/src/gallium/drivers/galahad/glhd_context.c
@@ -458,12 +458,11 @@ static void
galahad_set_constant_buffer(struct pipe_context *_pipe,
uint shader,
uint index,
- struct pipe_resource *_resource)
+
[Mesa-dev] [PATCH 7/9] gallium: add void *user_buffer in pipe_vertex_buffer
This reduces CPU overhead in st_draw_vbo and removes a lot of unnecessary code
in that function which was required only to comply with the gallium interface,
but wasn't any useful really.
Adapted drivers: i915, llvmpipe, r300, softpipe.
No changes required in: r600, radeonsi.
User vertex buffers have been disabled in nv30, nv50, nvc0 and svga to keep
things working.
---
src/gallium/auxiliary/draw/draw_llvm.c|5 +-
src/gallium/auxiliary/util/u_draw.c |4 +
src/gallium/auxiliary/util/u_vbuf.c | 17 ++--
src/gallium/drivers/i915/i915_state.c |4 +-
src/gallium/drivers/llvmpipe/lp_draw_arrays.c |4 +-
src/gallium/drivers/nv30/nv30_draw.c |9 +-
src/gallium/drivers/nv30/nv30_screen.c|3 +-
src/gallium/drivers/nv50/nv50_screen.c|2 +-
src/gallium/drivers/nvc0/nvc0_screen.c|2 +-
src/gallium/drivers/r300/r300_render.c|8 +-
src/gallium/drivers/softpipe/sp_draw_arrays.c |4 +-
src/gallium/drivers/svga/svga_screen.c|1 +
src/gallium/include/pipe/p_state.h|1 +
src/mesa/state_tracker/st_context.c |5 -
src/mesa/state_tracker/st_context.h | 12 --
src/mesa/state_tracker/st_draw.c | 142 +++--
src/mesa/state_tracker/st_draw_feedback.c | 32 +++---
17 files changed, 73 insertions(+), 182 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c
b/src/gallium/auxiliary/draw/draw_llvm.c
index 620d6dc..7bf9d5e 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -236,12 +236,13 @@ static LLVMTypeRef
create_jit_vertex_buffer_type(struct gallivm_state *gallivm, const char
*struct_name)
{
LLVMTargetDataRef target = gallivm-target;
- LLVMTypeRef elem_types[3];
+ LLVMTypeRef elem_types[4];
LLVMTypeRef vb_type;
elem_types[0] =
elem_types[1] = LLVMInt32TypeInContext(gallivm-context);
- elem_types[2] = LLVMPointerType(LLVMInt8TypeInContext(gallivm-context),
0); /* vs_constants */
+ elem_types[2] =
+ elem_types[3] = LLVMPointerType(LLVMInt8TypeInContext(gallivm-context),
0); /* vs_constants */
#if HAVE_LLVM = 0x0300
vb_type = LLVMStructCreateNamed(gallivm-context, struct_name);
diff --git a/src/gallium/auxiliary/util/u_draw.c
b/src/gallium/auxiliary/util/u_draw.c
index d16575b..1f3eb88 100644
--- a/src/gallium/auxiliary/util/u_draw.c
+++ b/src/gallium/auxiliary/util/u_draw.c
@@ -62,6 +62,10 @@ util_draw_max_index(
const struct util_format_description *format_desc;
unsigned format_size;
+ if (!buffer-buffer) {
+ continue;
+ }
+
assert(buffer-buffer-height0 == 1);
assert(buffer-buffer-depth0 == 1);
buffer_size = buffer-buffer-width0;
diff --git a/src/gallium/auxiliary/util/u_vbuf.c
b/src/gallium/auxiliary/util/u_vbuf.c
index 2d60c07..24258dc 100644
--- a/src/gallium/auxiliary/util/u_vbuf.c
+++ b/src/gallium/auxiliary/util/u_vbuf.c
@@ -275,8 +275,8 @@ u_vbuf_translate_buffers(struct u_vbuf *mgr, struct
translate_key *key,
unsigned offset = vb-buffer_offset + vb-stride * start_vertex;
uint8_t *map;
- if (vb-buffer-user_ptr) {
-map = vb-buffer-user_ptr + offset;
+ if (vb-user_buffer) {
+map = (uint8_t*)vb-user_buffer + offset;
} else {
unsigned size = vb-stride ? num_vertices * vb-stride
: sizeof(double)*4;
@@ -711,6 +711,7 @@ void u_vbuf_set_vertex_buffers(struct u_vbuf *mgr, unsigned
count,
struct pipe_vertex_buffer *real_vb = mgr-real_vertex_buffer[i];
pipe_resource_reference(orig_vb-buffer, vb-buffer);
+ orig_vb-user_buffer = vb-user_buffer;
real_vb-buffer_offset = orig_vb-buffer_offset = vb-buffer_offset;
real_vb-stride = orig_vb-stride = vb-stride;
@@ -719,7 +720,7 @@ void u_vbuf_set_vertex_buffers(struct u_vbuf *mgr, unsigned
count,
mgr-nonzero_stride_vb_mask |= 1 i;
}
- if (!vb-buffer) {
+ if (!vb-buffer !vb-user_buffer) {
pipe_resource_reference(real_vb-buffer, NULL);
continue;
}
@@ -731,7 +732,7 @@ void u_vbuf_set_vertex_buffers(struct u_vbuf *mgr, unsigned
count,
continue;
}
- if (!mgr-caps.user_vertex_buffers vb-buffer-user_ptr) {
+ if (!mgr-caps.user_vertex_buffers vb-user_buffer) {
mgr-user_vb_mask |= 1 i;
pipe_resource_reference(real_vb-buffer, NULL);
continue;
@@ -796,9 +797,7 @@ u_vbuf_upload_buffers(struct u_vbuf *mgr,
continue;
}
- assert(vb-buffer);
-
- if (!vb-buffer-user_ptr) {
+ if (!vb-user_buffer) {
continue;
}
@@ -835,7 +834,7 @@ u_vbuf_upload_buffers(struct u_vbuf *mgr,
for (i = 0; i nr_vbufs; i++) {
unsigned start, end = end_offset[i];
struct pipe_vertex_buffer *real_vb;
- uint8_t *ptr;
+
[Mesa-dev] [PATCH 8/9] gallium: remove pipe_context::redefine_user_buffer
---
src/gallium/auxiliary/util/u_transfer.c|8 --
src/gallium/auxiliary/util/u_transfer.h|5
src/gallium/drivers/galahad/glhd_context.c | 14 ---
src/gallium/drivers/i915/i915_state.c |1 -
src/gallium/drivers/identity/id_context.c | 14 ---
src/gallium/drivers/llvmpipe/lp_state_vertex.c |2 -
src/gallium/drivers/noop/noop_state.c |1 -
src/gallium/drivers/nv30/nv30_state.c |2 -
src/gallium/drivers/nv50/nv50_state.c |2 -
src/gallium/drivers/nvc0/nvc0_state.c |2 -
src/gallium/drivers/r300/r300_state.c |1 -
src/gallium/drivers/r600/evergreen_state.c |1 -
src/gallium/drivers/r600/r600_state.c |1 -
src/gallium/drivers/radeonsi/evergreen_state.c |1 -
src/gallium/drivers/rbug/rbug_context.c| 16
src/gallium/drivers/softpipe/sp_state_vertex.c |1 -
src/gallium/drivers/svga/svga_resource.c |1 -
src/gallium/drivers/svga/svga_resource_buffer.h|6
.../drivers/svga/svga_resource_buffer_upload.c | 18 --
src/gallium/drivers/trace/tr_context.c | 25
src/gallium/include/pipe/p_context.h |9 ---
21 files changed, 0 insertions(+), 131 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_transfer.c
b/src/gallium/auxiliary/util/u_transfer.c
index 673a984..0b2679f 100644
--- a/src/gallium/auxiliary/util/u_transfer.c
+++ b/src/gallium/auxiliary/util/u_transfer.c
@@ -125,11 +125,3 @@ void u_default_transfer_destroy(struct pipe_context *pipe,
{
FREE(transfer);
}
-
-void u_default_redefine_user_buffer(struct pipe_context *ctx,
-struct pipe_resource *resource,
-unsigned offset,
-unsigned size)
-{
- resource-width0 = MAX2(resource-width0, offset + size);
-}
diff --git a/src/gallium/auxiliary/util/u_transfer.h
b/src/gallium/auxiliary/util/u_transfer.h
index 5b5ddeb..f4fdf9a 100644
--- a/src/gallium/auxiliary/util/u_transfer.h
+++ b/src/gallium/auxiliary/util/u_transfer.h
@@ -124,9 +124,4 @@ void u_transfer_inline_write_vtbl( struct pipe_context
*rm_ctx,
unsigned stride,
unsigned layer_stride);
-void u_default_redefine_user_buffer(struct pipe_context *ctx,
-struct pipe_resource *resource,
-unsigned offset,
-unsigned size);
-
#endif
diff --git a/src/gallium/drivers/galahad/glhd_context.c
b/src/gallium/drivers/galahad/glhd_context.c
index f0bbf4e..4dae61c 100644
--- a/src/gallium/drivers/galahad/glhd_context.c
+++ b/src/gallium/drivers/galahad/glhd_context.c
@@ -948,19 +948,6 @@ galahad_context_transfer_inline_write(struct pipe_context
*_context,
}
-static void galahad_redefine_user_buffer(struct pipe_context *_context,
- struct pipe_resource *_resource,
- unsigned offset, unsigned size)
-{
- struct galahad_context *glhd_context = galahad_context(_context);
- struct galahad_resource *glhd_resource = galahad_resource(_resource);
- struct pipe_context *context = glhd_context-pipe;
- struct pipe_resource *resource = glhd_resource-resource;
-
- context-redefine_user_buffer(context, resource, offset, size);
-}
-
-
struct pipe_context *
galahad_context_create(struct pipe_screen *_screen, struct pipe_context *pipe)
{
@@ -1033,7 +1020,6 @@ galahad_context_create(struct pipe_screen *_screen,
struct pipe_context *pipe)
glhd_pipe-base.transfer_unmap = galahad_context_transfer_unmap;
glhd_pipe-base.transfer_flush_region =
galahad_context_transfer_flush_region;
glhd_pipe-base.transfer_inline_write =
galahad_context_transfer_inline_write;
- glhd_pipe-base.redefine_user_buffer = galahad_redefine_user_buffer;
glhd_pipe-pipe = pipe;
diff --git a/src/gallium/drivers/i915/i915_state.c
b/src/gallium/drivers/i915/i915_state.c
index d38d1ed..772e229 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -1095,7 +1095,6 @@ i915_init_state_functions( struct i915_context *i915 )
i915-base.set_viewport_state = i915_set_viewport_state;
i915-base.set_vertex_buffers = i915_set_vertex_buffers;
i915-base.set_index_buffer = i915_set_index_buffer;
- i915-base.redefine_user_buffer = u_default_redefine_user_buffer;
}
void
diff --git a/src/gallium/drivers/identity/id_context.c
b/src/gallium/drivers/identity/id_context.c
index 2942184..2d47296 100644
--- a/src/gallium/drivers/identity/id_context.c
+++ b/src/gallium/drivers/identity/id_context.c
@@ -835,19 +835,6 @@ identity_context_transfer_inline_write(struct pipe_context
[Mesa-dev] [PATCH 9/9] gallium: add void *user_buffer in pipe_index_buffer
Adapted drivers: i915, llvmpipe, r300, r600, radeonsi, softpipe.
User index buffers have been disabled in nv30, nv50, nvc0 and svga to keep
things working.
---
src/gallium/auxiliary/util/u_index_modify.c | 83 ++
src/gallium/auxiliary/util/u_index_modify.h | 16 +++--
src/gallium/auxiliary/util/u_vbuf.c | 15 ++--
src/gallium/drivers/i915/i915_context.c |9 ++-
src/gallium/drivers/llvmpipe/lp_draw_arrays.c|9 ++-
src/gallium/drivers/nv30/nv30_draw.c |6 +-
src/gallium/drivers/nv30/nv30_screen.c |2 +-
src/gallium/drivers/nv50/nv50_screen.c |2 +-
src/gallium/drivers/nvc0/nvc0_screen.c |2 +-
src/gallium/drivers/r300/r300_context.h |3 +-
src/gallium/drivers/r300/r300_render.c | 47 +++--
src/gallium/drivers/r300/r300_render_translate.c | 25 +++
src/gallium/drivers/r300/r300_screen_buffer.c|2 +-
src/gallium/drivers/r300/r300_screen_buffer.h|2 +-
src/gallium/drivers/r600/r600_state_common.c |6 +-
src/gallium/drivers/r600/r600_translate.c|2 +-
src/gallium/drivers/radeonsi/r600_buffer.c |4 +-
src/gallium/drivers/radeonsi/r600_state_common.c |2 +-
src/gallium/drivers/radeonsi/r600_translate.c|3 +-
src/gallium/drivers/softpipe/sp_draw_arrays.c|9 ++-
src/gallium/drivers/svga/svga_screen.c |2 +-
src/gallium/include/pipe/p_state.h |1 +
src/mesa/state_tracker/st_draw.c | 17 ++---
23 files changed, 151 insertions(+), 118 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_index_modify.c
b/src/gallium/auxiliary/util/u_index_modify.c
index d0a28b5..5e3fd46 100644
--- a/src/gallium/auxiliary/util/u_index_modify.c
+++ b/src/gallium/auxiliary/util/u_index_modify.c
@@ -27,21 +27,25 @@
/* Ubyte indices. */
void util_shorten_ubyte_elts_to_userptr(struct pipe_context *context,
- struct pipe_resource *elts,
+ struct pipe_index_buffer *ib,
int index_bias,
unsigned start,
unsigned count,
void *out)
{
-struct pipe_transfer *src_transfer;
-unsigned char *in_map;
+struct pipe_transfer *src_transfer = NULL;
+const unsigned char *in_map;
unsigned short *out_map = out;
unsigned i;
-in_map = pipe_buffer_map(context, elts,
- PIPE_TRANSFER_READ |
- PIPE_TRANSFER_UNSYNCHRONIZED,
- src_transfer);
+if (ib-user_buffer) {
+ in_map = ib-user_buffer;
+} else {
+ in_map = pipe_buffer_map(context, ib-buffer,
+PIPE_TRANSFER_READ |
+PIPE_TRANSFER_UNSYNCHRONIZED,
+src_transfer);
+}
in_map += start;
for (i = 0; i count; i++) {
@@ -50,11 +54,13 @@ void util_shorten_ubyte_elts_to_userptr(struct pipe_context
*context,
out_map++;
}
-pipe_buffer_unmap(context, src_transfer);
+if (src_transfer)
+ pipe_buffer_unmap(context, src_transfer);
}
void util_shorten_ubyte_elts(struct pipe_context *context,
-struct pipe_resource **elts,
+struct pipe_index_buffer *ib,
+struct pipe_resource **out_buf,
int index_bias,
unsigned start,
unsigned count)
@@ -70,31 +76,36 @@ void util_shorten_ubyte_elts(struct pipe_context *context,
out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE,
dst_transfer);
-util_shorten_ubyte_elts_to_userptr(context, *elts, index_bias,
+util_shorten_ubyte_elts_to_userptr(context, ib, index_bias,
start, count, out_map);
pipe_buffer_unmap(context, dst_transfer);
-*elts = new_elts;
+pipe_resource_reference(out_buf, NULL);
+*out_buf = new_elts;
}
/* Ushort indices. */
void util_rebuild_ushort_elts_to_userptr(struct pipe_context *context,
-struct pipe_resource *elts,
+struct pipe_index_buffer *ib,
int index_bias,
unsigned start, unsigned count,
void *out)
{
struct pipe_transfer *in_transfer = NULL;
-unsigned short *in_map;
+const unsigned short *in_map;
unsigned short *out_map = out;
unsigned i;
-in_map = pipe_buffer_map(context, elts,
- PIPE_TRANSFER_READ |
-
[Mesa-dev] [PATCH 1/3] vbo: move vbo_draw_method into vbo_context.h
I'll need vbo_context in that function soon.
---
src/mesa/vbo/vbo_context.h| 35 +++
src/mesa/vbo/vbo_exec.h | 36
src/mesa/vbo/vbo_exec_api.c |2 +-
src/mesa/vbo/vbo_exec_array.c |2 +-
src/mesa/vbo/vbo_save_draw.c |3 +--
5 files changed, 38 insertions(+), 40 deletions(-)
diff --git a/src/mesa/vbo/vbo_context.h b/src/mesa/vbo/vbo_context.h
index b9a8aff..a6397ba 100644
--- a/src/mesa/vbo/vbo_context.h
+++ b/src/mesa/vbo/vbo_context.h
@@ -58,6 +58,18 @@
#include vbo_save.h
+/** Used to signal when transitioning from one kind of drawing method
+ * to another.
+ */
+enum draw_method
+{
+ DRAW_NONE, /** Initial value only */
+ DRAW_BEGIN_END,
+ DRAW_DISPLAY_LIST,
+ DRAW_ARRAYS
+};
+
+
struct vbo_context {
struct gl_client_array currval[VBO_ATTRIB_MAX];
@@ -74,6 +86,8 @@ struct vbo_context {
* is responsible for initiating any fallback actions required:
*/
vbo_draw_func draw_prims;
+
+ enum draw_method last_draw_method;
};
@@ -101,4 +115,25 @@ get_program_mode( struct gl_context *ctx )
}
+/**
+ * This is called by glBegin, glDrawArrays and glDrawElements (and
+ * variations of those calls). When we transition from immediate mode
+ * drawing to array drawing we need to invalidate the array state.
+ *
+ * glBegin/End builds vertex arrays. Those arrays may look identical
+ * to glDrawArrays arrays except that the position of the elements may
+ * be different. For example, arrays of (position3v, normal3f) vs. arrays
+ * of (normal3f, position3f). So we need to make sure we notify drivers
+ * that arrays may be changing.
+ */
+static inline void
+vbo_draw_method(struct vbo_context *vbo, enum draw_method method)
+{
+ if (vbo-last_draw_method != method) {
+ struct gl_context *ctx = vbo-exec.ctx;
+ ctx-Driver.UpdateState(ctx, _NEW_ARRAY);
+ vbo-last_draw_method = method;
+ }
+}
+
#endif
diff --git a/src/mesa/vbo/vbo_exec.h b/src/mesa/vbo/vbo_exec.h
index be9f3d7..4ac7d16 100644
--- a/src/mesa/vbo/vbo_exec.h
+++ b/src/mesa/vbo/vbo_exec.h
@@ -78,26 +78,12 @@ struct vbo_exec_copied_vtx {
};
-/** Used to signal when transitioning from one kind of drawing method
- * to another.
- */
-enum draw_method
-{
- DRAW_NONE, /** Initial value only */
- DRAW_BEGIN_END,
- DRAW_DISPLAY_LIST,
- DRAW_ARRAYS
-};
-
-
struct vbo_exec_context
{
struct gl_context *ctx;
GLvertexformat vtxfmt;
GLvertexformat vtxfmt_noop;
- enum draw_method last_draw_method;
-
struct {
struct gl_buffer_object *bufferobj;
@@ -174,28 +160,6 @@ void vbo_exec_vtx_init( struct vbo_exec_context *exec );
void vbo_exec_vtx_destroy( struct vbo_exec_context *exec );
-/**
- * This is called by glBegin, glDrawArrays and glDrawElements (and
- * variations of those calls). When we transition from immediate mode
- * drawing to array drawing we need to invalidate the array state.
- *
- * glBegin/End builds vertex arrays. Those arrays may look identical
- * to glDrawArrays arrays except that the position of the elements may
- * be different. For example, arrays of (position3v, normal3f) vs. arrays
- * of (normal3f, position3f). So we need to make sure we notify drivers
- * that arrays may be changing.
- */
-static inline void
-vbo_draw_method(struct vbo_exec_context *exec, enum draw_method method)
-{
- if (exec-last_draw_method != method) {
- struct gl_context *ctx = exec-ctx;
- ctx-Driver.UpdateState(ctx, _NEW_ARRAY);
- exec-last_draw_method = method;
- }
-}
-
-
#if FEATURE_beginend
void vbo_exec_vtx_flush( struct vbo_exec_context *exec, GLboolean unmap );
diff --git a/src/mesa/vbo/vbo_exec_api.c b/src/mesa/vbo/vbo_exec_api.c
index 3f95410..b87da18 100644
--- a/src/mesa/vbo/vbo_exec_api.c
+++ b/src/mesa/vbo/vbo_exec_api.c
@@ -700,7 +700,7 @@ static void GLAPIENTRY vbo_exec_Begin( GLenum mode )
return;
}
- vbo_draw_method(exec, DRAW_BEGIN_END);
+ vbo_draw_method(vbo_context(ctx), DRAW_BEGIN_END);
if (ctx-Driver.PrepareExecBegin)
ctx-Driver.PrepareExecBegin(ctx);
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 2dcfb8e..6c8a32e 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
@@ -523,7 +523,7 @@ vbo_bind_arrays(struct gl_context *ctx)
struct vbo_context *vbo = vbo_context(ctx);
struct vbo_exec_context *exec = vbo-exec;
- vbo_draw_method(exec, DRAW_ARRAYS);
+ vbo_draw_method(vbo, DRAW_ARRAYS);
if (exec-array.recalculate_inputs) {
recalculate_input_bindings(ctx);
diff --git a/src/mesa/vbo/vbo_save_draw.c b/src/mesa/vbo/vbo_save_draw.c
index 88a9a7e..47564d3 100644
--- a/src/mesa/vbo/vbo_save_draw.c
+++ b/src/mesa/vbo/vbo_save_draw.c
@@ -250,7 +250,6 @@ vbo_save_playback_vertex_list(struct gl_context *ctx, void
*data)
const struct vbo_save_vertex_list *node =
(const
[Mesa-dev] [PATCH 2/3] mesa: move gl_client_array*[] from vbo_draw_func into gl_context
In the future we'd like to treat vertex arrays as a state and
not as a parameter to the draw function. This is the first step
towards that goal.
This commit adds:
const struct gl_client_array **gl_context::Array::Arrays.
The pointer is changed in:
* vbo_draw_method
* vbo_rebase_prims - unused by gallium
* vbo_split_prims - unused by gallium
* st_RasterPos
---
src/mesa/drivers/dri/i965/brw_draw.c |2 +-
src/mesa/drivers/dri/i965/brw_draw.h |1 -
src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c |9 -
src/mesa/main/mtypes.h |3 +++
src/mesa/state_tracker/st_cb_rasterpos.c |5 -
src/mesa/state_tracker/st_draw.c |2 +-
src/mesa/state_tracker/st_draw.h |2 --
src/mesa/state_tracker/st_draw_feedback.c|2 +-
src/mesa/tnl/t_draw.c|3 ++-
src/mesa/tnl/tnl.h |1 -
src/mesa/vbo/vbo.h |1 -
src/mesa/vbo/vbo_context.h | 15 +++
src/mesa/vbo/vbo_exec_array.c| 12 ++--
src/mesa/vbo/vbo_exec_draw.c |3 +--
src/mesa/vbo/vbo_rebase.c|8 ++--
src/mesa/vbo/vbo_save_draw.c |3 +--
src/mesa/vbo/vbo_split_copy.c|9 +++--
src/mesa/vbo/vbo_split_inplace.c |9 +++--
18 files changed, 59 insertions(+), 31 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index da37b18..30faa95 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -531,7 +531,6 @@ retry:
}
void brw_draw_prims( struct gl_context *ctx,
-const struct gl_client_array *arrays[],
const struct _mesa_prim *prim,
GLuint nr_prims,
const struct _mesa_index_buffer *ib,
@@ -540,6 +539,7 @@ void brw_draw_prims( struct gl_context *ctx,
GLuint max_index,
struct gl_transform_feedback_object *tfb_vertcount )
{
+ const struct gl_client_array **arrays = ctx-Array.Arrays;
bool retval;
if (!_mesa_check_conditional_render(ctx))
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h
b/src/mesa/drivers/dri/i965/brw_draw.h
index b910419..2cc4cb3 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -35,7 +35,6 @@ struct brw_context;
void brw_draw_prims( struct gl_context *ctx,
-const struct gl_client_array *arrays[],
const struct _mesa_prim *prims,
GLuint nr_prims,
const struct _mesa_index_buffer *ib,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
index 62fee2e..6358b26 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
@@ -216,7 +216,7 @@ get_max_client_stride(struct gl_context *ctx, const struct
gl_client_array **arr
}
static void
-TAG(vbo_render_prims)(struct gl_context *ctx, const struct gl_client_array
**arrays,
+TAG(vbo_render_prims)(struct gl_context *ctx,
const struct _mesa_prim *prims, GLuint nr_prims,
const struct _mesa_index_buffer *ib,
GLboolean index_bounds_valid,
@@ -448,7 +448,6 @@ vbo_draw_imm(struct gl_context *ctx, const struct
gl_client_array **arrays,
static void
TAG(vbo_render_prims)(struct gl_context *ctx,
- const struct gl_client_array **arrays,
const struct _mesa_prim *prims, GLuint nr_prims,
const struct _mesa_index_buffer *ib,
GLboolean index_bounds_valid,
@@ -456,6 +455,7 @@ TAG(vbo_render_prims)(struct gl_context *ctx,
struct gl_transform_feedback_object *tfb_vertcount)
{
struct nouveau_render_state *render = to_render_state(ctx);
+ const struct gl_client_array **arrays = ctx-Array.Arrays;
if (!index_bounds_valid)
vbo_get_minmax_indices(ctx, prims, ib, min_index, max_index,
@@ -484,7 +484,6 @@ TAG(vbo_render_prims)(struct gl_context *ctx,
static void
TAG(vbo_check_render_prims)(struct gl_context *ctx,
- const struct gl_client_array **arrays,
const struct _mesa_prim *prims, GLuint nr_prims,
const struct _mesa_index_buffer *ib,
GLboolean index_bounds_valid,
@@ -496,12 +495,12 @@ TAG(vbo_check_render_prims)(struct gl_context *ctx,
nouveau_validate_framebuffer(ctx);
if (nctx-fallback == HWTNL)
- TAG(vbo_render_prims)(ctx, arrays, prims, nr_prims, ib,
+ TAG(vbo_render_prims)(ctx, prims, nr_prims, ib,
[Mesa-dev] [PATCH 3/3] mesa: add gl_context::NewDriverState and use it for vertex arrays
The vbo module recomputes its states if _NEW_ARRAY is set, so it shouldn't use
the same flag to notify the driver. Since we've run out of bits in NewState
and NewState is for core Mesa anyway, we need to find another way.
This patch is the first to start decoupling the state flags meant only
for core Mesa and those only for drivers.
The idea is to have two flag sets:
- gl_context::NewState - used by core Mesa only
- gl_context::NewDriverState - used by drivers only
It makes perfect sense to use NewState|=_NEW_ARRAY to notify the vbo module
that the user changed vertex arrays, and the vbo module in turn sets
a driver-specific flag to notify the driver that it should update its vertex
array bindings.
The driver decides which bits of NewDriverState should be set and stores them
in gl_context::DriverFlags. Then, Core Mesa can do this:
ctx-NewDriverState |= ctx-DriverFlags.NewArray;
This patch implements this behavior and adapts st/mesa.
DriverFlags.NewArray is set to ST_NEW_VERTEX_ARRAYS.
Core Mesa only sets NewDriverState. It's the driver's responsibility to read
it whenever it wants and reset it to 0.
---
src/mesa/main/context.c |2 ++
src/mesa/main/mtypes.h | 14 ++
src/mesa/state_tracker/st_cb_rasterpos.c |5 -
src/mesa/state_tracker/st_context.c |6 ++
src/mesa/state_tracker/st_context.h |1 +
src/mesa/state_tracker/st_draw.c | 12 +---
src/mesa/vbo/vbo_context.h |2 +-
src/mesa/vbo/vbo_exec_array.c|2 +-
src/mesa/vbo/vbo_exec_draw.c |2 +-
src/mesa/vbo/vbo_rebase.c|2 ++
src/mesa/vbo/vbo_save_draw.c |2 +-
src/mesa/vbo/vbo_split_copy.c|2 ++
src/mesa/vbo/vbo_split_inplace.c |2 ++
13 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index d75351c..7e2ac98 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -792,6 +792,7 @@ init_attrib_groups(struct gl_context *ctx)
/* Miscellaneous */
ctx-NewState = _NEW_ALL;
+ ctx-NewDriverState = ~0;
ctx-ErrorValue = (GLenum) GL_NO_ERROR;
ctx-ResetStatus = (GLenum) GL_NO_ERROR;
ctx-varying_vp_inputs = VERT_BIT_ALL;
@@ -1290,6 +1291,7 @@ _mesa_copy_context( const struct gl_context *src, struct
gl_context *dst,
/* XXX FIXME: Call callbacks?
*/
dst-NewState = _NEW_ALL;
+ dst-NewDriverState = ~0;
}
#endif
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index eb103ad..7f01514 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3255,6 +3255,17 @@ typedef enum
API_OPENGLES2
} gl_api;
+/**
+ * Driver-specific state flags.
+ *
+ * These are or'd with gl_context::NewDriverState to notify a driver about
+ * a state change. The driver gets to decide what bits should be set through
+ * this structure.
+ */
+struct gl_driver_flags
+{
+ GLbitfield NewArray; /** Vertex array state */
+};
/**
* Mesa rendering context.
@@ -3414,6 +3425,9 @@ struct gl_context
GLenum RenderMode;/** either GL_RENDER, GL_SELECT, GL_FEEDBACK */
GLbitfield NewState; /** bitwise-or of _NEW_* flags */
+ GLbitfield NewDriverState;/** bitwise-or of flags from DriverFlags */
+
+ struct gl_driver_flags DriverFlags;
GLboolean ViewportInitialized; /** has viewport size been initialized? */
diff --git a/src/mesa/state_tracker/st_cb_rasterpos.c
b/src/mesa/state_tracker/st_cb_rasterpos.c
index 35ca5d7..253ce31 100644
--- a/src/mesa/state_tracker/st_cb_rasterpos.c
+++ b/src/mesa/state_tracker/st_cb_rasterpos.c
@@ -251,7 +251,10 @@ st_RasterPos(struct gl_context *ctx, const GLfloat v[4])
*/
rs-array[0].Ptr = (GLubyte *) v;
- /* draw the point */
+ /* Draw the point.
+*
+* Don't set DriverFlags.NewArray.
+* st_feedback_draw_vbo doesn't check for that flag. */
ctx-Array.Arrays = rs-arrays;
st_feedback_draw_vbo(ctx, rs-prim, 1, NULL, GL_TRUE, 0, 1,
NULL);
diff --git a/src/mesa/state_tracker/st_context.c
b/src/mesa/state_tracker/st_context.c
index 84aae81..0419968 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -203,6 +203,10 @@ st_create_context_priv( struct gl_context *ctx, struct
pipe_context *pipe )
return st;
}
+static void st_init_driver_flags(struct gl_driver_flags *f)
+{
+ f-NewArray = ST_NEW_VERTEX_ARRAYS;
+}
struct st_context *st_create_context(gl_api api, struct pipe_context *pipe,
const struct gl_config *visual,
@@ -225,6 +229,8 @@ struct st_context *st_create_context(gl_api api, struct
pipe_context *pipe,
return NULL;
}
+ st_init_driver_flags(ctx-DriverFlags);
+
/* XXX: need a capability bit in gallium to query if the pipe
* driver prefers DP4 or MUL/MAD for vertex transformation.
*/
diff --git
Re: [Mesa-dev] [PATCH 1/2] egl/android: Add support for RGBX_8888 used in Android native buffers
On 04/24/2012 07:49 AM, Sean V Kelley wrote:
Add new format __DRI_IMAGE_FORMAT_XBGR to __DRI_IMAGE.
HAL_PIXEL_FORMAT_RGBX_ now maps to __DRI_IMAGE_FORMAT_XBGR.
Signed-off-by: Sean V Kelley sean.v.kel...@linux.intel.com
---
include/GL/internal/dri_interface.h |1 +
src/egl/drivers/dri2/platform_android.c |2 ++
2 files changed, 3 insertions(+)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index da83666..eafbe10 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -906,6 +906,7 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FORMAT_XRGB 0x1002
#define __DRI_IMAGE_FORMAT_ARGB 0x1003
#define __DRI_IMAGE_FORMAT_ABGR 0x1004
+#define __DRI_IMAGE_FORMAT_XBGR 0x1005
#define __DRI_IMAGE_USE_SHARE0x0001
#define __DRI_IMAGE_USE_SCANOUT 0x0002
diff --git a/src/egl/drivers/dri2/platform_android.c
b/src/egl/drivers/dri2/platform_android.c
index 1998941..66142cd 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -311,6 +311,8 @@ dri2_create_image_android_native_buffer(_EGLDisplay *disp,
format = __DRI_IMAGE_FORMAT_ABGR;
break;
case HAL_PIXEL_FORMAT_RGBX_:
+ format = __DRI_IMAGE_FORMAT_XBGR;
+ break;
case HAL_PIXEL_FORMAT_RGB_888:
case HAL_PIXEL_FORMAT_RGBA_5551:
case HAL_PIXEL_FORMAT_RGBA_:
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
I'll commit this tomorrow if it doesn't receive further comments.
Chad Versace
chad.vers...@linux.intel.com
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] i965: Support Android RGBX8888 format for EGL generated images
On 04/24/2012 07:49 AM, Sean V Kelley wrote: Enabled MESA_FORMAT_RGBX_REV for RGBX. Android software requires RGBX format to be supported for software rendering. That requires EGL to be capable of generating images from this format. Signed-off-by: Sean V Kelley sean.v.kel...@linux.intel.com --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c |2 ++ src/mesa/drivers/dri/intel/intel_screen.c| 10 ++ 2 files changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 69af0ee..8983195 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -291,6 +291,8 @@ brw_format_for_mesa_format(gl_format mesa_format) [MESA_FORMAT_RGBA_REV] = BRW_SURFACEFORMAT_R8G8B8A8_UNORM, [MESA_FORMAT_ARGB] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM, [MESA_FORMAT_ARGB_REV] = 0, + [MESA_FORMAT_RGBX] = 0, + [MESA_FORMAT_RGBX_REV] = BRW_SURFACEFORMAT_R8G8B8X8_UNORM, [MESA_FORMAT_XRGB] = BRW_SURFACEFORMAT_B8G8R8X8_UNORM, [MESA_FORMAT_XRGB_REV] = 0, [MESA_FORMAT_RGB888] = 0, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index e823792..7edf5c1 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -209,6 +209,11 @@ intel_create_image_from_name(__DRIscreen *screen, image-internal_format = GL_RGBA; image-data_type = GL_UNSIGNED_BYTE; break; +case __DRI_IMAGE_FORMAT_XBGR: + image-format = MESA_FORMAT_RGBX_REV; + image-internal_format = GL_RGB; + image-data_type = GL_UNSIGNED_BYTE; + break; default: free(image); return NULL; @@ -310,6 +315,11 @@ intel_create_image(__DRIscreen *screen, image-internal_format = GL_RGBA; image-data_type = GL_UNSIGNED_BYTE; break; +case __DRI_IMAGE_FORMAT_XBGR: + image-format = MESA_FORMAT_RGBX_REV; + image-internal_format = GL_RGB; + image-data_type = GL_UNSIGNED_BYTE; + break; default: free(image); return NULL; This looks good to me, but I want to see a comment from Ken or Eric before committing because they are more familiar with the format code. Reviewed-by: Chad Versace chad.vers...@linux.intel.com I wish we had a test for this new format, but I don't see a way to easily write one. One possiblity is that we write a test using EGL_PLATFORM=drm; add a new gbm format, GBM_FORMAT_XBGR888; allocate a buffer with the new format and pass it to the driver with GLEGLImageTargetRenderbufferStorageOES. (I don't know much about GBM, so I'm climbing out on a limb here). Ken or Eric, any ideas? Chad Versace chad.vers...@linux.intel.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/fs: Fix FB writes that tried to use the non-existent m16 register.
On Tue, 24 Apr 2012 14:09:13 -0700, Kenneth Graunke kenn...@whitecape.org wrote: A little analysis shows that the worst-case value for nr is 17: - base_mrf = 2 ... 2 - header present (say gen == 5) ... 4 - aa_dest_stencil_reg (stencil test) ... 5 - SIMD16 mode: += 4 * reg_width ... 13 - source_depth_to_render_target ... 15 - dest_depth_reg ... 17 This resulted in us setting base_mrf to 2 and mlen to 15. In other words, we'd try to use m2..m16. But m16 doesn't exist pre-Gen6. Also, the instruction scheduler data structures use arrays of size 16, so this would cause us to access them out of bounds. While the debugger system routine may need m0 and m1, we don't use it today, so the simplest solution is just to move base_mrf back to 1. That way, our worst case message fits in m1..m15, which is legal. An alternative would be to fail on SIMD16 in this case, but that seems a bit unfortunate if there's no real need to reserve m0 and m1. Fixes new piglit test shaders/depth-test-and-write on Ironlake. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48218 Signed-off-by: Kenneth Graunke kenn...@whitecape.org --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |5 - 1 file changed, 4 insertions(+), 1 deletion(-) Turns out the patch was correct, I just can't count :p With stencil testing enabled, we get an extra nr++ that I missed in my initial analysis. So the maximum message length is actually 15, not 14. 2 + 15 = 17 == we try to use m2..m16 == BOOM There we go! These two are: Reviewed-by: Eric Anholt e...@anholt.net pgpcZPw7HkA7u.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/5] dri2: extended DRI image for YUV + interlaced videos
On 04/24/2012 08:21 AM, Gwenole Beauchesne wrote: Hi, 2012/4/23 Rob Clark rob.cl...@linaro.org: On Mon, Apr 23, 2012 at 4:54 AM, Gwenole Beauchesne gb.de...@gmail.com wrote: It's not intended for Wayland only but rather for anybodoy willing to import foreign DRM buffers which could have YUV layout. This indeed implies Wayland but also MESA_drm_image [...] ... and Android too. It looks like this patch series lays some groundwork for an Android requirement: sharing YUV buffers from the camera through GL_OES_EGL_image_external. Chad Versace chad.vers...@linux.intel.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 49124] New: swrast/s_texfetch.c:1156: set_fetch_functions: Assertion `texImage-FetchTexel' failed.
https://bugs.freedesktop.org/show_bug.cgi?id=49124 Bug #: 49124 Summary: swrast/s_texfetch.c:1156: set_fetch_functions: Assertion `texImage-FetchTexel' failed. Classification: Unclassified Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: critical Priority: medium Component: Other AssignedTo: mesa-dev@lists.freedesktop.org ReportedBy: v...@freedesktop.org mesa: 1781d26faa6bf13950b95be97b6510e8f13290d6 (master) Run piglit copyteximage test on swrast. $ ./bin/copyteximage -auto Mesa: User error: GL_INVALID_VALUE in glCopyTexImage1D(internalFormat) Unexpected GL error: GL_INVALID_VALUE 0x501 Mesa: User error: GL_INVALID_VALUE in glCopyTexImage1D(internalFormat) Unexpected GL error: GL_INVALID_VALUE 0x501 copyteximage: swrast/s_texfetch.c:1156: set_fetch_functions: Assertion `texImage-FetchTexel' failed. Aborted (core dumped) (gdb) bt #0 0x7f35f1d1a445 in __GI_raise (sig=optimized out) at ../nptl/sysdeps/unix/sysv/linux/raise.c:64 #1 0x7f35f1d1dbab in __GI_abort () at abort.c:91 #2 0x7f35f1d1310e in __assert_fail_base (fmt=optimized out, assertion=0x7f35efaf27ad texImage-FetchTexel, file=0x7f35efaf277e swrast/s_texfetch.c, line=optimized out, function=optimized out) at assert.c:94 #3 0x7f35f1d131b2 in __GI___assert_fail ( assertion=0x7f35efaf27ad texImage-FetchTexel, file=0x7f35efaf277e swrast/s_texfetch.c, line=1156, function=0x7f35efaf29f0 set_fetch_functions) at assert.c:103 #4 0x7f35efa65208 in set_fetch_functions (dims=1, texImage=0x1413cb0) at swrast/s_texfetch.c:1156 #5 _mesa_update_fetch_functions (texObj=optimized out) at swrast/s_texfetch.c:1170 #6 0x7f35efa4aafe in _swrast_update_texture_samplers (ctx=0x1433570) at swrast/s_context.c:484 #7 0x7f35efa4b099 in _swrast_validate_derived (ctx=0x1433570) at swrast/s_context.c:576 #8 0x7f35efa4b3ed in _swrast_validate_line (ctx=0x1433570, v0=0x7f35f2939040, v1=0x7f35f2939248) at swrast/s_context.c:377 #9 0x7f35efa00035 in _tnl_render_lines_verts (ctx=0x1433570, start=optimized out, count=2, flags=optimized out) at tnl/t_vb_rendertmp.h:86 #10 0x7f35efa086c0 in run_render (ctx=0x1433570, stage=optimized out) at tnl/t_vb_render.c:321 #11 0x7f35ef9fc4a9 in _tnl_run_pipeline (ctx=0x1433570) at tnl/t_pipeline.c:163 #12 0x7f35ef9fd1fc in _tnl_draw_prims (ctx=optimized out, arrays=0x14b0c90, prim=0x7fff51fc31e0, nr_prims=1, ib=0x0, min_index=optimized out, max_index=1) at tnl/t_draw.c:523 #13 0x7f35ef9fd627 in _tnl_vbo_draw_prims (ctx=0x1433570, arrays=0x14b0c90, prim=0x7fff51fc31e0, nr_prims=1, ib=0x0, index_bounds_valid=optimized out, min_index=0, max_index=1, tfb_vertcount=0x0) at tnl/t_draw.c:423 #14 0x7f35ef9ea707 in vbo_draw_arrays (ctx=0x1433570, mode=optimized out, start=0, count=optimized out, numInstances=1) at vbo/vbo_exec_array.c:613 #15 0x00425812 in piglit_display () at piglit/tests/texturing/copyteximage.c:223 #16 0x004355dd in display () at piglit/tests/util/piglit-framework.c:56 #17 0x7f35f23f5220 in fghRedrawWindow (window=0x1411460) at freeglut_main.c:210 #18 fghcbDisplayWindow (window=0x1411460, enumerator=0x7fff51fc4350) at freeglut_main.c:227 #19 0x7f35f23f8939 in fgEnumWindows ( enumCallback=0x7f35f23f5120 fghcbDisplayWindow, enumerator=0x7fff51fc4350) at freeglut_structure.c:394 #20 0x7f35f23f565a in fghDisplayAll () at freeglut_main.c:249 #21 glutMainLoopEvent () at freeglut_main.c:1450 #22 0x7f35f23f5f0e in glutMainLoop () at freeglut_main.c:1498 #23 0x00435d7a in main (argc=1, argv=0x7fff51fc46a8) at piglit/tests/util/piglit-framework.c:304 (gdb) frame 4 #4 0x7f35efa65208 in set_fetch_functions (dims=1, texImage=0x1413cb0) at swrast/s_texfetch.c:1156 1156 ASSERT(texImage-FetchTexel); (gdb) print texImage-FetchTexel $1 = (FetchTexelFunc) 0 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/5] dri2: extended DRI image for YUV + interlaced videos
Hi, 2012/4/25 Chad Versace chad.vers...@linux.intel.com: On 04/24/2012 08:21 AM, Gwenole Beauchesne wrote: 2012/4/23 Rob Clark rob.cl...@linaro.org: On Mon, Apr 23, 2012 at 4:54 AM, Gwenole Beauchesne gb.de...@gmail.com wrote: It's not intended for Wayland only but rather for anybodoy willing to import foreign DRM buffers which could have YUV layout. This indeed implies Wayland but also MESA_drm_image [...] ... and Android too. It looks like this patch series lays some groundwork for an Android requirement: sharing YUV buffers from the camera through GL_OES_EGL_image_external. I was discussing this with Pauli the other day, but I totally dislike this extension. :) I also considered doing the conversion within Mesa, but munging with the texture units among other constraining things behind user's back looks horrible to me. So, accessing to the individual YUV components this way was for me a better and more flexible approach while still keeping things simple from the client application side. See e.g. the Weston bits, it's no more complicated. Anyway, we can still add native YUV formats later, this is not an incompatible model. Though, we'd need to extend __DRIimageAttrs in this case to describe the layout of the YUV buffers. Regards, Gwenole. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
