Re: [Mesa-dev] [PATCH] gallium/util: Use GCC built-in functions for NaN and infinity.

[Jose Fonseca]

Looks good.

Jose

- Original Message -
 This patch fixes this build failure with Intel Compiler.
 
 src/gallium/auxiliary/util/u_format_tests.c(903): error:
 floating-point operation result is out of range
  {PIPE_FORMAT_R16_FLOAT, PACKED_1x16(0x),
  PACKED_1x16(0x7c01), UNPACKED_1x1(NAN, 0.0, 0.0, 1.0)},
 
 Signed-off-by: Vinson Lee v...@freedesktop.org
 ---
  src/gallium/auxiliary/util/u_format_tests.c |5 +
  1 file changed, 5 insertions(+)
 
 diff --git a/src/gallium/auxiliary/util/u_format_tests.c
 b/src/gallium/auxiliary/util/u_format_tests.c
 index 457fda6..d348608 100644
 --- a/src/gallium/auxiliary/util/u_format_tests.c
 +++ b/src/gallium/auxiliary/util/u_format_tests.c
 @@ -66,8 +66,13 @@
 {{ 0,  0,  0,  0}, { 0,  0,  0,  0}, {0, 0, 0, 0}, {0, 0, 0,
 0}}}
  
  
 +#ifdef __GNUC__
 +#define NAN __builtin_nan()
 +#define INF __builtin_inf()
 +#else
  #define NAN (0.0 / 0.0)
  #define INF (1.0 / 0.0)
 +#endif
  
  /**
   * Test cases.
 --
 1.7.9.5
 
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Re: [Mesa-dev] [PATCH] mesa: Fix wrong sizeof argument in _math_matrix_copy.

[Jose Fonseca]

Good catch.

Jose

- Original Message -
 Fixes Coverity wrong sizeof argument defect.
 
 Signed-off-by: Vinson Lee v...@freedesktop.org
 ---
  src/mesa/math/m_matrix.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
 index 40f9229..7c4e9fd 100644
 --- a/src/mesa/math/m_matrix.c
 +++ b/src/mesa/math/m_matrix.c
 @@ -1437,7 +1437,7 @@ void
  _math_matrix_copy( GLmatrix *to, const GLmatrix *from )
  {
 memcpy( to-m, from-m, sizeof(Identity) );
 -   memcpy(to-inv, from-inv, sizeof(from-inv));
 +   memcpy(to-inv, from-inv, sizeof(*from-inv));
 to-flags = from-flags;
 to-type = from-type;
  }
 --
 1.7.11.1
 
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Re: [Mesa-dev] some radeon/r200 cleanup/fixes

[Barto]

I did the tests in piglit (glean tests ) with my radeon 9000 ( rv250 ),

all is Ok, I have the same results with Roland's patches and without
Roland's patches,

I see no regressions, these patches for the r200 driver seem safe

5 Roland's patches start here :

http://lists.freedesktop.org/archives/mesa-dev/2012-July/024753.html


Le 29/07/2012 23:26, Barto a écrit :
 Ok thanks,
 
 so the solution is to run the piglit script like this :
 
 python2 piglit-run.py tests/sanity.tests results/sanity.results
 
 in my archlinux installation I have 2 different python packages: python2
 and python3
 
 by default it's the python3 interpreter who runs for python scripts,
 that's why I had this error,
 
 now it's Ok and I will post the results of my tests about these 5
 Roland's patches in a next mail
 
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Re: [Mesa-dev] [PATCH] mesa: loosen small matrix determinant check

[Pekka Paalanen]

On Tue, 24 Jul 2012 11:31:59 -0600
Brian Paul bri...@vmware.com wrote:

 When computing a matrix inverse, if the determinant is too small we could hit
 a divide by zero.  There's a check to prevent this (we basically give up on
 computing the inverse and return the identity matrix.)  This patches loosens
 this test to fix a lighting bug reported by Lars Henning Wendt.
 
 NOTE: This is a candidate for the 8.0 branch.
 ---
  src/mesa/math/m_matrix.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
 index 02aedba..ef377ee 100644
 --- a/src/mesa/math/m_matrix.c
 +++ b/src/mesa/math/m_matrix.c
 @@ -513,7 +513,7 @@ static GLboolean invert_matrix_3d_general( GLmatrix *mat )
  
 det = pos + neg;
  
 -   if (det*det  1e-25)
 +   if (det  1e-25)
return GL_FALSE;
  
 det = 1.0F / det;

Hi,

just a fly-by question; doesn't that break if determinant is negative?
I.e. reflection transformations.


Thanks,
pq
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[Mesa-dev] [Bug 52140] Ubuntu Unity - Launcher and switcher icons disappeared

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52140

Rui Salvaterra rsalvate...@gmail.com changed:

   What|Removed |Added

 CC||rsalvate...@gmail.com

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Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email
--- You are receiving this mail because: ---
You are the assignee for the bug.
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[Mesa-dev] [PATCH 2/8] radeonsi: fix shader size and handling

[Christian König]

We should always upload the shader here.

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c |   26 
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c 
b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 7008137..cc4777f 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -554,6 +554,7 @@ int si_pipe_shader_create(
unsigned char * inst_bytes;
unsigned inst_byte_count;
unsigned i;
+   uint32_t *ptr;
bool dump;
 
dump = debug_get_bool_option(RADEON_DUMP_SHADERS, FALSE);
@@ -608,23 +609,22 @@ int si_pipe_shader_create(
tgsi_parse_free(si_shader_ctx.parse);
 
/* copy new shader */
+   si_resource_reference(shader-bo, NULL);
+   shader-bo = si_resource_create_custom(ctx-screen, 
PIPE_USAGE_IMMUTABLE,
+  inst_byte_count - 12);
if (shader-bo == NULL) {
-   uint32_t *ptr;
+   return -ENOMEM;
+   }
 
-   shader-bo = si_resource_create_custom(ctx-screen, 
PIPE_USAGE_IMMUTABLE, inst_byte_count);
-   if (shader-bo == NULL) {
-   return -ENOMEM;
-   }
-   ptr = (uint32_t*)rctx-ws-buffer_map(shader-bo-cs_buf, 
rctx-cs, PIPE_TRANSFER_WRITE);
-   if (0 /*R600_BIG_ENDIAN*/) {
-   for (i = 0; i  (inst_byte_count-12)/4; ++i) {
-   ptr[i] = 
util_bswap32(*(uint32_t*)(inst_bytes+12 + i*4));
-   }
-   } else {
-   memcpy(ptr, inst_bytes + 12, inst_byte_count - 12);
+   ptr = (uint32_t*)rctx-ws-buffer_map(shader-bo-cs_buf, rctx-cs, 
PIPE_TRANSFER_WRITE);
+   if (0 /*R600_BIG_ENDIAN*/) {
+   for (i = 0; i  (inst_byte_count-12)/4; ++i) {
+   ptr[i] = util_bswap32(*(uint32_t*)(inst_bytes+12 + 
i*4));
}
-   rctx-ws-buffer_unmap(shader-bo-cs_buf);
+   } else {
+   memcpy(ptr, inst_bytes + 12, inst_byte_count - 12);
}
+   rctx-ws-buffer_unmap(shader-bo-cs_buf);
 
free(inst_bytes);
 
-- 
1.7.9.5

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[Mesa-dev] [PATCH 3/8] radeonsi: fix vertex buffer and elements

[Christian König]

Let's just use the T# descriptors until we get a fetch shader.

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c |6 +-
 src/gallium/drivers/radeonsi/si_state.c|   43 +++--
 src/gallium/drivers/radeonsi/si_state.h|9 +--
 src/gallium/drivers/radeonsi/si_state_draw.c   |   80 +---
 4 files changed, 74 insertions(+), 64 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c 
b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index cc4777f..66050d3 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -182,7 +182,7 @@ static void declare_input_vs(
struct lp_build_context * uint = 
si_shader_ctx-radeon_bld.soa.bld_base.uint_bld;
struct lp_build_context * base = 
si_shader_ctx-radeon_bld.soa.bld_base.base;
struct r600_context *rctx = si_shader_ctx-rctx;
-   struct pipe_vertex_element *velem = 
rctx-vertex_elements-elements[input_index];
+   //struct pipe_vertex_element *velem = 
rctx-vertex_elements-elements[input_index];
unsigned chan;
 
/* Load the T list */
@@ -191,12 +191,12 @@ static void declare_input_vs(
 * now */
t_list_ptr = use_sgpr(base-gallivm, SGPR_CONST_PTR_V4I32, 6);
 
-   t_offset = lp_build_const_int32(base-gallivm, 
velem-vertex_buffer_index);
+   t_offset = lp_build_const_int32(base-gallivm, input_index);
 
t_list = build_indexed_load(base-gallivm, t_list_ptr, t_offset);
 
/* Build the attribute offset */
-   attribute_offset = lp_build_const_int32(base-gallivm, 
velem-src_offset);
+   attribute_offset = lp_build_const_int32(base-gallivm, 0);
 
/* Load the buffer index is always, which is always stored in VGPR0
 * for Vertex Shaders */
diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 297d791..c417c9c 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1226,10 +1226,10 @@ static bool si_is_sampler_format_supported(struct 
pipe_screen *screen, enum pipe
  
util_format_get_first_non_void_channel(format)) != ~0U;
 }
 
-uint32_t si_translate_vertexformat(struct pipe_screen *screen,
-  enum pipe_format format,
-  const struct util_format_description *desc,
-  int first_non_void)
+static uint32_t si_translate_vertexformat(struct pipe_screen *screen,
+ enum pipe_format format,
+ const struct util_format_description 
*desc,
+ int first_non_void)
 {
uint32_t result;
 
@@ -2078,12 +2078,45 @@ static void *si_create_vertex_elements(struct 
pipe_context *ctx,
   const struct pipe_vertex_element 
*elements)
 {
struct si_vertex_element *v = CALLOC_STRUCT(si_vertex_element);
+   int i;
 
-   assert(count  32);
+   assert(count  PIPE_MAX_ATTRIBS);
if (!v)
return NULL;
 
v-count = count;
+   for (i = 0; i  count; ++i) {
+   const struct util_format_description *desc;
+   unsigned data_format, num_format;
+   int first_non_void;
+
+   desc = util_format_description(elements[i].src_format);
+   first_non_void = 
util_format_get_first_non_void_channel(elements[i].src_format);
+   data_format = si_translate_vertexformat(ctx-screen, 
elements[i].src_format,
+   desc, first_non_void);
+
+   switch (desc-channel[first_non_void].type) {
+   case UTIL_FORMAT_TYPE_FIXED:
+   num_format = V_008F0C_BUF_NUM_FORMAT_USCALED; /* XXX */
+   break;
+   case UTIL_FORMAT_TYPE_SIGNED:
+   num_format = V_008F0C_BUF_NUM_FORMAT_SNORM;
+   break;
+   case UTIL_FORMAT_TYPE_UNSIGNED:
+   num_format = V_008F0C_BUF_NUM_FORMAT_UNORM;
+   break;
+   case UTIL_FORMAT_TYPE_FLOAT:
+   default:
+   num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
+   }
+
+   v-rsrc_word3[i] = 
S_008F0C_DST_SEL_X(si_map_swizzle(desc-swizzle[0])) |
+  
S_008F0C_DST_SEL_Y(si_map_swizzle(desc-swizzle[1])) |
+  
S_008F0C_DST_SEL_Z(si_map_swizzle(desc-swizzle[2])) |
+  
S_008F0C_DST_SEL_W(si_map_swizzle(desc-swizzle[3])) |
+  S_008F0C_NUM_FORMAT(num_format) |
+  S_008F0C_DATA_FORMAT(data_format);
+   }

[Mesa-dev] [PATCH 1/8] radeonsi: rename r600_resource to si_resource

[Christian König]

Also split it into seperate header and add
some helper functions.

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/r600.h|   21 ++
 src/gallium/drivers/radeonsi/r600_buffer.c |   12 ++--
 src/gallium/drivers/radeonsi/r600_hw_context.c |   23 +++
 .../drivers/radeonsi/r600_hw_context_priv.h|2 +-
 src/gallium/drivers/radeonsi/r600_resource.h   |9 +--
 src/gallium/drivers/radeonsi/r600_texture.c|   24 +++
 src/gallium/drivers/radeonsi/radeonsi_pipe.c   |   15 ++---
 src/gallium/drivers/radeonsi/radeonsi_pipe.h   |8 +--
 src/gallium/drivers/radeonsi/radeonsi_pm4.c|8 +--
 src/gallium/drivers/radeonsi/radeonsi_pm4.h|4 +-
 src/gallium/drivers/radeonsi/radeonsi_resource.h   |   67 
 src/gallium/drivers/radeonsi/radeonsi_shader.c |5 +-
 src/gallium/drivers/radeonsi/si_state.c|   23 +++
 src/gallium/drivers/radeonsi/si_state.h|2 +-
 src/gallium/drivers/radeonsi/si_state_draw.c   |   11 ++--
 15 files changed, 140 insertions(+), 94 deletions(-)
 create mode 100644 src/gallium/drivers/radeonsi/radeonsi_resource.h

diff --git a/src/gallium/drivers/radeonsi/r600.h 
b/src/gallium/drivers/radeonsi/r600.h
index 6ff0bf8..f22d920 100644
--- a/src/gallium/drivers/radeonsi/r600.h
+++ b/src/gallium/drivers/radeonsi/r600.h
@@ -30,6 +30,8 @@
 #include util/u_double_list.h
 #include util/u_transfer.h
 
+#include radeonsi_resource.h
+
 #define R600_ERR(fmt, args...) \
fprintf(stderr, EE %s:%d %s - fmt, __FILE__, __LINE__, __func__, 
##args)
 
@@ -55,17 +57,6 @@ struct r600_tiling_info {
unsigned group_bytes;
 };
 
-struct r600_resource {
-   struct u_resource   b;
-
-   /* Winsys objects. */
-   struct pb_buffer*buf;
-   struct radeon_winsys_cs_handle  *cs_buf;
-
-   /* Resource state. */
-   unsigneddomains;
-};
-
 /* R600/R700 STATES */
 struct r600_query {
union {
@@ -85,7 +76,7 @@ struct r600_query {
/* The buffer where query results are stored. It's used as a ring,
 * data blocks for current query are stored sequentially from
 * results_start to results_end, with wrapping on the buffer end */
-   struct r600_resource*buffer;
+   struct si_resource  *buffer;
/* The number of dwords for begin_query or end_query. */
unsignednum_cs_dw;
/* linked list of queries */
@@ -96,7 +87,7 @@ struct r600_so_target {
struct pipe_stream_output_target b;
 
/* The buffer where BUFFER_FILLED_SIZE is stored. */
-   struct r600_resource*filled_size;
+   struct si_resource  *filled_size;
unsignedstride;
unsignedso_index;
 };
@@ -113,7 +104,7 @@ struct r600_draw {
uint32_tindices_bo_offset;
unsigneddb_render_override;
unsigneddb_render_control;
-   struct r600_resource*indices;
+   struct si_resource  *indices;
 };
 
 struct r600_context;
@@ -133,7 +124,7 @@ void r600_context_queries_suspend(struct r600_context *ctx);
 void r600_context_queries_resume(struct r600_context *ctx);
 void r600_query_predication(struct r600_context *ctx, struct r600_query 
*query, int operation,
int flag_wait);
-void r600_context_emit_fence(struct r600_context *ctx, struct r600_resource 
*fence,
+void r600_context_emit_fence(struct r600_context *ctx, struct si_resource 
*fence,
  unsigned offset, unsigned value);
 
 void r600_context_streamout_begin(struct r600_context *ctx);
diff --git a/src/gallium/drivers/radeonsi/r600_buffer.c 
b/src/gallium/drivers/radeonsi/r600_buffer.c
index 15bff91..76de941 100644
--- a/src/gallium/drivers/radeonsi/r600_buffer.c
+++ b/src/gallium/drivers/radeonsi/r600_buffer.c
@@ -40,7 +40,7 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
struct pipe_resource *buf)
 {
struct r600_screen *rscreen = (struct r600_screen*)screen;
-   struct r600_resource *rbuffer = r600_resource(buf);
+   struct si_resource *rbuffer = si_resource(buf);
 
pb_reference(rbuffer-buf, NULL);
FREE(rbuffer);
@@ -72,7 +72,7 @@ static struct pipe_transfer *r600_get_transfer(struct 
pipe_context *ctx,
 static void *r600_buffer_transfer_map(struct pipe_context *pipe,
  struct pipe_transfer *transfer)
 {
-   struct r600_resource *rbuffer = r600_resource(transfer-resource);
+   struct si_resource *rbuffer = si_resource(transfer-resource);
struct r600_context *rctx = (struct r600_context*)pipe;
uint8_t *data;
 
@@ -115,7 +115,7 @@ static const struct u_resource_vtbl r600_buffer_vtbl =
 };
 
 bool 

[Mesa-dev] [PATCH 4/8] radeonsi: fix dummy export in shaders

[Christian König]

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c |   17 +
 1 file changed, 17 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c 
b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 66050d3..67a5465 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -475,6 +475,23 @@ static void si_llvm_emit_epilogue(struct 
lp_build_tgsi_context * bld_base)
}
}
 
+   if (!last_args[0]) {
+   /* Specify which components to enable */
+   last_args[0] = lp_build_const_int32(base-gallivm, 0x0);
+
+   /* Specify the target we are exporting */
+   last_args[3] = lp_build_const_int32(base-gallivm, 
V_008DFC_SQ_EXP_MRT);
+
+   /* Set COMPR flag to zero to export data as 32-bit */
+   last_args[4] = uint-zero;
+
+   /* dummy bits */
+   last_args[5]= uint-zero;
+   last_args[6]= uint-zero;
+   last_args[7]= uint-zero;
+   last_args[8]= uint-zero;
+   }
+
/* Specify whether the EXEC mask represents the valid mask */
last_args[1] = lp_build_const_int32(base-gallivm,
si_shader_ctx-type == 
TGSI_PROCESSOR_FRAGMENT);
-- 
1.7.9.5

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[Mesa-dev] [PATCH 5/8] radeonsi: fix shader binding

[Christian König]

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/si_state.c |   10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index c417c9c..a80e169 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1649,7 +1649,10 @@ static void si_bind_vs_shader(struct pipe_context *ctx, 
void *state)
 
rctx-shader_dirty = true;
rctx-vs_shader = shader;
-   si_pm4_bind_state(rctx, vs, shader-pm4);
+
+   if (shader) {
+   si_pm4_bind_state(rctx, vs, shader-pm4);
+   }
 }
 
 static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
@@ -1662,7 +1665,10 @@ static void si_bind_ps_shader(struct pipe_context *ctx, 
void *state)
 
rctx-shader_dirty = true;
rctx-ps_shader = shader;
-   si_pm4_bind_state(rctx, ps, shader-pm4);
+
+   if (shader) {
+   si_pm4_bind_state(rctx, ps, shader-pm4);
+   }
 }
 
 static void si_delete_vs_shader(struct pipe_context *ctx, void *state)
-- 
1.7.9.5

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[Mesa-dev] [PATCH 6/8] radeonsi: fix assertion in si_bind_vs_sampler

[Christian König]

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/si_state.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index a80e169..3da236c 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1973,7 +1973,7 @@ out:
 
 static void si_bind_vs_sampler(struct pipe_context *ctx, unsigned count, void 
**states)
 {
-   assert(0);
+   assert(count == 0);
 }
 
 static void si_bind_ps_sampler(struct pipe_context *ctx, unsigned count, void 
**states)
-- 
1.7.9.5

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[Mesa-dev] [PATCH 7/8] radeonsi: fix stencil op mapping

[Christian König]

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/si_state.c |   74 ++-
 1 file changed, 34 insertions(+), 40 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 3da236c..b2dabf5 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -525,10 +525,31 @@ static void si_set_pipe_stencil_ref(struct pipe_context 
*ctx,
  * DSA
  */
 
-/* transnates straight */
-static uint32_t si_translate_ds_func(int func)
+static uint32_t si_translate_stencil_op(int s_op)
 {
-return func;
+   switch (s_op) {
+   case PIPE_STENCIL_OP_KEEP:
+   return V_02842C_STENCIL_KEEP;
+   case PIPE_STENCIL_OP_ZERO:
+   return V_02842C_STENCIL_ZERO;
+   case PIPE_STENCIL_OP_REPLACE:
+   return V_02842C_STENCIL_REPLACE_TEST;
+   case PIPE_STENCIL_OP_INCR:
+   return V_02842C_STENCIL_ADD_CLAMP;
+   case PIPE_STENCIL_OP_DECR:
+   return V_02842C_STENCIL_SUB_CLAMP;
+   case PIPE_STENCIL_OP_INCR_WRAP:
+   return V_02842C_STENCIL_ADD_WRAP;
+   case PIPE_STENCIL_OP_DECR_WRAP:
+   return V_02842C_STENCIL_SUB_WRAP;
+   case PIPE_STENCIL_OP_INVERT:
+   return V_02842C_STENCIL_INVERT;
+   default:
+   R600_ERR(Unknown stencil op %d, s_op);
+   assert(0);
+   break;
+   }
+   return 0;
 }
 
 static void *si_create_dsa_state(struct pipe_context *ctx,
@@ -538,6 +559,7 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
struct si_pm4_state *pm4 = dsa-pm4;
unsigned db_depth_control, /* alpha_test_control, */ alpha_ref;
unsigned db_render_override, db_render_control;
+   uint32_t db_stencil_control = 0;
 
if (dsa == NULL) {
return NULL;
@@ -555,17 +577,17 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
/* stencil */
if (state-stencil[0].enabled) {
db_depth_control |= S_028800_STENCIL_ENABLE(1);
-   db_depth_control |= 
S_028800_STENCILFUNC(si_translate_ds_func(state-stencil[0].func));
-   //db_depth_control |= 
S_028800_STENCILFAIL(r600_translate_stencil_op(state-stencil[0].fail_op));
-   //db_depth_control |= 
S_028800_STENCILZPASS(r600_translate_stencil_op(state-stencil[0].zpass_op));
-   //db_depth_control |= 
S_028800_STENCILZFAIL(r600_translate_stencil_op(state-stencil[0].zfail_op));
+   db_depth_control |= 
S_028800_STENCILFUNC(state-stencil[0].func);
+   db_stencil_control |= 
S_02842C_STENCILFAIL(si_translate_stencil_op(state-stencil[0].fail_op));
+   db_stencil_control |= 
S_02842C_STENCILZPASS(si_translate_stencil_op(state-stencil[0].zpass_op));
+   db_stencil_control |= 
S_02842C_STENCILZFAIL(si_translate_stencil_op(state-stencil[0].zfail_op));
 
if (state-stencil[1].enabled) {
db_depth_control |= S_028800_BACKFACE_ENABLE(1);
-   db_depth_control |= 
S_028800_STENCILFUNC_BF(si_translate_ds_func(state-stencil[1].func));
-   //db_depth_control |= 
S_028800_STENCILFAIL_BF(r600_translate_stencil_op(state-stencil[1].fail_op));
-   //db_depth_control |= 
S_028800_STENCILZPASS_BF(r600_translate_stencil_op(state-stencil[1].zpass_op));
-   //db_depth_control |= 
S_028800_STENCILZFAIL_BF(r600_translate_stencil_op(state-stencil[1].zfail_op));
+   db_depth_control |= 
S_028800_STENCILFUNC_BF(state-stencil[1].func);
+   db_stencil_control |= 
S_02842C_STENCILFAIL_BF(si_translate_stencil_op(state-stencil[1].fail_op));
+   db_stencil_control |= 
S_02842C_STENCILZPASS_BF(si_translate_stencil_op(state-stencil[1].zpass_op));
+   db_stencil_control |= 
S_02842C_STENCILZFAIL_BF(si_translate_stencil_op(state-stencil[1].zfail_op));
}
}
 
@@ -593,6 +615,7 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
si_pm4_set_reg(pm4, R_028800_DB_DEPTH_CONTROL, db_depth_control);
si_pm4_set_reg(pm4, R_028000_DB_RENDER_CONTROL, db_render_control);
si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, db_render_override);
+   si_pm4_set_reg(pm4, R_02842C_DB_STENCIL_CONTROL, db_stencil_control);
si_pm4_set_reg(pm4, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0);
si_pm4_set_reg(pm4, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0);
si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0);
@@ -2237,35 +2260,6 @@ static void si_set_so_targets(struct pipe_context *ctx,
 /*
  * Misc
  */
-#if 0
-static uint32_t r600_translate_stencil_op(int s_op)
-{
-   switch (s_op) {
-   case PIPE_STENCIL_OP_KEEP:
-   return V_028800_STENCIL_KEEP;
-   

[Mesa-dev] [PATCH 8/8] radeonsi: fix db and stencil setup v2

[Christian König]

v2: fix tiling for small pitches, that finally makes
glxgears and readPixSanity work

Signed-off-by: Christian König deathsim...@vodafone.de
---
 src/gallium/drivers/radeonsi/r600_resource.h |1 -
 src/gallium/drivers/radeonsi/r600_texture.c  |   22 --
 src/gallium/drivers/radeonsi/si_state.c  |  102 +++---
 3 files changed, 58 insertions(+), 67 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/r600_resource.h 
b/src/gallium/drivers/radeonsi/r600_resource.h
index b4427a1..678bf12 100644
--- a/src/gallium/drivers/radeonsi/r600_resource.h
+++ b/src/gallium/drivers/radeonsi/r600_resource.h
@@ -55,7 +55,6 @@ struct r600_resource_texture {
unsignedsize;
unsigneddepth;
unsigneddirty_db;
-   struct r600_resource_texture*stencil; /* Stencil is in a separate 
buffer on Evergreen. */
struct r600_resource_texture*flushed_depth_texture;
boolean is_flushing_texture;
struct radeon_surface   surface;
diff --git a/src/gallium/drivers/radeonsi/r600_texture.c 
b/src/gallium/drivers/radeonsi/r600_texture.c
index 38ff36d..e34247e 100644
--- a/src/gallium/drivers/radeonsi/r600_texture.c
+++ b/src/gallium/drivers/radeonsi/r600_texture.c
@@ -485,9 +485,6 @@ static void r600_texture_destroy(struct pipe_screen *screen,
if (rtex-flushed_depth_texture)
si_resource_reference(rtex-flushed_depth_texture, NULL);
 
-   if (rtex-stencil)
-   si_resource_reference(rtex-stencil, NULL);
-
pb_reference(resource-buf, NULL);
FREE(rtex);
 }
@@ -543,19 +540,6 @@ r600_texture_create_object(struct pipe_screen *screen,
return NULL;
}
 
-   /* If we initialized separate stencil for Evergreen. place it after 
depth. */
-   if (rtex-stencil) {
-   unsigned stencil_align, stencil_offset;
-
-   stencil_align = r600_get_base_alignment(screen, 
rtex-stencil-real_format, array_mode);
-   stencil_offset = align(rtex-size, stencil_align);
-
-   for (unsigned i = 0; i = 
rtex-stencil-resource.b.b.last_level; i++)
-   rtex-stencil-offset[i] += stencil_offset;
-
-   rtex-size = stencil_offset + rtex-stencil-size;
-   }
-
/* Now create the backing buffer. */
if (!buf  alloc_bo) {
struct pipe_resource *ptex = rtex-resource.b.b;
@@ -563,7 +547,6 @@ r600_texture_create_object(struct pipe_screen *screen,
 
base_align = rtex-surface.bo_alignment;
if (!r600_init_resource(rscreen, resource, rtex-size, 
base_align, base-bind, base-usage)) {
-   si_resource_reference(rtex-stencil, NULL);
FREE(rtex);
return NULL;
}
@@ -573,11 +556,6 @@ r600_texture_create_object(struct pipe_screen *screen,
resource-domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM;
}
 
-   if (rtex-stencil) {
-   pb_reference(rtex-stencil-resource.buf, rtex-resource.buf);
-   rtex-stencil-resource.cs_buf = rtex-resource.cs_buf;
-   rtex-stencil-resource.domains = rtex-resource.domains;
-   }
return rtex;
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index b2dabf5..94b8b43 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1504,9 +1504,9 @@ static void si_db(struct r600_context *rctx, struct 
si_pm4_state *pm4,
 {
struct r600_resource_texture *rtex;
struct r600_surface *surf;
-   unsigned level, first_layer, pitch, slice, format;
-   uint32_t db_z_info, stencil_info;
-   uint64_t offset;
+   unsigned level, pitch, slice, format;
+   uint32_t z_info, s_info;
+   uint64_t z_offs, s_offs;
 
if (state-zsbuf == NULL) {
si_pm4_set_reg(pm4, R_028040_DB_Z_INFO, 0);
@@ -1518,67 +1518,81 @@ static void si_db(struct r600_context *rctx, struct 
si_pm4_state *pm4,
level = surf-base.u.tex.level;
rtex = (struct r600_resource_texture*)surf-base.texture;
 
-   first_layer = surf-base.u.tex.first_layer;
format = si_translate_dbformat(rtex-real_format);
 
-   offset = r600_resource_va(rctx-context.screen, surf-base.texture);
-   offset += rtex-surface.level[level].offset;
+   z_offs = r600_resource_va(rctx-context.screen, surf-base.texture);
+   z_offs += rtex-surface.level[level].offset;
+
+   s_offs = r600_resource_va(rctx-context.screen, surf-base.texture);
+   s_offs += rtex-surface.stencil_offset;
+   z_offs += rtex-surface.level[level].offset / 4;
+
+   z_offs = 8;
+   s_offs = 8;
+
pitch = (rtex-surface.level[level].nblk_x / 8) - 1;
slice = (rtex-surface.level[level].nblk_x * 

[Mesa-dev] [Bug 52962] New: gbm.c:54:4: error: implicit declaration of function ‘pipe_loader_drm_probe_fd’

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52962

 Bug #: 52962
   Summary: gbm.c:54:4: error: implicit declaration of function
‘pipe_loader_drm_probe_fd’
Classification: Unclassified
   Product: Mesa
   Version: git
  Platform: Other
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Other
AssignedTo: mesa-dev@lists.freedesktop.org
ReportedBy: chith...@gentoo.org


Created attachment 64950
  -- https://bugs.freedesktop.org/attachment.cgi?id=64950
build.log

Mesa from today's git, configured with

./configure --prefix=/usr --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --mandir=/usr/share/man --infodir=/usr/share/info
--datadir=/usr/share --sysconfdir=/etc --localstatedir=/var/lib
--libdir=/usr/lib64 --disable-dependency-tracking --enable-dri --enable-glx
--enable-texture-float --disable-debug --enable-egl --enable-gbm
--disable-gles1 --enable-gles2 --enable-glx-tls --disable-osmesa --enable-asm
--enable-shared-glapi --enable-xa --enable-xorg
--with-dri-drivers=,swrast,i915,i965 --with-gallium-drivers=,swrast,i915
--with-egl-platforms=x11,drm --enable-gallium-egl --disable-d3d1x
--enable-gallium-g3dvl --enable-gallium-llvm --enable-openvg
--disable-r600-llvm-compiler --disable-vdpau --enable-xvmc

will fail to build in:

gbm.c: In function ‘gallium_screen_create’:
gbm.c:54:4: error: implicit declaration of function ‘pipe_loader_drm_probe_fd’
gmake[3]: *** [gbm.o] Error 1

This is due to i915g not defining -DHAVE_PIPE_LOADER_DRM
A workaround is to add gallium_require_drm_loader statement to i915 in
configure.ac (or additionally enabling one driver that already has it).

Or one could check in gbm.c for HAVE_PIPE_LOADER_DRM before calling
pipe_loader_drm_probe_fd().

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[Mesa-dev] [Bug 52962] gbm.c:54:4: error: implicit declaration of function ‘pipe_loader_drm_probe_fd’

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52962

Chi-Thanh Christopher Nguyen chith...@gentoo.org changed:

   What|Removed |Added

   See Also||https://bugs.gentoo.org/sho
   ||w_bug.cgi?id=428508

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Re: [Mesa-dev] [PATCH 4/8] radeonsi: fix dummy export in shaders

[Michel Dänzer]

On Mon, 2012-07-30 at 12:31 +0200, Christian König wrote: 
 Signed-off-by: Christian König deathsim...@vodafone.de
 ---
  src/gallium/drivers/radeonsi/radeonsi_shader.c |   17 +
  1 file changed, 17 insertions(+)
 
 diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c 
 b/src/gallium/drivers/radeonsi/radeonsi_shader.c
 index 66050d3..67a5465 100644
 --- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
 +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
 @@ -475,6 +475,23 @@ static void si_llvm_emit_epilogue(struct 
 lp_build_tgsi_context * bld_base)
   }
   }
  
 + if (!last_args[0]) {
 + /* Specify which components to enable */
 + last_args[0] = lp_build_const_int32(base-gallivm, 0x0);
 +
 + /* Specify the target we are exporting */
 + last_args[3] = lp_build_const_int32(base-gallivm, 
 V_008DFC_SQ_EXP_MRT);
 +
 + /* Set COMPR flag to zero to export data as 32-bit */
 + last_args[4] = uint-zero;
 +
 + /* dummy bits */
 + last_args[5]= uint-zero;
 + last_args[6]= uint-zero;
 + last_args[7]= uint-zero;
 + last_args[8]= uint-zero;
 + }

I'd add

   assert(si_shader_ctx-type == TGSI_PROCESSOR_FRAGMENT);

in the new block, as the vertex shader is required to export at least
one position.

Either way though, the series is

Reviewed-by: Michel Dänzer michel.daen...@amd.com


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Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast |  Debian, X and DRI developer
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Re: [Mesa-dev] [PATCH] mesa: loosen small matrix determinant check

[Patrick Baggett]

On Mon, Jul 30, 2012 at 4:31 AM, Pekka Paalanen ppaala...@gmail.com wrote:

 On Tue, 24 Jul 2012 11:31:59 -0600
 Brian Paul bri...@vmware.com wrote:

  When computing a matrix inverse, if the determinant is too small we
 could hit
  a divide by zero.  There's a check to prevent this (we basically give up
 on
  computing the inverse and return the identity matrix.)  This patches
 loosens
  this test to fix a lighting bug reported by Lars Henning Wendt.
 
  NOTE: This is a candidate for the 8.0 branch.
  ---
   src/mesa/math/m_matrix.c |2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)
 
  diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
  index 02aedba..ef377ee 100644
  --- a/src/mesa/math/m_matrix.c
  +++ b/src/mesa/math/m_matrix.c
  @@ -513,7 +513,7 @@ static GLboolean invert_matrix_3d_general( GLmatrix
 *mat )
 
  det = pos + neg;
 
  -   if (det*det  1e-25)
  +   if (det  1e-25)
 return GL_FALSE;
 
  det = 1.0F / det;

 Hi,

 just a fly-by question; doesn't that break if determinant is negative?
 I.e. reflection transformations.

 Yeah, I think you need a fabsf() there.
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Re: [Mesa-dev] [PATCH] mesa: loosen small matrix determinant check

[Brian Paul]

On Mon, Jul 30, 2012 at 7:39 AM, Patrick Baggett
baggett.patr...@gmail.com wrote:


 On Mon, Jul 30, 2012 at 4:31 AM, Pekka Paalanen ppaala...@gmail.com wrote:

 On Tue, 24 Jul 2012 11:31:59 -0600
 Brian Paul bri...@vmware.com wrote:

  When computing a matrix inverse, if the determinant is too small we
  could hit
  a divide by zero.  There's a check to prevent this (we basically give up
  on
  computing the inverse and return the identity matrix.)  This patches
  loosens
  this test to fix a lighting bug reported by Lars Henning Wendt.
 
  NOTE: This is a candidate for the 8.0 branch.
  ---
   src/mesa/math/m_matrix.c |2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)
 
  diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
  index 02aedba..ef377ee 100644
  --- a/src/mesa/math/m_matrix.c
  +++ b/src/mesa/math/m_matrix.c
  @@ -513,7 +513,7 @@ static GLboolean invert_matrix_3d_general( GLmatrix
  *mat )
 
  det = pos + neg;
 
  -   if (det*det  1e-25)
  +   if (det  1e-25)
 return GL_FALSE;
 
  det = 1.0F / det;

 Hi,

 just a fly-by question; doesn't that break if determinant is negative?
 I.e. reflection transformations.

 Yeah, I think you need a fabsf() there.

v2 of the patch used abs() and was pushed a while ago.

-Brian
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[Mesa-dev] [Bug 52970] New: Requesting to be added to the mesa and nouveau groups

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52970

 Bug #: 52970
   Summary: Requesting to be added to the mesa and nouveau groups
Classification: Unclassified
   Product: Mesa
   Version: unspecified
  Platform: Other
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Other
AssignedTo: mesa-dev@lists.freedesktop.org
ReportedBy: m.b.lankho...@gmail.com


Hey,

I would like to be added to the mesa group so I can commit patches to libdrm
directly, and to mesa after review. Need an ack from mesa for that. :)

Also when my account was initially created I didn't get added to the nouveau
grou, so could I be added to that as well?

~Maarten

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Re: [Mesa-dev] [PATCH] mesa: Fix wrong sizeof argument in _math_matrix_copy.

[Brian Paul]

On Sun, Jul 29, 2012 at 6:54 PM, Vinson Lee v...@freedesktop.org wrote:
 Fixes Coverity wrong sizeof argument defect.

 Signed-off-by: Vinson Lee v...@freedesktop.org
 ---
  src/mesa/math/m_matrix.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
 index 40f9229..7c4e9fd 100644
 --- a/src/mesa/math/m_matrix.c
 +++ b/src/mesa/math/m_matrix.c
 @@ -1437,7 +1437,7 @@ void
  _math_matrix_copy( GLmatrix *to, const GLmatrix *from )
  {
 memcpy( to-m, from-m, sizeof(Identity) );
 -   memcpy(to-inv, from-inv, sizeof(from-inv));
 +   memcpy(to-inv, from-inv, sizeof(*from-inv));
 to-flags = from-flags;
 to-type = from-type;
  }

It would probably be good to update the preceding line as well.  It's
kind of weird to use sizeof(X) when X isn't the source or dest to the
memcpy().

-Brian
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[Mesa-dev] [Bug 52970] Requesting to be added to the mesa and nouveau groups

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52970

Brian Paul brian.e.p...@gmail.com changed:

   What|Removed |Added

 AssignedTo|mesa-dev@lists.freedesktop. |sitewranglers@lists.freedes
   |org |ktop.org
Product|Mesa|freedesktop.org
  Component|Other   |New Accounts

--- Comment #1 from Brian Paul brian.e.p...@gmail.com 2012-07-30 14:06:10 UTC 
---
Reassigning to the admins...

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Re: [Mesa-dev] [PATCH] mesa: Fix wrong sizeof argument in _math_matrix_copy.

[Brian Paul]

On Mon, Jul 30, 2012 at 7:59 AM, Brian Paul brian.e.p...@gmail.com wrote:
 On Sun, Jul 29, 2012 at 6:54 PM, Vinson Lee v...@freedesktop.org wrote:
 Fixes Coverity wrong sizeof argument defect.

 Signed-off-by: Vinson Lee v...@freedesktop.org
 ---
  src/mesa/math/m_matrix.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
 index 40f9229..7c4e9fd 100644
 --- a/src/mesa/math/m_matrix.c
 +++ b/src/mesa/math/m_matrix.c
 @@ -1437,7 +1437,7 @@ void
  _math_matrix_copy( GLmatrix *to, const GLmatrix *from )
  {
 memcpy( to-m, from-m, sizeof(Identity) );
 -   memcpy(to-inv, from-inv, sizeof(from-inv));
 +   memcpy(to-inv, from-inv, sizeof(*from-inv));
 to-flags = from-flags;
 to-type = from-type;
  }

Vinson, I've pushed your patch since there was already a bug report about this.


 It would probably be good to update the preceding line as well.  It's
 kind of weird to use sizeof(X) when X isn't the source or dest to the
 memcpy().

I'll post a patch to fix this and clean up a few other cases.

-Brian
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Re: [Mesa-dev] [PATCH] mesa: Fix wrong sizeof argument in _math_matrix_copy.

[Jose Fonseca]

- Original Message -
 On Sun, Jul 29, 2012 at 6:54 PM, Vinson Lee v...@freedesktop.org
 wrote:
  Fixes Coverity wrong sizeof argument defect.
 
  Signed-off-by: Vinson Lee v...@freedesktop.org
  ---
   src/mesa/math/m_matrix.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
 
  diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
  index 40f9229..7c4e9fd 100644
  --- a/src/mesa/math/m_matrix.c
  +++ b/src/mesa/math/m_matrix.c
  @@ -1437,7 +1437,7 @@ void
   _math_matrix_copy( GLmatrix *to, const GLmatrix *from )
   {
  memcpy( to-m, from-m, sizeof(Identity) );
  -   memcpy(to-inv, from-inv, sizeof(from-inv));
  +   memcpy(to-inv, from-inv, sizeof(*from-inv));
  to-flags = from-flags;
  to-type = from-type;
   }
 
 It would probably be good to update the preceding line as well.  It's
 kind of weird to use sizeof(X) when X isn't the source or dest to the
 memcpy().

Now you mention it, there is a reason for it.

This is the definition of GLmatrix:

  typedef struct {
 GLfloat *m;  /** 16 matrix elements (16-byte aligned) */
 GLfloat *inv;/** optional 16-element inverse (16-byte aligned) */
 GLuint flags;/** possible values determined by (of \link
   * MatFlags MAT_FLAG_* flags\endlink)
   */
 enum GLmatrixtype type;
  } GLmatrix;

Therefore 

   memcpy(to-inv, from-inv, sizeof(from-inv));

or 

   memcpy(to-inv, from-inv, sizeof(*from-inv));

are busted, as none properly copies the full 16 elements.

Therefore, this

  memcpy(to-inv, from-inv, sizeof(Identity);

is how the memcpy should be done.

Jose
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Re: [Mesa-dev] [PATCH 1/2] r600g: add htile support v9

[Jerome Glisse]

On Sun, Jul 29, 2012 at 1:50 PM, Marek Olšák mar...@gmail.com wrote:
 On Tue, Jul 17, 2012 at 7:58 PM,  j.gli...@gmail.com wrote:
 From: Jerome Glisse jgli...@redhat.com

 htile is used for HiZ and HiS support and fast Z/S clears.
 This commit just adds the htile setup and Fast Z clear.
 We don't take full advantage of HiS with that patch.

 v2 really use fast clear, still random issue with some tiles
need to try more flush combination, fix depth/stencil
texture decompression
 v3 fix random issue on r6xx/r7xx
 v4 rebase on top of lastest mesa, disable CB export when clearing
htile surface to avoid wasting bandwidth
 v5 resummarize htile surface when uploading z value. Fix z/stencil
decompression, the custom blitter with custom dsa is no longer
needed.
 v6 Reorganize render control/override update mecanism, fixing more
issues in the process.
 v7 Add nop after depth surface base update to work around some htile
flushing issue. For htile to 8x8 on r6xx/r7xx as other combination
have issue. Do not enable hyperz when flushing/uncompressing
depth buffer.
 v8 Fix htile surface, preload and prefetch setup. Only set preload
and prefetch on htile surface clear like fglrx. Record depth
clear value per level. Support several level for the htile
surface. First depth clear can't be a fast clear.
 v9 Fix comments, properly account new register in emit function,
disable fast zclear if clearing different layer of texture
array to different value

 Signed-off-by: Pierre-Eric Pelloux-Prayer pell...@gmail.com
 Signed-off-by: Alex Deucher alexander.deuc...@amd.com
 Signed-off-by: Jerome Glisse jgli...@redhat.com
 ---
  src/gallium/drivers/r600/evergreen_hw_context.c |6 +
  src/gallium/drivers/r600/evergreen_state.c  |  102 -
  src/gallium/drivers/r600/evergreend.h   |4 +
  src/gallium/drivers/r600/r600_blit.c|   38 +++
  src/gallium/drivers/r600/r600_hw_context.c  |   25 +
  src/gallium/drivers/r600/r600_pipe.c|8 ++
  src/gallium/drivers/r600/r600_pipe.h|   13 ++-
  src/gallium/drivers/r600/r600_resource.h|7 ++
  src/gallium/drivers/r600/r600_state.c   |  133 
 ---
  src/gallium/drivers/r600/r600_texture.c |  103 ++
  src/gallium/drivers/r600/r600d.h|6 +
  11 files changed, 399 insertions(+), 46 deletions(-)

 diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c 
 b/src/gallium/drivers/r600/evergreen_hw_context.c
 index 081701f..546c884 100644
 --- a/src/gallium/drivers/r600/evergreen_hw_context.c
 +++ b/src/gallium/drivers/r600/evergreen_hw_context.c
 @@ -62,6 +62,9 @@ static const struct r600_reg evergreen_context_reg_list[] 
 = {
 {GROUP_FORCE_NEW_BLOCK, 0, 0},
 {R_028058_DB_DEPTH_SIZE, 0, 0},
 {R_02805C_DB_DEPTH_SLICE, 0, 0},
 +   {R_02802C_DB_DEPTH_CLEAR, 0, 0},
 +   {R_028ABC_DB_HTILE_SURFACE, 0, 0},
 +   {R_028AC8_DB_PRELOAD_CONTROL, 0, 0},
 {R_028204_PA_SC_WINDOW_SCISSOR_TL, 0, 0},
 {R_028208_PA_SC_WINDOW_SCISSOR_BR, 0, 0},
 {R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
 @@ -319,6 +322,9 @@ static const struct r600_reg cayman_context_reg_list[] = 
 {
 {GROUP_FORCE_NEW_BLOCK, 0, 0},
 {R_028058_DB_DEPTH_SIZE, 0, 0},
 {R_02805C_DB_DEPTH_SLICE, 0, 0},
 +   {R_02802C_DB_DEPTH_CLEAR, 0, 0},
 +   {R_028ABC_DB_HTILE_SURFACE, 0, 0},
 +   {R_028AC8_DB_PRELOAD_CONTROL, 0, 0},
 {R_028204_PA_SC_WINDOW_SCISSOR_TL, 0, 0},
 {R_028208_PA_SC_WINDOW_SCISSOR_BR, 0, 0},
 {R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
 diff --git a/src/gallium/drivers/r600/evergreen_state.c 
 b/src/gallium/drivers/r600/evergreen_state.c
 index a66387b..214d76b 100644
 --- a/src/gallium/drivers/r600/evergreen_state.c
 +++ b/src/gallium/drivers/r600/evergreen_state.c
 @@ -710,13 +710,15 @@ static void *evergreen_create_blend_state(struct 
 pipe_context *ctx,
 }
 blend-cb_target_mask = target_mask;

 -   if (target_mask)
 +   if (target_mask) {
 color_control |= S_028808_MODE(V_028808_CB_NORMAL);
 -   else
 +   } else {
 color_control |= S_028808_MODE(V_028808_CB_DISABLE);
 +   }

 r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
 color_control);
 +
 /* only have dual source on MRT0 */
 blend-dual_src_blend = util_blend_state_is_dual(state, 0);
 for (int i = 0; i  8; i++) {
 @@ -1668,6 +1670,26 @@ static void evergreen_db(struct r600_context *rctx, 
 struct r600_pipe_state *rsta
 }
 }

 +   /* hyperz */
 +   if (rtex-hyperz) {
 +   uint64_t htile_offset = 
 rtex-hyperz-surface.level[level].offset;
 +
 +   rctx-db_misc_state.hyperz = true;
 +   rctx-db_misc_state.db_htile_surface_mask = 0x;
 +

Re: [Mesa-dev] [PATCH] gbm : Fix build for wayland include

[Kristian Høgsberg]

On Thu, Jul 19, 2012 at 01:54:05PM +0900, Elvis Lee wrote:
 backends/gbm_dri.c fails to find wayland-server.h.

Thanks, pushed.

 Signed-off-by: Elvis Lee kwangwoong@lge.com
 ---
  src/gbm/Makefile.am |1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/src/gbm/Makefile.am b/src/gbm/Makefile.am
 index 5ca2839..f079da1 100644
 --- a/src/gbm/Makefile.am
 +++ b/src/gbm/Makefile.am
 @@ -22,6 +22,7 @@ libgbm_la_LIBADD = $(LIBUDEV_LIBS) $(DLOPEN_LIBS)
  
  if HAVE_EGL_PLATFORM_WAYLAND
  AM_CPPFLAGS = -DHAVE_WAYLAND_PLATFORM
 +AM_CFLAGS += $(WAYLAND_CFLAGS)
  endif
  
  if HAVE_DRI
 -- 
 1.7.9.5
 
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[Mesa-dev] [PATCH 4/5] __DRIimage: version 6, add new picture structure.

[Gwenole Beauchesne]

The addition in version 6 enables creating EGLImages with different picture
structure for supporting interlaced textures. The new flags are only valid
in createSubImage() format field. Should the driver support those, it should
report version as 6, and determe the underlying picture format by masking
out the picture structure flags.

Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
 include/GL/internal/dri_interface.h |7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/GL/internal/dri_interface.h 
b/include/GL/internal/dri_interface.h
index d3a66c5..658566d 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -912,7 +912,7 @@ struct __DRIdri2ExtensionRec {
  * extensions.
  */
 #define __DRI_IMAGE DRI_IMAGE
-#define __DRI_IMAGE_VERSION 5
+#define __DRI_IMAGE_VERSION 6
 
 /**
  * These formats correspond to the similarly named MESA_FORMAT_*
@@ -933,6 +933,11 @@ struct __DRIdri2ExtensionRec {
 #define __DRI_IMAGE_FORMAT_GR88 0x1007
 #define __DRI_IMAGE_FORMAT_NONE 0x1008
 
+#define __DRI_IMAGE_STRUCTURE_MASK  0xc000 /* Since version 6 */
+#define __DRI_IMAGE_STRUCTURE_FRAME 0x
+#define __DRI_IMAGE_STRUCTURE_TOP_FIELD 0x4000
+#define __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD 0x8000
+
 #define __DRI_IMAGE_USE_SHARE  0x0001
 #define __DRI_IMAGE_USE_SCANOUT0x0002
 #define __DRI_IMAGE_USE_CURSOR 0x0004
-- 
1.7.9.5

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[Mesa-dev] [PATCH 0/5] wayland: handle interlaced pictures

[Gwenole Beauchesne]

Hi,

Here is series of patches that brings support for interlaced surfaces in
Wayland. Current implementation involves Intel GenX driver.

Patch 1 makes it possible to attach a picture-structure property to
Wayland/DRM buffers. The way to do so has the benefit of allowing this
property to RGB surfaces too.

Patch 3 is not strictly needed but introduces a query option for this
picture-structure property. This is implemented with a new
EGL_TEXTURE_STRUCTURE_WL token.

Patch 4 adds the new picture structure flags to DRIimage. I didn't want to
change the createSubImage() interface, so I just chose to add new flags. Those
flags are to be combined with the actual image format. I don't mind either
way.

Patch 5 implements deinterlacing in Gen driver. Only tested on Ivy Bridge.

Regards,
Gwenole Beauchesne (5):
  wayland-drm: add picture structure.
  wayland: handle picture structure.
  wayland: support EGL_TEXTURE_STRUCTURE_WL queries for wl_buffer.
  __DRIimage: version 6, add new picture structure.
  intel: implement picture structure.

 include/EGL/eglmesaext.h  |5 +++
 include/GL/internal/dri_interface.h   |8 -
 src/egl/drivers/dri2/egl_dri2.c   |   36 -
 src/egl/wayland/wayland-drm/wayland-drm.c |   22 -
 src/egl/wayland/wayland-drm/wayland-drm.h |   10 ++
 src/egl/wayland/wayland-drm/wayland-drm.xml   |   19 +++
 src/mesa/drivers/dri/i965/brw_defines.h   |2 ++
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |   22 -
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |   15 +++--
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c|1 +
 src/mesa/drivers/dri/intel/intel_mipmap_tree.h|4 +++
 src/mesa/drivers/dri/intel/intel_screen.c |6 ++--
 src/mesa/drivers/dri/intel/intel_tex_image.c  |   10 --
 13 files changed, 148 insertions(+), 12 deletions(-)

-- 
1.7.9.5

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[Mesa-dev] [PATCH 1/5] wayland-drm: add picture structure.

[Gwenole Beauchesne]

Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
 src/egl/wayland/wayland-drm/wayland-drm.c   |   22 +-
 src/egl/wayland/wayland-drm/wayland-drm.h   |   10 ++
 src/egl/wayland/wayland-drm/wayland-drm.xml |   19 +++
 3 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/src/egl/wayland/wayland-drm/wayland-drm.c 
b/src/egl/wayland/wayland-drm/wayland-drm.c
index 45b307f..8eaa57a 100644
--- a/src/egl/wayland/wayland-drm/wayland-drm.c
+++ b/src/egl/wayland/wayland-drm/wayland-drm.c
@@ -112,6 +112,7 @@ create_buffer(struct wl_client *client, struct wl_resource 
*resource,
buffer-buffer.width = width;
buffer-buffer.height = height;
buffer-format = format;
+   buffer-picture_structure = WL_DRM_PICTURE_STRUCTURE_FRAME;
buffer-offset[0] = offset0;
buffer-stride[0] = stride0;
buffer-offset[1] = offset1;
@@ -190,6 +191,24 @@ drm_create_planar_buffer(struct wl_client *client,
 }
 
 static void
+drm_buffer_set_picture_structure(struct wl_client *client,
+ struct wl_resource *resource,
+ struct wl_resource *buffer_resource,
+ uint32_t picture_structure)
+{
+struct wl_drm_buffer * const buffer = buffer_resource-data;
+
+if (!wayland_buffer_is_drm(buffer-buffer)) {
+wl_resource_post_error(resource,
+   WL_DRM_ERROR_INVALID_BUFFER,
+   invalid buffer);
+return;
+}
+
+buffer-picture_structure = picture_structure;
+}
+
+static void
 drm_authenticate(struct wl_client *client,
 struct wl_resource *resource, uint32_t id)
 {
@@ -206,7 +225,8 @@ drm_authenticate(struct wl_client *client,
 const static struct wl_drm_interface drm_interface = {
drm_authenticate,
drm_create_buffer,
-drm_create_planar_buffer
+drm_create_planar_buffer,
+drm_buffer_set_picture_structure
 };
 
 static void
diff --git a/src/egl/wayland/wayland-drm/wayland-drm.h 
b/src/egl/wayland/wayland-drm/wayland-drm.h
index 3e8f951..25b5292 100644
--- a/src/egl/wayland/wayland-drm/wayland-drm.h
+++ b/src/egl/wayland/wayland-drm/wayland-drm.h
@@ -67,12 +67,22 @@ enum wl_drm_format {
 };
 #endif /* WL_DRM_FORMAT_ENUM */
 
+#ifndef WL_DRM_PICTURE_STRUCTURE_ENUM
+#define WL_DRM_PICTURE_STRUCTURE_ENUM
+enum wl_drm_picture_structure {
+   WL_DRM_PICTURE_STRUCTURE_FRAME = 0,
+   WL_DRM_PICTURE_STRUCTURE_TOP_FIELD = 1,
+   WL_DRM_PICTURE_STRUCTURE_BOTTOM_FIELD = 2,
+};
+#endif /* WL_DRM_PICTURE_STRUCTURE_ENUM */
+
 struct wl_drm;
 
 struct wl_drm_buffer {
struct wl_buffer buffer;
struct wl_drm *drm;
uint32_t format;
+   uint32_t picture_structure;
 const void *driver_format;
 int32_t offset[3];
 int32_t stride[3];
diff --git a/src/egl/wayland/wayland-drm/wayland-drm.xml 
b/src/egl/wayland/wayland-drm/wayland-drm.xml
index 265d4f8..b31acd4 100644
--- a/src/egl/wayland/wayland-drm/wayland-drm.xml
+++ b/src/egl/wayland/wayland-drm/wayland-drm.xml
@@ -34,6 +34,7 @@
   entry name=authenticate_fail value=0/
   entry name=invalid_format value=1/
   entry name=invalid_name value=2/
+  entry name=invalid_buffer value=3/
 /enum
 
 enum name=format
@@ -100,6 +101,18 @@
   entry name=yvu444 value=0x34325659/
 /enum
 
+enum name=picture_structure
+  description summary=buffer picture structure
+Picture structure.
+  /description
+  entry name=frame value=0
+ summary=Buffer represents the whole frame/
+  entry name=top_field value=1
+ summary=Buffer represents the top field/
+  entry name=bottom_field value=2
+ summary=Buffer represents the bottom field/
+/enum
+
 !-- Call this request with the magic received from drmGetMagic().
  It will be passed on to the drmAuthMagic() or
  DRIAuthConnection() call.  This authentication must be
@@ -135,6 +148,12 @@
   arg name=stride2 type=int/
 /request
 
+!-- Assign picture structure to DRM buffer --
+request name=buffer_set_picture_structure
+  arg name=buffer type=object interface=wl_buffer/
+  arg name=picture_structure type=uint/
+/request
+
 !-- Notification of the path of the drm device which is used by
  the server.  The client should use this device for creating
  local buffers.  Only buffers created from this device should
-- 
1.7.9.5

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[Mesa-dev] [PATCH 5/5] intel: implement picture structure.

[Gwenole Beauchesne]

Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
 include/GL/internal/dri_interface.h   |1 +
 src/mesa/drivers/dri/i965/brw_defines.h   |2 ++
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |   22 -
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |   15 --
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c|1 +
 src/mesa/drivers/dri/intel/intel_mipmap_tree.h|4 
 src/mesa/drivers/dri/intel/intel_screen.c |6 +++---
 src/mesa/drivers/dri/intel/intel_tex_image.c  |   10 +++---
 8 files changed, 52 insertions(+), 9 deletions(-)

diff --git a/include/GL/internal/dri_interface.h 
b/include/GL/internal/dri_interface.h
index 658566d..1af2223 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -924,6 +924,7 @@ struct __DRIdri2ExtensionRec {
  * by the driver (YUV planar formats) but serve as a base image for
  * creating sub-images for the different planes within the image.
  */
+#define __DRI_IMAGE_FORMAT_MASK 0x1fff
 #define __DRI_IMAGE_FORMAT_RGB565   0x1001
 #define __DRI_IMAGE_FORMAT_XRGB 0x1002
 #define __DRI_IMAGE_FORMAT_ARGB 0x1003
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 73ade0a..482f132 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -261,6 +261,8 @@
 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW   0
 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT   1
 #define BRW_SURFACE_CUBEFACE_ENABLES   0x3f
+#define BRW_SURFACE_VERT_LINE_STRIDE_SHIFT 12
+#define BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT 11
 #define BRW_SURFACE_BLEND_ENABLED  (1  13)
 #define BRW_SURFACE_WRITEDISABLE_B_SHIFT   14
 #define BRW_SURFACE_WRITEDISABLE_G_SHIFT   15
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 65ca2fc..d7c94e1 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -720,7 +720,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint 
unit )
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
uint32_t *surf;
-   int width, height, depth;
+   int width, height, depth, vert_line_stride_ofs, vert_line_stride;
 
if (tObj-Target == GL_TEXTURE_BUFFER) {
   brw_update_buffer_texture_surface(ctx, unit);
@@ -729,11 +729,31 @@ brw_update_texture_surface( struct gl_context *ctx, 
GLuint unit )
 
intel_miptree_get_dimensions_for_image(firstImage, width, height, depth);
 
+   /* Interlaced surface
+* XXX: texture addrss control mode must be set to TEXCOORDMODE_CLAMP
+* XXX: mip mode filter must be set to MIPFILTER_NONE
+*/
+   switch (mt-structure) {
+   case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+  vert_line_stride_ofs = 1;
+  /* fall-through */
+   case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+  vert_line_stride = 1;
+  height /= 2;
+  break;
+   default:
+  vert_line_stride = 0;
+  vert_line_stride_ofs = 0;
+  break;
+   }
+
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
  6 * 4, 32, brw-wm.surf_offset[surf_index]);
 
surf[0] = (translate_tex_target(tObj-Target)  BRW_SURFACE_TYPE_SHIFT |
  BRW_SURFACE_MIPMAPLAYOUT_BELOW  BRW_SURFACE_MIPLAYOUT_SHIFT |
+ vert_line_stride  BRW_SURFACE_VERT_LINE_STRIDE_SHIFT |
+ vert_line_stride_ofs  BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT |
  BRW_SURFACE_CUBEFACE_ENABLES |
  (translate_tex_format(mt-format,
firstImage-InternalFormat,
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 62d2be8..d4e0e56 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -309,11 +309,22 @@ gen7_update_texture_surface(struct gl_context *ctx, 
GLuint unit)
 
surf-ss0.is_array = depth  1  tObj-Target != GL_TEXTURE_3D;
 
+   /* Interlaced surface
+* XXX: mip mode filter must be set to MIPFILTER_NONE
+*/
+   switch (mt-structure) {
+   case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+  surf-ss0.vert_line_stride_ofs = 1;
+  /* fall-through */
+   case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+  surf-ss0.vert_line_stride = 1;
+  height /= 2;
+  break;
+   }
+
gen7_set_surface_tiling(surf, intelObj-mt-region-tiling);
 
/* ss0 remaining fields:
-* - vert_line_stride (exists on gen6 but we ignore it)
-* - vert_line_stride_ofs (exists on gen6 but we ignore it)
 * - surface_array_spacing
 * - render_cache_read_write (exists on gen6 but ignored here)
 */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c 

[Mesa-dev] [PATCH 2/5] wayland: handle picture structure.

[Gwenole Beauchesne]

Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
 src/egl/drivers/dri2/egl_dri2.c |   21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index f86ed0b..4ae2856 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1135,7 +1135,7 @@ dri2_create_image_wayland_wl_buffer(_EGLDisplay *disp, 
_EGLContext *ctx,
EGLint err;
uint32_t format;
int32_t offset, stride, plane, width, height;
-   int cpp, index;
+   int cpp, index, structure;
const struct wl_drm_format_descriptor *f;
 
if (!wayland_buffer_is_drm(buffer-buffer))
@@ -1148,6 +1148,22 @@ dri2_create_image_wayland_wl_buffer(_EGLDisplay *disp, 
_EGLContext *ctx,
   return NULL;
}
 
+   switch (buffer-picture_structure) {
+   case WL_DRM_PICTURE_STRUCTURE_FRAME:
+  structure = __DRI_IMAGE_STRUCTURE_FRAME;
+  break;
+   case WL_DRM_PICTURE_STRUCTURE_TOP_FIELD:
+  structure = __DRI_IMAGE_STRUCTURE_TOP_FIELD;
+  break;
+   case WL_DRM_PICTURE_STRUCTURE_BOTTOM_FIELD:
+  structure = __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD;
+  break;
+   default:
+  _eglError(EGL_BAD_PARAMETER,
+dri2_create_image_wayland_wl_buffer (invalid picture 
structure));
+  return NULL;
+   }
+
f = buffer-driver_format;
if (plane  0 || plane = f-nplanes) {
   _eglError(EGL_BAD_PARAMETER,
@@ -1163,6 +1179,9 @@ dri2_create_image_wayland_wl_buffer(_EGLDisplay *disp, 
_EGLContext *ctx,
offset = buffer-offset[index];
stride = buffer-stride[index];
 
+   if (dri2_dpy-image-base.version = 6)
+  format |= structure;
+
dri_image = dri2_dpy-image-createSubImage(buffer-driver_buffer,
width, height, format,
offset, stride / cpp, NULL);
-- 
1.7.9.5

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[Mesa-dev] [PATCH 3/5] wayland: support EGL_TEXTURE_STRUCTURE_WL queries for wl_buffer.

[Gwenole Beauchesne]

Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
 include/EGL/eglmesaext.h|5 +
 src/egl/drivers/dri2/egl_dri2.c |   15 +++
 2 files changed, 20 insertions(+)

diff --git a/include/EGL/eglmesaext.h b/include/EGL/eglmesaext.h
index d476d18..d08ba09 100644
--- a/include/EGL/eglmesaext.h
+++ b/include/EGL/eglmesaext.h
@@ -115,6 +115,11 @@ typedef EGLDisplay (EGLAPIENTRYP PFNEGLGETDRMDISPLAYMESA) 
(int fd);
 #define EGL_WAYLAND_BUFFER_WL  0x31D5 /* eglCreateImageKHR target */
 #define EGL_WAYLAND_PLANE_WL   0x31D6 /* eglCreateImageKHR target */
 
+#define EGL_TEXTURE_STRUCTURE_WL0x31DA /* eglCreateImageKHR target */
+#define EGL_TEXTURE_STRUCTURE_FRAME_WL  0x
+#define EGL_TEXTURE_STRUCTURE_TOP_FIELD_WL  0x0001
+#define EGL_TEXTURE_STRUCTURE_BOTTOM_FIELD_WL   0x0002
+
 #define EGL_TEXTURE_Y_U_V_WL0x31D7
 #define EGL_TEXTURE_Y_UV_WL 0x31D8
 #define EGL_TEXTURE_Y_XUXV_WL   0x31D9
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 4ae2856..738c51c 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1437,6 +1437,21 @@ dri2_query_wayland_buffer_wl(_EGLDriver *drv, 
_EGLDisplay *disp,
case EGL_TEXTURE_FORMAT:
   *value = format-components;
   return EGL_TRUE;
+   case EGL_TEXTURE_STRUCTURE_WL:
+  switch (buffer-picture_structure) {
+  case WL_DRM_PICTURE_STRUCTURE_FRAME:
+ *value = EGL_TEXTURE_STRUCTURE_FRAME_WL;
+ break;
+  case WL_DRM_PICTURE_STRUCTURE_TOP_FIELD:
+ *value = EGL_TEXTURE_STRUCTURE_TOP_FIELD_WL;
+ break;
+  case WL_DRM_PICTURE_STRUCTURE_BOTTOM_FIELD:
+ *value = EGL_TEXTURE_STRUCTURE_BOTTOM_FIELD_WL;
+ break;
+  default:
+ return EGL_FALSE;
+  }
+  return EGL_TRUE;
case EGL_WIDTH:
   *value = buffer-buffer.width;
   break;
-- 
1.7.9.5

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[Mesa-dev] [Bug 52140] Ubuntu Unity - Launcher and switcher icons disappeared

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52140

Mathieu Bérard mathieu.ber...@crans.org changed:

   What|Removed |Added

 CC||mathieu.ber...@crans.org

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[Mesa-dev] [Bug 52140] Ubuntu Unity - Launcher and switcher icons disappeared

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52140

--- Comment #16 from Mathieu Bérard mathieu.ber...@crans.org 2012-07-30 
18:42:51 UTC ---
I'm also affected. On two different machines (both radeon based):
* Evergreen
* RS780

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Re: [Mesa-dev] [Intel-gfx] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

[Olivier Galibert]

On Mon, Jul 30, 2012 at 10:30:57AM -0700, Eric Anholt wrote:
 I'm perfectly fine with the VUE containing slots for both when the app
 has gone out of its way to ask for deprecated two-sided color
 rendering.

Are you also ok with recompiler the shaders when that enable is
switched?

  OG.

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Re: [Mesa-dev] [PATCH v4 3/7] mesa: add support for using API_OPENGL_CORE

[Eric Anholt]

Jordan Justen jordan.l.jus...@intel.com writes:
 diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
 index 15de321..2a39693 100644
 --- a/src/mesa/main/get.c
 +++ b/src/mesa/main/get.c
 @@ -391,6 +391,7 @@ extra_NV_read_buffer_api_gl[] = {
  #define API_OPENGL_BIT (1  API_OPENGL)
  #define API_OPENGLES_BIT (1  API_OPENGLES)
  #define API_OPENGLES2_BIT (1  API_OPENGLES2)
 +#define API_OPENGL_CORE_BIT (1  API_OPENGL_CORE)
  
  /* This is the big table describing all the enums we accept in
   * glGet*v().  The table is partitioned into six parts: enums
 @@ -405,7 +406,9 @@ extra_NV_read_buffer_api_gl[] = {
  static const struct value_desc values[] = {
 /* Enums shared between OpenGL, GLES1 and GLES2 */
 { 0, 0, TYPE_API_MASK,
 - API_OPENGL_BIT | API_OPENGLES_BIT | API_OPENGLES2_BIT, NO_EXTRA},
 + API_OPENGL_BIT | API_OPENGLES_BIT |API_OPENGLES2_BIT |

weird little bit of whitespace loss there.

 diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
 index efa63b0..fee5669 100644
 --- a/src/mesa/main/varray.c
 +++ b/src/mesa/main/varray.c
 @@ -92,7 +92,7 @@ type_to_bit(const struct gl_context *ctx, GLenum type)
 case GL_DOUBLE:
return DOUBLE_BIT;
 case GL_FIXED:
 -  return ctx-API == API_OPENGL ? FIXED_GL_BIT : FIXED_ES_BIT;
 +  return (_mesa_is_desktop_gl(ctx)) ? FIXED_GL_BIT : FIXED_ES_BIT;

funny extra parens.

other than that, the series is:

Reviewed-by: Eric Anholt e...@anholt.net


pgpgqQJYuerL3.pgp
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[Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.

[Eric Anholt]

Fixes some failures in getteximage-formats.
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 65ca2fc..9e7fcf1 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -31,6 +31,7 @@

 
 #include main/mtypes.h
+#include main/enums.h
 #include main/samplerobj.h
 #include program/prog_parameter.h
 
@@ -598,6 +599,11 @@ translate_tex_format(gl_format mesa_format,
 GLenum depth_mode,
 GLenum srgb_decode)
 {
+   if (srgb_decode == GL_SKIP_DECODE_EXT 
+   _mesa_get_format_color_encoding(mesa_format) == GL_SRGB) {
+  mesa_format = _mesa_get_srgb_format_linear(mesa_format);
+   }
+
switch( mesa_format ) {
 
case MESA_FORMAT_Z16:
@@ -613,14 +619,6 @@ translate_tex_format(gl_format mesa_format,
case MESA_FORMAT_Z32_FLOAT_X24S8:
   return BRW_SURFACEFORMAT_R32G32_FLOAT;
 
-   case MESA_FORMAT_SARGB8:
-   case MESA_FORMAT_SLA8:
-   case MESA_FORMAT_SL8:
-  if (srgb_decode == GL_DECODE_EXT)
-return brw_format_for_mesa_format(mesa_format);
-  else if (srgb_decode == GL_SKIP_DECODE_EXT)
-return 
brw_format_for_mesa_format(_mesa_get_srgb_format_linear(mesa_format));
-
case MESA_FORMAT_RGBA_FLOAT32:
   /* The value of this BRW_SURFACEFORMAT is 0, which tricks the
* assertion below.
-- 
1.7.10.4

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Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.

[Kenneth Graunke]

On 07/30/2012 01:13 PM, Eric Anholt wrote:
 Fixes some failures in getteximage-formats.
 ---
  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   14 ++
  1 file changed, 6 insertions(+), 8 deletions(-)
 
 diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
 b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 index 65ca2fc..9e7fcf1 100644
 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 @@ -31,6 +31,7 @@
 
  
  #include main/mtypes.h
 +#include main/enums.h
  #include main/samplerobj.h
  #include program/prog_parameter.h
  
 @@ -598,6 +599,11 @@ translate_tex_format(gl_format mesa_format,
GLenum depth_mode,
GLenum srgb_decode)
  {
 +   if (srgb_decode == GL_SKIP_DECODE_EXT 
 +   _mesa_get_format_color_encoding(mesa_format) == GL_SRGB) {
 +  mesa_format = _mesa_get_srgb_format_linear(mesa_format);
 +   }
 +
 switch( mesa_format ) {
  
 case MESA_FORMAT_Z16:
 @@ -613,14 +619,6 @@ translate_tex_format(gl_format mesa_format,
 case MESA_FORMAT_Z32_FLOAT_X24S8:
return BRW_SURFACEFORMAT_R32G32_FLOAT;
  
 -   case MESA_FORMAT_SARGB8:
 -   case MESA_FORMAT_SLA8:
 -   case MESA_FORMAT_SL8:
 -  if (srgb_decode == GL_DECODE_EXT)
 -  return brw_format_for_mesa_format(mesa_format);
 -  else if (srgb_decode == GL_SKIP_DECODE_EXT)
 -  return 
 brw_format_for_mesa_format(_mesa_get_srgb_format_linear(mesa_format));
 -
 case MESA_FORMAT_RGBA_FLOAT32:
/* The value of this BRW_SURFACEFORMAT is 0, which tricks the
 * assertion below.

Yes, please!  I also double checked that _mesa_get_srgb_format_linear
actually handles the DXTn formats.  It does.

Reviewed-by: Kenneth Graunke kenn...@whitecape.org
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Re: [Mesa-dev] [PATCH v4 4/7] glsl: add support for using API_OPENGL_CORE

[Kenneth Graunke]

On 07/27/2012 02:45 PM, Jordan Justen wrote:
 Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
 ---
  src/glsl/glsl_parser_extras.cpp |   14 ++
  1 file changed, 6 insertions(+), 8 deletions(-)
 
 diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
 index df40459..7e85f41 100644
 --- a/src/glsl/glsl_parser_extras.cpp
 +++ b/src/glsl/glsl_parser_extras.cpp
 @@ -90,19 +90,17 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct 
 gl_context *_ctx,
  */
 this-Const.GLSL_100ES = (ctx-API == API_OPENGLES2)
|| ctx-Extensions.ARB_ES2_compatibility;
 -   this-Const.GLSL_110 = (ctx-API == API_OPENGL);
 -   this-Const.GLSL_120 = (ctx-API == API_OPENGL)
 -   (ctx-Const.GLSLVersion = 120);
 -   this-Const.GLSL_130 = (ctx-API == API_OPENGL)
 -   (ctx-Const.GLSLVersion = 130);
 -   this-Const.GLSL_140 = (ctx-API == API_OPENGL)
 -   (ctx-Const.GLSLVersion = 140);
 +   bool is_desktop_gl = _mesa_is_desktop_gl(ctx);
 +   this-Const.GLSL_110 = is_desktop_gl;
 +   this-Const.GLSL_120 = is_desktop_gl  (ctx-Const.GLSLVersion = 120);
 +   this-Const.GLSL_130 = is_desktop_gl  (ctx-Const.GLSLVersion = 130);
 +   this-Const.GLSL_140 = is_desktop_gl  (ctx-Const.GLSLVersion = 140);
  
 const unsigned lowest_version =
(ctx-API == API_OPENGLES2) || ctx-Extensions.ARB_ES2_compatibility
? 100 : 110;
 const unsigned highest_version =
 -  (ctx-API == API_OPENGL) ? ctx-Const.GLSLVersion : 100;
 +  is_desktop_gl ? ctx-Const.GLSLVersion : 100;
 char *supported = ralloc_strdup(this, );
  
 for (unsigned ver = lowest_version; ver = highest_version; ver += 10) {
 

This conflicts with my patch to make all these bitfields go away, but
I'll let you go first and I'll rebase against your code.  It won't be hard.

For the series:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
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Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.

[Brian Paul]

On 07/30/2012 02:13 PM, Eric Anholt wrote:

Fixes some failures in getteximage-formats.
---
  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   14 ++
  1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 65ca2fc..9e7fcf1 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -31,6 +31,7 @@


  #include main/mtypes.h
+#include main/enums.h


I don't see why the new code below needs enums.h



  #include main/samplerobj.h
  #include program/prog_parameter.h

@@ -598,6 +599,11 @@ translate_tex_format(gl_format mesa_format,
 GLenum depth_mode,
 GLenum srgb_decode)
  {
+   if (srgb_decode == GL_SKIP_DECODE_EXT
+   _mesa_get_format_color_encoding(mesa_format) == GL_SRGB) {
+  mesa_format = _mesa_get_srgb_format_linear(mesa_format);
+   }
+
 switch( mesa_format ) {

 case MESA_FORMAT_Z16:
@@ -613,14 +619,6 @@ translate_tex_format(gl_format mesa_format,
 case MESA_FORMAT_Z32_FLOAT_X24S8:
return BRW_SURFACEFORMAT_R32G32_FLOAT;

-   case MESA_FORMAT_SARGB8:
-   case MESA_FORMAT_SLA8:
-   case MESA_FORMAT_SL8:
-  if (srgb_decode == GL_DECODE_EXT)
-return brw_format_for_mesa_format(mesa_format);
-  else if (srgb_decode == GL_SKIP_DECODE_EXT)
-return 
brw_format_for_mesa_format(_mesa_get_srgb_format_linear(mesa_format));
-
 case MESA_FORMAT_RGBA_FLOAT32:
/* The value of this BRW_SURFACEFORMAT is 0, which tricks the
 * assertion below.


Looks OK otherwise.  Reviewed-by: Brian Paul bri...@vmware.com
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[Mesa-dev] [Bug 52140] Ubuntu Unity - Launcher and switcher icons disappeared

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=52140

Ernst Sjöstrand ern...@gmail.com changed:

   What|Removed |Added

 CC||ern...@gmail.com

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[Mesa-dev] How can I build a libGL.so library with i965 support.

[chris]

In file of src/gallium/state_trackers/egl/x11/native_dri2.c
How can I enable the GLX_DIRECT_RENDERING definition in configure time.  
GLX_DIRECT_RENDERING is defaultly no defined. so x11_create_dri2_display() is 
empty.

My OS is ubuntu 10.04 lucid.
Can someone help me?
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Re: [Mesa-dev] How can I build a libGL.so library with i965 support.

[Matt Turner]

On Mon, Jul 30, 2012 at 8:26 PM, chris wwzbw...@163.com wrote:
 In file of src/gallium/state_trackers/egl/x11/native_dri2.c
 How can I enable the GLX_DIRECT_RENDERING definition in configure time.
 GLX_DIRECT_RENDERING is defaultly no defined. so x11_create_dri2_display()
 is empty.

 My OS is ubuntu 10.04 lucid.
 Can someone help me?

The only supported i965 driver is of the 'classic' variety, not
Gallium. So, the source file you've referenced isn't useful for i965.

To build Mesa with i965, you'd configure it with

./configure --with-dri-drivers=i965 (and maybe --with-gallium-drivers=
since you don't want Gallium)
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Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.

[Kenneth Graunke]

On 07/30/2012 03:28 PM, Brian Paul wrote:
 On 07/30/2012 02:13 PM, Eric Anholt wrote:
 Fixes some failures in getteximage-formats.
 ---
   src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   14 ++
   1 file changed, 6 insertions(+), 8 deletions(-)

 diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 index 65ca2fc..9e7fcf1 100644
 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
 @@ -31,6 +31,7 @@


   #include main/mtypes.h
 +#include main/enums.h
 
 I don't see why the new code below needs enums.h

Oh...yeah.  That was for _mesa_lookup_enum_by_name() during some
debugging.  Probably should get taken back out.  Good eye :)
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