[Mesa-dev] Error compiling mesa 9.1.1
Hi, I am trying to compile mesa 9.1.1 on my debian wheezy machine but I get compilation error during the build. The configure options that I have used are: ../../configure --prefix=~/lib/mesa/dri_llvm --build=x86_64-linux-gnu --with-dri-drivers=swrast --with-dri-driverdir=~/lib/mesa/dri_llvm/ --with-dri-searchpath='~/lib/mesa/dri_llvm/' --enable-glx-tls --enable-xa --enable-driglx-direct --with-egl-platforms=x11 --enable-gallium-llvm=yes --with-gallium-drivers=swrast --enable-gles1 --enable-gles2 --enable-gallium-egl --disable-glu CFLAGS=-Wall -O2 CXXFLAGS=-Wall -O2 And the compilation error that I see is: make[5]: Entering directory `/home/divick/work/work/mesa-9.1.1/build/dri/src/gallium/state_trackers/dri/drm' make[5]: *** No rule to make target `dri_context.lo', needed by `libdridrm.la'. Stop Using the same set of configure options I am able to build mesa 8.0.5. My objective is to build llvm based software only renderer. Could someone please help me build mesa 9.1.1? Thanks Regards, Divick ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64649] [r600g] Anomaly 2 (Steam) crashes with GLX_EXT_swap_control not supported, unable to set vertical sync
https://bugs.freedesktop.org/show_bug.cgi?id=64649 --- Comment #1 from Michel Dänzer mic...@daenzer.net --- GLX_EXT_swap_control not supported, unable to set vertical sync. Are you sure the problem is directly related to this message? If it is, it's not a driver specific problem, as GLX_EXT_swap_control is not implemented at all yet in Mesa AFAICT. First of all though, why do you say it 'crashes'? Is there any evidence of a crash that you didn't include? -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [v5] egl: definitions for EXT_image_dma_buf_import
As specified in:
http://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_image_dma_buf_import.txt
Checking for the valid fourcc values is left for drivers avoiding
dependency to drm header files here.
v2: enforce EGL_NO_CONTEXT
v3: declare the extension as EGL (not GLES)
v4: do not update eglext.h manually but rely on update from
Khronos instead
v5: report invalid context as EGL_BAD_PARAMETER instead of as
EGL_BAD_CONTEXT (Eric)
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/egl/main/eglapi.c | 6
src/egl/main/egldisplay.h | 1 +
src/egl/main/eglimage.c | 76 +++
src/egl/main/eglimage.h | 15 ++
src/egl/main/eglmisc.c| 1 +
5 files changed, 99 insertions(+)
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index 4a9831b..5b15744 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -1344,6 +1344,12 @@ eglCreateImageKHR(EGLDisplay dpy, EGLContext ctx,
EGLenum target,
RETURN_EGL_EVAL(disp, EGL_NO_IMAGE_KHR);
if (!context ctx != EGL_NO_CONTEXT)
RETURN_EGL_ERROR(disp, EGL_BAD_CONTEXT, EGL_NO_IMAGE_KHR);
+ /**
+* If target is EGL_LINUX_DMA_BUF_EXT, dpy must be a valid display,
+* ctx must be EGL_NO_CONTEXT...
+*/
+ if (ctx != EGL_NO_CONTEXT target == EGL_LINUX_DMA_BUF_EXT)
+ RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_NO_IMAGE_KHR);
img = drv-API.CreateImageKHR(drv,
disp, context, target, buffer, attr_list);
diff --git a/src/egl/main/egldisplay.h b/src/egl/main/egldisplay.h
index f990300..fefd19c 100644
--- a/src/egl/main/egldisplay.h
+++ b/src/egl/main/egldisplay.h
@@ -116,6 +116,7 @@ struct _egl_extensions
EGLBoolean EXT_create_context_robustness;
EGLBoolean EXT_buffer_age;
EGLBoolean EXT_swap_buffers_with_damage;
+ EGLBoolean EXT_image_dma_buf_import;
};
diff --git a/src/egl/main/eglimage.c b/src/egl/main/eglimage.c
index bfae709..1cede31 100644
--- a/src/egl/main/eglimage.c
+++ b/src/egl/main/eglimage.c
@@ -93,6 +93,82 @@ _eglParseImageAttribList(_EGLImageAttribs *attrs,
_EGLDisplay *dpy,
attrs-PlaneWL = val;
break;
+ case EGL_LINUX_DRM_FOURCC_EXT:
+ attrs-DMABufFourCC.Value = val;
+ attrs-DMABufFourCC.IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE0_FD_EXT:
+ attrs-DMABufPlaneFds[0].Value = val;
+ attrs-DMABufPlaneFds[0].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE0_OFFSET_EXT:
+ attrs-DMABufPlaneOffsets[0].Value = val;
+ attrs-DMABufPlaneOffsets[0].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE0_PITCH_EXT:
+ attrs-DMABufPlanePitches[0].Value = val;
+ attrs-DMABufPlanePitches[0].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE1_FD_EXT:
+ attrs-DMABufPlaneFds[1].Value = val;
+ attrs-DMABufPlaneFds[1].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE1_OFFSET_EXT:
+ attrs-DMABufPlaneOffsets[1].Value = val;
+ attrs-DMABufPlaneOffsets[1].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE1_PITCH_EXT:
+ attrs-DMABufPlanePitches[1].Value = val;
+ attrs-DMABufPlanePitches[1].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE2_FD_EXT:
+ attrs-DMABufPlaneFds[2].Value = val;
+ attrs-DMABufPlaneFds[2].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE2_OFFSET_EXT:
+ attrs-DMABufPlaneOffsets[2].Value = val;
+ attrs-DMABufPlaneOffsets[2].IsPresent = EGL_TRUE;
+ break;
+ case EGL_DMA_BUF_PLANE2_PITCH_EXT:
+ attrs-DMABufPlanePitches[2].Value = val;
+ attrs-DMABufPlanePitches[2].IsPresent = EGL_TRUE;
+ break;
+ case EGL_YUV_COLOR_SPACE_HINT_EXT:
+ if (val != EGL_ITU_REC601_EXT || val != EGL_ITU_REC709_EXT ||
+ val != EGL_ITU_REC2020_EXT) {
+err = EGL_BAD_ATTRIBUTE;
+ } else {
+attrs-DMABufYuvColorSpaceHint.Value = val;
+attrs-DMABufYuvColorSpaceHint.IsPresent = EGL_TRUE;
+ }
+ break;
+ case EGL_SAMPLE_RANGE_HINT_EXT:
+ if (val != EGL_YUV_FULL_RANGE_EXT || val != EGL_YUV_NARROW_RANGE_EXT)
{
+ err = EGL_BAD_ATTRIBUTE;
+ } else {
+attrs-DMABufSampleRangeHint.Value = val;
+attrs-DMABufSampleRangeHint.IsPresent = EGL_TRUE;
+ }
+ break;
+ case EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT:
+ if (val != EGL_YUV_CHROMA_SITING_0_EXT ||
+ val != EGL_YUV_CHROMA_SITING_0_5_EXT) {
+ err = EGL_BAD_ATTRIBUTE;
+ } else {
+attrs-DMABufChromaHorizontalSiting.Value = val;
+attrs-DMABufChromaHorizontalSiting.IsPresent = EGL_TRUE;
+ }
+ break;
+ case EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT:
+ if (val !=
[Mesa-dev] [Bug 58137] [r300g, r600g] corruption on 0 A.D. game with postproc effects enabled
https://bugs.freedesktop.org/show_bug.cgi?id=58137 Fabio Pedretti fabio@libero.it changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #2 from Fabio Pedretti fabio@libero.it --- Indeed, I no longer have this issue on r300 - RV530. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] A simple GLES2 shader application performance slower with h/w renderer
Hi, I have a simple GLES2 based application which does not do much in the either of the vertex and fragment shaders. It simply draws a rotating spiral made from a simple triangle strip. When I try to run this application using the mesa with h/w renderer, it gives me a performance which is almost = 60 fps consistently. I saw this happening with glxgears application as well but after setting vblank_mode=0 I see the performance of glxgears with h/w rendering is much much faster than llvm based s/w renderer. But for the shader based application I still see that performance remains constant at 60fps. The renderer reported with h/w: OpenGL renderer string: Mesa DRI Intel(R) Sandybridge Mobile This is the default mesa installed on my debian machine. The renderer reported with llvm base s/w renderer: OpenGL renderer string: Gallium 0.4 on llvmpipe (LLVM 0x300) This is self compiled mesa. Any help is appreciated, Thanks Regards, Divick ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] New: Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 Priority: medium Bug ID: 64668 Assignee: mesa-dev@lists.freedesktop.org Summary: Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers. Severity: normal Classification: Unclassified OS: All Reporter: i.gnatenko.br...@gmail.com Hardware: Other Status: NEW Version: git Component: Mesa core Product: Mesa Created attachment 79404 -- https://bugs.freedesktop.org/attachment.cgi?id=79404action=edit archive with sources to test Description of problem: Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers. Test to reproduce the bug: download attachment tar xvf opengl-clipping-plane-bug.tar.xz cd opengl-clipping-plane-bug make ./test Use SPACE to toggle between shader state (enable/disable). This simple test draws a quad with vertices coordinates (0,0,0), (640,0,0), (640,480,0), (0,480,0) and setup a clipping plane with plane equation coefficients (1,0,0,0), model view is identity. According to documentation http://www.opengl.org/sdk/docs/man2/xhtml/glClipPlane.xml all vertices must be in clipping plane, but when using shaders half of quad is clipped instead. Version-Release number of selected component (if applicable): Xorg: 1.14.1-1.fc19.x86_64 mesa: 9.2-0.1.20130508.fc19.x86_64 xorg-x11-drv-intel: 2.21.6-1.fc19.x86_64 xorg-x11-drv-nouveau: 1.0.7-1.fc19.x86_64 and X.Org X Server 1.12.3 mesa-libGL-8.0.4-1 xorg-x11-drv-intel-2.20.8-1 xorg-x11-drv-nouveau-0.0.16-37 How reproducible: Always. Actual results: Object is half-clipped. (see screenshot intel-i915-with-shader.png nvidia-Nouveau-with-shader.png) Expected results: Object is fully shown. (see screenshot amd-Catalyst-with-shader.png nvidia-NVIDIA-with-shader.png) -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 Igor Gnatenko i.gnatenko.br...@gmail.com changed: What|Removed |Added CC||i.gnatenko.br...@gmail.com -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #1 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79405 -- https://bugs.freedesktop.org/attachment.cgi?id=79405action=edit intel-i915-with-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #2 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79406 -- https://bugs.freedesktop.org/attachment.cgi?id=79406action=edit intel-i915-without-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #3 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79407 -- https://bugs.freedesktop.org/attachment.cgi?id=79407action=edit nvidia-Nouveau-with-shader.png -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #4 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79408 -- https://bugs.freedesktop.org/attachment.cgi?id=79408action=edit nvidia-Nouveau-without-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #5 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79409 -- https://bugs.freedesktop.org/attachment.cgi?id=79409action=edit amd-Catalyst-with-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #6 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79410 -- https://bugs.freedesktop.org/attachment.cgi?id=79410action=edit amd-Catalyst-without-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #7 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79411 -- https://bugs.freedesktop.org/attachment.cgi?id=79411action=edit nvidia-NVIDIA-with-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #8 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Created attachment 79412 -- https://bugs.freedesktop.org/attachment.cgi?id=79412action=edit nvidia-NVIDIA-without-shader -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 00/13] Fix llvmpipe on big-endian
This series introduces bytewise formats for framebuffers, and fixes the vector representation on big-endian. No damage to piglit on little-endian, but fixes a few thousand on big-endian, enough to make gnome-shell work correctly. I've tried to break it up into reviewable chunks, but it probably wants to get committed as a squashed merge since the intermediate states aren't especially meaningful. While this series does work on x86 I've not verified that the generated code is identical or doesn't regress performance. - ajax ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/13] gallivm: Remove all notion of byte-swapping
---
src/gallium/auxiliary/gallivm/lp_bld_conv.c| 76 --
src/gallium/auxiliary/gallivm/lp_bld_conv.h| 11
src/gallium/auxiliary/gallivm/lp_bld_format_aos.c | 9 ---
.../auxiliary/gallivm/lp_bld_format_aos_array.c| 56
src/gallium/auxiliary/util/u_format_pack.py| 21 --
5 files changed, 173 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_conv.c
b/src/gallium/auxiliary/gallivm/lp_bld_conv.c
index eb2d096..cf86f4d 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_conv.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_conv.c
@@ -80,82 +80,6 @@
/**
- * Byte swap on element. It will construct a call to intrinsic llvm.bswap
- * based on the type.
- *
- * @param res element to byte swap.
- * @param type int16_t, int32_t, int64_t, float or double
- * @param
- */
-LLVMValueRef
-lp_build_bswap(struct gallivm_state *gallivm,
- LLVMValueRef res,
- struct lp_type type)
-{
- LLVMTypeRef int_type = LLVMIntTypeInContext(gallivm-context,
- type.width);
- const char *intrinsic = NULL;
- if (type.width == 8)
- return res;
- if (type.width == 16)
- intrinsic = llvm.bswap.i16;
- else if (type.width == 32)
- intrinsic = llvm.bswap.i32;
- else if (type.width == 64)
- intrinsic = llvm.bswap.i64;
-
- assert (intrinsic != NULL);
-
- /* In case of a floating-point type cast to a int of same size and then
-* cast back to fp type.
-*/
- if (type.floating)
- res = LLVMBuildBitCast(gallivm-builder, res, int_type, );
- res = lp_build_intrinsic_unary(gallivm-builder, intrinsic, int_type, res);
- if (type.floating)
- res = LLVMBuildBitCast(gallivm-builder, res,
- lp_build_elem_type(gallivm, type), );
- return res;
-}
-
-
-/**
- * Byte swap every element in the vector.
- *
- * @param packedvector to convert
- * @param src_type vector type of int16_t, int32_t, int64_t, float or
- * double
- * @param dst_type vector type to return
- */
-LLVMValueRef
-lp_build_bswap_vec(struct gallivm_state *gallivm,
- LLVMValueRef packed,
- struct lp_type src_type_vec,
- struct lp_type dst_type_vec)
-{
- LLVMBuilderRef builder = gallivm-builder;
- LLVMTypeRef dst_type = lp_build_elem_type(gallivm, dst_type_vec);
- LLVMValueRef res;
-
- if (src_type_vec.length == 1) {
- res = lp_build_bswap(gallivm, packed, src_type_vec);
- res = LLVMBuildBitCast(gallivm-builder, res, dst_type, );
- } else {
- unsigned i;
- res = LLVMGetUndef(lp_build_vec_type(gallivm, dst_type_vec));
- for (i = 0; i src_type_vec.length; ++i) {
- LLVMValueRef index = lp_build_const_int32(gallivm, i);
- LLVMValueRef elem = LLVMBuildExtractElement(builder, packed, index,
);
- elem = lp_build_bswap(gallivm, elem, src_type_vec);
- elem = LLVMBuildBitCast(gallivm-builder, elem, dst_type, );
- res = LLVMBuildInsertElement(gallivm-builder, res, elem, index, );
- }
- }
- return res;
-}
-
-
-/**
* Converts int16 half-float to float32
* Note this can be performed in 1 instruction if vcvtph2ps exists (f16c/cvt16)
* [llvm.x86.vcvtph2ps / _mm_cvtph_ps]
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_conv.h
b/src/gallium/auxiliary/gallivm/lp_bld_conv.h
index d7dfed8..42a1113 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_conv.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_conv.h
@@ -43,17 +43,6 @@
struct lp_type;
LLVMValueRef
-lp_build_bswap(struct gallivm_state *gallivm,
- LLVMValueRef res,
- struct lp_type type);
-
-LLVMValueRef
-lp_build_bswap_vec(struct gallivm_state *gallivm,
- LLVMValueRef packed,
- struct lp_type src_type,
- struct lp_type dst_type);
-
-LLVMValueRef
lp_build_half_to_float(struct gallivm_state *gallivm,
LLVMValueRef src);
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
index 6a1bf67..3675e68 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
@@ -172,10 +172,6 @@ lp_build_unpack_arith_rgba_aos(struct gallivm_state
*gallivm,
* matches floating point size */
assert (LLVMTypeOf(packed) == LLVMInt32TypeInContext(gallivm-context));
-#ifdef PIPE_ARCH_BIG_ENDIAN
- packed = lp_build_bswap(gallivm, packed, lp_type_uint(32));
-#endif
-
/* Broadcast the packed value to all four channels
* before: packed = BGRA
* after: packed = {BGRA, BGRA, BGRA, BGRA}
@@ -415,11 +411,6 @@ lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
assert(format_desc-block.bits = vec_len);
packed = LLVMBuildBitCast(gallivm-builder, packed, dst_vec_type, );
-#ifdef
[Mesa-dev] [PATCH 02/13] draw: Add A8R8G8B8 to draw_print_arrays
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/auxiliary/draw/draw_pt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/gallium/auxiliary/draw/draw_pt.c
b/src/gallium/auxiliary/draw/draw_pt.c
index 14dde67..bc300c0 100644
--- a/src/gallium/auxiliary/draw/draw_pt.c
+++ b/src/gallium/auxiliary/draw/draw_pt.c
@@ -326,6 +326,13 @@ draw_print_arrays(struct draw_context *draw, uint prim,
int start, uint count)
(void *) u);
}
break;
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
+{
+ ubyte *u = (ubyte *) ptr;
+ debug_printf(ARGB %d %d %d %d @ %p\n, u[0], u[1], u[2], u[3],
+(void *) u);
+}
+break;
default:
debug_printf(other format %s (fix me)\n,
util_format_name(draw-pt.vertex_element[j].src_format));
--
1.8.2.1
___
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mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/13] gallium: Introduce 32-bit bytewise format names
From: Richard Sandiford r.sandif...@uk.ibm.com
RGBA has R at byte 0 and A at byte 3, regardless of platform
endianness.
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/include/pipe/p_format.h | 38 +
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/src/gallium/include/pipe/p_format.h
b/src/gallium/include/pipe/p_format.h
index 098b25b..1289983 100644
--- a/src/gallium/include/pipe/p_format.h
+++ b/src/gallium/include/pipe/p_format.h
@@ -33,6 +33,7 @@
extern C {
#endif
+#include p_config.h
enum pipe_type {
PIPE_TYPE_UNORM = 0,
@@ -53,10 +54,10 @@ enum pipe_type {
enum pipe_format {
PIPE_FORMAT_NONE= 0,
- PIPE_FORMAT_B8G8R8A8_UNORM = 1,
- PIPE_FORMAT_B8G8R8X8_UNORM = 2,
- PIPE_FORMAT_A8R8G8B8_UNORM = 3,
- PIPE_FORMAT_X8R8G8B8_UNORM = 4,
+ PIPE_FORMAT_ARGB_UNORM = 1,
+ PIPE_FORMAT_XRGB_UNORM = 2,
+ PIPE_FORMAT_BGRA_UNORM = 3,
+ PIPE_FORMAT_BGRX_UNORM = 4,
PIPE_FORMAT_B5G5R5A1_UNORM = 5,
PIPE_FORMAT_B4G4R4A4_UNORM = 6,
PIPE_FORMAT_B5G6R5_UNORM= 7,
@@ -119,8 +120,8 @@ enum pipe_format {
PIPE_FORMAT_R8_UNORM= 64,
PIPE_FORMAT_R8G8_UNORM = 65,
PIPE_FORMAT_R8G8B8_UNORM= 66,
- PIPE_FORMAT_R8G8B8A8_UNORM = 67,
- PIPE_FORMAT_X8B8G8R8_UNORM = 68,
+ PIPE_FORMAT_ABGR_UNORM = 67,
+ PIPE_FORMAT_RGBX_UNORM = 68,
PIPE_FORMAT_R8_USCALED = 69,
PIPE_FORMAT_R8G8_USCALED= 70,
PIPE_FORMAT_R8G8B8_USCALED = 71,
@@ -180,7 +181,7 @@ enum pipe_format {
PIPE_FORMAT_R5SG5SB6U_NORM = 120,
/* TODO: re-order these */
- PIPE_FORMAT_A8B8G8R8_UNORM = 121,
+ PIPE_FORMAT_RGBA_UNORM = 121,
PIPE_FORMAT_B5G5R5X1_UNORM = 122,
PIPE_FORMAT_R10G10B10A2_USCALED = 123,
PIPE_FORMAT_R11G11B10_FLOAT = 124,
@@ -193,7 +194,7 @@ enum pipe_format {
PIPE_FORMAT_B10G10R10A2_UNORM = 131,
PIPE_FORMAT_R10SG10SB10SA2U_NORM= 132,
PIPE_FORMAT_R8G8Bx_SNORM= 133,
- PIPE_FORMAT_R8G8B8X8_UNORM = 134,
+ PIPE_FORMAT_XBGR_UNORM = 134,
PIPE_FORMAT_B4G4R4X4_UNORM = 135,
/* some stencil samplers formats */
@@ -343,6 +344,27 @@ enum pipe_format {
PIPE_FORMAT_COUNT
};
+#if defined(PIPE_ARCH_LITTLE_ENDIAN)
+#define PIPE_FORMAT_R8G8B8A8_UNORM PIPE_FORMAT_ABGR_UNORM
+#define PIPE_FORMAT_R8G8B8X8_UNORM PIPE_FORMAT_XBGR_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_B8G8R8A8_UNORM PIPE_FORMAT_ARGB_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_A8R8G8B8_UNORM PIPE_FORMAT_BGRA_UNORM
+#define PIPE_FORMAT_X8R8G8B8_UNORM PIPE_FORMAT_BGRX_UNORM
+#define PIPE_FORMAT_A8B8G8R8_UNORM PIPE_FORMAT_RGBA_UNORM
+#define PIPE_FORMAT_X8B8G8R8_UNORM PIPE_FORMAT_RGBX_UNORM
+#elif defined(PIPE_ARCH_BIG_ENDIAN)
+#define PIPE_FORMAT_R8G8B8A8_UNORM PIPE_FORMAT_RGBA_UNORM
+#define PIPE_FORMAT_R8G8B8X8_UNORM PIPE_FORMAT_RGBX_UNORM
+#define PIPE_FORMAT_B8G8R8A8_UNORM PIPE_FORMAT_BGRA_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_BGRX_UNORM
+#define PIPE_FORMAT_A8R8G8B8_UNORM PIPE_FORMAT_ARGB_UNORM
+#define PIPE_FORMAT_X8R8G8B8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_A8B8G8R8_UNORM PIPE_FORMAT_ABGR_UNORM
+#define PIPE_FORMAT_X8B8G8R8_UNORM PIPE_FORMAT_XBGR_UNORM
+#endif
+
enum pipe_video_chroma_format
{
PIPE_VIDEO_CHROMA_FORMAT_420,
--
1.8.2.1
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[Mesa-dev] [PATCH 04/13] tests: Convert to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/tests/graw/clear.c | 4 ++--
src/gallium/tests/graw/fs-test.c | 4 ++--
src/gallium/tests/graw/graw_util.h | 6 +++---
src/gallium/tests/graw/quad-sample.c | 4 ++--
src/gallium/tests/graw/shader-leak.c | 4 ++--
src/gallium/tests/graw/tri-gs.c| 4 ++--
src/gallium/tests/graw/tri-instanced.c | 4 ++--
src/gallium/tests/graw/vs-test.c | 4 ++--
8 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/src/gallium/tests/graw/clear.c b/src/gallium/tests/graw/clear.c
index 6afdf40..e591d90 100644
--- a/src/gallium/tests/graw/clear.c
+++ b/src/gallium/tests/graw/clear.c
@@ -10,8 +10,8 @@
#include pipe/p_defines.h
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/fs-test.c b/src/gallium/tests/graw/fs-test.c
index e59377f..0269ae0 100644
--- a/src/gallium/tests/graw/fs-test.c
+++ b/src/gallium/tests/graw/fs-test.c
@@ -31,8 +31,8 @@ static void usage(char *name)
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/graw_util.h
b/src/gallium/tests/graw/graw_util.h
index febdf44..08f18f7 100644
--- a/src/gallium/tests/graw/graw_util.h
+++ b/src/gallium/tests/graw/graw_util.h
@@ -32,8 +32,8 @@ graw_util_create_window(struct graw_info *info,
int num_cbufs, bool zstencil_buf)
{
static const enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
enum pipe_format format;
@@ -226,7 +226,7 @@ graw_util_create_tex2d(const struct graw_info *info,
struct pipe_box box;
temp.target = PIPE_TEXTURE_2D;
- temp.format = PIPE_FORMAT_B8G8R8A8_UNORM;
+ temp.format = format;
temp.width0 = width;
temp.height0 = height;
temp.depth0 = 1;
diff --git a/src/gallium/tests/graw/quad-sample.c
b/src/gallium/tests/graw/quad-sample.c
index dd2865d..cfc4129 100644
--- a/src/gallium/tests/graw/quad-sample.c
+++ b/src/gallium/tests/graw/quad-sample.c
@@ -18,8 +18,8 @@
#include stdio.h
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/shader-leak.c
b/src/gallium/tests/graw/shader-leak.c
index 9c6e0eb..1fdfb95 100644
--- a/src/gallium/tests/graw/shader-leak.c
+++ b/src/gallium/tests/graw/shader-leak.c
@@ -18,8 +18,8 @@ static int num_iters = 100;
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/tri-gs.c b/src/gallium/tests/graw/tri-gs.c
index 03b5234..0bb45fb 100644
--- a/src/gallium/tests/graw/tri-gs.c
+++ b/src/gallium/tests/graw/tri-gs.c
@@ -14,8 +14,8 @@
#include util/u_inlines.h
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/tri-instanced.c
b/src/gallium/tests/graw/tri-instanced.c
index 901ac86..41caae9 100644
--- a/src/gallium/tests/graw/tri-instanced.c
+++ b/src/gallium/tests/graw/tri-instanced.c
@@ -17,8 +17,8 @@
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
diff --git a/src/gallium/tests/graw/vs-test.c b/src/gallium/tests/graw/vs-test.c
index 1ab6732..d63372d 100644
--- a/src/gallium/tests/graw/vs-test.c
+++ b/src/gallium/tests/graw/vs-test.c
@@ -32,8 +32,8 @@ static void usage(char *name)
enum pipe_format formats[] = {
- PIPE_FORMAT_R8G8B8A8_UNORM,
- PIPE_FORMAT_B8G8R8A8_UNORM,
+ PIPE_FORMAT_ABGR_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
PIPE_FORMAT_NONE
};
--
1.8.2.1
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[Mesa-dev] [PATCH 05/13] gbm: Convert to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/state_trackers/gbm/gbm_drm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/state_trackers/gbm/gbm_drm.c
b/src/gallium/state_trackers/gbm/gbm_drm.c
index 8490480..4f76b0f 100644
--- a/src/gallium/state_trackers/gbm/gbm_drm.c
+++ b/src/gallium/state_trackers/gbm/gbm_drm.c
@@ -45,9 +45,9 @@ gbm_format_to_gallium(enum gbm_bo_format format)
{
switch (format) {
case GBM_BO_FORMAT_XRGB:
- return PIPE_FORMAT_B8G8R8X8_UNORM;
+ return PIPE_FORMAT_XRGB_UNORM;
case GBM_BO_FORMAT_ARGB:
- return PIPE_FORMAT_B8G8R8A8_UNORM;
+ return PIPE_FORMAT_ARGB_UNORM;
default:
return PIPE_FORMAT_NONE;
}
@@ -145,10 +145,10 @@ gbm_gallium_drm_bo_import(struct gbm_device *gbm,
bo-base.base.height = resource-height0;
switch (resource-format) {
- case PIPE_FORMAT_B8G8R8X8_UNORM:
+ case PIPE_FORMAT_XRGB_UNORM:
bo-base.base.format = GBM_BO_FORMAT_XRGB;
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_ARGB_UNORM:
bo-base.base.format = GBM_BO_FORMAT_ARGB;
break;
default:
--
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[Mesa-dev] [PATCH 06/13] st/xlib: Convert to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/state_trackers/glx/xlib/xm_api.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c
b/src/gallium/state_trackers/glx/xlib/xm_api.c
index e426192..6792ef2 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.c
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.c
@@ -329,10 +329,10 @@ choose_pixel_format(XMesaVisual v)
v-BitsPerPixel == 32) {
if (native_byte_order) {
/* no byteswapping needed */
- return PIPE_FORMAT_R8G8B8A8_UNORM;
+ return PIPE_FORMAT_ABGR_UNORM;
}
else {
- return PIPE_FORMAT_A8B8G8R8_UNORM;
+ return PIPE_FORMAT_RGBA_UNORM;
}
}
else if ( GET_REDMASK(v) == 0xff
@@ -341,10 +341,10 @@ choose_pixel_format(XMesaVisual v)
v-BitsPerPixel == 32) {
if (native_byte_order) {
/* no byteswapping needed */
- return PIPE_FORMAT_B8G8R8A8_UNORM;
+ return PIPE_FORMAT_ARGB_UNORM;
}
else {
- return PIPE_FORMAT_A8R8G8B8_UNORM;
+ return PIPE_FORMAT_BGRA_UNORM;
}
}
else if ( GET_REDMASK(v) == 0xff00
@@ -353,10 +353,10 @@ choose_pixel_format(XMesaVisual v)
v-BitsPerPixel == 32) {
if (native_byte_order) {
/* no byteswapping needed */
- return PIPE_FORMAT_A8R8G8B8_UNORM;
+ return PIPE_FORMAT_BGRA_UNORM;
}
else {
- return PIPE_FORMAT_B8G8R8A8_UNORM;
+ return PIPE_FORMAT_ARGB_UNORM;
}
}
else if ( GET_REDMASK(v) == 0xf800
--
1.8.2.1
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[Mesa-dev] [PATCH 07/13] st/dri: Convert to bytewise formats
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/state_trackers/dri/common/dri_screen.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c
b/src/gallium/state_trackers/dri/common/dri_screen.c
index e09fe1d..43cca30 100644
--- a/src/gallium/state_trackers/dri/common/dri_screen.c
+++ b/src/gallium/state_trackers/dri/common/dri_screen.c
@@ -87,8 +87,8 @@ dri_fill_in_modes(struct dri_screen *screen)
MESA_FORMAT_RGB565,
};
static const enum pipe_format pipe_formats[3] = {
- PIPE_FORMAT_B8G8R8A8_UNORM,
- PIPE_FORMAT_B8G8R8X8_UNORM,
+ PIPE_FORMAT_ARGB_UNORM,
+ PIPE_FORMAT_XRGB_UNORM,
PIPE_FORMAT_B5G6R5_UNORM,
};
gl_format format;
@@ -250,11 +250,11 @@ dri_fill_st_visual(struct st_visual *stvis, struct
dri_screen *screen,
if (mode-redBits == 8) {
if (mode-alphaBits == 8)
- stvis-color_format = PIPE_FORMAT_B8G8R8A8_UNORM;
+ stvis-color_format = PIPE_FORMAT_ARGB_UNORM;
else
- stvis-color_format = PIPE_FORMAT_B8G8R8X8_UNORM;
+ stvis-color_format = PIPE_FORMAT_XRGB_UNORM;
} else {
- stvis-color_format = PIPE_FORMAT_B5G6R5_UNORM;
+ stvis-color_format = PIPE_FORMAT_B5G6R5_UNORM; /* XXX big-endian? */
}
if (mode-sampleBuffers) {
--
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[Mesa-dev] [PATCH 08/13] format: Convert to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/mesa/state_tracker/st_format.c | 58 +++---
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/src/mesa/state_tracker/st_format.c
b/src/mesa/state_tracker/st_format.c
index 56f3a4a..ae9e28e 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -55,21 +55,21 @@ st_mesa_format_to_pipe_format(gl_format mesaFormat)
{
switch (mesaFormat) {
case MESA_FORMAT_RGBA:
- return PIPE_FORMAT_A8B8G8R8_UNORM;
+ return PIPE_FORMAT_RGBA_UNORM;
case MESA_FORMAT_RGBA_REV:
- return PIPE_FORMAT_R8G8B8A8_UNORM;
+ return PIPE_FORMAT_ABGR_UNORM;
case MESA_FORMAT_ARGB:
- return PIPE_FORMAT_B8G8R8A8_UNORM;
+ return PIPE_FORMAT_ARGB_UNORM;
case MESA_FORMAT_ARGB_REV:
- return PIPE_FORMAT_A8R8G8B8_UNORM;
+ return PIPE_FORMAT_BGRA_UNORM;
case MESA_FORMAT_RGBX:
- return PIPE_FORMAT_X8B8G8R8_UNORM;
+ return PIPE_FORMAT_RGBX_UNORM;
case MESA_FORMAT_RGBX_REV:
- return PIPE_FORMAT_R8G8B8X8_UNORM;
+ return PIPE_FORMAT_XBGR_UNORM;
case MESA_FORMAT_XRGB:
- return PIPE_FORMAT_B8G8R8X8_UNORM;
+ return PIPE_FORMAT_XRGB_UNORM;
case MESA_FORMAT_XRGB_REV:
- return PIPE_FORMAT_X8R8G8B8_UNORM;
+ return PIPE_FORMAT_BGRX_UNORM;
case MESA_FORMAT_ARGB1555:
return PIPE_FORMAT_B5G5R5A1_UNORM;
case MESA_FORMAT_ARGB:
@@ -401,21 +401,21 @@ gl_format
st_pipe_format_to_mesa_format(enum pipe_format format)
{
switch (format) {
- case PIPE_FORMAT_A8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBA_UNORM:
return MESA_FORMAT_RGBA;
- case PIPE_FORMAT_R8G8B8A8_UNORM:
+ case PIPE_FORMAT_ABGR_UNORM:
return MESA_FORMAT_RGBA_REV;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_ARGB_UNORM:
return MESA_FORMAT_ARGB;
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRA_UNORM:
return MESA_FORMAT_ARGB_REV;
- case PIPE_FORMAT_X8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBX_UNORM:
return MESA_FORMAT_RGBX;
- case PIPE_FORMAT_R8G8B8X8_UNORM:
+ case PIPE_FORMAT_XBGR_UNORM:
return MESA_FORMAT_RGBX_REV;
- case PIPE_FORMAT_B8G8R8X8_UNORM:
+ case PIPE_FORMAT_XRGB_UNORM:
return MESA_FORMAT_XRGB;
- case PIPE_FORMAT_X8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRX_UNORM:
return MESA_FORMAT_XRGB_REV;
case PIPE_FORMAT_B5G5R5A1_UNORM:
return MESA_FORMAT_ARGB1555;
@@ -1521,12 +1521,12 @@ struct exact_format_mapping
static const struct exact_format_mapping rgba_tbl[] =
{
- { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_A8B8G8R8_UNORM },
- { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_A8B8G8R8_UNORM },
- { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_R8G8B8A8_UNORM },
- { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_R8G8B8A8_UNORM },
- { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_A8R8G8B8_UNORM },
- { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_B8G8R8A8_UNORM },
+ { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_RGBA_UNORM },
+ { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_RGBA_UNORM },
+ { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_ABGR_UNORM },
+ { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_ABGR_UNORM },
+ { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_BGRA_UNORM },
+ { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_ARGB_UNORM },
{ GL_RGBA, GL_UNSIGNED_BYTE, PIPE_FORMAT_R8G8B8A8_UNORM },
{ GL_ABGR_EXT, GL_UNSIGNED_BYTE, PIPE_FORMAT_A8B8G8R8_UNORM },
{ GL_BGRA, GL_UNSIGNED_BYTE, PIPE_FORMAT_B8G8R8A8_UNORM },
@@ -1535,15 +1535,15 @@ static const struct exact_format_mapping rgba_tbl[]
=
static const struct exact_format_mapping rgbx_tbl[] =
{
- { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_X8R8G8B8_UNORM },
- { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_B8G8R8X8_UNORM },
- { GL_BGRA, GL_UNSIGNED_BYTE, PIPE_FORMAT_B8G8R8X8_UNORM },
- { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_X8B8G8R8_UNORM },
- { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_X8B8G8R8_UNORM },
- { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_R8G8B8X8_UNORM },
- { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_R8G8B8X8_UNORM },
+ { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8,PIPE_FORMAT_RGBX_UNORM },
+ { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_RGBX_UNORM },
+ { GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV,PIPE_FORMAT_XBGR_UNORM },
+ { GL_ABGR_EXT, GL_UNSIGNED_INT_8_8_8_8,
[Mesa-dev] [PATCH 09/13] graw-xlib: Convert to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/targets/graw-xlib/graw_xlib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/targets/graw-xlib/graw_xlib.c
b/src/gallium/targets/graw-xlib/graw_xlib.c
index 2827747..ed112b9 100644
--- a/src/gallium/targets/graw-xlib/graw_xlib.c
+++ b/src/gallium/targets/graw-xlib/graw_xlib.c
@@ -89,13 +89,13 @@ graw_create_window_and_screen( int x,
if (visinfo-red_mask == 0xff
visinfo-green_mask == 0xff00
visinfo-blue_mask == 0xff) {
- if (format != PIPE_FORMAT_B8G8R8A8_UNORM)
+ if (format != PIPE_FORMAT_ARGB_UNORM)
goto fail;
}
else if (visinfo-red_mask == 0xff
visinfo-green_mask == 0xff00
visinfo-blue_mask == 0xff) {
- if (format != PIPE_FORMAT_R8G8B8A8_UNORM)
+ if (format != PIPE_FORMAT_ABGR_UNORM)
goto fail;
}
else {
--
1.8.2.1
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[Mesa-dev] [PATCH 10/13] util: Convert color pack to bytewise formats
From: Richard Sandiford r.sandif...@uk.ibm.com
This fixes them on big-endian.
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/auxiliary/util/u_pack_color.h | 36 +++
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_pack_color.h
b/src/gallium/auxiliary/util/u_pack_color.h
index 1f6a56a..9c25451 100644
--- a/src/gallium/auxiliary/util/u_pack_color.h
+++ b/src/gallium/auxiliary/util/u_pack_color.h
@@ -65,32 +65,32 @@ util_pack_color_ub(ubyte r, ubyte g, ubyte b, ubyte a,
enum pipe_format format, union util_color *uc)
{
switch (format) {
- case PIPE_FORMAT_A8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBA_UNORM:
{
uc-ui = (r 24) | (g 16) | (b 8) | a;
}
return;
- case PIPE_FORMAT_X8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBX_UNORM:
{
uc-ui = (r 24) | (g 16) | (b 8) | 0xff;
}
return;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_ARGB_UNORM:
{
uc-ui = (a 24) | (r 16) | (g 8) | b;
}
return;
- case PIPE_FORMAT_B8G8R8X8_UNORM:
+ case PIPE_FORMAT_XRGB_UNORM:
{
uc-ui = (0xff 24) | (r 16) | (g 8) | b;
}
return;
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRA_UNORM:
{
uc-ui = (b 24) | (g 16) | (r 8) | a;
}
return;
- case PIPE_FORMAT_X8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRX_UNORM:
{
uc-ui = (b 24) | (g 16) | (r 8) | 0xff;
}
@@ -166,7 +166,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
ubyte *r, ubyte *g, ubyte *b, ubyte *a)
{
switch (format) {
- case PIPE_FORMAT_A8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBA_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 24) 0xff);
@@ -175,7 +175,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
*a = (ubyte) ((p 0) 0xff);
}
return;
- case PIPE_FORMAT_X8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBX_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 24) 0xff);
@@ -184,7 +184,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
*a = (ubyte) 0xff;
}
return;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_ARGB_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 16) 0xff);
@@ -193,7 +193,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
*a = (ubyte) ((p 24) 0xff);
}
return;
- case PIPE_FORMAT_B8G8R8X8_UNORM:
+ case PIPE_FORMAT_XRGB_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 16) 0xff);
@@ -202,7 +202,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
*a = (ubyte) 0xff;
}
return;
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRA_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 8) 0xff);
@@ -211,7 +211,7 @@ util_unpack_color_ub(enum pipe_format format, union
util_color *uc,
*a = (ubyte) ((p 0) 0xff);
}
return;
- case PIPE_FORMAT_X8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRX_UNORM:
{
uint p = uc-ui;
*r = (ubyte) ((p 8) 0xff);
@@ -350,32 +350,32 @@ util_pack_color(const float rgba[4], enum pipe_format
format, union util_color *
}
switch (format) {
- case PIPE_FORMAT_A8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBA_UNORM:
{
uc-ui = (r 24) | (g 16) | (b 8) | a;
}
return;
- case PIPE_FORMAT_X8B8G8R8_UNORM:
+ case PIPE_FORMAT_RGBX_UNORM:
{
uc-ui = (r 24) | (g 16) | (b 8) | 0xff;
}
return;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_ARGB_UNORM:
{
uc-ui = (a 24) | (r 16) | (g 8) | b;
}
return;
- case PIPE_FORMAT_B8G8R8X8_UNORM:
+ case PIPE_FORMAT_XRGB_UNORM:
{
uc-ui = (0xff 24) | (r 16) | (g 8) | b;
}
return;
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRA_UNORM:
{
uc-ui = (b 24) | (g 16) | (r 8) | a;
}
return;
- case PIPE_FORMAT_X8R8G8B8_UNORM:
+ case PIPE_FORMAT_BGRX_UNORM:
{
uc-ui = (b 24) | (g 16) | (r 8) | 0xff;
}
--
1.8.2.1
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[Mesa-dev] [PATCH 11/13] llvmpipe: Fix convert_to_blend_type on big-endian
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/drivers/llvmpipe/lp_state_fs.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c
b/src/gallium/drivers/llvmpipe/lp_state_fs.c
index 6921210..0691a40 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_fs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c
@@ -987,12 +987,17 @@ convert_to_blend_type(struct gallivm_state *gallivm,
for (i = 0; i num_srcs; ++i) {
LLVMValueRef chans[4];
LLVMValueRef res = NULL;
- unsigned sa = 0;
dst[i] = LLVMBuildZExt(builder, src[i], lp_build_vec_type(gallivm,
src_type), );
for (j = 0; j src_fmt-nr_channels; ++j) {
unsigned mask = 0;
+ unsigned sa = src_fmt-channel[j].shift;
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+ unsigned from_lsb = j;
+#else
+ unsigned from_lsb = src_fmt-nr_channels - j - 1;
+#endif
for (k = 0; k src_fmt-channel[j].size; ++k) {
mask |= 1 k;
@@ -1018,11 +1023,9 @@ convert_to_blend_type(struct gallivm_state *gallivm,
/* Insert bits into correct position */
chans[j] = LLVMBuildShl(builder,
chans[j],
- lp_build_const_int_vec(gallivm, src_type, j *
blend_type.width),
+ lp_build_const_int_vec(gallivm, src_type,
from_lsb * blend_type.width),
);
- sa += src_fmt-channel[j].size;
-
if (j == 0) {
res = chans[j];
} else {
@@ -1136,12 +1139,17 @@ convert_from_blend_type(struct gallivm_state *gallivm,
for (i = 0; i num_srcs; ++i) {
LLVMValueRef chans[4];
LLVMValueRef res = NULL;
- unsigned sa = 0;
dst[i] = LLVMBuildBitCast(builder, src[i], lp_build_vec_type(gallivm,
src_type), );
for (j = 0; j src_fmt-nr_channels; ++j) {
unsigned mask = 0;
+ unsigned sa = src_fmt-channel[j].shift;
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
+ unsigned from_lsb = j;
+#else
+ unsigned from_lsb = src_fmt-nr_channels - j - 1;
+#endif
assert(blend_type.width src_fmt-channel[j].size);
@@ -1152,7 +1160,7 @@ convert_from_blend_type(struct gallivm_state *gallivm,
/* Extract bits */
chans[j] = LLVMBuildLShr(builder,
dst[i],
- lp_build_const_int_vec(gallivm, src_type, j
* blend_type.width),
+ lp_build_const_int_vec(gallivm, src_type,
from_lsb * blend_type.width),
);
chans[j] = LLVMBuildAnd(builder,
--
1.8.2.1
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[Mesa-dev] [PATCH 12/13] gallivm: Fix big-endian machines
From: Richard Sandiford r.sandif...@uk.ibm.com
This adds a bit-shift count to the format table, and adds the concept of
vector or bitwise alignment on gathers.
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/auxiliary/gallivm/lp_bld_format_aos.c | 22 +++
src/gallium/auxiliary/gallivm/lp_bld_format_soa.c | 13 ++--
src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c | 2 +-
src/gallium/auxiliary/gallivm/lp_bld_gather.c | 25 +--
src/gallium/auxiliary/gallivm/lp_bld_gather.h | 6 +-
src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c | 4 +-
src/gallium/auxiliary/gallivm/lp_bld_swizzle.c| 80 ---
src/gallium/auxiliary/util/u_format.h | 25 ++-
src/gallium/auxiliary/util/u_format_pack.py | 8 +--
src/gallium/auxiliary/util/u_format_parse.py | 10 +++
src/gallium/auxiliary/util/u_format_table.py | 4 +-
src/gallium/drivers/llvmpipe/lp_bld_depth.c | 28 ++--
12 files changed, 142 insertions(+), 85 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
index 3675e68..af755d4 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
@@ -139,12 +139,12 @@ format_matches_type(const struct util_format_description
*desc,
/**
- * Unpack a single pixel into its RGBA components.
+ * Unpack a single pixel into its XYZW components.
*
* @param desc the pixel format for the packed pixel value
* @param packed integer pixel in a format such as PIPE_FORMAT_B8G8R8A8_UNORM
*
- * @return RGBA in a float[4] or ubyte[4] or ushort[4] vector.
+ * @return XYZW in a float[4] or ubyte[4] or ushort[4] vector.
*/
static INLINE LLVMValueRef
lp_build_unpack_arith_rgba_aos(struct gallivm_state *gallivm,
@@ -159,7 +159,6 @@ lp_build_unpack_arith_rgba_aos(struct gallivm_state
*gallivm,
boolean normalized;
boolean needs_uitofp;
- unsigned shift;
unsigned i;
/* TODO: Support more formats */
@@ -190,11 +189,11 @@ lp_build_unpack_arith_rgba_aos(struct gallivm_state
*gallivm,
/* Initialize vector constants */
normalized = FALSE;
needs_uitofp = FALSE;
- shift = 0;
/* Loop over 4 color components */
for (i = 0; i 4; ++i) {
unsigned bits = desc-channel[i].size;
+ unsigned shift = desc-channel[i].shift;
if (desc-channel[i].type == UTIL_FORMAT_TYPE_VOID) {
shifts[i] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm-context));
@@ -220,12 +219,10 @@ lp_build_unpack_arith_rgba_aos(struct gallivm_state
*gallivm,
else
scales[i] = lp_build_const_float(gallivm, 1.0);
}
-
- shift += bits;
}
- /* Ex: convert packed = {BGRA, BGRA, BGRA, BGRA}
-* into masked = {B, G, R, A}
+ /* Ex: convert packed = {XYZW, XYZW, XYZW, XYZW}
+* into masked = {X, Y, Z, W}
*/
shifted = LLVMBuildLShr(builder, packed, LLVMConstVector(shifts, 4), );
masked = LLVMBuildAnd(builder, shifted, LLVMConstVector(masks, 4), );
@@ -272,7 +269,6 @@ lp_build_pack_rgba_aos(struct gallivm_state *gallivm,
LLVMValueRef shifts[4];
LLVMValueRef scales[4];
boolean normalized;
- unsigned shift;
unsigned i, j;
assert(desc-layout == UTIL_FORMAT_LAYOUT_PLAIN);
@@ -298,9 +294,9 @@ lp_build_pack_rgba_aos(struct gallivm_state *gallivm,
LLVMConstVector(swizzles, 4), );
normalized = FALSE;
- shift = 0;
for (i = 0; i 4; ++i) {
unsigned bits = desc-channel[i].size;
+ unsigned shift = desc-channel[i].shift;
if (desc-channel[i].type == UTIL_FORMAT_TYPE_VOID) {
shifts[i] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm-context));
@@ -321,8 +317,6 @@ lp_build_pack_rgba_aos(struct gallivm_state *gallivm,
else
scales[i] = lp_build_const_float(gallivm, 1.0);
}
-
- shift += bits;
}
if (normalized)
@@ -406,7 +400,7 @@ lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
packed = lp_build_gather(gallivm, type.length/4,
format_desc-block.bits, type.width*4,
- base_ptr, offset);
+ base_ptr, offset, TRUE);
assert(format_desc-block.bits = vec_len);
@@ -444,7 +438,7 @@ lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
packed = lp_build_gather_elem(gallivm, num_pixels,
format_desc-block.bits, 32,
- base_ptr, offset, k);
+ base_ptr, offset, k, FALSE);
tmps[k] = lp_build_unpack_arith_rgba_aos(gallivm,
format_desc,
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
index 54ca61a..2c62291 100644
---
[Mesa-dev] [PATCH 13/13] gallivm: Fix lp_build_rgba8_to_fi32_soa for big endian
From: Richard Sandiford r.sandif...@uk.ibm.com
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/auxiliary/gallivm/lp_bld_format_soa.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
index 2c62291..cf51b34 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
@@ -279,7 +279,11 @@ lp_build_rgba8_to_fi32_soa(struct gallivm_state *gallivm,
/* Decode the input vector components */
for (chan = 0; chan 4; ++chan) {
+#ifdef PIPE_ARCH_LITTLE_ENDIAN
unsigned start = chan*8;
+#else
+ unsigned start = (3-chan)*8;
+#endif
unsigned stop = start + 8;
LLVMValueRef input;
--
1.8.2.1
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[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 edg...@yandex.ru changed: What|Removed |Added CC||edg...@yandex.ru -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #9 from edg...@yandex.ru --- Confirmed. chipset: 6 series mesa: 8.0.4 xorg-x11-drv-intel: 2.21.5 xserver: X.Org X Server 1.12.4 libdrm: 2.4.42 Linux distribution: Fedora 17 -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #10 from Kenneth Graunke kenn...@whitecape.org --- I was able to reproduce this behavior on Ivybridge with Mesa master, so it's not just a 8.x bug. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #11 from Igor Gnatenko i.gnatenko.br...@gmail.com --- (In reply to comment #10) I was able to reproduce this behavior on Ivybridge with Mesa master, so it's not just a 8.x bug. Yes. I'm using git version. Videocard: Intel HD4000. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 00/13] Fix llvmpipe on big-endian
On Don, 2013-05-16 at 09:06 -0400, Adam Jackson wrote: This series introduces bytewise formats for framebuffers, and fixes the vector representation on big-endian. No damage to piglit on little-endian, but fixes a few thousand on big-endian, enough to make gnome-shell work correctly. Nice. I don't have a lot of bandwidth for reviewing this thoroughly right now, but the format related changes look good to me on a quick glance. Just one thing: Why do you call the new formats 'bytewise'? That term seems more appropriate for the existing formats to this non-native English speaker, I'd call the new formats 'packed' or something along those lines. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Debian, X and DRI developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 00/13] Fix llvmpipe on big-endian
On Thu, 2013-05-16 at 16:28 +0200, Michel Dänzer wrote: On Don, 2013-05-16 at 09:06 -0400, Adam Jackson wrote: This series introduces bytewise formats for framebuffers, and fixes the vector representation on big-endian. No damage to piglit on little-endian, but fixes a few thousand on big-endian, enough to make gnome-shell work correctly. Nice. I don't have a lot of bandwidth for reviewing this thoroughly right now, but the format related changes look good to me on a quick glance. Just one thing: Why do you call the new formats 'bytewise'? That term seems more appropriate for the existing formats to this non-native English speaker, I'd call the new formats 'packed' or something along those lines. Eh, had to make up something. I was sort of looking for an adjective for these formats imply a byte-level ordering as opposed to these formats have whatever vector order is platform-convenient, but packed probably makes more sense. - ajax ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 03/13] gallium: Introduce 32-bit bytewise format names
It should be documented somewhere why certain formats are named
xyzw and the others are named x8y8z8w8.
Marek
On Thu, May 16, 2013 at 3:06 PM, Adam Jackson a...@redhat.com wrote:
From: Richard Sandiford r.sandif...@uk.ibm.com
RGBA has R at byte 0 and A at byte 3, regardless of platform
endianness.
Reviewed-by: Adam Jackson a...@redhat.com
---
src/gallium/include/pipe/p_format.h | 38
+
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/src/gallium/include/pipe/p_format.h
b/src/gallium/include/pipe/p_format.h
index 098b25b..1289983 100644
--- a/src/gallium/include/pipe/p_format.h
+++ b/src/gallium/include/pipe/p_format.h
@@ -33,6 +33,7 @@
extern C {
#endif
+#include p_config.h
enum pipe_type {
PIPE_TYPE_UNORM = 0,
@@ -53,10 +54,10 @@ enum pipe_type {
enum pipe_format {
PIPE_FORMAT_NONE= 0,
- PIPE_FORMAT_B8G8R8A8_UNORM = 1,
- PIPE_FORMAT_B8G8R8X8_UNORM = 2,
- PIPE_FORMAT_A8R8G8B8_UNORM = 3,
- PIPE_FORMAT_X8R8G8B8_UNORM = 4,
+ PIPE_FORMAT_ARGB_UNORM = 1,
+ PIPE_FORMAT_XRGB_UNORM = 2,
+ PIPE_FORMAT_BGRA_UNORM = 3,
+ PIPE_FORMAT_BGRX_UNORM = 4,
PIPE_FORMAT_B5G5R5A1_UNORM = 5,
PIPE_FORMAT_B4G4R4A4_UNORM = 6,
PIPE_FORMAT_B5G6R5_UNORM= 7,
@@ -119,8 +120,8 @@ enum pipe_format {
PIPE_FORMAT_R8_UNORM= 64,
PIPE_FORMAT_R8G8_UNORM = 65,
PIPE_FORMAT_R8G8B8_UNORM= 66,
- PIPE_FORMAT_R8G8B8A8_UNORM = 67,
- PIPE_FORMAT_X8B8G8R8_UNORM = 68,
+ PIPE_FORMAT_ABGR_UNORM = 67,
+ PIPE_FORMAT_RGBX_UNORM = 68,
PIPE_FORMAT_R8_USCALED = 69,
PIPE_FORMAT_R8G8_USCALED= 70,
PIPE_FORMAT_R8G8B8_USCALED = 71,
@@ -180,7 +181,7 @@ enum pipe_format {
PIPE_FORMAT_R5SG5SB6U_NORM = 120,
/* TODO: re-order these */
- PIPE_FORMAT_A8B8G8R8_UNORM = 121,
+ PIPE_FORMAT_RGBA_UNORM = 121,
PIPE_FORMAT_B5G5R5X1_UNORM = 122,
PIPE_FORMAT_R10G10B10A2_USCALED = 123,
PIPE_FORMAT_R11G11B10_FLOAT = 124,
@@ -193,7 +194,7 @@ enum pipe_format {
PIPE_FORMAT_B10G10R10A2_UNORM = 131,
PIPE_FORMAT_R10SG10SB10SA2U_NORM= 132,
PIPE_FORMAT_R8G8Bx_SNORM= 133,
- PIPE_FORMAT_R8G8B8X8_UNORM = 134,
+ PIPE_FORMAT_XBGR_UNORM = 134,
PIPE_FORMAT_B4G4R4X4_UNORM = 135,
/* some stencil samplers formats */
@@ -343,6 +344,27 @@ enum pipe_format {
PIPE_FORMAT_COUNT
};
+#if defined(PIPE_ARCH_LITTLE_ENDIAN)
+#define PIPE_FORMAT_R8G8B8A8_UNORM PIPE_FORMAT_ABGR_UNORM
+#define PIPE_FORMAT_R8G8B8X8_UNORM PIPE_FORMAT_XBGR_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_B8G8R8A8_UNORM PIPE_FORMAT_ARGB_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_A8R8G8B8_UNORM PIPE_FORMAT_BGRA_UNORM
+#define PIPE_FORMAT_X8R8G8B8_UNORM PIPE_FORMAT_BGRX_UNORM
+#define PIPE_FORMAT_A8B8G8R8_UNORM PIPE_FORMAT_RGBA_UNORM
+#define PIPE_FORMAT_X8B8G8R8_UNORM PIPE_FORMAT_RGBX_UNORM
+#elif defined(PIPE_ARCH_BIG_ENDIAN)
+#define PIPE_FORMAT_R8G8B8A8_UNORM PIPE_FORMAT_RGBA_UNORM
+#define PIPE_FORMAT_R8G8B8X8_UNORM PIPE_FORMAT_RGBX_UNORM
+#define PIPE_FORMAT_B8G8R8A8_UNORM PIPE_FORMAT_BGRA_UNORM
+#define PIPE_FORMAT_B8G8R8X8_UNORM PIPE_FORMAT_BGRX_UNORM
+#define PIPE_FORMAT_A8R8G8B8_UNORM PIPE_FORMAT_ARGB_UNORM
+#define PIPE_FORMAT_X8R8G8B8_UNORM PIPE_FORMAT_XRGB_UNORM
+#define PIPE_FORMAT_A8B8G8R8_UNORM PIPE_FORMAT_ABGR_UNORM
+#define PIPE_FORMAT_X8B8G8R8_UNORM PIPE_FORMAT_XBGR_UNORM
+#endif
+
enum pipe_video_chroma_format
{
PIPE_VIDEO_CHROMA_FORMAT_420,
--
1.8.2.1
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Re: [Mesa-dev] R600/SI Patches: A few cleanups for compute
Hi,
-- next part --
From dc547a89dac5039ce521f3c27fb23346251d488d Mon Sep 17 00:00:00 2001 From:
Tom Stellard thomas.stellard at amd.com
Date: Tue, 7 May 2013 16:26:26 -0400
Subject: [PATCH 4/7] R600: Swap the legality of rotl and rotr
The hardware supports rotr and not rotl.
---
lib/Target/R600/AMDGPUISelLowering.cpp | 3 +++
lib/Target/R600/AMDGPUISelLowering.h | 1 -
lib/Target/R600/AMDGPUInstrInfo.td | 6 --
lib/Target/R600/AMDGPUInstructions.td | 6 ++
lib/Target/R600/AMDILISelLowering.cpp | 2 --
lib/Target/R600/R600ISelLowering.cpp | 15 ---
lib/Target/R600/R600Instructions.td| 6 ++
test/CodeGen/R600/rotr.ll | 29 +
8 files changed, 40 insertions(+), 28 deletions(-)
create mode 100644 test/CodeGen/R600/rotr.ll
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp
b/lib/Target/R600/AMDGPUISelLowering.cpp
index a266df5..b3c51e3 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -46,6 +46,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine
TM) :
setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
setOperationAction(ISD::FRINT, MVT::f32, Legal);
+ // The hardware supports ROTR, but not ROTL
+ setOperationAction(ISD::ROTL, MVT::i32, Expand);
+
// Lower floating point store/load to integer store/load to reduce the
number
// of patterns in tablegen.
setOperationAction(ISD::STORE, MVT::f32, Promote);
diff --git a/lib/Target/R600/AMDGPUISelLowering.h
b/lib/Target/R600/AMDGPUISelLowering.h
index c2a79ea..6f8ab8b 100644
--- a/lib/Target/R600/AMDGPUISelLowering.h
+++ b/lib/Target/R600/AMDGPUISelLowering.h
@@ -115,7 +115,6 @@ enum {
RET_FLAG,
BRANCH_COND,
// End AMDIL ISD Opcodes
- BITALIGN,
BUFFER_STORE,
DWORDADDR,
FRACT,
diff --git a/lib/Target/R600/AMDGPUInstrInfo.td
b/lib/Target/R600/AMDGPUInstrInfo.td
index b66ae87..a0a3410 100644
--- a/lib/Target/R600/AMDGPUInstrInfo.td
+++ b/lib/Target/R600/AMDGPUInstrInfo.td
@@ -23,12 +23,6 @@ def AMDGPUDTIntTernaryOp : SDTypeProfile1, 3, [
// AMDGPU DAG Nodes
//
-// out = ((a 32) | b) c)
-//
-// Can be used to optimize rtol:
-// rotl(a, b) = bitalign(a, a, 32 - b)
-def AMDGPUbitalign : SDNodeAMDGPUISD::BITALIGN, AMDGPUDTIntTernaryOp;
-
// This argument to this node is a dword address.
def AMDGPUdwordaddr : SDNodeAMDGPUISD::DWORDADDR, SDTIntUnaryOp;
diff --git a/lib/Target/R600/AMDGPUInstructions.td
b/lib/Target/R600/AMDGPUInstructions.td
index d2620b2..54df7d0 100644
--- a/lib/Target/R600/AMDGPUInstructions.td
+++ b/lib/Target/R600/AMDGPUInstructions.td
@@ -295,6 +295,12 @@ class BFEPattern Instruction BFE : Pat
(BFE $x, $y, $z)
;
+// rotr pattern
+class ROTRPattern Instruction BIT_ALIGN : Pat
+ (rotr i32:$src0, i32:$src1),
+ (BIT_ALIGN $src0, $src0, $src1)
+;
+
include R600Instructions.td
include SIInstrInfo.td
diff --git a/lib/Target/R600/AMDILISelLowering.cpp
b/lib/Target/R600/AMDILISelLowering.cpp
index 922cac1..e20dbe0 100644
--- a/lib/Target/R600/AMDILISelLowering.cpp
+++ b/lib/Target/R600/AMDILISelLowering.cpp
@@ -138,8 +138,6 @@ void AMDGPUTargetLowering::InitAMDILLowering() {
setOperationAction(ISD::SMUL_LOHI, VT, Expand);
setOperationAction(ISD::UMUL_LOHI, VT, Expand);
-// GPU doesn't have a rotl, rotr, or byteswap instruction
-setOperationAction(ISD::ROTR, VT, Expand);
setOperationAction(ISD::BSWAP, VT, Expand);
// GPU doesn't have any counting operators
diff --git a/lib/Target/R600/R600ISelLowering.cpp
b/lib/Target/R600/R600ISelLowering.cpp
index 7252235..e58a8dd 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -72,8 +72,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine TM) :
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i1, Custom);
- setOperationAction(ISD::ROTL, MVT::i32, Custom);
-
setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
@@ -327,7 +325,6 @@ using namespace llvm::AMDGPUIntrinsic;
SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG DAG)
const {
switch (Op.getOpcode()) {
default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
- case ISD::ROTL: return LowerROTL(Op, DAG);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SELECT: return LowerSELECT(Op, DAG);
case ISD::STORE: return LowerSTORE(Op, DAG);
@@ -518,18 +515,6 @@ SDValue R600TargetLowering::LowerFrameIndex(SDValue Op,
SelectionDAG DAG) const
return DAG.getConstant(Offset * 4 * TFL-getStackWidth(MF), MVT::i32);
}
-SDValue R600TargetLowering::LowerROTL(SDValue Op, SelectionDAG DAG) const {
- DebugLoc DL = Op.getDebugLoc();
- EVT VT = Op.getValueType();
-
- return DAG.getNode(AMDGPUISD::BITALIGN, DL, VT,
- Op.getOperand(0),
-
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 --- Comment #12 from Paul Berry stereotype...@gmail.com --- I've verified that your test passes with the nVidia proprietary driver. However I'm not yet convinced this is a bug in Mesa, and here's why: This test is exercising a corner case which the spec are somewhat contradictory about: what happens when user clip planes are in use but a shader does not write to gl_ClipVertex? - All versions of OpenGL from 2.0 onward clearly state that the behaviour is undefined. - GLSL 1.10 and 1.20 specs say that the behaviour is undefined. - GLSL 1.30 through 4.10 specs say that clipping is performed using gl_Position*. - GLSL 4.20 onward say that the behaviour is undefined. Additionally, the Changes from revision 8 of Version 4.20 section of the spec says Make GLSL consistent with the API regarding user clipping, by no longer referring to gl_Position when gl_ClipVertex is not written. Rather, user clipping becomes undefined. *Even in the GLSL 1.30 through 4.10 case, the behaviour is poorly defined: OpenGL says that clip planes are specified in object coordinates and are then converted to eye coordinates by OpenGL at the time they are specified. When gl_ClipVertex is in use, it is assumed to be in eye coordinates too. However, gl_Position uses clip coordinates. So, in the case where clipping is performed using gl_Position, should the coordinates be transformed to match, or should the clipping be performed directly using gl_Position, in spite of the coordinate system mismatch? A literal reading of the spec seems to indicate that clipping should be performed directly using gl_Position--this is the interpretation Mesa uses. As a result of the coordinate system mismatch, clipping using gl_Position is usually counterintuitive, and doesn't match the behaviour of the fixed function pipeline. In the case of your test, that manifests as the left half of the window getting clipped, since the left half of the window has a negative value of gl_Position.x. As far as I've been able to tell from experimenting with the nVidia proprietary driver, its behaviour in this corner case is to not clip at all. That causes your test to pass, but not because clipping is being performed in the way you expect. So I'm a little bit loathe to fix the bug by changing Mesa to match nVidia behaviour. Instead, my recommendation would be to change the test to avoid exercising the undefined/poorly-defined behaviour. If you add this line to the vertex shader: gl_ClipVertex = gl_ModelViewMatrix * gl_Vertex; you will get the expected clipping behaviour from both Mesa and proprietary drivers. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64668] Clipping is performed incorrectly when using shaders with intel/nouveau/radeon drivers.
https://bugs.freedesktop.org/show_bug.cgi?id=64668 Paul Berry stereotype...@gmail.com changed: What|Removed |Added CC||stereotype...@gmail.com -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 00/13] Fix llvmpipe on big-endian
On Don, 2013-05-16 at 10:59 -0400, Adam Jackson wrote: On Thu, 2013-05-16 at 16:28 +0200, Michel Dänzer wrote: On Don, 2013-05-16 at 09:06 -0400, Adam Jackson wrote: This series introduces bytewise formats for framebuffers, and fixes the vector representation on big-endian. No damage to piglit on little-endian, but fixes a few thousand on big-endian, enough to make gnome-shell work correctly. Nice. I don't have a lot of bandwidth for reviewing this thoroughly right now, but the format related changes look good to me on a quick glance. Just one thing: Why do you call the new formats 'bytewise'? That term seems more appropriate for the existing formats to this non-native English speaker, I'd call the new formats 'packed' or something along those lines. Eh, had to make up something. I was sort of looking for an adjective for these formats imply a byte-level ordering as opposed to these formats have whatever vector order is platform-convenient, but packed probably makes more sense. The memory layout of the new formats depends on the host endianness. They're essentially defined as packed 32 bit values. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Debian, X and DRI developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/3] gallivm: handle z32s8x24 format for sampling
From: Roland Scheidegger srol...@vmware.com
Since we can only sample either depth or stencil but not both only load
the required bits which makes things a bit easier (it requires special
handling since the format doesn't fit into 32bit).
The logic for deciding if depth or stencil should be sampled is a bit odd,
but seems to be what other drivers and statetrackers do: if it's a format with
both depth and stencil (or just with depth) then sample depth, for sampling
stencil a sampler view format with only stencil is required.
Also while here fix up stencil sampling for other formats as well, though
this isn't supported by mesa (ARB_stencil_texturing), and while blits would
use it they don't work neither since they'd also need stencil export.
---
src/gallium/auxiliary/gallivm/lp_bld_format_soa.c | 59 ++---
1 file changed, 51 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
index 54ca61a..eb50840 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
@@ -51,16 +51,25 @@ lp_build_format_swizzle_soa(const struct
util_format_description *format_desc,
assert(UTIL_FORMAT_SWIZZLE_1 == PIPE_SWIZZLE_ONE);
if (format_desc-colorspace == UTIL_FORMAT_COLORSPACE_ZS) {
+ enum util_format_swizzle swizzle;
+ LLVMValueRef depthorstencil;
+
+ if (util_format_has_stencil(format_desc)
+ !util_format_has_depth(format_desc)) {
+ assert(!bld-type.floating);
+ swizzle = format_desc-swizzle[1];
+ }
+ else {
+ assert(bld-type.floating);
+ swizzle = format_desc-swizzle[0];
+ }
/*
- * Return zzz1 for depth-stencil formats.
- *
- * XXX: Allow to control the depth swizzle with an additional parameter,
- * as the caller may wish another depth swizzle, or retain the stencil
- * value.
+ * Return zzz1 or sss1 for depth-stencil formats here.
+ * Correct swizzling will be handled by apply_sampler_swizzle() later.
*/
- enum util_format_swizzle swizzle = format_desc-swizzle[0];
- LLVMValueRef depth = lp_build_swizzle_soa_channel(bld, unswizzled,
swizzle);
- swizzled_out[2] = swizzled_out[1] = swizzled_out[0] = depth;
+ depthorstencil = lp_build_swizzle_soa_channel(bld, unswizzled, swizzle);
+
+ swizzled_out[2] = swizzled_out[1] = swizzled_out[0] = depthorstencil;
swizzled_out[3] = bld-one;
}
else {
@@ -392,6 +401,40 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,
return;
}
+ if (format_desc-colorspace == UTIL_FORMAT_COLORSPACE_ZS
+ format_desc-block.bits == 64) {
+ /*
+ * special case the format is 64 bits but we only require
+ * 32bit (or 8bit) from each block.
+ */
+ LLVMValueRef packed;
+
+ if (format_desc-format == PIPE_FORMAT_X32_S8X24_UINT) {
+ /*
+ * for stencil simply fix up offsets - could in fact change
+ * base_ptr instead even outside the shader.
+ */
+ unsigned mask = (1 8) - 1;
+ LLVMValueRef s_offset = lp_build_const_int_vec(gallivm, type, 4);
+ offset = LLVMBuildAdd(builder, offset, s_offset, );
+ packed = lp_build_gather(gallivm, type.length,
+ 32, type.width, base_ptr, offset);
+ packed = LLVMBuildAnd(builder, packed,
+ lp_build_const_int_vec(gallivm, type, mask),
);
+ }
+ else {
+ assert (format_desc-format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
+ packed = lp_build_gather(gallivm, type.length,
+ 32, type.width, base_ptr, offset);
+ packed = LLVMBuildBitCast(builder, packed,
+ lp_build_vec_type(gallivm, type), );
+ }
+ /* for consistency with lp_build_unpack_rgba_soa() return sss1 or zzz1 */
+ rgba_out[0] = rgba_out[1] = rgba_out[2] = packed;
+ rgba_out[3] = lp_build_const_vec(gallivm, type, 1.0f);
+ return;
+ }
+
/*
* Try calling lp_build_fetch_rgba_aos for all pixels.
*/
--
1.7.9.5
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[Mesa-dev] [PATCH 2/3] llvmpipe: handle z32s8x24 depth/stencil format
From: Roland Scheidegger srol...@vmware.com
We need to split up the depth and stencil values in this case, and there's
some new logic required to handle float depth and stencil simultaneously.
Also make sure we get the 64bit zs clear values and masks propagated
correctly.
---
src/gallium/auxiliary/gallivm/lp_bld_pack.c |3 +-
src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c |5 +
src/gallium/drivers/llvmpipe/lp_bld_depth.c | 269 +
src/gallium/drivers/llvmpipe/lp_bld_depth.h | 10 +-
src/gallium/drivers/llvmpipe/lp_rast.c| 28 ++-
src/gallium/drivers/llvmpipe/lp_rast.h|6 +-
src/gallium/drivers/llvmpipe/lp_setup.c | 18 +-
src/gallium/drivers/llvmpipe/lp_setup_context.h |4 +-
src/gallium/drivers/llvmpipe/lp_state_fs.c| 42 ++--
9 files changed, 242 insertions(+), 143 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_pack.c
b/src/gallium/auxiliary/gallivm/lp_bld_pack.c
index 9eb9ab0..0a57e39 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_pack.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_pack.c
@@ -255,7 +255,8 @@ lp_build_concat_n(struct gallivm_state *gallivm,
/**
* Interleave vector elements.
*
- * Matches the PUNPCKLxx and PUNPCKHxx SSE instructions.
+ * Matches the PUNPCKLxx and PUNPCKHxx SSE instructions
+ * (but not for 256bit AVX vectors).
*/
LLVMValueRef
lp_build_interleave2(struct gallivm_state *gallivm,
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
index beefdae..7be64bf 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
@@ -1540,6 +1540,11 @@ lp_build_sample_soa(struct gallivm_state *gallivm,
bld.texel_type = lp_type_uint_vec(type.width, type.width *
type.length);
}
}
+ else if (util_format_has_stencil(bld.format_desc)
+ !util_format_has_depth(bld.format_desc)) {
+ /* for stencil only formats, sample stencil (uint) */
+ bld.texel_type = lp_type_int_vec(type.width, type.width * type.length);
+ }
if (!static_texture_state-level_zero_only) {
derived_sampler_state.min_mip_filter =
static_sampler_state-min_mip_filter;
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_depth.c
b/src/gallium/drivers/llvmpipe/lp_bld_depth.c
index 1cd36b8..f03bfa8 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_depth.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_depth.c
@@ -313,7 +313,7 @@ lp_depth_type(const struct util_format_description
*format_desc,
if (format_desc-channel[z_swizzle].type == UTIL_FORMAT_TYPE_FLOAT) {
type.floating = TRUE;
assert(z_swizzle == 0);
- assert(format_desc-channel[z_swizzle].size ==
format_desc-block.bits);
+ assert(format_desc-channel[z_swizzle].size == 32);
}
else if(format_desc-channel[z_swizzle].type ==
UTIL_FORMAT_TYPE_UNSIGNED) {
assert(format_desc-block.bits = 32);
@@ -347,15 +347,18 @@ static boolean
get_z_shift_and_mask(const struct util_format_description *format_desc,
unsigned *shift, unsigned *width, unsigned *mask)
{
- const unsigned total_bits = format_desc-block.bits;
+ unsigned total_bits;
unsigned z_swizzle;
unsigned chan;
unsigned padding_left, padding_right;
-
+
assert(format_desc-colorspace == UTIL_FORMAT_COLORSPACE_ZS);
assert(format_desc-block.width == 1);
assert(format_desc-block.height == 1);
+ /* 64bit d/s format is special already extracted 32 bits */
+ total_bits = format_desc-block.bits 32 ? 32 : format_desc-block.bits;
+
z_swizzle = format_desc-swizzle[0];
if (z_swizzle == UTIL_FORMAT_SWIZZLE_NONE)
@@ -402,6 +405,14 @@ get_s_shift_and_mask(const struct util_format_description
*format_desc,
if (s_swizzle == UTIL_FORMAT_SWIZZLE_NONE)
return FALSE;
+ /* just special case 64bit d/s format */
+ if (format_desc-block.bits 32) {
+ assert(format_desc-format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
+ *shift = 0;
+ *mask = 0xff;
+ return TRUE;
+ }
+
*shift = 0;
for (chan = 0; chan s_swizzle; chan++)
*shift += format_desc-channel[chan].size;
@@ -517,24 +528,29 @@ lp_build_occlusion_count(struct gallivm_state *gallivm,
* \param loop_counter the current loop iteration
* \param depth_ptr pointer to the depth/stencil values of this 4x4 block
* \param depth_stride stride of the depth/stencil buffer
+ * \param zs_dst pointer to results (two values for 64bit ds format)
*/
-LLVMValueRef
+void
lp_build_depth_stencil_load_swizzled(struct gallivm_state *gallivm,
struct lp_type z_src_type,
const struct util_format_description
*format_desc,
LLVMValueRef depth_ptr,
LLVMValueRef depth_stride,
+
[Mesa-dev] [PATCH 3/3] llvmpipe: enable z32s8x24 format
From: Roland Scheidegger srol...@vmware.com
Now that we can handle it both for sampling and as depth/stencil enable it.
Passes nearly all additional piglit tests which are now performed, with two
exceptions (one being a framebuffer blit which fails for all other formats
including stencil too as we don't support stencil blits, the other reporting
a unexpected GL error so doesn't look to be llvmpipe's fault).
---
src/gallium/drivers/llvmpipe/lp_screen.c |6 --
1 file changed, 6 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c
b/src/gallium/drivers/llvmpipe/lp_screen.c
index 667ade1..699ca5f 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -361,12 +361,6 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen,
return FALSE;
}
- /* TODO: Support Z32_FLOAT_S8X24_UINT. See lp_bld_depth.c. */
- if (format_desc-colorspace == UTIL_FORMAT_COLORSPACE_ZS
- format_desc-block.bits 32) {
- return FALSE;
- }
-
if (bind PIPE_BIND_DEPTH_STENCIL) {
if (format_desc-layout != UTIL_FORMAT_LAYOUT_PLAIN)
return FALSE;
--
1.7.9.5
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Re: [Mesa-dev] R600/SI Patches: A few cleanups for compute
On Thu, May 16, 2013 at 08:21:36AM -0700, Vincent Lejeune wrote:
Hi,
-- next part --
From dc547a89dac5039ce521f3c27fb23346251d488d Mon Sep 17 00:00:00 2001
From: Tom Stellard thomas.stellard at amd.com
Date: Tue, 7 May 2013 16:26:26 -0400
Subject: [PATCH 4/7] R600: Swap the legality of rotl and rotr
The hardware supports rotr and not rotl.
---
lib/Target/R600/AMDGPUISelLowering.cpp | 3 +++
lib/Target/R600/AMDGPUISelLowering.h | 1 -
lib/Target/R600/AMDGPUInstrInfo.td | 6 --
lib/Target/R600/AMDGPUInstructions.td | 6 ++
lib/Target/R600/AMDILISelLowering.cpp | 2 --
lib/Target/R600/R600ISelLowering.cpp | 15 ---
lib/Target/R600/R600Instructions.td| 6 ++
test/CodeGen/R600/rotr.ll | 29 +
8 files changed, 40 insertions(+), 28 deletions(-)
create mode 100644 test/CodeGen/R600/rotr.ll
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp
b/lib/Target/R600/AMDGPUISelLowering.cpp
index a266df5..b3c51e3 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -46,6 +46,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine
TM) :
setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
setOperationAction(ISD::FRINT, MVT::f32, Legal);
+ // The hardware supports ROTR, but not ROTL
+ setOperationAction(ISD::ROTL, MVT::i32, Expand);
+
// Lower floating point store/load to integer store/load to reduce the
number
// of patterns in tablegen.
setOperationAction(ISD::STORE, MVT::f32, Promote);
diff --git a/lib/Target/R600/AMDGPUISelLowering.h
b/lib/Target/R600/AMDGPUISelLowering.h
index c2a79ea..6f8ab8b 100644
--- a/lib/Target/R600/AMDGPUISelLowering.h
+++ b/lib/Target/R600/AMDGPUISelLowering.h
@@ -115,7 +115,6 @@ enum {
RET_FLAG,
BRANCH_COND,
// End AMDIL ISD Opcodes
- BITALIGN,
BUFFER_STORE,
DWORDADDR,
FRACT,
diff --git a/lib/Target/R600/AMDGPUInstrInfo.td
b/lib/Target/R600/AMDGPUInstrInfo.td
index b66ae87..a0a3410 100644
--- a/lib/Target/R600/AMDGPUInstrInfo.td
+++ b/lib/Target/R600/AMDGPUInstrInfo.td
@@ -23,12 +23,6 @@ def AMDGPUDTIntTernaryOp : SDTypeProfile1, 3, [
// AMDGPU DAG Nodes
//
-// out = ((a 32) | b) c)
-//
-// Can be used to optimize rtol:
-// rotl(a, b) = bitalign(a, a, 32 - b)
-def AMDGPUbitalign : SDNodeAMDGPUISD::BITALIGN, AMDGPUDTIntTernaryOp;
-
// This argument to this node is a dword address.
def AMDGPUdwordaddr : SDNodeAMDGPUISD::DWORDADDR, SDTIntUnaryOp;
diff --git a/lib/Target/R600/AMDGPUInstructions.td
b/lib/Target/R600/AMDGPUInstructions.td
index d2620b2..54df7d0 100644
--- a/lib/Target/R600/AMDGPUInstructions.td
+++ b/lib/Target/R600/AMDGPUInstructions.td
@@ -295,6 +295,12 @@ class BFEPattern Instruction BFE : Pat
(BFE $x, $y, $z)
;
+// rotr pattern
+class ROTRPattern Instruction BIT_ALIGN : Pat
+ (rotr i32:$src0, i32:$src1),
+ (BIT_ALIGN $src0, $src0, $src1)
+;
+
include R600Instructions.td
include SIInstrInfo.td
diff --git a/lib/Target/R600/AMDILISelLowering.cpp
b/lib/Target/R600/AMDILISelLowering.cpp
index 922cac1..e20dbe0 100644
--- a/lib/Target/R600/AMDILISelLowering.cpp
+++ b/lib/Target/R600/AMDILISelLowering.cpp
@@ -138,8 +138,6 @@ void AMDGPUTargetLowering::InitAMDILLowering() {
setOperationAction(ISD::SMUL_LOHI, VT, Expand);
setOperationAction(ISD::UMUL_LOHI, VT, Expand);
-// GPU doesn't have a rotl, rotr, or byteswap instruction
-setOperationAction(ISD::ROTR, VT, Expand);
setOperationAction(ISD::BSWAP, VT, Expand);
// GPU doesn't have any counting operators
diff --git a/lib/Target/R600/R600ISelLowering.cpp
b/lib/Target/R600/R600ISelLowering.cpp
index 7252235..e58a8dd 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -72,8 +72,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine TM) :
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i1, Custom);
- setOperationAction(ISD::ROTL, MVT::i32, Custom);
-
setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
@@ -327,7 +325,6 @@ using namespace llvm::AMDGPUIntrinsic;
SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG DAG)
const {
switch (Op.getOpcode()) {
default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
- case ISD::ROTL: return LowerROTL(Op, DAG);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SELECT: return LowerSELECT(Op, DAG);
case ISD::STORE: return LowerSTORE(Op, DAG);
@@ -518,18 +515,6 @@ SDValue R600TargetLowering::LowerFrameIndex(SDValue Op,
SelectionDAG DAG) const
return DAG.getConstant(Offset * 4 * TFL-getStackWidth(MF), MVT::i32);
}
-SDValue R600TargetLowering::LowerROTL(SDValue Op,
[Mesa-dev] [PATCH V2 0/4] Implement ext_framebuffer_multisample_blit_scaled extension
V2: - Split patch 2/3 in to two: intel: Change the register type from UW to UD in blorp engine intel: Add multisample scaled blitting in blorp engine - Modify src texture coordinates clipping to account for scaling. - Code rewrite to avoid unwanted changes. Anuj Phogat (4): mesa: Implement ext_framebuffer_multisample_blit_scaled extension intel: Change the register type from UW to UD in blorp engine intel: Add multisample scaled blitting in blorp engine i965: Enable ext_framebuffer_multisample_blit_scaled on intel h/w src/mesa/drivers/dri/i965/brw_blorp.h | 34 ++-- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 223 - src/mesa/drivers/dri/intel/intel_extensions.c | 1 + src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 + src/mesa/main/extensions.c | 1 + src/mesa/main/fbobject.c | 30 +++- src/mesa/main/mtypes.h | 1 + 7 files changed, 194 insertions(+), 98 deletions(-) -- 1.8.1.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 1/4] mesa: Implement ext_framebuffer_multisample_blit_scaled extension
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
Reviewed-by: Paul Berry stereotype...@gmail.com
Reviewed-by: Brian Paul bri...@vmware.com
---
src/mesa/main/extensions.c | 1 +
src/mesa/main/fbobject.c | 30 +++---
src/mesa/main/mtypes.h | 1 +
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index db5a5ed..39aaad4 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -184,6 +184,7 @@ static const struct extension extension_table[] = {
{ GL_EXT_fog_coord, o(EXT_fog_coord),
GLL,1999 },
{ GL_EXT_framebuffer_blit,o(EXT_framebuffer_blit),
GL, 2005 },
{ GL_EXT_framebuffer_multisample,
o(EXT_framebuffer_multisample), GL, 2005 },
+ { GL_EXT_framebuffer_multisample_blit_scaled,
o(EXT_framebuffer_multisample_blit_scaled), GL, 2011 },
{ GL_EXT_framebuffer_object, o(EXT_framebuffer_object),
GL, 2000 },
{ GL_EXT_framebuffer_sRGB,o(EXT_framebuffer_sRGB),
GL, 1998 },
{ GL_EXT_gpu_program_parameters,
o(EXT_gpu_program_parameters), GLL,2006 },
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 80485f7..e7300f6 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2974,6 +2974,20 @@ compatible_resolve_formats(const struct gl_renderbuffer
*readRb,
return GL_FALSE;
}
+static GLboolean
+is_valid_blit_filter(const struct gl_context *ctx, GLenum filter)
+{
+ switch (filter) {
+ case GL_NEAREST:
+ case GL_LINEAR:
+ return true;
+ case GL_SCALED_RESOLVE_FASTEST_EXT:
+ case GL_SCALED_RESOLVE_NICEST_EXT:
+ return ctx-Extensions.EXT_framebuffer_multisample_blit_scaled;
+ default:
+ return false;
+ }
+}
/**
* Blit rectangular region, optionally from one framebuffer to another.
@@ -3023,8 +3037,17 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint
srcX1, GLint srcY1,
return;
}
- if (filter != GL_NEAREST filter != GL_LINEAR) {
- _mesa_error(ctx, GL_INVALID_ENUM, glBlitFramebufferEXT(filter));
+ if (!is_valid_blit_filter(ctx, filter)) {
+ _mesa_error(ctx, GL_INVALID_ENUM, glBlitFramebufferEXT(%s),
+ _mesa_lookup_enum_by_nr(filter));
+ return;
+ }
+
+ if ((filter == GL_SCALED_RESOLVE_FASTEST_EXT ||
+filter == GL_SCALED_RESOLVE_NICEST_EXT)
+(readFb-Visual.samples == 0 || drawFb-Visual.samples 0)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, glBlitFramebufferEXT(%s),
+ _mesa_lookup_enum_by_nr(filter));
return;
}
@@ -3257,7 +3280,8 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint
srcX1, GLint srcY1,
}
/* extra checks for multisample copies... */
- if (readFb-Visual.samples 0 || drawFb-Visual.samples 0) {
+ if ((readFb-Visual.samples 0 || drawFb-Visual.samples 0)
+ (filter == GL_NEAREST || filter == GL_LINEAR)) {
/* src and dest region sizes must be the same */
if (abs(srcX1 - srcX0) != abs(dstX1 - dstX0) ||
abs(srcY1 - srcY0) != abs(dstY1 - dstY0)) {
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index b68853b..8af6dc6 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3023,6 +3023,7 @@ struct gl_extensions
GLboolean EXT_fog_coord;
GLboolean EXT_framebuffer_blit;
GLboolean EXT_framebuffer_multisample;
+ GLboolean EXT_framebuffer_multisample_blit_scaled;
GLboolean EXT_framebuffer_object;
GLboolean EXT_framebuffer_sRGB;
GLboolean EXT_gpu_program_parameters;
--
1.8.1.4
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[Mesa-dev] [PATCH V2 2/4] intel: Change the register type from UW to UD in blorp engine
These changes are required to implement scaled blitting in blorp
in my next patch.
No regressions observed in piglit quick-driver.tests with this patch.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_blorp.h| 15 ++--
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 120 +--
src/mesa/drivers/dri/i965/brw_reg.h | 7 ++
3 files changed, 90 insertions(+), 52 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 8915080..70e3933 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -161,22 +161,19 @@ struct brw_blorp_coord_transform_params
void setup(GLuint src0, GLuint dst0, GLuint dst1,
bool mirror);
- int16_t multiplier;
- int16_t offset;
+ int32_t multiplier;
+ int32_t offset;
};
struct brw_blorp_wm_push_constants
{
- uint16_t dst_x0;
- uint16_t dst_x1;
- uint16_t dst_y0;
- uint16_t dst_y1;
+ uint32_t dst_x0;
+ uint32_t dst_x1;
+ uint32_t dst_y0;
+ uint32_t dst_y1;
brw_blorp_coord_transform_params x_transform;
brw_blorp_coord_transform_params y_transform;
-
- /* Pad out to an integral number of registers */
- uint16_t pad[8];
};
/* Every 32 bytes of push constant data constitutes one GEN register. */
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index c3ef054..b7ee92b 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -590,13 +590,12 @@ private:
void encode_msaa(unsigned num_samples, intel_msaa_layout layout);
void decode_msaa(unsigned num_samples, intel_msaa_layout layout);
void kill_if_outside_dst_rect();
- void translate_dst_to_src();
+ void translate_dst_to_src(unsigned intel_gen);
void single_to_blend();
void manual_blend(unsigned num_samples);
void sample(struct brw_reg dst);
void texel_fetch(struct brw_reg dst);
void mcs_fetch();
- void expand_to_32_bits(struct brw_reg src, struct brw_reg dst);
void texture_lookup(struct brw_reg dst, GLuint msg_type,
const sampler_message_arg *args, int num_args);
void render_target_write();
@@ -773,7 +772,7 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
kill_if_outside_dst_rect();
/* Next, apply a translation to obtain coordinates in the source image. */
- translate_dst_to_src();
+ translate_dst_to_src(brw-intel.gen);
/* If the source image is not multisampled, then we want to fetch sample
* number 0, because that's the only sample there is.
@@ -845,7 +844,7 @@ brw_blorp_blit_program::alloc_push_const_regs(int base_reg)
#define CONST_LOC(name) offsetof(brw_blorp_wm_push_constants, name)
#define ALLOC_REG(name) \
this-name = \
- brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, base_reg, CONST_LOC(name) / 2)
+ brw_ud1_reg(BRW_GENERAL_REGISTER_FILE, base_reg, CONST_LOC(name) / 4)
ALLOC_REG(dst_x0);
ALLOC_REG(dst_x1);
@@ -875,17 +874,23 @@ brw_blorp_blit_program::alloc_regs()
}
this-mcs_data =
retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD); reg += 8;
+
for (int i = 0; i 2; ++i) {
this-x_coords[i]
- = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
+ = vec8(retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD));
+ reg += 2;
this-y_coords[i]
- = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
+ = vec8(retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD));
+ reg += 2;
}
this-xy_coord_index = 0;
this-sample_index
- = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
- this-t1 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
- this-t2 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
+ = vec8(retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD));
+ reg += 2;
+ this-t1 = vec8(retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD));
+ reg += 2;
+ this-t2 = vec8(retype(brw_vec8_grf(reg, 0), BRW_REGISTER_TYPE_UD));
+ reg += 2;
/* Make sure we didn't run out of registers */
assert(reg = GEN7_MRF_HACK_START);
@@ -942,7 +947,8 @@ brw_blorp_blit_program::compute_frag_coords()
* Then, we need to add the repeating sequence (0, 1, 0, 1, ...) to the
* result, since pixels n+1 and n+3 are in the right half of the subspan.
*/
- brw_ADD(func, X, stride(suboffset(R1, 4), 2, 4, 0), brw_imm_v(0x10101010));
+ brw_ADD(func, vec16(retype(X, BRW_REGISTER_TYPE_UW)),
+ stride(suboffset(R1, 4), 2, 4, 0), brw_imm_v(0x10101010));
/* Similarly, Y coordinates for subspans come from R1.2[31:16] through
* R1.5[31:16], so to get pixel Y coordinates we need to start at the 5th
@@ -952,11 +958,17 @@ brw_blorp_blit_program::compute_frag_coords()
* And we need to add the repeating sequence (0, 0, 1,
[Mesa-dev] [PATCH V2 4/4] i965: Enable ext_framebuffer_multisample_blit_scaled on intel h/w
This patch enables ext_framebuffer_multisample_blit_scaled extension
on intel h/w = gen6.
Note: Patches for piglit tests to verify this functionality are out
for review on piglit mailing list. Tests pass for all of the scaling
factors from 0.1 to 2.4.
Comment from Paul Berry:
I have some concerns about the image quality of the method you've
implemented. As I understand it, the primary use case of this extension
is to allow the client to do multisampled rendering at slightly less
than screen resolution (e.g. 720p instead of 1080p), and then blit the
result to the screen in one step while keeping most of the quality
benefits of multisampling. Since your implementation is effectively
equivalent to downsampling and then blitting using GL_NEAREST filtering,
my fear is that it will lead to blocky artifacts that are severe enough
to negate the benefit of multisampling in the first place.
Before we turn this extension on in the Intel driver, I'd like to look
at a comparison of:
(1) your technique
(2) downsampling followed by scaling with GL_LINEAR filtering
(3) The nVidia implementation, in GL_SCALED_RESOLVE_FASTEST_EXT mode
(4) The nVidia implementation, in GL_SCALED_RESOLVE_NICEST_EXT mode
(5) Just rendering the image directly to the single-sampled destination
buffer
Observation: Image quality is better in cases 2, 3, 4 and 5 as
compared to case 1. Although extension's implementation meets the
specification's requirements, using it leads to blocky artifacts
due to nearest filtering.
I'll work on implementing a better filtering technique in blorp.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/intel/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c
b/src/mesa/drivers/dri/intel/intel_extensions.c
index 8d8e325..de12ec3 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -97,6 +97,7 @@ intelInitExtensions(struct gl_context *ctx)
if (intel-gen = 6) {
ctx-Extensions.EXT_framebuffer_multisample = true;
+ ctx-Extensions.EXT_framebuffer_multisample_blit_scaled = true;
ctx-Extensions.ARB_blend_func_extended =
!driQueryOptionb(intel-optionCache, disable_blend_func_extended);
ctx-Extensions.ARB_draw_buffers_blend = true;
ctx-Extensions.ARB_ES3_compatibility = true;
--
1.8.1.4
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[Mesa-dev] [PATCH V2 3/4] intel: Add multisample scaled blitting in blorp engine
In traditional multisampled framebuffer rendering, color samples must be
explicitly resolved via BlitFramebuffer before doing the scaled blitting
of the framebuffer. So, scaled blitting of a multisample framebuffer
takes two separate calls to BlitFramebuffer.
This patch implements the functionality of doing multisampled scaled
resolve using just one BlitFramebuffer call. Important changes involved
in this patch are listed below:
- Use float registers to scale and offset texture coordinates.
- Change offset computation to consider float coordinates.
- Round the scaled coordinates down to nearest integer.
- Modify src texture coordinates clipping to account for scaling..
- Linear filter is not yet implemented in blorp. So, don't use
blorp engine to do single sampled scaled blitting.
Note: Observed no piglit regressions on sandybridge ivybridge with
these changes.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_blorp.h | 23 ++--
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 143 +++--
src/mesa/drivers/dri/i965/brw_reg.h| 7 --
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 +
4 files changed, 102 insertions(+), 73 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 70e3933..a40324b 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -40,9 +40,10 @@ brw_blorp_blit_miptrees(struct intel_context *intel,
unsigned src_level, unsigned src_layer,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
-int src_x0, int src_y0,
-int dst_x0, int dst_y0,
-int dst_x1, int dst_y1,
+float src_x0, float src_y0,
+float src_x1, float src_y1,
+float dst_x0, float dst_y0,
+float dst_x1, float dst_y1,
bool mirror_x, bool mirror_y);
bool
@@ -158,11 +159,11 @@ public:
struct brw_blorp_coord_transform_params
{
- void setup(GLuint src0, GLuint dst0, GLuint dst1,
+ void setup(GLfloat src0, GLfloat src1, GLfloat dst0, GLfloat dst1,
bool mirror);
- int32_t multiplier;
- int32_t offset;
+ float multiplier;
+ float offset;
};
@@ -304,6 +305,9 @@ struct brw_blorp_blit_prog_key
* than one sample per pixel.
*/
bool persample_msaa_dispatch;
+
+ /* True for scaled blitting. */
+ bool blit_scaled;
};
class brw_blorp_blit_params : public brw_blorp_params
@@ -314,9 +318,10 @@ public:
unsigned src_level, unsigned src_layer,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
- GLuint src_x0, GLuint src_y0,
- GLuint dst_x0, GLuint dst_y0,
- GLuint width, GLuint height,
+ GLfloat src_x0, GLfloat src_y0,
+ GLfloat src_x1, GLfloat src_y1,
+ GLfloat dst_x0, GLfloat dst_y0,
+ GLfloat dst_x1, GLfloat dst_y1,
bool mirror_x, bool mirror_y);
virtual uint32_t get_wm_prog(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index b7ee92b..19169ef 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -41,11 +41,11 @@
* If coord0 coord1, swap them and invert the mirror boolean.
*/
static inline void
-fixup_mirroring(bool mirror, GLint coord0, GLint coord1)
+fixup_mirroring(bool mirror, GLfloat coord0, GLfloat coord1)
{
if (coord0 coord1) {
mirror = !mirror;
- GLint tmp = coord0;
+ GLfloat tmp = coord0;
coord0 = coord1;
coord1 = tmp;
}
@@ -67,9 +67,10 @@ fixup_mirroring(bool mirror, GLint coord0, GLint coord1)
* coordinates, by swapping the roles of src and dst.
*/
static inline bool
-clip_or_scissor(bool mirror, GLint src_x0, GLint src_x1, GLint dst_x0,
-GLint dst_x1, GLint fb_xmin, GLint fb_xmax)
+clip_or_scissor(bool mirror, GLfloat src_x0, GLfloat src_x1, GLfloat dst_x0,
+GLfloat dst_x1, GLfloat fb_xmin, GLfloat fb_xmax)
{
+ float scale = (float) (src_x1 - src_x0) / (dst_x1 - dst_x0);
/* If we are going to scissor everything away, stop. */
if (!(fb_xmin fb_xmax
dst_x0 fb_xmax
@@ -105,8 +106,8 @@ clip_or_scissor(bool mirror, GLint src_x0, GLint src_x1,
GLint dst_x0,
/* Adjust the source rectangle to remove the pixels corresponding to those
* that were clipped/scissored out of the destination rectangle.
*/
- src_x0 += pixels_clipped_left;
-
Re: [Mesa-dev] [PATCH] r600g: fixup for MSAA texture support checking
On Thu, May 16, 2013 at 12:09:23AM +0200, Niels Ole Salscheider wrote: Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de --- Pushed. Thanks. -Tom src/gallium/drivers/r600/r600_shader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 4e5af70..4d74db0 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -305,7 +305,7 @@ int r600_compute_shader_create(struct pipe_context * ctx, shader_ctx.bc = bytecode; r600_bytecode_init(shader_ctx.bc, r600_ctx-chip_class, r600_ctx-family, -r600_ctx-screen-msaa_texture_support); +r600_ctx-screen-has_compressed_msaa_texturing); shader_ctx.bc-type = TGSI_PROCESSOR_COMPUTE; shader_ctx.bc-isa = r600_ctx-isa; r600_llvm_compile(mod, r600_ctx-family, -- 1.8.2.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64649] [r600g] Anomaly 2 (Steam) exits with GLX_EXT_swap_control not supported, unable to set vertical sync
https://bugs.freedesktop.org/show_bug.cgi?id=64649 romula...@gmail.com changed: What|Removed |Added Summary|[r600g] Anomaly 2 (Steam) |[r600g] Anomaly 2 (Steam) |crashes with|exits with |GLX_EXT_swap_control not|GLX_EXT_swap_control not |supported, unable to set|supported, unable to set |vertical sync |vertical sync -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64649] [r600g] Anomaly 2 (Steam) exits with GLX_EXT_swap_control not supported, unable to set vertical sync
https://bugs.freedesktop.org/show_bug.cgi?id=64649 --- Comment #2 from romula...@gmail.com --- It then closes. It won't run without that extention, switched to GLX instead of a driver specific component. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64649] Anomaly 2 (Steam) exits with GLX_EXT_swap_control not supported, unable to set vertical sync
https://bugs.freedesktop.org/show_bug.cgi?id=64649 romula...@gmail.com changed: What|Removed |Added Summary|[r600g] Anomaly 2 (Steam) |Anomaly 2 (Steam) exits |exits with |with GLX_EXT_swap_control |GLX_EXT_swap_control not|not supported, unable to |supported, unable to set|set vertical sync |vertical sync | -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] llvmpipe: Remove x/y from cmd_bin
These were mostly just a waste of memory and cache pressure, and were
really only used for debugging.
This change reduces instruction count (as measured by callgrind's Ir
event) of gnome-shell-perf-tool on Ivybridge by 3.5% ± 0.015% (n=20).
Signed-off-by: Adam Jackson a...@redhat.com
---
src/gallium/drivers/llvmpipe/lp_rast.c | 37 +++-
src/gallium/drivers/llvmpipe/lp_rast_debug.c | 19 +++---
src/gallium/drivers/llvmpipe/lp_rast_priv.h | 2 +-
src/gallium/drivers/llvmpipe/lp_scene.c | 4 ++-
src/gallium/drivers/llvmpipe/lp_scene.h | 4 +--
src/gallium/drivers/llvmpipe/lp_setup.c | 11 +
6 files changed, 30 insertions(+), 47 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c
b/src/gallium/drivers/llvmpipe/lp_rast.c
index a557db4..3dc00ef 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast.c
@@ -87,13 +87,14 @@ lp_rast_end( struct lp_rasterizer *rast )
*/
static void
lp_rast_tile_begin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin)
+ const struct cmd_bin *bin,
+ int x, int y)
{
- LP_DBG(DEBUG_RAST, %s %d,%d\n, __FUNCTION__, bin-x, bin-y);
+ LP_DBG(DEBUG_RAST, %s %d,%d\n, __FUNCTION__, x, y);
task-bin = bin;
- task-x = bin-x * TILE_SIZE;
- task-y = bin-y * TILE_SIZE;
+ task-x = x * TILE_SIZE;
+ task-y = y * TILE_SIZE;
/* reset pointers to color and depth tile(s) */
memset(task-color_tiles, 0, sizeof(task-color_tiles));
@@ -551,13 +552,14 @@ static lp_rast_cmd_func dispatch[LP_RAST_OP_MAX] =
static void
do_rasterize_bin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin)
+ const struct cmd_bin *bin,
+ int x, int y)
{
const struct cmd_block *block;
unsigned k;
if (0)
- lp_debug_bin(bin);
+ lp_debug_bin(bin, x, y);
for (block = bin-head; block; block = block-next) {
for (k = 0; k block-count; k++) {
@@ -576,11 +578,11 @@ do_rasterize_bin(struct lp_rasterizer_task *task,
*/
static void
rasterize_bin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin )
+ const struct cmd_bin *bin, int x, int y )
{
- lp_rast_tile_begin( task, bin );
+ lp_rast_tile_begin( task, bin, x, y );
- do_rasterize_bin(task, bin);
+ do_rasterize_bin(task, bin, x, y);
lp_rast_tile_end(task);
@@ -622,27 +624,16 @@ rasterize_scene(struct lp_rasterizer_task *task,
if (!task-rast-no_rast !scene-discard) {
/* loop over scene bins, rasterize each */
-#if 0
- {
- unsigned i, j;
- for (i = 0; i scene-tiles_x; i++) {
-for (j = 0; j scene-tiles_y; j++) {
- struct cmd_bin *bin = lp_scene_get_bin(scene, i, j);
- rasterize_bin(task, bin, i, j);
-}
- }
- }
-#else
{
struct cmd_bin *bin;
+ int i, j;
assert(scene);
- while ((bin = lp_scene_bin_iter_next(scene))) {
+ while ((bin = lp_scene_bin_iter_next(scene, i, j))) {
if (!is_empty_bin( bin ))
- rasterize_bin(task, bin);
+ rasterize_bin(task, bin, i, j);
}
}
-#endif
}
diff --git a/src/gallium/drivers/llvmpipe/lp_rast_debug.c
b/src/gallium/drivers/llvmpipe/lp_rast_debug.c
index 4008251..3bc75aa 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast_debug.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast_debug.c
@@ -90,13 +90,13 @@ is_blend( const struct lp_rast_state *state,
static void
-debug_bin( const struct cmd_bin *bin )
+debug_bin( const struct cmd_bin *bin, int x, int y )
{
const struct lp_rast_state *state = NULL;
const struct cmd_block *head = bin-head;
int i, j = 0;
- debug_printf(bin %d,%d:\n, bin-x, bin-y);
+ debug_printf(bin %d,%d:\n, x, y);
while (head) {
for (i = 0; i head-count; i++, j++) {
@@ -231,13 +231,14 @@ debug_triangle(int tilex, int tiley,
static void
do_debug_bin( struct tile *tile,
const struct cmd_bin *bin,
+ int x, int y,
boolean print_cmds)
{
unsigned k, j = 0;
const struct cmd_block *block;
- int tx = bin-x * TILE_SIZE;
- int ty = bin-y * TILE_SIZE;
+ int tx = x * TILE_SIZE;
+ int ty = y * TILE_SIZE;
memset(tile-data, ' ', sizeof tile-data);
tile-coverage = 0;
@@ -286,13 +287,13 @@ do_debug_bin( struct tile *tile,
}
void
-lp_debug_bin( const struct cmd_bin *bin)
+lp_debug_bin( const struct cmd_bin *bin, int i, int j)
{
struct tile tile;
int x,y;
if (bin-head) {
- do_debug_bin(tile, bin, TRUE);
+ do_debug_bin(tile, bin, i, j, TRUE);
debug_printf(--\n);
for (y = 0; y TILE_SIZE; y++) {
@@ -349,9 +350,9 @@ lp_debug_draw_bins_by_coverage( struct lp_scene
Re: [Mesa-dev] [PATCH] llvmpipe: Remove x/y from cmd_bin
On Thu, 2013-05-16 at 15:44 -0400, Adam Jackson wrote: These were mostly just a waste of memory and cache pressure, and were really only used for debugging. This change reduces instruction count (as measured by callgrind's Ir event) of gnome-shell-perf-tool on Ivybridge by 3.5% ± 0.015% (n=20). These numbers are somewhat spurious, since it appears what I actually recorded was the execution of the python harness and not of gnome-shell itself. Still the correlation is strong with this one, so I suspect the improvement is real even if the numbers are unrelated. I'll get better data, sorry about that. - ajax ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] llvmpipe: get rid of unused tiled/linear logic
From: Roland Scheidegger srol...@vmware.com
We do rendering to linear color buffers for quite some time, and since
switching to linear depth buffers all the tiled/linear logic was unused.
So get rid of (most) of it - there's still some LAYOUT_NONE things and
late allocation of resources which probably could be simplified.
---
src/gallium/drivers/llvmpipe/Makefile.am |3 +-
src/gallium/drivers/llvmpipe/SConscript |3 +-
src/gallium/drivers/llvmpipe/lp_rast_priv.h |4 +-
src/gallium/drivers/llvmpipe/lp_texture.c| 388 +++---
src/gallium/drivers/llvmpipe/lp_texture.h| 10 -
src/gallium/drivers/llvmpipe/lp_tile_image.c | 294 ---
src/gallium/drivers/llvmpipe/lp_tile_image.h | 61
7 files changed, 50 insertions(+), 713 deletions(-)
delete mode 100644 src/gallium/drivers/llvmpipe/lp_tile_image.c
delete mode 100644 src/gallium/drivers/llvmpipe/lp_tile_image.h
diff --git a/src/gallium/drivers/llvmpipe/Makefile.am
b/src/gallium/drivers/llvmpipe/Makefile.am
index f1ba5d1..9059053 100644
--- a/src/gallium/drivers/llvmpipe/Makefile.am
+++ b/src/gallium/drivers/llvmpipe/Makefile.am
@@ -72,8 +72,7 @@ libllvmpipe_la_SOURCES = \
lp_state_vs.c \
lp_surface.c \
lp_tex_sample.c \
- lp_texture.c \
- lp_tile_image.c
+ lp_texture.c
libllvmpipe_la_LDFLAGS = $(LLVM_LDFLAGS)
diff --git a/src/gallium/drivers/llvmpipe/SConscript
b/src/gallium/drivers/llvmpipe/SConscript
index a81cf23..22314c2 100644
--- a/src/gallium/drivers/llvmpipe/SConscript
+++ b/src/gallium/drivers/llvmpipe/SConscript
@@ -52,8 +52,7 @@ llvmpipe = env.ConvenienceLibrary(
'lp_state_vs.c',
'lp_surface.c',
'lp_tex_sample.c',
- 'lp_texture.c',
- 'lp_tile_image.c',
+ 'lp_texture.c'
])
env.Alias('llvmpipe', llvmpipe)
diff --git a/src/gallium/drivers/llvmpipe/lp_rast_priv.h
b/src/gallium/drivers/llvmpipe/lp_rast_priv.h
index 7d01da1..85febff 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast_priv.h
+++ b/src/gallium/drivers/llvmpipe/lp_rast_priv.h
@@ -36,10 +36,12 @@
#include lp_scene.h
#include lp_state.h
#include lp_texture.h
-#include lp_tile_image.h
#include lp_limits.h
+#define TILE_VECTOR_HEIGHT 4
+#define TILE_VECTOR_WIDTH 4
+
/* If we crash in a jitted function, we can examine jit_line and jit_state
* to get some info. This is not thread-safe, however.
*/
diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c
b/src/gallium/drivers/llvmpipe/lp_texture.c
index 0804619..d10a4ce 100644
--- a/src/gallium/drivers/llvmpipe/lp_texture.c
+++ b/src/gallium/drivers/llvmpipe/lp_texture.c
@@ -46,7 +46,6 @@
#include lp_context.h
#include lp_flush.h
#include lp_screen.h
-#include lp_tile_image.h
#include lp_texture.h
#include lp_setup.h
#include lp_state.h
@@ -334,11 +333,6 @@ llvmpipe_resource_destroy(struct pipe_screen *pscreen,
struct sw_winsys *winsys = screen-winsys;
winsys-displaytarget_destroy(winsys, lpr-dt);
- if (lpr-tiled_img.data) {
- align_free(lpr-tiled_img.data);
- lpr-tiled_img.data = NULL;
- }
-
FREE(lpr-layout[0]);
}
else if (llvmpipe_resource_is_texture(pt)) {
@@ -351,12 +345,6 @@ llvmpipe_resource_destroy(struct pipe_screen *pscreen,
lpr-linear_img.data = NULL;
}
- /* free tiled image data */
- if (lpr-tiled_img.data) {
- align_free(lpr-tiled_img.data);
- lpr-tiled_img.data = NULL;
- }
-
/* free layout flag arrays */
for (level = 0; level Elements(lpr-layout); level++) {
FREE(lpr-layout[level]);
@@ -398,7 +386,6 @@ llvmpipe_resource_map(struct pipe_resource *resource,
tex_usage == LP_TEX_USAGE_WRITE_ALL);
assert(layout == LP_TEX_LAYOUT_NONE ||
- layout == LP_TEX_LAYOUT_TILED ||
layout == LP_TEX_LAYOUT_LINEAR);
if (lpr-dt) {
@@ -850,27 +837,10 @@ static unsigned
tex_image_face_size(const struct llvmpipe_resource *lpr, unsigned level,
enum lp_texture_layout layout)
{
- const unsigned width = u_minify(lpr-base.width0, level);
- const unsigned height = u_minify(lpr-base.height0, level);
-
- assert(layout == LP_TEX_LAYOUT_TILED ||
- layout == LP_TEX_LAYOUT_LINEAR);
+ assert(layout == LP_TEX_LAYOUT_LINEAR);
- if (layout == LP_TEX_LAYOUT_TILED) {
- /* for tiled layout, force a 32bpp format */
- const enum pipe_format format = PIPE_FORMAT_B8G8R8A8_UNORM;
- const unsigned block_size = util_format_get_blocksize(format);
- const unsigned nblocksy =
- util_format_get_nblocksy(format, align(height, TILE_SIZE));
- const unsigned nblocksx =
- util_format_get_nblocksx(format, align(width, TILE_SIZE));
- const unsigned buffer_size = block_size * nblocksy * nblocksx;
- return buffer_size;
- }
- else {
- /* we already computed this */
- return
Re: [Mesa-dev] [PATCH 08/17] glsl parser: allow in out for interface block members
On Sun, Apr 21, 2013 at 12:06 PM, Kenneth Graunke kenn...@whitecape.org wrote: On 04/19/2013 12:35 PM, Jordan Justen wrote: Previously uniform blocks allowed for the 'uniform' keyword to be used with members of a uniform blocks. With interface blocks 'in' can be used on 'in' interface block members and 'out' can be used on 'out' interface block members. The basic_interface_block rule will verify that the same qualifier type is used with the block and each member. Signed-off-by: Jordan Justen jordan.l.jus...@intel.com --- src/glsl/glsl_parser.yy | 47 ++- 1 file changed, 30 insertions(+), 17 deletions(-) diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy index c254a2f..6d88263 100644 --- a/src/glsl/glsl_parser.yy +++ b/src/glsl/glsl_parser.yy @@ -2051,41 +2051,54 @@ member_list: } ; -/* Specifying uniform inside of a uniform block is redundant. */ -uniformopt: - /* nothing */ - | UNIFORM - ; - member_declaration: - layout_qualifier uniformopt type_specifier struct_declarator_list ';' + layout_qualifier fully_specified_type struct_declarator_list ';' I don't think this is right. The fully_specified_type production rule expands to type_qualifier type_specifier. type_qualifier expands to: type_qualifier: storage_qualifier | layout_qualifier | layout_qualifier storage_qualifier at which point you have: layout_qualifier layout_qualifier storage_qualifier type_specifier struct_declarator_list ';' I like the move to use fully_specified_type, but I think you need to make the rule simply: fully_specified_type struct_declarator_list ';' This seems to work, so I'll make this change. I'm also a bit concerned that this may allow too much. For example, is invariant allowed? If not, are you checking that somewhere? The 1.50 spec says (of interface block qualifiers) that: If optional qualifiers are used, they can include interpolation and storage qualifiers ... I think this (vaguely) means that invariant, highp, mediump, and lowp should not be allowed. Yet, nVidia seems to allow them. My opinion is that given the vague spec language, we should allow them. What's your opinion? -Jordan ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] intel: Do a depth resolve before copying images between miptrees.
When intel_finalize_mipmap_tree() calls intel_miptree_copy_teximage() to reassemble a depth miptree that has been broken apart into pieces (to deal with misalignment of levels/layers within the miptree), it just copies the depth data, not the HiZ data. This is reasonable, since the alignment restrictions of HiZ are a large part of the reason why the miptree had to be broken apart in the first place. However, in order for the depth copy to be sufficient, we need to do a depth resolve first, to make sure any deferred depth writes that are in the HiZ buffer get performed. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=64662 and https://bugs.freedesktop.org/show_bug.cgi?id=64659. NOTE: This is a candidate for stable release branches. Reviewed-by: Chad Versace chad.vers...@linux.intel.com --- src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 7f4cb4a..2dfa787 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -902,6 +902,12 @@ intel_miptree_copy_slice(struct intel_context *intel, dst_mt, dst_x, dst_y, dst_mt-region-pitch, width, height); + /* Since we are about to copy depth data using either the blitter or swrast +* (neither of which respect HiZ), we need to do a depth resolve first. +*/ + intel_miptree_slice_resolve_depth(intel, src_mt, level, slice); + intel_miptree_slice_resolve_depth(intel, dst_mt, level, slice); + if (!intelEmitCopyBlit(intel, dst_mt-region-cpp, src_mt-region-pitch, src_mt-region-bo, -- 1.8.2.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] llvmpipe: Remove x/y from cmd_bin
Am 16.05.2013 21:44, schrieb Adam Jackson:
These were mostly just a waste of memory and cache pressure, and were
really only used for debugging.
This change reduces instruction count (as measured by callgrind's Ir
event) of gnome-shell-perf-tool on Ivybridge by 3.5% ± 0.015% (n=20).
Signed-off-by: Adam Jackson a...@redhat.com
---
src/gallium/drivers/llvmpipe/lp_rast.c | 37
+++-
src/gallium/drivers/llvmpipe/lp_rast_debug.c | 19 +++---
src/gallium/drivers/llvmpipe/lp_rast_priv.h | 2 +-
src/gallium/drivers/llvmpipe/lp_scene.c | 4 ++-
src/gallium/drivers/llvmpipe/lp_scene.h | 4 +--
src/gallium/drivers/llvmpipe/lp_setup.c | 11 +
6 files changed, 30 insertions(+), 47 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c
b/src/gallium/drivers/llvmpipe/lp_rast.c
index a557db4..3dc00ef 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast.c
@@ -87,13 +87,14 @@ lp_rast_end( struct lp_rasterizer *rast )
*/
static void
lp_rast_tile_begin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin)
+ const struct cmd_bin *bin,
+ int x, int y)
{
- LP_DBG(DEBUG_RAST, %s %d,%d\n, __FUNCTION__, bin-x, bin-y);
+ LP_DBG(DEBUG_RAST, %s %d,%d\n, __FUNCTION__, x, y);
task-bin = bin;
- task-x = bin-x * TILE_SIZE;
- task-y = bin-y * TILE_SIZE;
+ task-x = x * TILE_SIZE;
+ task-y = y * TILE_SIZE;
/* reset pointers to color and depth tile(s) */
memset(task-color_tiles, 0, sizeof(task-color_tiles));
@@ -551,13 +552,14 @@ static lp_rast_cmd_func dispatch[LP_RAST_OP_MAX] =
static void
do_rasterize_bin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin)
+ const struct cmd_bin *bin,
+ int x, int y)
{
const struct cmd_block *block;
unsigned k;
if (0)
- lp_debug_bin(bin);
+ lp_debug_bin(bin, x, y);
for (block = bin-head; block; block = block-next) {
for (k = 0; k block-count; k++) {
@@ -576,11 +578,11 @@ do_rasterize_bin(struct lp_rasterizer_task *task,
*/
static void
rasterize_bin(struct lp_rasterizer_task *task,
- const struct cmd_bin *bin )
+ const struct cmd_bin *bin, int x, int y )
{
- lp_rast_tile_begin( task, bin );
+ lp_rast_tile_begin( task, bin, x, y );
- do_rasterize_bin(task, bin);
+ do_rasterize_bin(task, bin, x, y);
lp_rast_tile_end(task);
@@ -622,27 +624,16 @@ rasterize_scene(struct lp_rasterizer_task *task,
if (!task-rast-no_rast !scene-discard) {
/* loop over scene bins, rasterize each */
-#if 0
- {
- unsigned i, j;
- for (i = 0; i scene-tiles_x; i++) {
-for (j = 0; j scene-tiles_y; j++) {
- struct cmd_bin *bin = lp_scene_get_bin(scene, i, j);
- rasterize_bin(task, bin, i, j);
-}
- }
- }
-#else
{
struct cmd_bin *bin;
+ int i, j;
assert(scene);
- while ((bin = lp_scene_bin_iter_next(scene))) {
+ while ((bin = lp_scene_bin_iter_next(scene, i, j))) {
if (!is_empty_bin( bin ))
- rasterize_bin(task, bin);
+ rasterize_bin(task, bin, i, j);
}
}
-#endif
}
diff --git a/src/gallium/drivers/llvmpipe/lp_rast_debug.c
b/src/gallium/drivers/llvmpipe/lp_rast_debug.c
index 4008251..3bc75aa 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast_debug.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast_debug.c
@@ -90,13 +90,13 @@ is_blend( const struct lp_rast_state *state,
static void
-debug_bin( const struct cmd_bin *bin )
+debug_bin( const struct cmd_bin *bin, int x, int y )
{
const struct lp_rast_state *state = NULL;
const struct cmd_block *head = bin-head;
int i, j = 0;
- debug_printf(bin %d,%d:\n, bin-x, bin-y);
+ debug_printf(bin %d,%d:\n, x, y);
while (head) {
for (i = 0; i head-count; i++, j++) {
@@ -231,13 +231,14 @@ debug_triangle(int tilex, int tiley,
static void
do_debug_bin( struct tile *tile,
const struct cmd_bin *bin,
+ int x, int y,
boolean print_cmds)
{
unsigned k, j = 0;
const struct cmd_block *block;
- int tx = bin-x * TILE_SIZE;
- int ty = bin-y * TILE_SIZE;
+ int tx = x * TILE_SIZE;
+ int ty = y * TILE_SIZE;
memset(tile-data, ' ', sizeof tile-data);
tile-coverage = 0;
@@ -286,13 +287,13 @@ do_debug_bin( struct tile *tile,
}
void
-lp_debug_bin( const struct cmd_bin *bin)
+lp_debug_bin( const struct cmd_bin *bin, int i, int j)
{
struct tile tile;
int x,y;
if (bin-head) {
- do_debug_bin(tile, bin, TRUE);
+ do_debug_bin(tile, bin, i, j, TRUE);
[Mesa-dev] [Bug 64443] Oil Rush (Steam version) crashes
https://bugs.freedesktop.org/show_bug.cgi?id=64443 Mike Lothian m...@fireburn.co.uk changed: What|Removed |Added CC||m...@fireburn.co.uk --- Comment #1 from Mike Lothian m...@fireburn.co.uk --- r600g doesn't support OpenGL 3.2 yet - that's why it fails -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 64443] Oil Rush (Steam version) crashes
https://bugs.freedesktop.org/show_bug.cgi?id=64443 romula...@gmail.com changed: What|Removed |Added Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop |org |.org Component|GLX |Drivers/Gallium/r600 -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v4 00/17] GLSL 1.50 interface blocks support
git://people.freedesktop.org/~jljusten/mesa interface-blocks-v4 v4: * Incorporated Ken's feedback from v3. * 9 of 17 patch now have r-b - Missing r-b on 6-8, 10 14-17 v3: * Several clean-ups based on v2 code review * Fix (proposed) piglit test: execution/interface-blocks-same-uniform-varying-name.shader_test (varying interface block having the same name as a uniform interface block.) * Fix (proposed) piglit test: compiler/interface-blocks-invalid-member-qualifiers.shader_test v2: * 3 new patches added to series * Add support for interface block instance arrays * Add support for rejecting unmatched interface blocks during the linking phase. * Known issue: fails new piglit glsl-1.50 test: execution/interface-blocks-same-uniform-varying-name.shader_test v1: * Initial support for GLSL 1.50 interface block support * Known issue: interface block arrays are not working * Known issue: rejection of unmatched interface blocks is not working * Piglit tests for known issues have been sent to piglit list Jordan Justen (17): glsl: rename ast_uniform_block to ast_interface_block glsl parser: rename uniform block to interface block glsl: parse in/out types for interface blocks glsl parser: reject VS+in FS+out interface blocks glsl parser: on desktop GL require GLSL 150 for instance names glsl parser: handle interface block member qualifier glsl ast_to_hir: reject interpolation qualifiers for uniform blocks glsl parser: allow in out for interface block members glsl_symbol_table: add interface block namespaces glsl ast_to_hir: move uniform block symbols to interface blocks namespace glsl ast_to_hir: reject row/column_major for in/out interface blocks glsl ast_to_hir: support in/out for interface blocks glsl linker: remove interface block instance names glsl link_varyings: link interface blocks using the block name glsl linker: support arrays of interface block instances glsl linker: compare interface blocks during intrastage linking glsl linker: compare interface blocks during interstage linking src/glsl/Makefile.sources |2 + src/glsl/ast.h|4 +- src/glsl/ast_to_hir.cpp | 46 -- src/glsl/glsl_parser.yy | 188 --- src/glsl/glsl_symbol_table.cpp| 84 +- src/glsl/glsl_symbol_table.h |4 + src/glsl/interface_blocks.cpp | 129 src/glsl/interface_blocks.h | 36 + src/glsl/ir_optimization.h|1 + src/glsl/link_varyings.cpp| 33 +++- src/glsl/linker.cpp | 19 +++ src/glsl/lower_named_interface_blocks.cpp | 238 + 12 files changed, 706 insertions(+), 78 deletions(-) create mode 100644 src/glsl/interface_blocks.cpp create mode 100644 src/glsl/interface_blocks.h create mode 100644 src/glsl/lower_named_interface_blocks.cpp -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v4 01/17] glsl: rename ast_uniform_block to ast_interface_block
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Eric Anholt e...@anholt.net
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/ast.h |4 ++--
src/glsl/ast_to_hir.cpp |6 +++---
src/glsl/glsl_parser.yy | 14 +++---
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/glsl/ast.h b/src/glsl/ast.h
index 7300271..df2a21f 100644
--- a/src/glsl/ast.h
+++ b/src/glsl/ast.h
@@ -805,9 +805,9 @@ public:
ast_compound_statement *body;
};
-class ast_uniform_block : public ast_node {
+class ast_interface_block : public ast_node {
public:
- ast_uniform_block(ast_type_qualifier layout,
+ ast_interface_block(ast_type_qualifier layout,
const char *instance_name,
ast_expression *array_size)
: layout(layout), block_name(NULL), instance_name(instance_name),
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index b206380..e578019 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4120,12 +4120,12 @@ ast_struct_specifier::hir(exec_list *instructions,
}
ir_rvalue *
-ast_uniform_block::hir(exec_list *instructions,
- struct _mesa_glsl_parse_state *state)
+ast_interface_block::hir(exec_list *instructions,
+ struct _mesa_glsl_parse_state *state)
{
YYLTYPE loc = this-get_location();
- /* The ast_uniform_block has a list of ast_declarator_lists. We
+ /* The ast_interface_block has a list of ast_declarator_lists. We
* need to turn those into ir_variables with an association
* with this uniform block.
*/
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index f52ed9b..cd33078 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -79,7 +79,7 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state *st,
const char *msg)
ast_case_label_list *case_label_list;
ast_case_statement *case_statement;
ast_case_statement_list *case_statement_list;
- ast_uniform_block *uniform_block;
+ ast_interface_block *interface_block;
struct {
ast_node *cond;
@@ -1900,7 +1900,7 @@ uniform_block:
}
| layout_qualifier basic_uniform_block
{
- ast_uniform_block *block = $2;
+ ast_interface_block *block = $2;
if (!block-layout.merge_qualifier( @1, state, $1)) {
YYERROR;
}
@@ -1911,7 +1911,7 @@ uniform_block:
basic_uniform_block:
UNIFORM NEW_IDENTIFIER '{' member_list '}' instance_name_opt ';'
{
- ast_uniform_block *const block = $6;
+ ast_interface_block *const block = $6;
block-block_name = $2;
block-declarations.push_degenerate_list_at_head( $4-link);
@@ -1944,19 +1944,19 @@ basic_uniform_block:
instance_name_opt:
/* empty */
{
- $$ = new(state) ast_uniform_block(*state-default_uniform_qualifier,
+ $$ = new(state)
ast_interface_block(*state-default_uniform_qualifier,
NULL,
NULL);
}
| NEW_IDENTIFIER
{
- $$ = new(state) ast_uniform_block(*state-default_uniform_qualifier,
+ $$ = new(state)
ast_interface_block(*state-default_uniform_qualifier,
$1,
NULL);
}
| NEW_IDENTIFIER '[' constant_expression ']'
{
- $$ = new(state) ast_uniform_block(*state-default_uniform_qualifier,
+ $$ = new(state)
ast_interface_block(*state-default_uniform_qualifier,
$1,
$3);
}
@@ -1965,7 +1965,7 @@ instance_name_opt:
_mesa_glsl_error( @1, state,
instance block arrays must be explicitly sized\n);
- $$ = new(state) ast_uniform_block(*state-default_uniform_qualifier,
+ $$ = new(state)
ast_interface_block(*state-default_uniform_qualifier,
$1,
NULL);
}
--
1.7.10.4
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[Mesa-dev] [PATCH v4 02/17] glsl parser: rename uniform block to interface block
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Eric Anholt e...@anholt.net
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/glsl_parser.yy | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index cd33078..33b74ea 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -115,7 +115,7 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state
*st, const char *msg)
%token STRUCT VOID_TOK WHILE
%token identifier IDENTIFIER TYPE_IDENTIFIER NEW_IDENTIFIER
%type identifier any_identifier
-%type uniform_block instance_name_opt
+%type interface_block instance_name_opt
%token real FLOATCONSTANT
%token n INTCONSTANT UINTCONSTANT BOOLCONSTANT
%token identifier FIELD_SELECTION
@@ -164,7 +164,7 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state
*st, const char *msg)
%type type_qualifier interpolation_qualifier
%type type_qualifier layout_qualifier
%type type_qualifier layout_qualifier_id_list layout_qualifier_id
-%type type_qualifier uniform_block_layout_qualifier
+%type type_qualifier interface_block_layout_qualifier
%type type_specifier type_specifier
%type type_specifier type_specifier_no_prec
%type type_specifier type_specifier_nonarray
@@ -223,8 +223,8 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state
*st, const char *msg)
%type node declaration
%type node declaration_statement
%type node jump_statement
-%type node uniform_block
-%type uniform_block basic_uniform_block
+%type node interface_block
+%type interface_block basic_interface_block
%type struct_specifier struct_specifier
%type declarator_list struct_declaration_list
%type declarator_list struct_declaration
@@ -784,7 +784,7 @@ declaration:
$3-is_precision_statement = true;
$$ = $3;
}
- | uniform_block
+ | interface_block
{
$$ = $1;
}
@@ -1140,7 +1140,7 @@ layout_qualifier_id:
}
}
- /* See also uniform_block_layout_qualifier. */
+ /* See also interface_block_layout_qualifier. */
if (!$$.flags.i state-ARB_uniform_buffer_object_enable) {
if (strcmp($1, std140) == 0) {
$$.flags.q.std140 = 1;
@@ -1211,7 +1211,7 @@ layout_qualifier_id:
identifier `%s' used\n, $1);
}
}
- | uniform_block_layout_qualifier
+ | interface_block_layout_qualifier
{
$$ = $1;
/* Layout qualifiers for ARB_uniform_buffer_object. */
@@ -1232,7 +1232,7 @@ layout_qualifier_id:
* most qualifiers. See the any_identifier path of
* layout_qualifier_id for the others.
*/
-uniform_block_layout_qualifier:
+interface_block_layout_qualifier:
ROW_MAJOR
{
memset( $$, 0, sizeof($$));
@@ -1893,12 +1893,12 @@ function_definition:
;
/* layout_qualifieropt is packed into this rule */
-uniform_block:
- basic_uniform_block
+interface_block:
+ basic_interface_block
{
$$ = $1;
}
- | layout_qualifier basic_uniform_block
+ | layout_qualifier basic_interface_block
{
ast_interface_block *block = $2;
if (!block-layout.merge_qualifier( @1, state, $1)) {
@@ -1908,7 +1908,7 @@ uniform_block:
}
;
-basic_uniform_block:
+basic_interface_block:
UNIFORM NEW_IDENTIFIER '{' member_list '}' instance_name_opt ';'
{
ast_interface_block *const block = $6;
--
1.7.10.4
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[Mesa-dev] [PATCH v4 03/17] glsl: parse in/out types for interface blocks
Previously only 'uniform' was allowed for uniform blocks.
Now, in/out can be parsed, but it will only be allowed for
GLSL = 150.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Eric Anholt e...@anholt.net
---
src/glsl/glsl_parser.yy | 51 +--
1 file changed, 40 insertions(+), 11 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 33b74ea..0a2a77b 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -165,6 +165,7 @@ static void yyerror(YYLTYPE *loc, _mesa_glsl_parse_state
*st, const char *msg)
%type type_qualifier layout_qualifier
%type type_qualifier layout_qualifier_id_list layout_qualifier_id
%type type_qualifier interface_block_layout_qualifier
+%type type_qualifier interface_qualifier
%type type_specifier type_specifier
%type type_specifier type_specifier_no_prec
%type type_specifier type_specifier_nonarray
@@ -1215,11 +1216,11 @@ layout_qualifier_id:
{
$$ = $1;
/* Layout qualifiers for ARB_uniform_buffer_object. */
- if (!state-ARB_uniform_buffer_object_enable) {
+ if ($$.flags.q.uniform !state-ARB_uniform_buffer_object_enable) {
_mesa_glsl_error( @1, state,
#version 140 / GL_ARB_uniform_buffer_object
layout qualifier `%s' is used\n, $1);
- } else if (state-ARB_uniform_buffer_object_warn) {
+ } else if ($$.flags.q.uniform
state-ARB_uniform_buffer_object_warn) {
_mesa_glsl_warning( @1, state,
#version 140 / GL_ARB_uniform_buffer_object
layout qualifier `%s' is used\n, $1);
@@ -1909,21 +1910,29 @@ interface_block:
;
basic_interface_block:
- UNIFORM NEW_IDENTIFIER '{' member_list '}' instance_name_opt ';'
+ interface_qualifier NEW_IDENTIFIER '{' member_list '}'
instance_name_opt ';'
{
ast_interface_block *const block = $6;
block-block_name = $2;
block-declarations.push_degenerate_list_at_head( $4-link);
- if (!state-ARB_uniform_buffer_object_enable) {
- _mesa_glsl_error( @1, state,
- #version 140 / GL_ARB_uniform_buffer_object
- required for defining uniform blocks\n);
- } else if (state-ARB_uniform_buffer_object_warn) {
- _mesa_glsl_warning( @1, state,
-#version 140 / GL_ARB_uniform_buffer_object
-required for defining uniform blocks\n);
+ if ($1.flags.q.uniform) {
+ if (!state-ARB_uniform_buffer_object_enable) {
+_mesa_glsl_error( @1, state,
+ #version 140 / GL_ARB_uniform_buffer_object
+ required for defining uniform blocks\n);
+ } else if (state-ARB_uniform_buffer_object_warn) {
+_mesa_glsl_warning( @1, state,
+ #version 140 /
GL_ARB_uniform_buffer_object
+ required for defining uniform blocks\n);
+ }
+ } else {
+ if (state-es_shader || state-language_version 150) {
+_mesa_glsl_error( @1, state,
+#version 150 required for using
+interface blocks.\n);
+ }
}
/* Since block arrays require names, and both features are added in
@@ -1937,10 +1946,30 @@ basic_interface_block:
blocks with an instance name\n);
}
+ block-layout.flags.i |= $1.flags.i;
+
$$ = block;
}
;
+interface_qualifier:
+ IN_TOK
+ {
+ memset( $$, 0, sizeof($$));
+ $$.flags.q.in = 1;
+ }
+ | OUT_TOK
+ {
+ memset( $$, 0, sizeof($$));
+ $$.flags.q.out = 1;
+ }
+ | UNIFORM
+ {
+ memset( $$, 0, sizeof($$));
+ $$.flags.q.uniform = 1;
+ }
+ ;
+
instance_name_opt:
/* empty */
{
--
1.7.10.4
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[Mesa-dev] [PATCH v4 04/17] glsl parser: reject VS+in FS+out interface blocks
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Eric Anholt e...@anholt.net
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/glsl_parser.yy | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 0a2a77b..dbc25a4 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -1935,6 +1935,20 @@ basic_interface_block:
}
}
+ /* From the GLSL 1.50.11 spec, section 4.3.7 (Interface Blocks):
+ * It is illegal to have an input block in a vertex shader
+ * or an output block in a fragment shader
+ */
+ if ((state-target == vertex_shader) $1.flags.q.in) {
+ _mesa_glsl_error( @1, state,
+ `in' interface block is not allowed for
+ a vertex shader\n);
+ } else if ((state-target == fragment_shader) $1.flags.q.out) {
+ _mesa_glsl_error( @1, state,
+ `out' interface block is not allowed for
+ a fragment shader\n);
+ }
+
/* Since block arrays require names, and both features are added in
* the same language versions, we don't have to explicitly
* version-check both things.
--
1.7.10.4
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[Mesa-dev] [PATCH v4 05/17] glsl parser: on desktop GL require GLSL 150 for instance names
Interface blocks in GLSL 150 allow an instance name to be used.
v2:
* use state-check_version
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Eric Anholt e...@anholt.net
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/glsl_parser.yy |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index dbc25a4..70764d6 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -1953,11 +1953,9 @@ basic_interface_block:
* the same language versions, we don't have to explicitly
* version-check both things.
*/
- if (block-instance_name != NULL
- !(state-language_version == 300 state-es_shader)) {
- _mesa_glsl_error( @1, state,
- #version 300 es required for using uniform
- blocks with an instance name\n);
+ if (block-instance_name != NULL) {
+ state-check_version(150, 300, @1, interface blocks with
+ an instance name are not allowed);
}
block-layout.flags.i |= $1.flags.i;
--
1.7.10.4
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[Mesa-dev] [PATCH v4 06/17] glsl parser: handle interface block member qualifier
An interface block member may specify the type:
in {
in vec4 in_var_with_qualifier;
};
When specified with the member, it must match the same
type as interface block type.
It can also omit the qualifier:
uniform {
vec4 uniform_var_without_qualifier;
};
When the type is not specified with the member,
it will adopt the same type as the interface block.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/glsl_parser.yy | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 70764d6..baac845 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -1958,7 +1958,49 @@ basic_interface_block:
an instance name are not allowed);
}
- block-layout.flags.i |= $1.flags.i;
+ unsigned interface_type_mask;
+ struct ast_type_qualifier temp_type_qualifier;
+
+ /* Get a bitmask containing only the in/out/uniform flags, allowing us
+* to ignore other irrelevant flags like interpolation qualifiers.
+*/
+ temp_type_qualifier.flags.i = 0;
+ temp_type_qualifier.flags.q.uniform = true;
+ temp_type_qualifier.flags.q.in = true;
+ temp_type_qualifier.flags.q.out = true;
+ interface_type_mask = temp_type_qualifier.flags.i;
+
+ /* Get the block's interface qualifier. The interface_qualifier
+* production rule guarantees that only one bit will be set (and
+* it will be in/out/uniform).
+*/
+ unsigned block_interface_qualifier = $1.flags.i;
+
+ block-layout.flags.i |= block_interface_qualifier;
+
+ foreach_list_typed (ast_declarator_list, member, link,
block-declarations) {
+ ast_type_qualifier qualifier = member-type-qualifier;
+ if ((qualifier.flags.i interface_type_mask) == 0) {
+ /* GLSLangSpec.1.50.11, 4.3.7 (Interface Blocks):
+ * If no optional qualifier is used in a member declaration, the
+ * qualifier of the variable is just in, out, or uniform as
declared
+ * by interface-qualifier.
+ */
+qualifier.flags.i |= block_interface_qualifier;
+ } else if ((qualifier.flags.i interface_type_mask) !=
+block_interface_qualifier) {
+/* GLSLangSpec.1.50.11, 4.3.7 (Interface Blocks):
+ * If optional qualifiers are used, they can include
interpolation
+ * and storage qualifiers and they must declare an input, output,
+ * or uniform variable consistent with the interface qualifier of
+ * the block.
+ */
+_mesa_glsl_error( @1, state,
+ uniform/in/out qualifier on
+ interface block member does not match
+ the interface block\n);
+ }
+ }
$$ = block;
}
--
1.7.10.4
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[Mesa-dev] [PATCH v4 07/17] glsl ast_to_hir: reject interpolation qualifiers for uniform blocks
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/ast_to_hir.cpp |6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index e578019..b55d25e 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4063,6 +4063,12 @@ ast_process_structure_or_interface_block(exec_list
*instructions,
validate_matrix_layout_for_type(state, loc, field_type);
}
+ if (qual-flags.q.uniform qual-has_interpolation()) {
+_mesa_glsl_error(loc, state,
+ interpolation qualifiers cannot be used
+ with uniform interface blocks);
+ }
+
if (field_type-is_matrix() ||
(field_type-is_array()
field_type-fields.array-is_matrix())) {
fields[i].row_major = block_row_major;
--
1.7.10.4
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[Mesa-dev] [PATCH v4 10/17] glsl ast_to_hir: move uniform block symbols to interface blocks namespace
Uniform/interface blocks are a separate namespace from types.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/ast_to_hir.cpp |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index b55d25e..0e2e652 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4164,7 +4164,7 @@ ast_interface_block::hir(exec_list *instructions,
packing,
this-block_name);
- if (!state-symbols-add_type(block_type-name, block_type)) {
+ if (!state-symbols-add_interface(block_type-name, block_type,
ir_var_uniform)) {
YYLTYPE loc = this-get_location();
_mesa_glsl_error(loc, state, Uniform block name `%s' already taken in
the current scope.\n, this-block_name);
--
1.7.10.4
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[Mesa-dev] [PATCH v4 09/17] glsl_symbol_table: add interface block namespaces
For interface blocks, there are three separate namespaces for
uniform, input and output blocks.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/glsl_symbol_table.cpp | 84 ++--
src/glsl/glsl_symbol_table.h |4 ++
2 files changed, 85 insertions(+), 3 deletions(-)
diff --git a/src/glsl/glsl_symbol_table.cpp b/src/glsl/glsl_symbol_table.cpp
index 8d34547..50bf113 100644
--- a/src/glsl/glsl_symbol_table.cpp
+++ b/src/glsl/glsl_symbol_table.cpp
@@ -41,13 +41,67 @@ public:
ralloc_free(entry);
}
- symbol_table_entry(ir_variable *v) : v(v), f(0), t(0) {}
- symbol_table_entry(ir_function *f) : v(0), f(f), t(0) {}
- symbol_table_entry(const glsl_type *t) : v(0), f(0), t(t) {}
+ bool add_interface(const glsl_type *i, enum ir_variable_mode mode)
+ {
+ const glsl_type **dest;
+
+ switch (mode) {
+ case ir_var_uniform:
+ dest = ibu;
+ break;
+ case ir_var_shader_in:
+ dest = ibi;
+ break;
+ case ir_var_shader_out:
+ dest = ibo;
+ break;
+ default:
+ assert(!Unsupported interface variable mode!);
+ return false;
+ }
+
+ if (*dest != NULL) {
+ return false;
+ } else {
+ *dest = i;
+ return true;
+ }
+ }
+
+ const glsl_type *get_interface(enum ir_variable_mode mode)
+ {
+ switch (mode) {
+ case ir_var_uniform:
+ return ibu;
+ case ir_var_shader_in:
+ return ibi;
+ case ir_var_shader_out:
+ return ibo;
+ default:
+ assert(!Unsupported interface variable mode!);
+ return NULL;
+ }
+ }
+
+ symbol_table_entry(ir_variable *v) :
+ v(v), f(0), t(0), ibu(0), ibi(0), ibo(0) {}
+ symbol_table_entry(ir_function *f) :
+ v(0), f(f), t(0), ibu(0), ibi(0), ibo(0) {}
+ symbol_table_entry(const glsl_type *t) :
+ v(0), f(0), t(t), ibu(0), ibi(0), ibo(0) {}
+ symbol_table_entry(const glsl_type *t, enum ir_variable_mode mode) :
+ v(0), f(0), t(0), ibu(0), ibi(0), ibo(0)
+ {
+ assert(t-is_interface());
+ add_interface(t, mode);
+ }
ir_variable *v;
ir_function *f;
const glsl_type *t;
+ const glsl_type *ibu;
+ const glsl_type *ibi;
+ const glsl_type *ibo;
};
glsl_symbol_table::glsl_symbol_table()
@@ -118,6 +172,23 @@ bool glsl_symbol_table::add_type(const char *name, const
glsl_type *t)
return _mesa_symbol_table_add_symbol(table, -1, name, entry) == 0;
}
+bool glsl_symbol_table::add_interface(const char *name, const glsl_type *i,
+ enum ir_variable_mode mode)
+{
+ assert(i-is_interface());
+ symbol_table_entry *entry = get_entry(name);
+ if (entry == NULL) {
+ symbol_table_entry *entry =
+ new(mem_ctx) symbol_table_entry(i, mode);
+ bool add_interface_symbol_result =
+ _mesa_symbol_table_add_symbol(table, -1, name, entry) == 0;
+ assert(add_interface_symbol_result);
+ return add_interface_symbol_result;
+ } else {
+ return entry-add_interface(i, mode);
+ }
+}
+
bool glsl_symbol_table::add_function(ir_function *f)
{
if (this-separate_function_namespace name_declared_this_scope(f-name))
{
@@ -152,6 +223,13 @@ const glsl_type *glsl_symbol_table::get_type(const char
*name)
return entry != NULL ? entry-t : NULL;
}
+const glsl_type *glsl_symbol_table::get_interface(const char *name,
+ enum ir_variable_mode mode)
+{
+ symbol_table_entry *entry = get_entry(name);
+ return entry != NULL ? entry-get_interface(mode) : NULL;
+}
+
ir_function *glsl_symbol_table::get_function(const char *name)
{
symbol_table_entry *entry = get_entry(name);
diff --git a/src/glsl/glsl_symbol_table.h b/src/glsl/glsl_symbol_table.h
index 9f56027..2753bdf 100644
--- a/src/glsl/glsl_symbol_table.h
+++ b/src/glsl/glsl_symbol_table.h
@@ -99,6 +99,8 @@ public:
bool add_variable(ir_variable *v);
bool add_type(const char *name, const glsl_type *t);
bool add_function(ir_function *f);
+ bool add_interface(const char *name, const glsl_type *i,
+ enum ir_variable_mode mode);
/*@}*/
/**
@@ -113,6 +115,8 @@ public:
ir_variable *get_variable(const char *name);
const glsl_type *get_type(const char *name);
ir_function *get_function(const char *name);
+ const glsl_type *get_interface(const char *name,
+ enum ir_variable_mode mode);
/*@}*/
private:
--
1.7.10.4
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[Mesa-dev] [PATCH v4 12/17] glsl ast_to_hir: support in/out for interface blocks
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/ast_to_hir.cpp | 28 ++--
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index b2a1811..e918ade 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4162,16 +4162,32 @@ ast_interface_block::hir(exec_list *instructions,
true,
block_row_major);
+ ir_variable_mode var_mode;
+ const char *iface_type_name;
+ if (this-layout.flags.q.in) {
+ var_mode = ir_var_shader_in;
+ iface_type_name = in;
+ } else if (this-layout.flags.q.out) {
+ var_mode = ir_var_shader_out;
+ iface_type_name = out;
+ } else if (this-layout.flags.q.uniform) {
+ var_mode = ir_var_uniform;
+ iface_type_name = uniform;
+ } else {
+ assert(!interface block layout qualifier not found!);
+ }
+
const glsl_type *block_type =
glsl_type::get_interface_instance(fields,
num_variables,
packing,
this-block_name);
- if (!state-symbols-add_interface(block_type-name, block_type,
ir_var_uniform)) {
+ if (!state-symbols-add_interface(block_type-name, block_type, var_mode))
{
YYLTYPE loc = this-get_location();
- _mesa_glsl_error(loc, state, Uniform block name `%s' already taken in
- the current scope.\n, this-block_name);
+ _mesa_glsl_error(loc, state, Interface block `%s' with type `%s'
+ already taken in the current scope.\n,
+ this-block_name, iface_type_name);
}
/* Since interface blocks cannot contain statements, it should be
@@ -4195,11 +4211,11 @@ ast_interface_block::hir(exec_list *instructions,
var = new(state) ir_variable(block_array_type,
this-instance_name,
- ir_var_uniform);
+ var_mode);
} else {
var = new(state) ir_variable(block_type,
this-instance_name,
- ir_var_uniform);
+ var_mode);
}
var-interface_type = block_type;
@@ -4215,7 +4231,7 @@ ast_interface_block::hir(exec_list *instructions,
ir_variable *var =
new(state) ir_variable(fields[i].type,
ralloc_strdup(state, fields[i].name),
- ir_var_uniform);
+ var_mode);
var-interface_type = block_type;
state-symbols-add_variable(var);
--
1.7.10.4
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[Mesa-dev] [PATCH v4 11/17] glsl ast_to_hir: reject row/column_major for in/out interface blocks
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/ast_to_hir.cpp |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 0e2e652..b2a1811 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4054,7 +4054,11 @@ ast_process_structure_or_interface_block(exec_list
*instructions,
fields[i].name = decl-identifier;
if (qual-flags.q.row_major || qual-flags.q.column_major) {
-if (!field_type-is_matrix() !field_type-is_record()) {
+if (!qual-flags.q.uniform) {
+ _mesa_glsl_error(loc, state,
+row_major and column_major can only be
+applied to uniform interface blocks.);
+} else if (!field_type-is_matrix() !field_type-is_record()) {
_mesa_glsl_error(loc, state,
uniform block layout qualifiers row_major and
column_major can only be applied to matrix
and
--
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[Mesa-dev] [PATCH v4 14/17] glsl link_varyings: link interface blocks using the block name
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/link_varyings.cpp | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index f911f62..34e3440 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -993,6 +993,8 @@ assign_varying_locations(struct gl_context *ctx,
= hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare);
hash_table *consumer_inputs
= hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare);
+ hash_table *consumer_interface_inputs
+ = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare);
/* Operate in a total of three passes.
*
@@ -1011,8 +1013,17 @@ assign_varying_locations(struct gl_context *ctx,
((ir_instruction *) node)-as_variable();
if ((input_var != NULL) (input_var-mode == ir_var_shader_in)) {
-hash_table_insert(consumer_inputs, input_var,
- ralloc_strdup(mem_ctx, input_var-name));
+if (input_var-interface_type != NULL) {
+ char *const iface_field_name =
+ ralloc_asprintf(mem_ctx, %s.%s,
+ input_var-interface_type-name,
+ input_var-name);
+ hash_table_insert(consumer_interface_inputs, input_var,
+ iface_field_name);
+} else {
+ hash_table_insert(consumer_inputs, input_var,
+ ralloc_strdup(mem_ctx, input_var-name));
+}
}
}
}
@@ -1026,8 +1037,19 @@ assign_varying_locations(struct gl_context *ctx,
tfeedback_candidate_generator g(mem_ctx, tfeedback_candidates);
g.process(output_var);
- ir_variable *input_var =
- (ir_variable *) hash_table_find(consumer_inputs, output_var-name);
+ ir_variable *input_var;
+ if (output_var-interface_type != NULL) {
+ char *const iface_field_name =
+ralloc_asprintf(mem_ctx, %s.%s,
+output_var-interface_type-name,
+output_var-name);
+ input_var =
+(ir_variable *) hash_table_find(consumer_interface_inputs,
+iface_field_name);
+ } else {
+ input_var =
+(ir_variable *) hash_table_find(consumer_inputs, output_var-name);
+ }
if (input_var input_var-mode != ir_var_shader_in)
input_var = NULL;
@@ -1047,6 +1069,7 @@ assign_varying_locations(struct gl_context *ctx,
if (matched_candidate == NULL) {
hash_table_dtor(tfeedback_candidates);
hash_table_dtor(consumer_inputs);
+ hash_table_dtor(consumer_interface_inputs);
return false;
}
@@ -1064,12 +1087,14 @@ assign_varying_locations(struct gl_context *ctx,
if (!tfeedback_decls[i].assign_location(ctx, prog)) {
hash_table_dtor(tfeedback_candidates);
hash_table_dtor(consumer_inputs);
+ hash_table_dtor(consumer_interface_inputs);
return false;
}
}
hash_table_dtor(tfeedback_candidates);
hash_table_dtor(consumer_inputs);
+ hash_table_dtor(consumer_interface_inputs);
if (ctx-Const.DisableVaryingPacking) {
/* Transform feedback code assumes varyings are packed, so if the driver
--
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[Mesa-dev] [PATCH v4 13/17] glsl linker: remove interface block instance names
Convert interface blocks with instance names into flat
interface blocks without an instance name.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/Makefile.sources |1 +
src/glsl/ir_optimization.h|1 +
src/glsl/linker.cpp |6 +
src/glsl/lower_named_interface_blocks.cpp | 199 +
4 files changed, 207 insertions(+)
create mode 100644 src/glsl/lower_named_interface_blocks.cpp
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index e1112c3..b9fd283 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -63,6 +63,7 @@ LIBGLSL_FILES = \
$(GLSL_SRCDIR)/lower_mat_op_to_vec.cpp \
$(GLSL_SRCDIR)/lower_noise.cpp \
$(GLSL_SRCDIR)/lower_packed_varyings.cpp \
+ $(GLSL_SRCDIR)/lower_named_interface_blocks.cpp \
$(GLSL_SRCDIR)/lower_packing_builtins.cpp \
$(GLSL_SRCDIR)/lower_texture_projection.cpp \
$(GLSL_SRCDIR)/lower_variable_index_to_cond_assign.cpp \
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index 1c3bc60..d38d5e3 100644
--- a/src/glsl/ir_optimization.h
+++ b/src/glsl/ir_optimization.h
@@ -110,6 +110,7 @@ void lower_packed_varyings(void *mem_ctx, unsigned
location_base,
unsigned locations_used, ir_variable_mode mode,
gl_shader *shader);
bool lower_vector_insert(exec_list *instructions, bool
lower_nonconstant_index);
+void lower_named_interface_blocks(void *mem_ctx, gl_shader *shader);
bool optimize_redundant_jumps(exec_list *instructions);
bool optimize_split_arrays(exec_list *instructions, bool linked);
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index dea5838..c8d430c 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1733,6 +1733,12 @@ link_shaders(struct gl_context *ctx, struct
gl_shader_program *prog)
prog-LinkStatus = true;
}
+
+ for (unsigned int i = 0; i MESA_SHADER_TYPES; i++) {
+ if (prog-_LinkedShaders[i] != NULL)
+ lower_named_interface_blocks(mem_ctx, prog-_LinkedShaders[i]);
+ }
+
/* Implement the GLSL 1.30+ rule for discard vs infinite loops Do
* it before optimization because we want most of the checks to get
* dropped thanks to constant propagation.
diff --git a/src/glsl/lower_named_interface_blocks.cpp
b/src/glsl/lower_named_interface_blocks.cpp
new file mode 100644
index 000..f3a2ad5
--- /dev/null
+++ b/src/glsl/lower_named_interface_blocks.cpp
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * \file lower_named_interface_blocks.cpp
+ *
+ * This lowering pass converts all interface blocks with instance names
+ * into interface blocks without an instance name.
+ *
+ * For example, the following shader:
+ *
+ * out block {
+ * float block_var;
+ * } inst_name;
+ *
+ * main()
+ * {
+ * inst_name.block_var = 0.0;
+ * }
+ *
+ * Is rewritten to:
+ *
+ * out block {
+ * float block_var;
+ * };
+ *
+ * main()
+ * {
+ * block_var = 0.0;
+ * }
+ *
+ * This takes place after the shader code has already been verified with
+ * the interface name in place.
+ *
+ * The linking phase will use the interface block name rather than the
+ * interface's instance name when linking interfaces.
+ *
+ * This modification to the ir allows our currently existing dead code
+ * elimination to work with interface blocks without changes.
+ */
+
+#include glsl_symbol_table.h
+#include ir.h
+#include ir_optimization.h
+#include ir_rvalue_visitor.h
+#include program/hash_table.h
+
+class flatten_named_interface_blocks_declarations : public ir_rvalue_visitor
+{
+public:
+ void * const mem_ctx;
+ hash_table *interface_namespace;
+
+
[Mesa-dev] [PATCH v4 15/17] glsl linker: support arrays of interface block instances
With this change we now support interface block arrays.
For example, cases like this:
out block_name {
float f;
} block_instance[2];
This allows Mesa to pass the piglit glsl-1.50 test:
* execution/interface-blocks-complex-vs-fs.shader_test
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/lower_named_interface_blocks.cpp | 61 +++--
1 file changed, 50 insertions(+), 11 deletions(-)
diff --git a/src/glsl/lower_named_interface_blocks.cpp
b/src/glsl/lower_named_interface_blocks.cpp
index f3a2ad5..eba667a 100644
--- a/src/glsl/lower_named_interface_blocks.cpp
+++ b/src/glsl/lower_named_interface_blocks.cpp
@@ -106,22 +106,51 @@
flatten_named_interface_blocks_declarations::run(exec_list *instructions)
if (var-mode == ir_var_uniform)
continue;
- const glsl_type *const t = var-type;
+ const glsl_type * iface_t = var-type;
+ const glsl_type * array_t = NULL;
exec_node *insert_pos = var;
- char *iface_field_name;
- for (unsigned i = 0; i t-length; i++) {
- iface_field_name = ralloc_asprintf(mem_ctx, %s.%s, t-name,
-t-fields.structure[i].name);
+
+ if (iface_t-is_array()) {
+ array_t = iface_t;
+ iface_t = array_t-fields.array;
+ }
+
+ assert (iface_t-is_interface());
+
+ for (unsigned i = 0; i iface_t-length; i++) {
+ const char * field_name = iface_t-fields.structure[i].name;
+ char *iface_field_name =
+ralloc_asprintf(mem_ctx, %s.%s,
+iface_t-name, field_name);
ir_variable *found_var =
(ir_variable *) hash_table_find(interface_namespace,
iface_field_name);
if (!found_var) {
-ir_variable *new_var =
- new(mem_ctx) ir_variable(t-fields.structure[i].type,
-ralloc_strdup(mem_ctx,
t-fields.structure[i].name),
-(ir_variable_mode) var-mode);
-new_var-interface_type = t;
+ir_variable *new_var;
+if (array_t == NULL) {
+ char *var_name =
+ ralloc_strdup(mem_ctx, iface_t-fields.structure[i].name);
+ new_var =
+ new(mem_ctx) ir_variable(iface_t-fields.structure[i].type,
+ var_name,
+ (ir_variable_mode) var-mode);
+} else {
+ const glsl_type *new_array_type =
+ glsl_type::get_array_instance(
+ iface_t-fields.structure[i].type,
+ array_t-length);
+ char *var_name =
+ ralloc_asprintf(mem_ctx, %s[%d],
+ iface_t-fields.structure[i].name,
+ array_t-length);
+ new_var =
+ new(mem_ctx) ir_variable(new_array_type,
+ var_name,
+ (ir_variable_mode) var-mode);
+}
+
+new_var-interface_type = iface_t;
hash_table_insert(interface_namespace, new_var,
iface_field_name);
insert_pos-insert_after(new_var);
@@ -184,9 +213,19 @@
flatten_named_interface_blocks_declarations::handle_rvalue(ir_rvalue **rvalue)
(ir_variable *) hash_table_find(interface_namespace,
iface_field_name);
assert(found_var);
+
ir_dereference_variable *deref_var =
new(mem_ctx) ir_dereference_variable(found_var);
- *rvalue = deref_var;
+
+ ir_dereference_array *deref_array =
+ ir-record-as_dereference_array();
+ if (deref_array != NULL) {
+ *rvalue =
+new(mem_ctx) ir_dereference_array(deref_var,
+ deref_array-array_index);
+ } else {
+ *rvalue = deref_var;
+ }
}
}
--
1.7.10.4
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[Mesa-dev] [PATCH v4 16/17] glsl linker: compare interface blocks during intrastage linking
Verify that interface blocks match when combining compilation
units at the same stage. (For example, when merging all vertex
shaders.)
Fixes piglit glsl-1.50 test:
* linker/interface-blocks-multiple-vs-member-count-mismatch.shader_test
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/Makefile.sources |1 +
src/glsl/interface_blocks.cpp | 86 +
src/glsl/interface_blocks.h | 32 +++
src/glsl/linker.cpp |7
4 files changed, 126 insertions(+)
create mode 100644 src/glsl/interface_blocks.cpp
create mode 100644 src/glsl/interface_blocks.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index b9fd283..e39cb1a 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -26,6 +26,7 @@ LIBGLSL_FILES = \
$(GLSL_SRCDIR)/glsl_types.cpp \
$(GLSL_SRCDIR)/glsl_symbol_table.cpp \
$(GLSL_SRCDIR)/hir_field_selection.cpp \
+ $(GLSL_SRCDIR)/interface_blocks.cpp \
$(GLSL_SRCDIR)/ir_basic_block.cpp \
$(GLSL_SRCDIR)/ir_builder.cpp \
$(GLSL_SRCDIR)/ir_clone.cpp \
diff --git a/src/glsl/interface_blocks.cpp b/src/glsl/interface_blocks.cpp
new file mode 100644
index 000..6dfd0c4
--- /dev/null
+++ b/src/glsl/interface_blocks.cpp
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * \file interface_blocks.cpp
+ * GLSL interface blocks support
+ */
+
+#include ir.h
+#include glsl_symbol_table.h
+#include main/macros.h
+#include program/hash_table.h
+
+static bool
+cross_validate_interface_blocks(const gl_shader **shader_list,
+unsigned num_shaders)
+{
+ bool ok = true;
+ glsl_symbol_table interfaces;
+
+ for (unsigned int i = 0; ok i num_shaders; i++) {
+ if (shader_list[i] == NULL)
+ continue;
+
+ foreach_list(node, shader_list[i]-ir) {
+ ir_variable *var = ((ir_instruction *) node)-as_variable();
+ if (!var)
+continue;
+
+ const glsl_type *iface_type = var-interface_type;
+
+ if (iface_type == NULL)
+continue;
+
+ const char *iface_name = iface_type-name;
+
+ const glsl_type *old_iface_type =
+interfaces.get_interface(iface_name,
+ (enum ir_variable_mode) var-mode);
+
+ /* This is the first time we've seen the interface, so save
+ * it into our symbol table.
+ */
+ if (old_iface_type == NULL) {
+interfaces.add_interface(iface_name, iface_type,
+ (enum ir_variable_mode) var-mode);
+old_iface_type = iface_type;
+ }
+
+ ok = old_iface_type == iface_type;
+ if (!ok)
+break;
+ }
+ }
+
+ return ok;
+}
+
+bool
+validate_intrastage_interface_blocks(const gl_shader **shader_list,
+ unsigned num_shaders)
+{
+ return cross_validate_interface_blocks(shader_list,
+ num_shaders);
+}
+
diff --git a/src/glsl/interface_blocks.h b/src/glsl/interface_blocks.h
new file mode 100644
index 000..4c37c02
--- /dev/null
+++ b/src/glsl/interface_blocks.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
[Mesa-dev] [PATCH v4 17/17] glsl linker: compare interface blocks during interstage linking
Verify that interface blocks match when linking separate shader
stages into a program.
Fixes piglit glsl-1.50 tests:
* linker/interface-blocks-vs-fs-member-count-mismatch.shader_test
* linker/interface-blocks-vs-fs-member-order-mismatch.shader_test
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/glsl/interface_blocks.cpp | 47 +++--
src/glsl/interface_blocks.h |4
src/glsl/linker.cpp |6 ++
3 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/src/glsl/interface_blocks.cpp b/src/glsl/interface_blocks.cpp
index 6dfd0c4..b458b59 100644
--- a/src/glsl/interface_blocks.cpp
+++ b/src/glsl/interface_blocks.cpp
@@ -30,14 +30,21 @@
#include glsl_symbol_table.h
#include main/macros.h
#include program/hash_table.h
+#include linker.h
static bool
cross_validate_interface_blocks(const gl_shader **shader_list,
-unsigned num_shaders)
+unsigned num_shaders,
+bool interstage)
{
bool ok = true;
glsl_symbol_table interfaces;
+ /* Interstage linking checks assume 2 shaders. First the producer, and
+* then the consumer.
+*/
+ assert(!interstage || num_shaders == 2);
+
for (unsigned int i = 0; ok i num_shaders; i++) {
if (shader_list[i] == NULL)
continue;
@@ -52,6 +59,18 @@ cross_validate_interface_blocks(const gl_shader
**shader_list,
if (iface_type == NULL)
continue;
+ /* If we are checking interstage linking then we assume:
+ * * The first shader (producer) has i == 0, and for the
+ *producer we don't need to check input interfaces.
+ * * The second shader (consumer) has i == 1, and for the
+ *consumer we don't need to check output interfaces.
+ */
+ if (interstage
+ ((var-mode == ir_var_shader_in i == 0) ||
+ (var-mode == ir_var_shader_out i == 1))
+)
+continue;
+
const char *iface_name = iface_type-name;
const glsl_type *old_iface_type =
@@ -70,6 +89,18 @@ cross_validate_interface_blocks(const gl_shader
**shader_list,
ok = old_iface_type == iface_type;
if (!ok)
break;
+
+ /* For interstage linking, if the interface is an input, then
+ * we need to verify that its type matches a previously declared
+ * output type.
+ */
+ if (interstage var-mode == ir_var_shader_in) {
+old_iface_type =
+ interfaces.get_interface(iface_name, ir_var_shader_out);
+ok = old_iface_type == iface_type;
+if (!ok)
+ break;
+ }
}
}
@@ -81,6 +112,18 @@ validate_intrastage_interface_blocks(const gl_shader
**shader_list,
unsigned num_shaders)
{
return cross_validate_interface_blocks(shader_list,
- num_shaders);
+ num_shaders,
+ false);
+}
+
+bool
+validate_interstage_interface_blocks(const gl_shader *producer,
+ const gl_shader *consumer)
+{
+ const gl_shader *shader_list[] = { producer, consumer };
+
+ return cross_validate_interface_blocks((const gl_shader **) shader_list,
+ ARRAY_SIZE(shader_list),
+ true);
}
diff --git a/src/glsl/interface_blocks.h b/src/glsl/interface_blocks.h
index 4c37c02..58c847c 100644
--- a/src/glsl/interface_blocks.h
+++ b/src/glsl/interface_blocks.h
@@ -29,4 +29,8 @@ bool
validate_intrastage_interface_blocks(const gl_shader **shader_list,
unsigned num_shaders);
+bool
+validate_interstage_interface_blocks(const gl_shader *producer,
+ const gl_shader *consumer);
+
#endif /* GLSL_INTERFACE_BLOCKS_H */
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 4f2cab2..71203b1 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1729,6 +1729,12 @@ link_shaders(struct gl_context *ctx, struct
gl_shader_program *prog)
if (prog-_LinkedShaders[i] == NULL)
continue;
+ if (!validate_interstage_interface_blocks(prog-_LinkedShaders[prev],
+ prog-_LinkedShaders[i])) {
+linker_error(prog, interface block mismatch between shader
stages\n);
+goto done;
+ }
+
if (!cross_validate_outputs_to_inputs(prog,
prog-_LinkedShaders[prev],
prog-_LinkedShaders[i]))
--
1.7.10.4
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[Mesa-dev] [Bug 64692] New: [llvmpipe] src/gallium/drivers/llvmpipe/lp_state_fs.c:2415:llvmpipe_set_constant_buffer: Assertion `index (sizeof(llvmpipe-constants[shader])/sizeof((llvmpipe-constants
https://bugs.freedesktop.org/show_bug.cgi?id=64692 Priority: medium Bug ID: 64692 Keywords: have-backtrace, regression CC: mar...@gmail.com Assignee: mesa-dev@lists.freedesktop.org Summary: [llvmpipe] src/gallium/drivers/llvmpipe/lp_state_fs.c:2415:llvmpi pe_set_constant_buffer: Assertion `index (sizeof(llvmpipe-constants[shader])/sizeof((llvmpipe- constants[shader])[0]))' failed. Severity: critical Classification: Unclassified OS: Linux (All) Reporter: v...@freedesktop.org Hardware: x86-64 (AMD64) Status: NEW Version: git Component: Other Product: Mesa mesa: 46ea8041074df79561f9771e2ecf198f2cbd088f (master) Run piglit arb_uniform_buffer_object-maxblocks on llvmpipe. $ ./bin/arb_uniform_buffer_object-maxblocks -auto Max VS uniform blocks: 31 Max FS uniform blocks: 31 Max combined uniform blocks: 36 Failed to link: error: Too many vertex uniform blocks (32/31) Failed to link: error: Too many fragment uniform blocks (32/31) Failed to link: error: Too many combined uniform blocks (37/36) Failed to link: error: Too many combined uniform blocks (31/36) src/gallium/drivers/llvmpipe/lp_state_fs.c:2415:llvmpipe_set_constant_buffer: Assertion `index (sizeof(llvmpipe-constants[shader])/sizeof((llvmpipe-constants[shader])[0]))' failed. Trace/breakpoint trap (core dumped) (gdb) bt #0 0x7f9c3954490a in _debug_assert_fail (expr=0x7f9c3a04fad8 index (sizeof(llvmpipe-constants[shader])/sizeof((llvmpipe-constants[shader])[0])), file=0x7f9c3a04f250 src/gallium/drivers/llvmpipe/lp_state_fs.c, line=2415, function=0x7f9c3a04fc10 llvmpipe_set_constant_buffer) at src/gallium/auxiliary/util/u_debug.c:278 #1 0x7f9c39203603 in llvmpipe_set_constant_buffer (pipe=0x9b1c10, shader=0, index=16, cb=0x7fffce789f10) at src/gallium/drivers/llvmpipe/lp_state_fs.c:2415 #2 0x7f9c394f528c in cso_set_constant_buffer (cso=0xa90c00, shader_stage=0, index=16, cb=0x7fffce789f10) at src/gallium/auxiliary/cso_cache/cso_context.c:1337 #3 0x7f9c39426779 in st_bind_ubos (st=0xa799f0, shader=0xb289f0, shader_type=0) at src/mesa/state_tracker/st_atom_constbuf.c:215 #4 0x7f9c394267d7 in bind_vs_ubos (st=0xa799f0) at src/mesa/state_tracker/st_atom_constbuf.c:226 #5 0x7f9c3942439a in st_validate_state (st=0xa799f0) at src/mesa/state_tracker/st_atom.c:201 #6 0x7f9c3935ec38 in st_draw_vbo (ctx=0xa23990, prims=0x7fffce78a0e0, nr_prims=1, ib=0x0, index_bounds_valid=1 '\001', min_index=0, max_index=3, tfb_vertcount=0x0) at src/mesa/state_tracker/st_draw.c:210 #7 0x7f9c3941e305 in vbo_draw_arrays (ctx=0xa23990, mode=7, start=0, count=4, numInstances=1, baseInstance=0) at src/mesa/vbo/vbo_exec_array.c:624 #8 0x7f9c3941eccc in vbo_exec_DrawArrays (mode=7, start=0, count=4) at src/mesa/vbo/vbo_exec_array.c:776 #9 0x7f9c3bffd0e9 in stub_glDrawArrays (mode=7, first=0, count=4) at piglit/tests/util/generated_dispatch.c:5350 #10 0x7f9c3c0582d1 in piglit_draw_rect (x=-0.95979, y=-0.80012, w=0.039991, h=0.20003) at piglit/tests/util/piglit-util-gl.c:872 #11 0x00401979 in test_draw (y_index=0, prog=15, bos=0xb47be0, test_block=0, active_blocks=31) at piglit/tests/spec/arb_uniform_buffer_object/maxblocks.c:226 #12 0x00401af8 in pass_link_test (y_index=0, vs_prefix=0x4021c1 vs, vs_blocks=31, fs_prefix=0x4021c1 vs, fs_blocks=0) at piglit/tests/spec/arb_uniform_buffer_object/maxblocks.c:267 #13 0x00401d21 in piglit_display () at piglit/tests/spec/arb_uniform_buffer_object/maxblocks.c:314 #14 0x7f9c3bff1478 in display () at piglit/tests/util/piglit-framework-gl/piglit_glut_framework.c:60 #15 0x7f9c3b7a3137 in fghRedrawWindow (window=0x9ae0c0) at freeglut_main.c:210 #16 fghcbDisplayWindow (window=0x9ae0c0, enumerator=0x7fffce78a3d0) at freeglut_main.c:227 #17 0x7f9c3b7a6889 in fgEnumWindows (enumCallback=0x7f9c3b7a30d0 fghcbDisplayWindow, enumerator=0x7fffce78a3d0) at freeglut_structure.c:394 #18 0x7f9c3b7a35fa in fghDisplayAll () at freeglut_main.c:249 #19 glutMainLoopEvent () at freeglut_main.c:1450 #20 0x7f9c3b7a3f05 in glutMainLoop () at freeglut_main.c:1498 #21 0x7f9c3bff16ad in run_test (gl_fw=0x7f9c3c2c4bc0, argc=1, argv=0x7fffce78a798) at piglit/tests/util/piglit-framework-gl/piglit_glut_framework.c:142 #22 0x7f9c3bfef796 in piglit_gl_test_run (argc=1, argv=0x7fffce78a798, config=0x7fffce78a680) at piglit/tests/util/piglit-framework-gl.c:127 #23 0x0040131e in main (argc=2, argv=0x7fffce78a798) at piglit/tests/spec/arb_uniform_buffer_object/maxblocks.c:58 (gdb) frame 1 #1 0x7f9c39203603 in llvmpipe_set_constant_buffer (pipe=0x9b1c10, shader=0, index=16, cb=0x7fffce789f10) at src/gallium/drivers/llvmpipe/lp_state_fs.c:2415 2415 assert(index
[Mesa-dev] [PATCH] llvmpipe: fix bogus handling of first_layer when setting up texture sampling
From: Roland Scheidegger srol...@vmware.com
The code avoided first_layer parameter in the sampler interface (and needing
to do another calculation at runtime) by fixing up the base texture pointer
instead. Unfortunately, this didn't actually work as we have mip-first
texture layout so fixing up the base ptr by a fixed amount is very wrong if
there are mipmaps present. The wrong offsets caused misrendering and crashes.
Fix this by just adjusting the individual mip level offsets instead.
Spotted by Jose.
---
src/gallium/drivers/llvmpipe/lp_setup.c | 23 ++-
src/gallium/drivers/llvmpipe/lp_state_sampler.c |6 --
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_setup.c
b/src/gallium/drivers/llvmpipe/lp_setup.c
index b5b00d1..ce9be92 100644
--- a/src/gallium/drivers/llvmpipe/lp_setup.c
+++ b/src/gallium/drivers/llvmpipe/lp_setup.c
@@ -748,23 +748,28 @@ lp_setup_set_fragment_sampler_views(struct
lp_setup_context *setup,
jit_tex-img_stride[j] = lp_tex-img_stride[j];
}
- /*
- * We don't use anything like first_element (for buffers) or
- * first_layer (for arrays), instead adjust the last_element
- * (width) or last_layer (depth) plus the base pointer.
- * Less parameters and faster at shader execution.
- * XXX Could do the same for mip levels.
- */
if (res-target == PIPE_TEXTURE_1D_ARRAY ||
res-target == PIPE_TEXTURE_2D_ARRAY) {
+ /*
+ * For arrays, we don't have first_layer, instead adjust
+ * last_layer (depth) plus the mip level offsets
+ * (as we have mip-first layout can't just adjust base
ptr).
+ * XXX For mip levels, could do something similar.
+ */
jit_tex-depth = view-u.tex.last_layer -
view-u.tex.first_layer + 1;
- jit_tex-base = (uint8_t *)jit_tex-base +
- view-u.tex.first_layer *
lp_tex-img_stride[0];
+ for (j = first_level; j = last_level; j++) {
+jit_tex-mip_offsets[j] += view-u.tex.first_layer *
+ lp_tex-img_stride[j];
+ }
assert(view-u.tex.first_layer = view-u.tex.last_layer);
assert(view-u.tex.last_layer res-array_size);
}
}
else {
+ /*
+ * For buffers, we don't have first_element, instead adjust
+ * last_element (width) plus the base pointer.
+ */
unsigned view_blocksize =
util_format_get_blocksize(view-format);
/* probably don't really need to fill that out */
jit_tex-mip_offsets[0] = 0;
diff --git a/src/gallium/drivers/llvmpipe/lp_state_sampler.c
b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
index 6498d13..6b7e327 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_sampler.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
@@ -320,8 +320,10 @@ prepare_shader_sampling(
if (res-target == PIPE_TEXTURE_1D_ARRAY ||
res-target == PIPE_TEXTURE_2D_ARRAY) {
num_layers = view-u.tex.last_layer -
view-u.tex.first_layer + 1;
- addr = (uint8_t *)addr +
- view-u.tex.first_layer *
lp_tex-img_stride[0];
+ for (j = first_level; j = last_level; j++) {
+ mip_offsets[j] += view-u.tex.first_layer *
+ lp_tex-img_stride[j];
+ }
assert(view-u.tex.first_layer = view-u.tex.last_layer);
assert(view-u.tex.last_layer res-array_size);
}
--
1.7.9.5
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[Mesa-dev] [Bug 64649] Anomaly 2 (Steam) exits with GLX_EXT_swap_control not supported, unable to set vertical sync
https://bugs.freedesktop.org/show_bug.cgi?id=64649 --- Comment #3 from romula...@gmail.com --- http://www.opengl.org/registry/specs/EXT/swap_control.txt -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] intel: Don't spam intelReadPixels: fallback to swrast in non-PBO case.
Kenneth Graunke kenn...@whitecape.org writes: When an application is using PBOs, we attempt to use the BLT engine to perform ReadPixels. If that fails due to some restrictions, it's useful to raise a performance warning. In the non-PBO case, we always use a CPU mapping since getting the data into client memory requires a CPU-side copy. This is a very common case, so raising a performance warning is annoying. In particular, apitrace's image dumping code hits this path, causing it to print hundreds of thousands of performance warnings via ARB_debug_output. This tends to obscure actual errors or other important messages. Reviewed-by: Eric Anholt e...@anholt.net pgpS5gCKoZ7pC.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] A simple GLES2 shader application performance slower with h/w renderer
Divick Kishore divick.kish...@gmail.com writes: Hi, I have a simple GLES2 based application which does not do much in the either of the vertex and fragment shaders. It simply draws a rotating spiral made from a simple triangle strip. When I try to run this application using the mesa with h/w renderer, it gives me a performance which is almost = 60 fps consistently. By default we sync to vblank, which for you is 60. The software rasterizer lacks this feature. pgpBgQYqAkX4Q.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] A simple GLES2 shader application performance slower with h/w renderer
On 05/16/2013 09:27 PM, Eric Anholt wrote: Divick Kishore divick.kish...@gmail.com writes: Hi, I have a simple GLES2 based application which does not do much in the either of the vertex and fragment shaders. It simply draws a rotating spiral made from a simple triangle strip. When I try to run this application using the mesa with h/w renderer, it gives me a performance which is almost = 60 fps consistently. By default we sync to vblank, which for you is 60. The software rasterizer lacks this feature. The weird thing is that he said he ran it with vblank_mode=0. Makes me wonder if we have a bug in our handling of that with EGL still. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] A simple GLES2 shader application performance slower with h/w renderer
By default we sync to vblank, which for you is 60. The software rasterizer lacks this feature. I meant that even with h/w rasterizer I get fps = 60 with vblank=0 set. The weird thing is that he said he ran it with vblank_mode=0. Makes me wonder if we have a bug in our handling of that with EGL still. I can attach the sample application along if it helps to reproduce the issue. Thanks Regards, Divick ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
