Re: [Mesa-dev] [PATCH 4/4] radeon: Determine the bo priority (MSAA, depth, UVD are high)
On Thu, 02 Jan 2014 05:57:46 +0100
Andreas Hartmetz ahartm...@gmail.com wrote:
On Wednesday 01 January 2014 16:58:46 Lauri Kasanen wrote:
@@ -257,6 +258,7 @@ struct radeon_winsys {
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
+ boolean high_prio,
enum radeon_bo_domain domain);
struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
Something I have learned about schedulers is that binary priorities
are not a good deal. They kind of encourage special case hacks and
two code paths, they can do less than numeric priorities, and they
are not significantly easier to implement if you want to do it
correctly. This is not exactly a scheduler, but it seems similar
enough.
So I think a numeric value and = 3 priorities would be better here,
then you could also start assigning priority by things like buffer size
or really any heuristic that can produce some number. Even such
heuristics are easier to write when you don't need to limit the result
to true / false.
Hi Andreas,
This boolean is just one component to be used in the final score (for
the plan, see github.com/clbr/jamkthesis). It passes down information
that's otherwise unavailable, ie whether the buffer's type means it
should be more likely to stay in VRAM.
The buffer's size and other factors (patch 3, VRAM size) also influence
the score.
The network won't care if it's a bool or an int, so the question is
just whether having it an int would mean better decisions or not. What
do you think?
- Lauri
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Re: [Mesa-dev] [PATCH 2/2] glx/dri2: Add support for adaptive vsync
On Sun, 15 Dec 2013 12:38:28 +0200 Lauri Kasanen c...@gmx.com wrote: There is a GLX extension for this behavior, glx_swap_control_tear, which mesa doesn't support ATM. But as usual, even after it becomes supported, there will be thousands of applications that won't add support for it, necessitating the need for a user override. Ping. Patch 1 is already merged. - Lauri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 57372] x11-libs/libxcb media-libs/mesa segfault in __glXGetString
https://bugs.freedesktop.org/show_bug.cgi?id=57372 Dennis Schridde devuran...@gmx.net changed: What|Removed |Added CC||devuran...@gmx.net -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [wip 2/9] glsl: serialize methods for IR instructions
Patch adds a new virtual function for ir_instruction base class which
has to be implemented by each instruction. This data will be used by the
shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/Makefile.sources | 1 +
src/glsl/ir.h | 45 ++
src/glsl/ir_serialize.cpp | 392 ++
src/glsl/ir_serialize.h | 35 +
4 files changed, 473 insertions(+)
create mode 100644 src/glsl/ir_serialize.cpp
create mode 100644 src/glsl/ir_serialize.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 2e81ded..5573d00 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -45,6 +45,7 @@ LIBGLSL_FILES = \
$(GLSL_SRCDIR)/ir_reader.cpp \
$(GLSL_SRCDIR)/ir_rvalue_visitor.cpp \
$(GLSL_SRCDIR)/ir_set_program_inouts.cpp \
+ $(GLSL_SRCDIR)/ir_serialize.cpp \
$(GLSL_SRCDIR)/ir_validate.cpp \
$(GLSL_SRCDIR)/ir_variable_refcount.cpp \
$(GLSL_SRCDIR)/linker.cpp \
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 780959b..71ddf87 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -35,6 +35,7 @@
#include ir_visitor.h
#include ir_hierarchical_visitor.h
#include main/mtypes.h
+#include memory_writer.h
#ifdef __cplusplus
@@ -107,6 +108,10 @@ public:
/** ir_print_visitor helper for debugging. */
void print(void) const;
+ /* serialization */
+ void serialize(memory_writer mem);
+ virtual void serialize_data(memory_writer mem) = 0;
+
virtual void accept(ir_visitor *) = 0;
virtual ir_visitor_status accept(ir_hierarchical_visitor *) = 0;
virtual ir_instruction *clone(void *mem_ctx,
@@ -167,6 +172,8 @@ public:
virtual ir_rvalue *clone(void *mem_ctx, struct hash_table *) const;
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -379,6 +386,8 @@ public:
return this;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -769,6 +778,8 @@ public:
ir_function_signature *clone_prototype(void *mem_ctx,
struct hash_table *ht) const;
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -900,6 +911,8 @@ public:
return this;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -982,6 +995,8 @@ public:
return this;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1006,6 +1021,8 @@ public:
virtual ir_loop *clone(void *mem_ctx, struct hash_table *ht) const;
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1049,6 +1066,8 @@ public:
virtual ir_constant *constant_expression_value(struct hash_table
*variable_context = NULL);
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1475,6 +1494,8 @@ public:
*/
static ir_expression_operation get_operator(const char *);
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1513,6 +1534,8 @@ public:
return this;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1607,6 +1630,8 @@ public:
return value;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1641,6 +1666,8 @@ public:
virtual ir_loop_jump *clone(void *mem_ctx, struct hash_table *) const;
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1681,6 +1708,8 @@ public:
virtual ir_discard *clone(void *mem_ctx, struct hash_table *ht) const;
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1753,6 +1782,8 @@ public:
virtual ir_constant *constant_expression_value(struct hash_table
*variable_context = NULL);
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1864,6 +1895,8 @@ public:
*/
static ir_swizzle *create(ir_rvalue *, const char *, unsigned
vector_length);
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -1967,6 +2000,8 @@ public:
return this-var;
}
+ virtual void serialize_data(memory_writer mem);
+
virtual void accept(ir_visitor *v)
{
v-visit(this);
@@ -2016,6 +2051,8 @@ public:
*/
[Mesa-dev] [wip 1/9] glsl: memory_writer helper class for data serialization
Class will be used by the shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/memory_writer.h | 147 +++
1 file changed, 147 insertions(+)
create mode 100644 src/glsl/memory_writer.h
diff --git a/src/glsl/memory_writer.h b/src/glsl/memory_writer.h
new file mode 100644
index 000..a6c6b55
--- /dev/null
+++ b/src/glsl/memory_writer.h
@@ -0,0 +1,147 @@
+/* -*- c++ -*- */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+#ifndef MEMORY_WRITER_H
+#define MEMORY_WRITER_H
+
+#include stdlib.h
+#include unistd.h
+#include string.h
+
+#ifdef __cplusplus
+/**
+ * Helper class for writing data to memory
+ *
+ * This class maintains a dynamically-sized memory buffer and allows
+ * for data to be efficiently appended to it with automatic resizing.
+ */
+class memory_writer
+{
+public:
+ memory_writer() :
+ memory(NULL),
+ curr_size(0),
+ pos(0) {}
+
+ ~memory_writer()
+ {
+ free(memory);
+ }
+
+ /* user wants to claim the memory */
+ char *release_memory(size_t *size)
+ {
+ /* final realloc to free allocated but unused memory */
+ char *result = (char *) realloc(memory, pos);
+ *size = pos;
+ memory = NULL;
+ curr_size = 0;
+ pos = 0;
+ return result;
+ }
+
+/**
+ * write functions per type
+ */
+#define DECL_WRITER(type) int write_ ##type (const type data) {\
+ return write(data, sizeof(type));\
+}
+
+ DECL_WRITER(int32_t);
+ DECL_WRITER(int64_t);
+ DECL_WRITER(uint8_t);
+ DECL_WRITER(uint32_t);
+
+ int write_bool(bool data)
+ {
+ uint8_t val = data;
+ return write_uint8_t(val);
+ }
+
+ /* write function that reallocates more memory if required */
+ int write(const void *data, int32_t size)
+ {
+ if (!memory || pos (int32_t)(curr_size - size))
+ if (grow(size))
+return -1;
+
+ memcpy(memory + pos, data, size);
+
+ pos += size;
+ return 0;
+ }
+
+ int overwrite(const void *data, int32_t size, int32_t offset)
+ {
+ if (offset 0 || offset + size pos)
+ return -1;
+ memcpy(memory + offset, data, size);
+ return 0;
+ }
+
+ int write_string(const char *str)
+ {
+ if (!str)
+ return -1;
+ char terminator = '\0';
+ write(str, strlen(str));
+ write(terminator, 1);
+ return 0;
+ }
+
+ inline int32_t position() { return pos; }
+
+
+private:
+
+ /* reallocate more memory */
+ int grow(int32_t size)
+ {
+ int32_t new_size = 2 * (curr_size + size);
+ char *more_mem = (char *) realloc(memory, new_size);
+ if (more_mem == NULL) {
+ free(memory);
+ memory = NULL;
+ return -1;
+ } else {
+ memory = more_mem;
+ curr_size = new_size;
+ return 0;
+ }
+ }
+
+ /* allocated memory */
+ char *memory;
+
+ /* current size of the whole allocation */
+ int32_t curr_size;
+
+ /* write position / size of the data written */
+ int32_t pos;
+};
+
+#endif /* ifdef __cplusplus */
+
+#endif /* MEMORY_WRITER_H */
--
1.8.3.1
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[Mesa-dev] [wip 9/9] mesa: OES_get_program_binary extension functionality
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shaderapi.c | 44 ++--
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 57511e8..c07b226 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -57,6 +57,7 @@
#include ../glsl/ir.h
#include ../glsl/ir_uniform.h
#include ../glsl/program.h
+#include ../glsl/shader_cache.h
/** Define this to enable shader substitution (see below) */
#define SHADER_SUBST 0
@@ -1632,8 +1633,26 @@ _mesa_GetProgramBinary(GLuint program, GLsizei bufSize,
GLsizei *length,
if (length != NULL)
*length = 0;
- (void) binaryFormat;
- (void) binary;
+ size_t size = 0;
+ char *data = mesa_program_serialize(shProg, size);
+
+ /* we have more data that can fit to user given buffer */
+ if (size bufSize) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, __FUNCTION__);
+ if (data)
+ free(data);
+ return;
+ }
+
+ if (data) {
+ memcpy(binary, data, size);
+ free(data);
+ }
+
+ if (length != NULL)
+ *length = size;
+
+ *binaryFormat = 0;
}
void GLAPIENTRY
@@ -1647,10 +1666,23 @@ _mesa_ProgramBinary(GLuint program, GLenum binaryFormat,
if (!shProg)
return;
- (void) binaryFormat;
- (void) binary;
- (void) length;
- _mesa_error(ctx, GL_INVALID_OPERATION, __FUNCTION__);
+ if (length = 0)
+ return;
+
+ /* free possible existing data and initialize structure */
+ _mesa_free_shader_program_data(ctx, shProg);
+ _mesa_init_shader_program(ctx, shProg);
+
+ /* fill structure from a binary blob */
+ if (mesa_program_deserialize(shProg, binary, length)) {
+ _mesa_error(ctx, GL_INVALID_VALUE, glProgramBinary(binary
incompatible));
+ return;
+ }
+
+ /* driver specific link, optimizations and what not */
+ ctx-Driver.LinkShader(ctx, shProg);
+
+ _mesa_ValidateProgram(program);
}
--
1.8.3.1
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[Mesa-dev] [wip 3/9] glsl: memory_map helper class for data deserialization
Class will be used by the shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/memory_map.h | 174 ++
1 file changed, 174 insertions(+)
create mode 100644 src/glsl/memory_map.h
diff --git a/src/glsl/memory_map.h b/src/glsl/memory_map.h
new file mode 100644
index 000..1b68b72
--- /dev/null
+++ b/src/glsl/memory_map.h
@@ -0,0 +1,174 @@
+/* -*- c++ -*- */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+#ifndef MEMORY_MAP_H
+#define MEMORY_MAP_H
+
+#include fcntl.h
+#include unistd.h
+#include sys/mman.h
+#include sys/stat.h
+
+#ifdef __cplusplus
+
+/**
+ * Helper class to read data
+ *
+ * Class can read either from user given memory or from a file. On Linux
+ * file reading wraps around the Posix functions for mapping a file into
+ * the process's address space. Other OS may need different implementation.
+ */
+class memory_map
+{
+public:
+ memory_map() :
+ mode(memory_map::READ_MEM),
+ fd(0),
+ cache_size(0),
+ cache_mmap(NULL),
+ cache_mmap_p(NULL)
+ {
+ /* only used by read_string() */
+ mem_ctx = ralloc_context(NULL);
+ }
+
+ /* read from disk */
+ int map(const char *path)
+ {
+ struct stat stat_info;
+ if (stat(path, stat_info) != 0)
+ return -1;
+
+ mode = memory_map::READ_MAP;
+ cache_size = stat_info.st_size;
+
+ fd = open(path, O_RDONLY);
+ if (fd) {
+ cache_mmap_p = cache_mmap = (char *)
+mmap(NULL, cache_size, PROT_READ, MAP_PRIVATE, fd, 0);
+ return (cache_mmap == MAP_FAILED) ? -1 : 0;
+ }
+ return -1;
+ }
+
+ /* read from memory */
+ int map(const void *memory, size_t size)
+ {
+ cache_mmap_p = cache_mmap = (char *) memory;
+ cache_size = size;
+ return 0;
+ }
+
+ /* wrap a portion from another map */
+ int map(memory_map map, size_t size)
+ {
+ cache_mmap_p = cache_mmap = map.cache_mmap_p;
+ cache_size = size;
+ map.ffwd(size);
+ return 0;
+ }
+
+ ~memory_map() {
+ if (cache_mmap mode == READ_MAP) {
+ munmap(cache_mmap, cache_size);
+ close(fd);
+ }
+ ralloc_free(mem_ctx);
+ }
+
+ /* move read pointer forward */
+ inline void ffwd(int len)
+ {
+ cache_mmap_p += len;
+ }
+
+ inline void jump(unsigned pos)
+ {
+ cache_mmap_p = cache_mmap + pos;
+ }
+
+
+ /* position of read pointer */
+ inline uint32_t position()
+ {
+ return cache_mmap_p - cache_mmap;
+ }
+
+ inline char *read_string()
+ {
+ char *str = ralloc_strdup(mem_ctx, cache_mmap_p);
+ ffwd(strlen(str)+1);
+ return str;
+ }
+
+/**
+ * read functions per type
+ */
+#define DECL_READER(type) type read_ ##type () {\
+ ffwd(sizeof(type));\
+ return *(type *) (cache_mmap_p - sizeof(type));\
+}
+
+ DECL_READER(int32_t);
+ DECL_READER(int64_t);
+ DECL_READER(uint8_t);
+ DECL_READER(uint32_t);
+
+ inline uint8_t read_bool()
+ {
+ return read_uint8_t();
+ }
+
+ inline void read(void *dst, size_t size)
+ {
+ memcpy(dst, cache_mmap_p, size);
+ ffwd(size);
+ }
+
+ /* total size of mapped memory */
+ inline int32_t size()
+ {
+ return cache_size;
+ }
+
+private:
+
+ void *mem_ctx;
+
+ /* specifies if we are reading mapped memory or user passed mem */
+ enum read_mode {
+ READ_MEM = 0,
+ READ_MAP
+ };
+
+ int32_t mode;
+ int32_t fd;
+ int32_t cache_size;
+ char *cache_mmap;
+ char *cache_mmap_p;
+};
+#endif /* ifdef __cplusplus */
+
+#endif /* MEMORY_MAP_H */
--
1.8.3.1
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[Mesa-dev] [wip 7/9] mesa: iterate method for string_to_uint_map
Shader binary cache requires this to be able to cache hash data from
the gl_shader_program structure.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/program/hash_table.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/program/hash_table.h b/src/mesa/program/hash_table.h
index e95fc49..ece43a1 100644
--- a/src/mesa/program/hash_table.h
+++ b/src/mesa/program/hash_table.h
@@ -229,6 +229,14 @@ public:
}
/**
+* Runs a passed callback for the hash
+*/
+ void iterate(void (*func)(const void *, void *, void *), void *closure)
+ {
+ hash_table_call_foreach(this-ht, func, closure);
+ }
+
+ /**
* Get the value associated with a particular key
*
* \return
--
1.8.3.1
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[Mesa-dev] [wip 8/9] glsl: functions to serialize gl_shader and gl_shader_program
These utility functions can be used to (de)serialize gl_shader and
gl_shader_program structures. This makes it possible to implement a
shader compiler cache for individual shaders and functionality required
by OES_get_program_binary extension.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/Makefile.sources | 1 +
src/glsl/shader_cache.cpp | 489 ++
src/glsl/shader_cache.h | 58 ++
3 files changed, 548 insertions(+)
create mode 100644 src/glsl/shader_cache.cpp
create mode 100644 src/glsl/shader_cache.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index fd4c15e..188deac 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -102,6 +102,7 @@ LIBGLSL_FILES = \
$(GLSL_SRCDIR)/opt_swizzle_swizzle.cpp \
$(GLSL_SRCDIR)/opt_tree_grafting.cpp \
$(GLSL_SRCDIR)/s_expression.cpp \
+ $(GLSL_SRCDIR)/shader_cache.cpp \
$(GLSL_SRCDIR)/strtod.c
# glsl_compiler
diff --git a/src/glsl/shader_cache.cpp b/src/glsl/shader_cache.cpp
new file mode 100644
index 000..4b5de45
--- /dev/null
+++ b/src/glsl/shader_cache.cpp
@@ -0,0 +1,489 @@
+/* -*- c++ -*- */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include main/shaderobj.h
+#include main/uniforms.h
+#include main/macros.h
+#include program/hash_table.h
+#include ir_serialize.h
+#include ir_deserializer.h
+#include shader_cache_magic.h
+
+/**
+ * It is currently unknown if we need these to be available.
+ * There can be calls in mesa/main (like glGetAttachedShaders) that use
+ * the Shaders list.
+ */
+const bool STORE_UNLINKED_SHADERS = false;
+
+
+static void
+write_header(gl_shader *shader, memory_writer blob)
+{
+ GET_CURRENT_CONTEXT(ctx);
+
+ blob.write_string(mesa_get_shader_cache_magic());
+ blob.write_string((const char *)ctx-Driver.GetString(ctx, GL_VENDOR));
+ blob.write_string((const char *)ctx-Driver.GetString(ctx, GL_RENDERER));
+ blob.write_uint32_t(shader-Version);
+ blob.write_uint32_t(shader-Type);
+ blob.write_uint8_t(shader-IsES);
+
+ /* post-link data */
+ blob.write_uint32_t(shader-num_samplers);
+ blob.write_uint32_t(shader-active_samplers);
+ blob.write_uint32_t(shader-shadow_samplers);
+ blob.write_uint32_t(shader-num_uniform_components);
+ blob.write_uint32_t(shader-num_combined_uniform_components);
+
+ uint8_t uses_builtins = shader-uses_builtin_functions;
+ blob.write_uint8_t(uses_builtins);
+
+ blob.write(shader-Geom, sizeof(shader-Geom));
+
+ for (unsigned i = 0; i MAX_SAMPLERS; i++)
+ blob.write_uint8_t(shader-SamplerUnits[i]);
+
+ for (unsigned i = 0; i MAX_SAMPLERS; i++) {
+ int32_t target = shader-SamplerTargets[i];
+ blob.write_int32_t(target);
+ }
+}
+
+
+/**
+ * Serializes gl_shader structure, writes shader header
+ * information and exec_list of instructions
+ */
+extern C char *
+mesa_shader_serialize(struct gl_shader *shader, size_t *size)
+{
+ *size = 0;
+
+ memory_writer blob;
+
+ int32_t start_pos = blob.position();
+ uint32_t shader_data_len = 0;
+ uint32_t shader_type = shader-Type;
+
+ blob.write_uint32_t(shader_data_len);
+ blob.write_uint32_t(shader_type);
+
+ write_header(shader, blob);
+
+ /* dump all shader instructions */
+ serialize_list(*shader-ir, blob);
+
+ shader_data_len = blob.position() -
+ start_pos - sizeof(shader_data_len);
+ blob.overwrite(shader_data_len, sizeof(shader_data_len), start_pos);
+
+ return blob.release_memory(size);
+}
+
+
+/**
+ * helper structure for hash serialization, hash size is
+ * counted to item_count during serialization
+ */
+struct hash_serialize_data
+{
+ void *writer;
+ uint32_t item_count;
+};
+
+
+static void
+serialize_hash(const void *key, void *data, void *closure)
+{
+ hash_serialize_data *s_data = (hash_serialize_data *)
[Mesa-dev] [wip 5/9] glsl: export populate_symbol_table function
Binary shader cache needs this to allocate and fill gl_shader symbol table.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/linker.cpp | 2 +-
src/glsl/linker.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index a81e107..2b1d290 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -836,7 +836,7 @@ interstage_cross_validate_uniform_blocks(struct
gl_shader_program *prog)
/**
* Populates a shaders symbol table with all global declarations
*/
-static void
+void
populate_symbol_table(gl_shader *sh)
{
sh-symbols = new(sh) glsl_symbol_table;
diff --git a/src/glsl/linker.h b/src/glsl/linker.h
index 130915d..f0a947b 100644
--- a/src/glsl/linker.h
+++ b/src/glsl/linker.h
@@ -26,6 +26,9 @@
#ifndef GLSL_LINKER_H
#define GLSL_LINKER_H
+void
+populate_symbol_table(gl_shader *sh);
+
extern bool
link_function_calls(gl_shader_program *prog, gl_shader *main,
gl_shader **shader_list, unsigned num_shaders);
--
1.8.3.1
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[Mesa-dev] [wip 0/9] GL_OES_get_program_binary extension
Hi; Here's another take on the get_program_binary extension. I've rewritten big chunks of it based on Paul's review and comments earlier. Here's a brief list out of my head of things changed: - uses mesa compilation time as verification method for cache, not git sha - much smaller serialization code size, now as part of IR classes - smaller binary blob size - does not dump separate 'prototypes block' for functions but instead deserialization iterates over the whole blob for functions first - hashtables written faster than previously (iterated only once) - no 'unique_id' for ir_variables but using the address as identifier - patch set broken down to more individual patches/changes Mesa branch with these patches applied on top: http://cgit.freedesktop.org/~tpalli/mesa/log/?h=oes_get_program_binary I have plans for the addition of driver backend data but I was hoping this to be as a separate addition on top. Basically I extend gl_shader_program struct and offer API for drivers to dump their binary data there, some proto here: http://cgit.freedesktop.org/~tpalli/mesa/log/?h=driver_interface (in order to work more data needed like the keys but this is just test) I have also 'automatic' cache implementation here that can be used to verify the cache functionality with any application (without extension): http://cgit.freedesktop.org/~tpalli/mesa/log/?h=new_serialization Any comments appreciated; Tapani Pälli (9): glsl: memory_writer helper class for data serialization glsl: serialize methods for IR instructions glsl: memory_map helper class for data deserialization glsl: add MESA_SHADER_CACHE_MAGIC string for shader binary cache glsl: export populate_symbol_table function glsl: ir_deserializer class for the binary shader cache mesa: iterate method for string_to_uint_map glsl: functions to serialize gl_shader and gl_shader_program mesa: OES_get_program_binary extension functionality src/glsl/Makefile.sources | 3 + src/glsl/ir.h | 45 ++ src/glsl/ir_deserializer.cpp | 979 ++ src/glsl/ir_deserializer.h| 142 ++ src/glsl/ir_serialize.cpp | 392 + src/glsl/ir_serialize.h | 35 ++ src/glsl/linker.cpp | 2 +- src/glsl/linker.h | 3 + src/glsl/memory_map.h | 174 src/glsl/memory_writer.h | 147 +++ src/glsl/shader_cache.cpp | 489 + src/glsl/shader_cache.h | 58 +++ src/glsl/shader_cache_magic.h | 36 ++ src/mesa/main/shaderapi.c | 44 +- src/mesa/program/hash_table.h | 8 + 15 files changed, 2550 insertions(+), 7 deletions(-) create mode 100644 src/glsl/ir_deserializer.cpp create mode 100644 src/glsl/ir_deserializer.h create mode 100644 src/glsl/ir_serialize.cpp create mode 100644 src/glsl/ir_serialize.h create mode 100644 src/glsl/memory_map.h create mode 100644 src/glsl/memory_writer.h create mode 100644 src/glsl/shader_cache.cpp create mode 100644 src/glsl/shader_cache.h create mode 100644 src/glsl/shader_cache_magic.h -- 1.8.3.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [wip 4/9] glsl: add MESA_SHADER_CACHE_MAGIC string for shader binary cache
Patch adds a string that can be used by binary cache to identify
that shader binaries were generated with exact same Mesa library.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/shader_cache_magic.h | 36
1 file changed, 36 insertions(+)
create mode 100644 src/glsl/shader_cache_magic.h
diff --git a/src/glsl/shader_cache_magic.h b/src/glsl/shader_cache_magic.h
new file mode 100644
index 000..b4e99e2
--- /dev/null
+++ b/src/glsl/shader_cache_magic.h
@@ -0,0 +1,36 @@
+/* -*- c++ -*- */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef SHADER_CACHE_MAGIC_H
+#define SHADER_CACHE_MAGIC_H
+
+#define MESA_SHADER_CACHE_MAGIC __DATE__ __TIME__
+
+inline const char *
+mesa_get_shader_cache_magic()
+{
+ return MESA_SHADER_CACHE_MAGIC;
+}
+
+#endif
--
1.8.3.1
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[Mesa-dev] [wip 6/9] glsl: ir_deserializer class for the binary shader cache
ir_deserializer can create a gl_shader structure out of binary data, this will
be used by shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/Makefile.sources| 1 +
src/glsl/ir_deserializer.cpp | 979 +++
src/glsl/ir_deserializer.h | 142 +++
3 files changed, 1122 insertions(+)
create mode 100644 src/glsl/ir_deserializer.cpp
create mode 100644 src/glsl/ir_deserializer.h
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 5573d00..fd4c15e 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -33,6 +33,7 @@ LIBGLSL_FILES = \
$(GLSL_SRCDIR)/ir_clone.cpp \
$(GLSL_SRCDIR)/ir_constant_expression.cpp \
$(GLSL_SRCDIR)/ir.cpp \
+ $(GLSL_SRCDIR)/ir_deserializer.cpp \
$(GLSL_SRCDIR)/ir_equals.cpp \
$(GLSL_SRCDIR)/ir_expression_flattening.cpp \
$(GLSL_SRCDIR)/ir_function_can_inline.cpp \
diff --git a/src/glsl/ir_deserializer.cpp b/src/glsl/ir_deserializer.cpp
new file mode 100644
index 000..d1856d7
--- /dev/null
+++ b/src/glsl/ir_deserializer.cpp
@@ -0,0 +1,979 @@
+/* -*- c++ -*- */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include ir_deserializer.h
+#include shader_cache_magic.h
+
+
+/**
+ * Searches for ir_function with matching signature from exec_list
+ */
+static ir_function *
+search_func(struct _mesa_glsl_parse_state *state, struct exec_list *list,
+ const char *name, struct exec_list *parameters)
+{
+ foreach_list_safe(node, list) {
+ ir_function *func = ((ir_instruction *) node)-as_function();
+ if (func strcmp(name, func-name) == 0
+ func-matching_signature(state, parameters))
+ return func;
+ }
+ return NULL;
+}
+
+/**
+ * Helper function to read a list of instructions
+ */
+int
+ir_deserializer::deserialize_list(exec_list *list)
+{
+ uint32_t list_len = map-read_uint32_t();
+ for (unsigned k = 0; k list_len; k++)
+ if (read_instruction(list))
+ return -1;
+ return 0;
+}
+
+
+/**
+ * Reads header part of the binary blob. Main purpose of this header is to
+ * validate that cached shader was produced with same Mesa driver version.
+ */
+int
+ir_deserializer::read_header(struct gl_shader *shader)
+{
+ char *cache_magic_id = map-read_string();
+ char *driver_vendor = map-read_string();
+ char *driver_renderer = map-read_string();
+
+ /* only used or debug output, silence compiler warning */
+ (void) driver_vendor;
+ (void) driver_renderer;
+
+ shader-Version = map-read_uint32_t();
+ shader-Type = map-read_uint32_t();
+ shader-IsES = map-read_uint8_t();
+
+ CACHE_DEBUG(%s: version %d, type 0x%x, %s (mesa %s)\n[%s %s]\n,
+ __func__, shader-Version, shader-Type,
+ (shader-IsES) ? glsl es : desktop glsl,
+ cache_magic_id, driver_vendor, driver_renderer);
+
+ const char *magic = mesa_get_shader_cache_magic();
+
+ if (memcmp(cache_magic_id, magic, strlen(magic)))
+ return DIFFERENT_MESA_VER;
+
+ /* post-link data */
+ shader-num_samplers = map-read_uint32_t();
+ shader-active_samplers = map-read_uint32_t();
+ shader-shadow_samplers = map-read_uint32_t();
+ shader-num_uniform_components = map-read_uint32_t();
+ shader-num_combined_uniform_components = map-read_uint32_t();
+ shader-uses_builtin_functions = map-read_uint8_t();
+
+ map-read(shader-Geom, sizeof(shader-Geom));
+
+ for (unsigned i = 0; i MAX_SAMPLERS; i++)
+ shader-SamplerUnits[i] = map-read_uint8_t();
+
+ for (unsigned i = 0; i MAX_SAMPLERS; i++)
+ shader-SamplerTargets[i] = (gl_texture_index) map-read_int32_t();
+
+ return 0;
+}
+
+
+const glsl_type *
+ir_deserializer::read_glsl_type()
+{
+ char *name = map-read_string();
+ uint32_t type_size = map-read_uint32_t();
+
+ const
[Mesa-dev] [PATCH] ilo: Rename DRI driver descriptor to ilo for consistency
When the Gallium i965 driver was renamed to ilo the driver descriptor was never changed. The pipe-loader driver is required to have the same descriptor name as the driver name, so for consistency change the DRI driver descriptor to match. Signed-off-by: st...@snewbury.org.uk --- src/gallium/targets/dri-ilo/target.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/targets/dri-ilo/target.c b/src/gallium/targets/dri-ilo/target.c index 3ce75e9..d8def80 100644 --- a/src/gallium/targets/dri-ilo/target.c +++ b/src/gallium/targets/dri-ilo/target.c @@ -41,4 +41,4 @@ static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) return NULL; } -DRM_DRIVER_DESCRIPTOR(i965, i915, create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR(ilo, i915, create_screen, drm_configuration) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] ilo: build pipe-loader driver]
Forgot to add signed-off-by...
In trying to get gallium-nine working with the ilo Gallium driver I
noticed there's no ilo pipe-loader driver being built.
This patch simply puts in place the missing pieces.
The driver descriptor is named ilo, rather than i965 as the ilo DRI
driver currently names itself, this is necessary as otherwise the
pipe-loader refuses to load as it has a sanity check verifying the name
matches. A follow-up patch renames the ilo DRI driver descriptor to
match.
Signed-off-by: Steven Newbury st...@snewbury.org.uk
---
include/pci_ids/pci_id_driver_map.h | 4 +++-
src/gallium/targets/pipe-loader/Makefile.am | 17 +
src/gallium/targets/pipe-loader/pipe_ilo.c | 27 +++
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/include/pci_ids/pci_id_driver_map.h
b/include/pci_ids/pci_id_driver_map.h
index 8a97c6f..1fb0467 100644
--- a/include/pci_ids/pci_id_driver_map.h
+++ b/include/pci_ids/pci_id_driver_map.h
@@ -64,10 +64,12 @@ static const struct {
int num_chips_ids;
} driver_map[] = {
{ 0x8086, i915, i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
- { 0x8086, i965, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
#ifndef DRIVER_MAP_GALLIUM_ONLY
+ { 0x8086, i965, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x1002, radeon, r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, r200, r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
+#else
+ { 0x8086, ilo, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
#endif
{ 0x1002, r300, r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
{ 0x1002, r600, r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
diff --git a/src/gallium/targets/pipe-loader/Makefile.am
b/src/gallium/targets/pipe-loader/Makefile.am
index 6875453..8fa3873 100644
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -47,6 +47,23 @@ PIPE_LIBS = \
-lpthread \
-lm
+if HAVE_GALLIUM_ILO
+pipe_LTLIBRARIES += pipe_ilo.la
+pipe_ilo_la_SOURCES = pipe_ilo.c
+pipe_ilo_la_LIBADD = \
+ $(PIPE_LIBS) \
+ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \
+ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \
+ $(LIBDRM_LIBS) \
+ $(INTEL_LIBS)
+pipe_ilo_la_LDFLAGS = -no-undefined -avoid-version -module
+if HAVE_MESA_LLVM
+nodist_EXTRA_pipe_ilo_la_SOURCES = dummy.cpp
+pipe_ilo_la_LIBADD += $(LLVM_LIBS)
+pipe_ilo_la_LDFLAGS += $(LLVM_LDFLAGS)
+endif
+endif
+
if HAVE_GALLIUM_I915
pipe_LTLIBRARIES += pipe_i915.la
pipe_i915_la_SOURCES = pipe_i915.c
diff --git a/src/gallium/targets/pipe-loader/pipe_ilo.c
b/src/gallium/targets/pipe-loader/pipe_ilo.c
new file mode 100644
index 000..11be2d1
--- /dev/null
+++ b/src/gallium/targets/pipe-loader/pipe_ilo.c
@@ -0,0 +1,27 @@
+
+#include target-helpers/inline_debug_helper.h
+#include state_tracker/drm_driver.h
+#include intel/intel_winsys.h
+#include ilo/ilo_public.h
+
+static struct pipe_screen *
+create_screen(int fd)
+{
+ struct intel_winsys *iws;
+ struct pipe_screen *screen;
+
+ iws = intel_winsys_create_for_fd(fd);
+ if (!iws)
+ return NULL;
+
+ screen = ilo_screen_create(iws);
+ if (!screen)
+ return NULL;
+
+ screen = debug_screen_wrap(screen);
+
+ return screen;
+}
+
+PUBLIC
+DRM_DRIVER_DESCRIPTOR(ilo, i915, create_screen, NULL)
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[Mesa-dev] [PATCH 1/4] radeonsi: Free gfx command stream when destroying context
CC: 10.0 mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/radeonsi/radeonsi_pipe.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c index 0fec6d5..3ed1029 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c @@ -119,6 +119,8 @@ static void r600_destroy_context(struct pipe_context *context) util_blitter_destroy(rctx-blitter); + rctx-b.ws-cs_destroy(rctx-b.rings.gfx.cs); + r600_common_context_cleanup(rctx-b); FREE(rctx); } -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/4] r200: Free glCtx in radeonDestroyContext
Note: I don't have hardware to test this, but I believe it to be correct. Found while tracking down a related leak in evergreen context management. --- src/mesa/drivers/dri/radeon/radeon_common_context.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 6dec137..161a0b7 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -245,8 +245,8 @@ void radeonDestroyContext(__DRIcontext *driContextPriv ) _swrast_DestroyContext( radeon-glCtx ); /* free atom list */ - /* free the Mesa context data */ - _mesa_free_context_data(radeon-glCtx); + /* free the Mesa context and its data */ + _mesa_destroy_context(radeon-glCtx); /* free the option cache */ driDestroyOptionCache(radeon-optionCache); -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/4] st/dri: prevent leak of dri option default values
CC: 10.0 mesa-sta...@lists.freedesktop.org --- src/gallium/state_trackers/dri/common/dri_screen.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c b/src/gallium/state_trackers/dri/common/dri_screen.c index 7410dbe..a657249 100644 --- a/src/gallium/state_trackers/dri/common/dri_screen.c +++ b/src/gallium/state_trackers/dri/common/dri_screen.c @@ -360,6 +360,10 @@ dri_destroy_option_cache(struct dri_screen * screen) } free(screen-optionCache.values); + + //Default values are copied to screen-optionCache-values in initOptionCache + //The info field, however, is a pointer copy, so don't free that twice + free(screen-optionCacheDefaults.values); } void -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/4] More Valgrind Fixes
Further valgrind memory leak fixes. With this series applied, my evergreen (CEDAR) shows 0 bytes of directly/indirectly/possibly lost memory, and everything that's still in use at glxgears exit is marked as 'possibly reachable'. The command used to test is: valgrind --leak-check=full --show-reachable=yes glxgears Then let it run for 5-10 seconds and then pressing exit to quit out cleanly Results LEAK SUMMARY: definitely lost: 0 bytes in 0 blocks indirectly lost: 0 bytes in 0 blocks possibly lost: 0 bytes in 0 blocks still reachable: 70,228 bytes in 651 blocks suppressed: 0 bytes in 0 blocks I've marked 3 of the 4 patches as CC to stable, but I can't do more than compile test the r200 patch. If someone can, that'd be appreciated. I've run through piglit's quick tests without any regressions on CEDAR, and I've tested the radeonsi patch on another machine. Aaron Watry (4): radeonsi: Free gfx command stream when destroying context st/dri: prevent leak of dri option default values r200: Free glCtx in radeonDestroyContext mesa/main: Free ctx-DrawIndirectBuffer during teardown src/gallium/drivers/radeonsi/radeonsi_pipe.c| 2 ++ src/gallium/state_trackers/dri/common/dri_screen.c | 4 src/mesa/drivers/dri/radeon/radeon_common_context.c | 4 ++-- src/mesa/main/bufferobj.c | 2 ++ 4 files changed, 10 insertions(+), 2 deletions(-) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/4] mesa/main: Free ctx-DrawIndirectBuffer during teardown
ctx-DrawIndirectBuffer wasn't being free'd in _mesa_free_buffer_objects
With this patch, valgrind --leak-check=full glxgears on evergreen (CEDAR)
now shows:
LEAK SUMMARY:
definitely lost: 0 bytes in 0 blocks
indirectly lost: 0 bytes in 0 blocks
possibly lost: 0 bytes in 0 blocks
still reachable: 70,228 bytes in 651 blocks
suppressed: 0 bytes in 0 blocks
CC: 10.0 mesa-sta...@lists.freedesktop.org
---
src/mesa/main/bufferobj.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index a3d8f24..9336759 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -871,6 +871,8 @@ _mesa_free_buffer_objects( struct gl_context *ctx )
_mesa_reference_buffer_object(ctx, ctx-UniformBuffer, NULL);
+ _mesa_reference_buffer_object(ctx, ctx-DrawIndirectBuffer, NULL);
+
for (i = 0; i MAX_COMBINED_UNIFORM_BUFFERS; i++) {
_mesa_reference_buffer_object(ctx,
ctx-UniformBufferBindings[i].BufferObject,
--
1.8.3.2
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Re: [Mesa-dev] [PATCH v2] glcpp: error on multiple #else/#elif directives
Erik Faye-Lund kusmab...@gmail.com writes: Here's a resend of an older patch (original 1379968503-30246-1-git-send-email-kusmab...@gmail.com), this time with a better commit message, and a similar treatment for elif-after-else. Thanks for the commit, Erik. I've just pushed this out with the previous Reviewed-by notes from Ken and Ian, (and one from me as well). -Carl pgpeAGxQmScnW.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/8] glsl: add a shader_trinary_minmax predicate
---
src/glsl/builtin_functions.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 840a6c9..18cdb24 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -334,6 +334,12 @@ shader_atomic_counters(const _mesa_glsl_parse_state *state)
return state-ARB_shader_atomic_counters_enable;
}
+static bool
+shader_trinary_minmax(const _mesa_glsl_parse_state *state)
+{
+ return state-AMD_shader_trinary_minmax_enable;
+}
+
/** @} */
/**/
--
1.8.5.2
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[Mesa-dev] [PATCH 1/8] glsl: Add extension tracking for AMD_shader_trinary_minmax
---
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
src/mesa/main/mtypes.h | 1 +
4 files changed, 7 insertions(+)
diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
index 7edc274..7b07498 100644
--- a/src/glsl/glcpp/glcpp-parse.y
+++ b/src/glsl/glcpp/glcpp-parse.y
@@ -1260,6 +1260,9 @@ glcpp_parser_create (const struct gl_extensions
*extensions, int api)
if (extensions-ARB_shader_atomic_counters)
add_builtin_define(parser, GL_ARB_shader_atomic_counters, 1);
+
+ if (extensions-AMD_shader_trinary_minmax)
+add_builtin_define(parser, GL_AMD_shader_trinary_minmax, 1);
}
}
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index fc9a8b2..456ca92 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -543,6 +543,7 @@ static const _mesa_glsl_extension
_mesa_glsl_supported_extensions[] = {
EXT(ARB_texture_gather, true, false, ARB_texture_gather),
EXT(ARB_shader_atomic_counters, true, false,
ARB_shader_atomic_counters),
EXT(ARB_sample_shading, true, false, ARB_sample_shading),
+ EXT(AMD_shader_trinary_minmax, true, false, dummy_false),
};
#undef EXT
diff --git a/src/glsl/glsl_parser_extras.h b/src/glsl/glsl_parser_extras.h
index 7b013fa..0e281ae 100644
--- a/src/glsl/glsl_parser_extras.h
+++ b/src/glsl/glsl_parser_extras.h
@@ -350,6 +350,8 @@ struct _mesa_glsl_parse_state {
bool EXT_shader_integer_mix_warn;
bool ARB_shader_atomic_counters_enable;
bool ARB_shader_atomic_counters_warn;
+ bool AMD_shader_trinary_minmax_enable;
+ bool AMD_shader_trinary_minmax_warn;
/*@}*/
/** Extensions supported by the OpenGL implementation. */
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index f93bb56..a5294b0 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3435,6 +3435,7 @@ struct gl_extensions
/* vendor extensions */
GLboolean AMD_performance_monitor;
GLboolean AMD_seamless_cubemap_per_texture;
+ GLboolean AMD_shader_trinary_minmax;
GLboolean AMD_vertex_shader_layer;
GLboolean APPLE_object_purgeable;
GLboolean ATI_envmap_bumpmap;
--
1.8.5.2
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[Mesa-dev] [PATCH 5/8] glsl: implement max3 built-in function
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 95114c8..94ae2a4 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -581,6 +581,11 @@ private:
const glsl_type *y_type,
const glsl_type *z_type);
+ ir_function_signature *_max3(builtin_available_predicate avail,
+const glsl_type *x_type,
+const glsl_type *y_type,
+const glsl_type *z_type);
+
#undef B0
#undef B1
#undef B2
@@ -2134,6 +2139,23 @@ builtin_builder::create_builtins()
_min3(shader_trinary_minmax, glsl_type::uvec4_type,
glsl_type::uvec4_type, glsl_type::uvec4_type),
NULL);
+ add_function(max3,
+_max3(shader_trinary_minmax, glsl_type::float_type,
glsl_type::float_type, glsl_type::float_type),
+_max3(shader_trinary_minmax, glsl_type::vec2_type,
glsl_type::vec2_type, glsl_type::vec2_type),
+_max3(shader_trinary_minmax, glsl_type::vec3_type,
glsl_type::vec3_type, glsl_type::vec3_type),
+_max3(shader_trinary_minmax, glsl_type::vec4_type,
glsl_type::vec4_type, glsl_type::vec4_type),
+
+_max3(shader_trinary_minmax, glsl_type::int_type,
glsl_type::int_type, glsl_type::int_type),
+_max3(shader_trinary_minmax, glsl_type::ivec2_type,
glsl_type::ivec2_type, glsl_type::ivec2_type),
+_max3(shader_trinary_minmax, glsl_type::ivec3_type,
glsl_type::ivec3_type, glsl_type::ivec3_type),
+_max3(shader_trinary_minmax, glsl_type::ivec4_type,
glsl_type::ivec4_type, glsl_type::ivec4_type),
+
+_max3(shader_trinary_minmax, glsl_type::uint_type,
glsl_type::uint_type, glsl_type::uint_type),
+_max3(shader_trinary_minmax, glsl_type::uvec2_type,
glsl_type::uvec2_type, glsl_type::uvec2_type),
+_max3(shader_trinary_minmax, glsl_type::uvec3_type,
glsl_type::uvec3_type, glsl_type::uvec3_type),
+_max3(shader_trinary_minmax, glsl_type::uvec4_type,
glsl_type::uvec4_type, glsl_type::uvec4_type),
+NULL);
+
#undef F
#undef FI
#undef FIU
@@ -4035,6 +4057,22 @@ builtin_builder::_min3(builtin_available_predicate avail,
return sig;
}
+ir_function_signature *
+builtin_builder::_max3(builtin_available_predicate avail,
+ const glsl_type *x_type, const glsl_type *y_type,
+ const glsl_type *z_type)
+{
+ ir_variable *x = in_var(x_type, x);
+ ir_variable *y = in_var(y_type, y);
+ ir_variable *z = in_var(z_type, z);
+ MAKE_SIG(x_type, avail, 3, x, y, z);
+
+ ir_expression *max3 = max(x, max(y,z));
+ body.emit(ret(max3));
+
+ return sig;
+}
+
/** @} */
/**/
--
1.8.5.2
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[Mesa-dev] [PATCH 7/8] mesa: enable AMD_shader_trinary_minmax
---
src/glsl/glsl_parser_extras.cpp | 2 +-
src/mesa/main/extensions.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index 456ca92..e839caf 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -543,7 +543,7 @@ static const _mesa_glsl_extension
_mesa_glsl_supported_extensions[] = {
EXT(ARB_texture_gather, true, false, ARB_texture_gather),
EXT(ARB_shader_atomic_counters, true, false,
ARB_shader_atomic_counters),
EXT(ARB_sample_shading, true, false, ARB_sample_shading),
- EXT(AMD_shader_trinary_minmax, true, false, dummy_false),
+ EXT(AMD_shader_trinary_minmax, true, false, dummy_true),
};
#undef EXT
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index f0e1858..efda548 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -304,6 +304,7 @@ static const struct extension extension_table[] = {
{ GL_AMD_performance_monitor, o(AMD_performance_monitor),
GL, 2007 },
{ GL_AMD_seamless_cubemap_per_texture,
o(AMD_seamless_cubemap_per_texture),GL, 2009 },
{ GL_AMD_shader_stencil_export,
o(ARB_shader_stencil_export), GL, 2009 },
+ { GL_AMD_shader_trinary_minmax, o(dummy_true),
GL, 2012 },
{ GL_AMD_vertex_shader_layer, o(AMD_vertex_shader_layer),
GLC,2012 },
{ GL_APPLE_object_purgeable, o(APPLE_object_purgeable),
GL, 2006 },
{ GL_APPLE_packed_pixels, o(dummy_true),
GLL,2002 },
--
1.8.5.2
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[Mesa-dev] [PATCH 3/8] glsl: add min() and max() functions to builder.cpp
---
src/glsl/ir_builder.cpp | 10 ++
src/glsl/ir_builder.h | 3 +++
2 files changed, 13 insertions(+)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 6c49734..31ed191 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -211,6 +211,16 @@ ir_expression *sub(operand a, operand b)
return expr(ir_binop_sub, a, b);
}
+ir_expression *min(operand a, operand b)
+{
+ return expr(ir_binop_min, a, b);
+}
+
+ir_expression *max(operand a, operand b)
+{
+ return expr(ir_binop_max, a, b);
+}
+
ir_expression *mul(operand a, operand b)
{
return expr(ir_binop_mul, a, b);
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h
index 1f07788..4b85ea1 100644
--- a/src/glsl/ir_builder.h
+++ b/src/glsl/ir_builder.h
@@ -184,6 +184,9 @@ ir_expression *i2b(operand a);
ir_expression *f2b(operand a);
ir_expression *b2f(operand a);
+ir_expression *min(operand a, operand b);
+ir_expression *max(operand a, operand b);
+
ir_expression *fma(operand a, operand b, operand c);
ir_expression *lrp(operand x, operand y, operand a);
ir_expression *csel(operand a, operand b, operand c);
--
1.8.5.2
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[Mesa-dev] [PATCH 6/8] glsl: implement mid3 built-in function
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 94ae2a4..f56be0c 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -586,6 +586,11 @@ private:
const glsl_type *y_type,
const glsl_type *z_type);
+ ir_function_signature *_mid3(builtin_available_predicate avail,
+const glsl_type *x_type,
+const glsl_type *y_type,
+const glsl_type *z_type);
+
#undef B0
#undef B1
#undef B2
@@ -2156,6 +2161,23 @@ builtin_builder::create_builtins()
_max3(shader_trinary_minmax, glsl_type::uvec4_type,
glsl_type::uvec4_type, glsl_type::uvec4_type),
NULL);
+ add_function(mid3,
+_mid3(shader_trinary_minmax, glsl_type::float_type,
glsl_type::float_type, glsl_type::float_type),
+_mid3(shader_trinary_minmax, glsl_type::vec2_type,
glsl_type::vec2_type, glsl_type::vec2_type),
+_mid3(shader_trinary_minmax, glsl_type::vec3_type,
glsl_type::vec3_type, glsl_type::vec3_type),
+_mid3(shader_trinary_minmax, glsl_type::vec4_type,
glsl_type::vec4_type, glsl_type::vec4_type),
+
+_mid3(shader_trinary_minmax, glsl_type::int_type,
glsl_type::int_type, glsl_type::int_type),
+_mid3(shader_trinary_minmax, glsl_type::ivec2_type,
glsl_type::ivec2_type, glsl_type::ivec2_type),
+_mid3(shader_trinary_minmax, glsl_type::ivec3_type,
glsl_type::ivec3_type, glsl_type::ivec3_type),
+_mid3(shader_trinary_minmax, glsl_type::ivec4_type,
glsl_type::ivec4_type, glsl_type::ivec4_type),
+
+_mid3(shader_trinary_minmax, glsl_type::uint_type,
glsl_type::uint_type, glsl_type::uint_type),
+_mid3(shader_trinary_minmax, glsl_type::uvec2_type,
glsl_type::uvec2_type, glsl_type::uvec2_type),
+_mid3(shader_trinary_minmax, glsl_type::uvec3_type,
glsl_type::uvec3_type, glsl_type::uvec3_type),
+_mid3(shader_trinary_minmax, glsl_type::uvec4_type,
glsl_type::uvec4_type, glsl_type::uvec4_type),
+NULL);
+
#undef F
#undef FI
#undef FIU
@@ -4073,6 +4095,22 @@ builtin_builder::_max3(builtin_available_predicate avail,
return sig;
}
+ir_function_signature *
+builtin_builder::_mid3(builtin_available_predicate avail,
+ const glsl_type *x_type, const glsl_type *y_type,
+ const glsl_type *z_type)
+{
+ ir_variable *x = in_var(x_type, x);
+ ir_variable *y = in_var(y_type, y);
+ ir_variable *z = in_var(z_type, z);
+ MAKE_SIG(x_type, avail, 3, x, y, z);
+
+ ir_expression *mid3 = max(min(x, y), max(min(x, z), min(y, z)));
+ body.emit(ret(mid3));
+
+ return sig;
+}
+
/** @} */
/**/
--
1.8.5.2
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[Mesa-dev] [PATCH 4/8] glsl: Implement min3 built-in function
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 18cdb24..95114c8 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -576,6 +576,11 @@ private:
ir_function_signature *_atomic_op(const char *intrinsic,
builtin_available_predicate avail);
+ ir_function_signature *_min3(builtin_available_predicate avail,
+const glsl_type *x_type,
+const glsl_type *y_type,
+const glsl_type *z_type);
+
#undef B0
#undef B1
#undef B2
@@ -2112,6 +2117,23 @@ builtin_builder::create_builtins()
shader_atomic_counters),
NULL);
+ add_function(min3,
+_min3(shader_trinary_minmax, glsl_type::float_type,
glsl_type::float_type, glsl_type::float_type),
+_min3(shader_trinary_minmax, glsl_type::vec2_type,
glsl_type::vec2_type, glsl_type::vec2_type),
+_min3(shader_trinary_minmax, glsl_type::vec3_type,
glsl_type::vec3_type, glsl_type::vec3_type),
+_min3(shader_trinary_minmax, glsl_type::vec4_type,
glsl_type::vec4_type, glsl_type::vec4_type),
+
+_min3(shader_trinary_minmax, glsl_type::int_type,
glsl_type::int_type, glsl_type::int_type),
+_min3(shader_trinary_minmax, glsl_type::ivec2_type,
glsl_type::ivec2_type, glsl_type::ivec2_type),
+_min3(shader_trinary_minmax, glsl_type::ivec3_type,
glsl_type::ivec3_type, glsl_type::ivec3_type),
+_min3(shader_trinary_minmax, glsl_type::ivec4_type,
glsl_type::ivec4_type, glsl_type::ivec4_type),
+
+_min3(shader_trinary_minmax, glsl_type::uint_type,
glsl_type::uint_type, glsl_type::uint_type),
+_min3(shader_trinary_minmax, glsl_type::uvec2_type,
glsl_type::uvec2_type, glsl_type::uvec2_type),
+_min3(shader_trinary_minmax, glsl_type::uvec3_type,
glsl_type::uvec3_type, glsl_type::uvec3_type),
+_min3(shader_trinary_minmax, glsl_type::uvec4_type,
glsl_type::uvec4_type, glsl_type::uvec4_type),
+NULL);
+
#undef F
#undef FI
#undef FIU
@@ -3997,6 +4019,22 @@ builtin_builder::_atomic_op(const char *intrinsic,
return sig;
}
+ir_function_signature *
+builtin_builder::_min3(builtin_available_predicate avail,
+ const glsl_type *x_type, const glsl_type *y_type,
+ const glsl_type *z_type)
+{
+ ir_variable *x = in_var(x_type, x);
+ ir_variable *y = in_var(y_type, y);
+ ir_variable *z = in_var(z_type, z);
+ MAKE_SIG(x_type, avail, 3, x, y, z);
+
+ ir_expression *min3 = min(x, min(y,z));
+ body.emit(ret(min3));
+
+ return sig;
+}
+
/** @} */
/**/
--
1.8.5.2
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[Mesa-dev] [PATCH 8/8] docs/relnotes/10.1.html: report AMD_shader_trinary_minmax support
--- docs/relnotes/10.1.html | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/relnotes/10.1.html b/docs/relnotes/10.1.html index 778ae6a..1089c71 100644 --- a/docs/relnotes/10.1.html +++ b/docs/relnotes/10.1.html @@ -46,6 +46,7 @@ Note: some of the new features are only available with certain drivers. ul liGL_ARB_draw_indirect on i965./li liGL_ARB_clear_buffer_object/li +liGL_AMD_shader_trinary_minmax./li /ul -- 1.8.5.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] AMD_shader_trinary_minmax V2 changes
- Correct typo in predicate function - Split the patch that introduces ir_builder changes - Drop trivial min3_expr(), max3_expr(), mid3_expr() - Thanks to Roland Scheidegger and Mario Rugiero, catch all cases for evaluation of mid3 - Squash trivial patches. Tried something to fix my weird mail address with git sendmail. Hope this will work next time. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/7] mesa: implement glBindBuffersBase() and gl BindBuffersRange()
---
src/mesa/main/bufferobj.c | 158 ++
src/mesa/main/bufferobj.h | 9 ++-
2 files changed, 165 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index a3d8f24..bad8f90 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -2706,3 +2706,161 @@ _mesa_InvalidateBufferData(GLuint buffer)
*/
return;
}
+
+void GLAPIENTRY
+_mesa_BindBuffersBase(GLenum target, GLuint first, GLsizei count,
+ const GLuint *buffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ int i = 0;
+ GLboolean exceedMaxBindings = GL_FALSE;
+
+ switch(target) {
+ case GL_TRANSFORM_FEEDBACK_BUFFER:
+ first + count ctx-Const.MaxTransformFeedbackBuffers ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ case GL_UNIFORM_BUFFER:
+ first + count ctx-Const.MaxUniformBufferBindings ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ case GL_ATOMIC_COUNTER_BUFFER:
+ first + count ctx-Const.MaxAtomicBufferBindings ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ default:
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ glBindBuffersBase(invalid target));
+ return;
+ }
+
+ if(exceedMaxBindings) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindBuffersBase(first+count));
+ return;
+ }
+
+ for(i = 0 ; i count ; i++) {
+ GLuint buffer;
+ struct gl_buffer_object *bufferObj;
+
+ if(buffers == NULL)
+buffer = 0;
+ else
+buffer = buffers[i];
+
+ if(buffer != 0) {
+bufferObj = _mesa_lookup_bufferobj(ctx, buffer);
+if(bufferObj) {
+ _mesa_BindBufferBase(target, first+i, buffer);
+}
+else
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindBufferBase(buffer[%i] is invalid), i);
+ }
+ else
+_mesa_BindBufferBase(target, first + i, 0);
+ }
+}
+
+void GLAPIENTRY
+_mesa_BindBuffersRange(GLenum target, GLuint first, GLsizei count,
+ const GLuint *buffers, const GLintptr *offsets,
+ const GLsizeiptr *sizes)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ int i = 0;
+ GLboolean exceedMaxBindings = GL_FALSE;
+
+ switch(target) {
+ case GL_TRANSFORM_FEEDBACK_BUFFER:
+ first + count ctx-Const.MaxTransformFeedbackBuffers ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ case GL_UNIFORM_BUFFER:
+ first + count ctx-Const.MaxUniformBufferBindings ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ case GL_ATOMIC_COUNTER_BUFFER:
+ first + count ctx-Const.MaxAtomicBufferBindings ?
+ exceedMaxBindings = GL_TRUE : exceedMaxBindings = GL_FALSE;
+ break;
+ default:
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ glBindBuffersRange(invalid target));
+ return;
+ }
+
+ if(exceedMaxBindings) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindBuffersRange(first+count));
+ return;
+ }
+
+ for(i = 0 ; i count ; i++) {
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+ struct gl_buffer_object *bufferObj;
+
+ if(buffers == NULL)
+buffer = 0;
+ else {
+buffer = buffers[i];
+offset = offsets[i];
+size = sizes[i];
+ }
+
+ if(buffer != 0) {
+bufferObj = _mesa_lookup_bufferobj(ctx, buffer);
+if(bufferObj) {
+ GLboolean validOffet, validSize;
+
+ switch(target) {
+case GL_TRANSFORM_FEEDBACK_BUFFER:
+ (offset = 0) ?
+ validOffset = GL_TRUE : validOffet = GL_FALSE;
+ (size = 0) ?
+ validSize = GL_TRUE : validSize = GL_FALSE;
+ /* TODO : add target specific checks */
+ break;
+case GL_UNIFORM_BUFFER:
+ (offset = 0) ?
+ validOffset = GL_TRUE : validOffet = GL_FALSE;
+ (size = 0) ?
+ validSize = GL_TRUE : validSize = GL_FALSE;
+ /* TODO : add target specific checks */
+ break;
+case GL_ATOMIC_COUNTER_BUFFER:
+ (offset = 0) ?
+ validOffset = GL_TRUE : validOffet = GL_FALSE;
+ (size = 0) ?
+ validSize = GL_TRUE : validSize = GL_FALSE;
+ /* TODO : add target specific checks */
+ break;
+default:
+ /* should not get there at this point */
+ return;
+ }
+
+ if(!validOffet || !validSize) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+ glBindBuffersRange(offsets and/or sizes invalid));
+return;
+ }
+
+ if(offset+size bufferObj-Size) {
+
[Mesa-dev] [PATCH 2/7] mesa: add an index_to_target_enum() function
From: Maxence Le Doré Maxence Le Doré
---
src/mesa/main/texobj.c | 40
1 file changed, 40 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index d6510fe..bddbc50 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1218,6 +1218,46 @@ target_enum_to_index(const struct gl_context *ctx,
GLenum target)
/**
+ * Convert a Mesa texture target index into the corresponding
+ * GL texture target enum such as GL_TEXTURE_2D or GL_TEXTURE_3D.
+ * Note that proxy targets are not valid here.
+ * \return GL_TEXTURE_x or 0x0 if index is invalid
+ */
+static GLenum
+index_to_target_enum(struct gl_context *ctx, GLint index)
+{
+ switch (index) {
+ case TEXTURE_2D_MULTISAMPLE_INDEX:
+ return GL_TEXTURE_2D_MULTISAMPLE;
+ case TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX:
+ return GL_TEXTURE_2D_MULTISAMPLE_ARRAY;
+ case TEXTURE_CUBE_ARRAY_INDEX:
+ return GL_TEXTURE_CUBE_MAP_ARRAY;
+ case TEXTURE_BUFFER_INDEX:
+ return GL_TEXTURE_BUFFER_ARB;
+ case TEXTURE_2D_ARRAY_INDEX:
+ return GL_TEXTURE_2D_ARRAY_EXT;
+ case TEXTURE_1D_ARRAY_INDEX:
+ return GL_TEXTURE_1D_ARRAY_EXT;
+ case TEXTURE_EXTERNAL_INDEX:
+ return GL_TEXTURE_EXTERNAL_OES;
+ case TEXTURE_CUBE_INDEX:
+ return GL_TEXTURE_CUBE_MAP_ARB;
+ case TEXTURE_3D_INDEX:
+ return GL_TEXTURE_3D;
+ case TEXTURE_RECT_INDEX:
+ return GL_TEXTURE_RECTANGLE_NV;
+ case TEXTURE_2D_INDEX:
+ return GL_TEXTURE_2D;
+ case TEXTURE_1D_INDEX:
+ return GL_TEXTURE_1D;
+ default:
+ return 0x0;
+ }
+}
+
+
+/**
* Bind a named texture to a texturing target.
*
* \param target texture target.
--
1.8.5.2
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[Mesa-dev] [PATCH 3/7] mesa: implement glBindTextures()
---
src/mesa/main/texobj.c | 52 ++
src/mesa/main/texobj.h | 3 +++
2 files changed, 55 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index bddbc50..66e2fb0 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1686,4 +1686,56 @@ _mesa_InvalidateTexImage(GLuint texture, GLint level)
return;
}
+/** ARB_multi_bind / OpenGL 4.4 */
+
+void GLAPIENTRY
+_mesa_BindTextures(GLuint first, GLsizei count, const GLuint *textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ struct GLuint currentTexUnit = 0;
+ int i = 0;
+
+ currentTexUnit = ctx-Texture.CurrentUnit;
+
+ if(first + count ctx-Const.MaxCombinedTextureImageUnits) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, glBindTextures(first+count));
+ return;
+ }
+
+ for(i = 0 ; i count ; i++) {
+ GLuint texture;
+ struct gl_texture_object *texObj;
+ GLenum texTarget;
+ int j = 0;
+
+ if(textures == NULL)
+texture = 0;
+ else
+texture = textures[i];
+
+ _mesa_ActiveTexture(GL_TEXTURE0 + first + i);
+ if(texture != 0) {
+texObj = _mesa_lookup_texture(ctx, texture);
+if(texObj) {
+ texTarget = texObj-Target;
+ _mesa_BindTexture(texTarget, texture);
+}
+else
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindTextures(textures[%i]), i);
+ }
+ else
+for(j = 0 ; j NUM_TEXTURE_TARGETS ; j++) {
+ GLint index = target_enum_to_index(ctx, j);
+ if(index = 0) {
+texTarget = index_to_target_enum(index);
+_mesa_BindTexture(texTarget, 0);
+ }
+ else
+continue;
+}
+ }
+ _mesa_ActiveTexture(GL_TEXTURE0 + currentTexUnit);
+}
+
/*@}*/
diff --git a/src/mesa/main/texobj.h b/src/mesa/main/texobj.h
index 55091a6..bbf1e9b 100644
--- a/src/mesa/main/texobj.h
+++ b/src/mesa/main/texobj.h
@@ -179,6 +179,9 @@ _mesa_InvalidateTexSubImage(GLuint texture, GLint level,
GLint xoffset,
extern void GLAPIENTRY
_mesa_InvalidateTexImage(GLuint texture, GLint level);
+extern void GLAPIENTRY
+_mesa_BindTextures(GLuint first, GLsizei count, const GLuint *textures);
+
/*@}*/
--
1.8.5.2
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[Mesa-dev] [PATCH 4/7] mesa: implement glBindVertexBuffers()
---
src/mesa/main/varray.c | 53 ++
src/mesa/main/varray.h | 3 +++
2 files changed, 56 insertions(+)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 0f38270..cf21770 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -1681,6 +1681,59 @@ _mesa_VertexBindingDivisor(GLuint bindingIndex, GLuint
divisor)
/**
+ * See GL_ARB_multi_bind spec
+ */
+
+void GLAPIENTRY
+_mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
+const GLintptr *offsets, const GLsizei *strides)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ int i = 0;
+
+ if (first + count ctx-Const.MaxVertexAttribBindings) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindVertexBuffers(first+count=%u
+ GL_MAX_VERTEX_ATTRIB_BINDINGS),
+ first+count);
+ return;
+ }
+
+ for(i = 0 ; i count ; i++) {
+ GLuint buffer;
+ GLintptr offset;
+ GLsizei stride;
+ struct gl_buffer_object *bufferObj;
+
+ if(buffers == NULL)
+buffer = 0;
+ else {
+buffer = buffers[i];
+offset = offsets[i];
+stride = strides[i];
+ }
+
+ if(buffer != 0) {
+bufferObj = _mesa_lookup_bufferobj(ctx, buffer);
+if(bufferObj) {
+ if(!offset 0 || !stride 0) {
+_mesa_error(ctx, GL_INVALID_VALUE, glBindVertexBuffers
+(offsets[%i] 0 || stride[%i] 0), i, i);
+ }
+ else
+_mesa_BindVertexBuffer(first+i, buffer, offset, stride);
+}
+else
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ glBindVertexBuffer(buffer[i] is not valid), i);
+ }
+ else
+_mesa_BindVertexBuffer(first + i, 0, 0, 16);
+ }
+}
+
+
+/**
* Copy one client vertex array to another.
*/
void
diff --git a/src/mesa/main/varray.h b/src/mesa/main/varray.h
index bc820ed..5411a9c 100644
--- a/src/mesa/main/varray.h
+++ b/src/mesa/main/varray.h
@@ -308,6 +308,9 @@ _mesa_VertexAttribBinding(GLuint attribIndex, GLuint
bindingIndex);
extern void GLAPIENTRY
_mesa_VertexBindingDivisor(GLuint bindingIndex, GLuint divisor);
+extern void GLAPIENTRY
+_mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
+const GLintptr *offsets, const GLsizei *strides);
extern void
_mesa_copy_client_array(struct gl_context *ctx,
--
1.8.5.2
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[Mesa-dev] [PATCH 7/7] mesa: enable ARB_multi_bind
---
src/mesa/main/extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index f0e1858..968b88d 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -112,6 +112,7 @@ static const struct extension extension_table[] = {
{ GL_ARB_map_buffer_alignment,
o(ARB_map_buffer_alignment),GL, 2011 },
{ GL_ARB_map_buffer_range,o(ARB_map_buffer_range),
GL, 2008 },
{ GL_ARB_multi_draw_indirect, o(ARB_draw_indirect),
GLC,2012 },
+ { GL_ARB_multi_bind, o(dummy_true),
GL, 2013 },
{ GL_ARB_multisample, o(dummy_true),
GLL,1994 },
{ GL_ARB_multitexture,o(dummy_true),
GLL,1998 },
{ GL_ARB_occlusion_query2,o(ARB_occlusion_query2),
GL, 2003 },
--
1.8.5.2
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[Mesa-dev] [PATCH 6/7] mesa: dispatch ARB_multi_bind API
---
src/mapi/glapi/gen/ARB_multi_bind.xml | 57 +
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml | 2 ++
src/mesa/main/tests/dispatch_sanity.cpp | 8 +
4 files changed, 68 insertions(+)
create mode 100644 src/mapi/glapi/gen/ARB_multi_bind.xml
diff --git a/src/mapi/glapi/gen/ARB_multi_bind.xml
b/src/mapi/glapi/gen/ARB_multi_bind.xml
new file mode 100644
index 000..a9e1825
--- /dev/null
+++ b/src/mapi/glapi/gen/ARB_multi_bind.xml
@@ -0,0 +1,57 @@
+?xml version=1.0?
+!DOCTYPE OpenGLAPI SYSTEM gl_API.dtd
+
+!-- Note: no GLX protocol info yet. --
+
+
+OpenGLAPI
+
+category name=GL_ARB_multi_bind number=147
+
+function name=BindBuffersBase
+param name=target type=GLenum/
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=buffers type=const GLuint */
+/function
+
+function name=BindBuffersRange
+param name=target type=GLenum/
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=buffers type=const GLuint */
+param name=offsets type=const GLintptr */
+param name=sizes type=const GLsizeiptr */
+/function
+
+function name=BindTextures
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=textures type=const GLuint */
+/function
+
+function name=BindSamplers
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=samplers type=const GLuint */
+/function
+
+!-- Uncomment it when avaible
+
+function name=BindImageTextures
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=textures type=const GLuint */
+/function
+--
+function name=BindVertexBuffers
+param name=first type=GLuint/
+param name=count type=GLsizei/
+param name=buffers type=const GLuint */
+param name=offsets type=const GLintptr */
+param name=sizes type=const GLsizeiptr */
+/function
+
+/category
+
+/OpenGLAPI
diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
index 65bd913..aa4dd02 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -108,6 +108,7 @@ API_XML = \
ARB_internalformat_query.xml \
ARB_invalidate_subdata.xml \
ARB_map_buffer_range.xml \
+ ARB_multi_bind.xml \
ARB_robustness.xml \
ARB_sample_shading.xml \
ARB_sampler_objects.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 697b2ec..351712a 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8486,6 +8486,8 @@
xi:include href=ARB_texture_storage_multisample.xml
xmlns:xi=http://www.w3.org/2001/XInclude/
+xi:include href=ARB_multi_bind.xml
xmlns:xi=http://www.w3.org/2001/XInclude/
+
!-- Non-ARB extensions sorted by extension number. --
category name=GL_EXT_blend_color number=2
diff --git a/src/mesa/main/tests/dispatch_sanity.cpp
b/src/mesa/main/tests/dispatch_sanity.cpp
index 227a4fd..1e714ee 100644
--- a/src/mesa/main/tests/dispatch_sanity.cpp
+++ b/src/mesa/main/tests/dispatch_sanity.cpp
@@ -933,6 +933,14 @@ const struct function gl_core_functions_possible[] = {
{ glVDPAUMapSurfacesNV, 11, -1 },
{ glVDPAUUnmapSurfacesNV, 11, -1 },
+ /* GL_ARB_multibind */
+ { glBindBuffersBase, 44, -1 },
+ { glBindBuffersRange, 44, -1 },
+ { glBindTextures, 44, -1 },
+ { glBindSamplers, 44, -1 },
+// { glBindImageTextures, 44, -1 }, // XXX: Uncomment it when avaible
+ { glBindVertexBuffers, 44, -1 },
+
{ NULL, 0, -1 }
};
--
1.8.5.2
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[Mesa-dev] [PATCH 5/7] mesa: implement glBindSamplers()
---
src/mesa/main/samplerobj.c | 36
src/mesa/main/samplerobj.h | 2 ++
2 files changed, 38 insertions(+)
diff --git a/src/mesa/main/samplerobj.c b/src/mesa/main/samplerobj.c
index 7285ef5..a219630 100644
--- a/src/mesa/main/samplerobj.c
+++ b/src/mesa/main/samplerobj.c
@@ -1434,6 +1434,42 @@ invalid_pname:
}
+void GLAPIENTRY
+_mesa_BindSamplers(GLuint first, GLsizei count, const GLuint *samplers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ int i = 0;
+
+ if(first + count ctx-Const.MaxCombinedTextureImageUnits) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, glBindSamplers(first+count));
+ return;
+ }
+
+ for (i = 0; i count; i++) {
+ GLuint sampler;
+ struct gl_sampler_object *sampObj;
+
+ if(samplers == NULL)
+sampler = 0;
+ else
+sampler = samplers[i];
+
+ if(sampler != 0) {
+sampObj = _mesa_lookup_samplerobj(ctx, sampler);
+if(sampler)
+ _mesa_BindSampler(first + i, sampler);
+else
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ glBindSamplers(samplers[%i]=%u is invalid),
+ i, sampler);
+}
+ else
+_mesa_BindSampler(first + i, 0);
+ }
+ }
+}
+
+
void
_mesa_init_sampler_object_functions(struct dd_function_table *driver)
{
diff --git a/src/mesa/main/samplerobj.h b/src/mesa/main/samplerobj.h
index c72b1cd..0e030d3 100644
--- a/src/mesa/main/samplerobj.h
+++ b/src/mesa/main/samplerobj.h
@@ -100,5 +100,7 @@ void GLAPIENTRY
_mesa_GetSamplerParameterIiv(GLuint sampler, GLenum pname, GLint *params);
void GLAPIENTRY
_mesa_GetSamplerParameterIuiv(GLuint sampler, GLenum pname, GLuint *params);
+void GLAPIENTRY
+_mesa_BindSamplers(GLuint first, GLsizei count, const GLuint *samplers);
#endif /* SAMPLEROBJ_H */
--
1.8.5.2
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Re: [Mesa-dev] [Mesa-stable] [PATCH 2/4] glsl: Fix inconsistent assumptions about ir_loop::counter.
Paul Berry stereotype...@gmail.com writes: Note: this change is just invasive enough that it probably shouldn't be picked over to stable before the 10.0 release. But I recommend picking it over to stable after the 10.0 release. It didn't happen before 10.0.1, but I've cherry-picked this over to my 10.0 branch now. It should get pushed out after my next round of testing. -Carl pgpff3xspRtHH.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/4] radeon: Determine the bo priority (MSAA, depth, UVD are high)
On Thursday 02 January 2014 10:56:45 Lauri Kasanen wrote:
On Thu, 02 Jan 2014 05:57:46 +0100
Andreas Hartmetz ahartm...@gmail.com wrote:
On Wednesday 01 January 2014 16:58:46 Lauri Kasanen wrote:
@@ -257,6 +258,7 @@ struct radeon_winsys {
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
+ boolean high_prio,
enum radeon_bo_domain domain);
struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
Something I have learned about schedulers is that binary priorities
are not a good deal. They kind of encourage special case hacks and
two code paths, they can do less than numeric priorities, and they
are not significantly easier to implement if you want to do it
correctly. This is not exactly a scheduler, but it seems similar
enough.
So I think a numeric value and = 3 priorities would be better here,
then you could also start assigning priority by things like buffer size
or really any heuristic that can produce some number. Even such
heuristics are easier to write when you don't need to limit the result
to true / false.
Hi Andreas,
This boolean is just one component to be used in the final score (for
the plan, see github.com/clbr/jamkthesis). It passes down information
that's otherwise unavailable, ie whether the buffer's type means it
should be more likely to stay in VRAM.
The buffer's size and other factors (patch 3, VRAM size) also influence
the score.
The network won't care if it's a bool or an int, so the question is
just whether having it an int would mean better decisions or not. What
do you think?
When you use a neural network anyway, why would you even assign a
priority instead of just passing the buffer type and let the network
figure out the rest?
I am somewhat skeptical of the whole thing honestly, because
predictable and repeatable performance is what you need for
performance-critical applications, not getting close to optimal
results most of the time and bad results sometimes.
You also want good performance when you execute something for the
first time (without training) because the first impression is so
important. Resource planning isn't magic, you don't really need to
give up and use a generic AI to do it well.
I guess you can discover some tricks using that approach, but for a
final implementation you better incorporate those tricks into a more
traditional cache eviction algorithm.
Now I don't want to discourage you from doing that thesis, but I don't
expect that a neural network buffer placement optimizer will be
practical for shipping with Mesa. I would like to be proven wrong,
though :)
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[Mesa-dev] [PATCH 1/7] intel: support factors for min/max blending
---
src/mesa/drivers/dri/i915/i830_state.c | 12
src/mesa/drivers/dri/i965/brw_util.c | 24 +---
2 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i830_state.c
b/src/mesa/drivers/dri/i915/i830_state.c
index bbf0cef..6a5db43 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -303,10 +303,16 @@ i830_set_blend_state(struct gl_context * ctx)
eqnRGB = BLENDFUNC_MIN;
funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
break;
+ case GL_FACTOR_MIN_AMD:
+ eqnRGB = BLENDFUNC_MIN;
+ break;
case GL_MAX:
eqnRGB = BLENDFUNC_MAX;
funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
break;
+ case GL_FACTOR_MAX_AMD:
+ eqnRGB = BLENDFUNC_MAX;
+ break;
case GL_FUNC_SUBTRACT:
eqnRGB = BLENDFUNC_SUB;
break;
@@ -331,10 +337,16 @@ i830_set_blend_state(struct gl_context * ctx)
eqnA = BLENDFUNC_MIN;
funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
break;
+ case GL_FACTOR_MIN_AMD:
+ eqnA = BLENDFUNC_MIN;
+ break;
case GL_MAX:
eqnA = BLENDFUNC_MAX;
funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
break;
+ case GL_FACTOR_MAX_AMD:
+ eqnA = BLENDFUNC_MAX;
+ break;
case GL_FUNC_SUBTRACT:
eqnA = BLENDFUNC_SUB;
break;
diff --git a/src/mesa/drivers/dri/i965/brw_util.c
b/src/mesa/drivers/dri/i965/brw_util.c
index 4a303cd..292b7e5 100644
--- a/src/mesa/drivers/dri/i965/brw_util.c
+++ b/src/mesa/drivers/dri/i965/brw_util.c
@@ -40,17 +40,19 @@
GLuint brw_translate_blend_equation( GLenum mode )
{
switch (mode) {
- case GL_FUNC_ADD:
- return BRW_BLENDFUNCTION_ADD;
- case GL_MIN:
- return BRW_BLENDFUNCTION_MIN;
- case GL_MAX:
- return BRW_BLENDFUNCTION_MAX;
- case GL_FUNC_SUBTRACT:
- return BRW_BLENDFUNCTION_SUBTRACT;
- case GL_FUNC_REVERSE_SUBTRACT:
- return BRW_BLENDFUNCTION_REVERSE_SUBTRACT;
- default:
+ case GL_FUNC_ADD:
+ return BRW_BLENDFUNCTION_ADD;
+ case GL_MIN:
+ case GL_FACTOR_MIN_AMD:
+ return BRW_BLENDFUNCTION_MIN;
+ case GL_MAX:
+ case GL_FACTOR_MAX_AMD:
+ return BRW_BLENDFUNCTION_MAX;
+ case GL_FUNC_SUBTRACT:
+ return BRW_BLENDFUNCTION_SUBTRACT;
+ case GL_FUNC_REVERSE_SUBTRACT:
+ return BRW_BLENDFUNCTION_REVERSE_SUBTRACT;
+ default:
assert(0);
return BRW_BLENDFUNCTION_ADD;
}
--
1.8.5.2
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[Mesa-dev] [PATCH 7/7] nouveau: allow blend_minmax_factor
Sound strange if nvidia would had chosen a different
implementation of min/max blending (where even
intel i830 allow factors with min/max blending).
Indeed, the driver doesn't set src and dst factors to ONE
when GL_MIN or GL_MAX are set as blend equation. Maybe
Francisco Jerez (going to ask him) simply forgot about
that and nv10-20 support it or nVIDIA had clearly opted
to another form of hardware implementation.
Anyway. Can't test this right now (lacks nv10 hw).
---
src/mesa/drivers/dri/nouveau/nouveau_gldefs.h| 2 ++
src/mesa/drivers/dri/nouveau/nv10_context.c | 1 +
src/mesa/drivers/dri/nouveau/nv10_state_raster.c | 10 +-
src/mesa/drivers/dri/nouveau/nv20_context.c | 1 +
4 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
index 46ec14e..ba65dfd 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
@@ -73,8 +73,10 @@ nvgl_blend_eqn(unsigned eqn)
case GL_FUNC_ADD:
return 0x8006;
case GL_MIN:
+ case GL_FACTOR_MIN_AMD:
return 0x8007;
case GL_MAX:
+ case GL_FACTOR_MAX_AMD:
return 0x8008;
case GL_FUNC_SUBTRACT:
return 0x800a;
diff --git a/src/mesa/drivers/dri/nouveau/nv10_context.c
b/src/mesa/drivers/dri/nouveau/nv10_context.c
index 1918f12..6f0e539 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_context.c
@@ -447,6 +447,7 @@ nv10_context_create(struct nouveau_screen *screen, const
struct gl_config *visua
ctx-Extensions.ARB_texture_env_crossbar = true;
ctx-Extensions.ARB_texture_env_combine = true;
ctx-Extensions.ARB_texture_env_dot3 = true;
+ ctx-Extensions.AMD_blend_minmax_factor = true;
ctx-Extensions.NV_fog_distance = true;
ctx-Extensions.NV_texture_rectangle = true;
if (ctx-Mesa_DXTn) {
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
index bd4a78e..bcacae6 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
@@ -62,12 +62,20 @@ void
nv10_emit_blend_equation(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
+ unsigned eqn = ctx-Color.Blend[0].EquationRGB;
BEGIN_NV04(push, NV10_3D(BLEND_FUNC_ENABLE), 1);
PUSH_DATAb(push, ctx-Color.BlendEnabled);
BEGIN_NV04(push, NV10_3D(BLEND_EQUATION), 1);
- PUSH_DATA (push, nvgl_blend_eqn(ctx-Color.Blend[0].EquationRGB));
+ PUSH_DATA (push, nvgl_blend_eqn(eqn));
+
+if(eqn == GL_MIN || eqn == GL_MAX)
+{
+ BEGIN_NV04(push, NV10_3D(BLEND_FUNC_SRC), 2);
+ PUSH_DATA (push, NV10_3D_BLEND_FUNC_SRC_ONE);
+ PUSH_DATA (push, NV10_3D_BLEND_FUNC_DST_ONE);
+}
}
void
diff --git a/src/mesa/drivers/dri/nouveau/nv20_context.c
b/src/mesa/drivers/dri/nouveau/nv20_context.c
index 1d77132..b528798 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_context.c
@@ -458,6 +458,7 @@ nv20_context_create(struct nouveau_screen *screen, const
struct gl_config *visua
ctx-Extensions.ARB_texture_env_crossbar = true;
ctx-Extensions.ARB_texture_env_combine = true;
ctx-Extensions.ARB_texture_env_dot3 = true;
+ ctx-Extensions.AMD_blend_minmax_factor = true;
ctx-Extensions.NV_fog_distance = true;
ctx-Extensions.NV_texture_rectangle = true;
if (ctx-Mesa_DXTn) {
--
1.8.5.2
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[Mesa-dev] [PATCH 5/7] mesa: add support for AMD_blend_minmax_factor
---
src/mesa/main/blend.c | 3 +++
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/src/mesa/main/blend.c b/src/mesa/main/blend.c
index 9e11ca7..4995143 100644
--- a/src/mesa/main/blend.c
+++ b/src/mesa/main/blend.c
@@ -326,6 +326,9 @@ legal_blend_equation(const struct gl_context *ctx, GLenum
mode)
case GL_MIN:
case GL_MAX:
return ctx-Extensions.EXT_blend_minmax;
+ case GL_FACTOR_MIN_AMD:
+ case GL_FACTOR_MAX_AMD:
+ return ctx-Extensions.AMD_blend_minmax_factor;
default:
return GL_FALSE;
}
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index f0e1858..b46c788 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -299,6 +299,7 @@ static const struct extension extension_table[] = {
/* Vendor extensions */
{ GL_3DFX_texture_compression_FXT1,
o(TDFX_texture_compression_FXT1), GL, 1999 },
+ { GL_AMD_blend_minmax_factor, o(AMD_blend_minmax_factor),
GL, 2009 },
{ GL_AMD_conservative_depth, o(ARB_conservative_depth),
GL, 2009 },
{ GL_AMD_draw_buffers_blend, o(ARB_draw_buffers_blend),
GL, 2009 },
{ GL_AMD_performance_monitor, o(AMD_performance_monitor),
GL, 2007 },
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index f93bb56..4081e4e 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3433,6 +3433,7 @@ struct gl_extensions
GLboolean EXT_vertex_array_bgra;
GLboolean OES_standard_derivatives;
/* vendor extensions */
+ GLboolean AMD_blend_minmax_factor;
GLboolean AMD_performance_monitor;
GLboolean AMD_seamless_cubemap_per_texture;
GLboolean AMD_vertex_shader_layer;
--
1.8.5.2
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[Mesa-dev] [PATCH 4/7] st: add blend states from AMD_blend_minmax_factor
--- src/mesa/state_tracker/st_atom_blend.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/state_tracker/st_atom_blend.c b/src/mesa/state_tracker/st_atom_blend.c index dea50af..7453053 100644 --- a/src/mesa/state_tracker/st_atom_blend.c +++ b/src/mesa/state_tracker/st_atom_blend.c @@ -56,9 +56,15 @@ translate_blend(GLenum blend) return PIPE_BLEND_SUBTRACT; case GL_FUNC_REVERSE_SUBTRACT: return PIPE_BLEND_REVERSE_SUBTRACT; + /* GLenum blend token is checked to care GL_MIN/GL_MAX cases +* at update_blend() call. In these two cases +* Src and Dst factors will be both set to PIPE_BLENDFACTOR_ONE. +*/ case GL_MIN: + case GL_FACTOR_MIN_AMD: return PIPE_BLEND_MIN; case GL_MAX: + case GL_FACTOR_MAX_AMD: return PIPE_BLEND_MAX; /* blend factors */ -- 1.8.5.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/7] r200: support factors for min/max blending
--- src/mesa/drivers/dri/r200/r200_state.c | 16 1 file changed, 16 insertions(+) diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index ee7b945..db232f6 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -252,12 +252,20 @@ static void r200_set_blend_state( struct gl_context * ctx ) (R200_BLEND_GL_ONE R200_DST_BLEND_SHIFT); break; + case GL_FACTOR_MIN_AMD: + eqn = R200_COMB_FCN_MIN; + break; + case GL_MAX: eqn = R200_COMB_FCN_MAX; func = (R200_BLEND_GL_ONE R200_SRC_BLEND_SHIFT) | (R200_BLEND_GL_ONE R200_DST_BLEND_SHIFT); break; + case GL_FACTOR_MAX_AMD: + eqn = R200_COMB_FCN_MAX; + break; + default: fprintf( stderr, [%s:%u] Invalid RGB blend equation (0x%04x).\n, __FUNCTION__, __LINE__, ctx-Color.Blend[0].EquationRGB ); @@ -286,12 +294,20 @@ static void r200_set_blend_state( struct gl_context * ctx ) (R200_BLEND_GL_ONE R200_DST_BLEND_SHIFT); break; + case GL_FACTOR_MIN_AMD: + eqnA = R200_COMB_FCN_MIN; + break; + case GL_MAX: eqnA = R200_COMB_FCN_MAX; funcA = (R200_BLEND_GL_ONE R200_SRC_BLEND_SHIFT) | (R200_BLEND_GL_ONE R200_DST_BLEND_SHIFT); break; + case GL_FACTOR_MAX_AMD: + eqnA = R200_COMB_FCN_MAX; + break; + default: fprintf( stderr, [%s:%u] Invalid A blend equation (0x%04x).\n, __FUNCTION__, __LINE__, ctx-Color.Blend[0].EquationA ); -- 1.8.5.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 6/7] mesa: enable ARB_blend_minmax_factor
... where it can be. --- src/mesa/drivers/dri/i915/intel_extensions.c | 1 + src/mesa/drivers/dri/i965/intel_extensions.c | 1 + src/mesa/drivers/dri/r200/r200_context.c | 1 + src/mesa/main/extensions.c | 1 + src/mesa/state_tracker/st_extensions.c | 1 + 5 files changed, 5 insertions(+) diff --git a/src/mesa/drivers/dri/i915/intel_extensions.c b/src/mesa/drivers/dri/i915/intel_extensions.c index a5cff70..3729aaa 100644 --- a/src/mesa/drivers/dri/i915/intel_extensions.c +++ b/src/mesa/drivers/dri/i915/intel_extensions.c @@ -59,6 +59,7 @@ intelInitExtensions(struct gl_context *ctx) ctx-Extensions.ARB_texture_env_dot3 = true; ctx-Extensions.ARB_vertex_program = true; ctx-Extensions.ARB_vertex_shader = true; + ctx-Extensions.AMD_blend_minmax_factor = true; ctx-Extensions.EXT_blend_color = true; ctx-Extensions.EXT_blend_equation_separate = true; ctx-Extensions.EXT_blend_func_separate = true; diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index de07b7f..34744f0 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -225,6 +225,7 @@ intelInitExtensions(struct gl_context *ctx) ctx-Extensions.EXT_texture_swizzle = true; ctx-Extensions.EXT_stencil_two_side = true; ctx-Extensions.EXT_vertex_array_bgra = true; + ctx-Extensions.AMD_blend_minmax_factor = true; ctx-Extensions.AMD_seamless_cubemap_per_texture = true; ctx-Extensions.APPLE_object_purgeable = true; ctx-Extensions.ATI_envmap_bumpmap = true; diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 5c53720..066eb88 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -375,6 +375,7 @@ GLboolean r200CreateContext( gl_api api, ctx-Extensions.ARB_texture_env_crossbar = true; ctx-Extensions.ARB_texture_mirror_clamp_to_edge = true; ctx-Extensions.ARB_vertex_program = true; + ctx-Extensions.AMD_blend_minmax_factor = true; ctx-Extensions.ATI_fragment_shader = (ctx-Const.MaxTextureUnits == 6); ctx-Extensions.ATI_texture_env_combine3 = true; ctx-Extensions.ATI_texture_mirror_once = true; diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index b46c788..f53e2ae 100644 --- a/src/mesa/main/extensions.c +++ b/src/mesa/main/extensions.c @@ -425,6 +425,7 @@ _mesa_enable_sw_extensions(struct gl_context *ctx) ctx-Extensions.ARB_vertex_shader = GL_TRUE; ctx-Extensions.ARB_sync = GL_TRUE; ctx-Extensions.APPLE_object_purgeable = GL_TRUE; + ctx-Extensions.AMD_blend_minmax_factor = GL_TRUE; ctx-Extensions.ATI_envmap_bumpmap = GL_TRUE; ctx-Extensions.ATI_fragment_shader = GL_TRUE; ctx-Extensions.ATI_texture_compression_3dc = GL_TRUE; diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 5e4a3b3..2da3b9f 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -553,6 +553,7 @@ void st_init_extensions(struct st_context *st) ctx-Extensions.EXT_texture_env_dot3 = GL_TRUE; ctx-Extensions.EXT_vertex_array_bgra = GL_TRUE; + ctx-Extensions.AMD_blend_minmax_factor = GL_TRUE; ctx-Extensions.ATI_texture_env_combine3 = GL_TRUE; ctx-Extensions.MESA_pack_invert = GL_TRUE; -- 1.8.5.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/7] swrast: support factors for min/max blending
--- src/mesa/swrast/s_blend.c | 16 1 file changed, 16 insertions(+) diff --git a/src/mesa/swrast/s_blend.c b/src/mesa/swrast/s_blend.c index 1037b62..59ffa7a 100644 --- a/src/mesa/swrast/s_blend.c +++ b/src/mesa/swrast/s_blend.c @@ -767,6 +767,16 @@ blend_general_float(struct gl_context *ctx, GLuint n, const GLubyte mask[], g = MAX2( Gd, Gs ); b = MAX2( Bd, Bs ); break; + case GL_FACTOR_MIN_AMD: +r = MIN2( Rs * sR, Rd * dR); +g = MIN2( Gs * sG, Gd * dG); +b = MIN2( Bs * sB, Bd * dB); +break; + case GL_FACTOR_MAX_AMD: +r = MAX2( Rs * sR, Rd * dR); +g = MAX2( Gs * sG, Gd * dG); +b = MAX2( Bs * sB, Bd * dB); +break; default: /* should never get here */ r = g = b = 0.0F; /* silence uninitialized var warning */ @@ -791,6 +801,12 @@ blend_general_float(struct gl_context *ctx, GLuint n, const GLubyte mask[], case GL_MAX: a = MAX2( Ad, As ); break; + case GL_FACTOR_MIN_AMD: +a = MIN2( As * sA, Ad * dA); +break; + case GL_FACTOR_MAX_AMD: +a = MAX2( As * sA, Ad * dA); +break; default: /* should never get here */ a = 0.0F; /* silence uninitialized var warning */ -- 1.8.5.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 7/7] nouveau: allow blend_minmax_factor
On Thu, Jan 2, 2014 at 8:18 PM, Maxence Le Doré
maxence.led...@gmail.com wrote:
Sound strange if nvidia would had chosen a different
implementation of min/max blending (where even
intel i830 allow factors with min/max blending).
Indeed, the driver doesn't set src and dst factors to ONE
when GL_MIN or GL_MAX are set as blend equation. Maybe
Francisco Jerez (going to ask him) simply forgot about
that and nv10-20 support it or nVIDIA had clearly opted
to another form of hardware implementation.
Anyway. Can't test this right now (lacks nv10 hw).
I have a NV18 plugged in. How would I go about testing this?
---
src/mesa/drivers/dri/nouveau/nouveau_gldefs.h| 2 ++
src/mesa/drivers/dri/nouveau/nv10_context.c | 1 +
src/mesa/drivers/dri/nouveau/nv10_state_raster.c | 10 +-
src/mesa/drivers/dri/nouveau/nv20_context.c | 1 +
4 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
index 46ec14e..ba65dfd 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
@@ -73,8 +73,10 @@ nvgl_blend_eqn(unsigned eqn)
case GL_FUNC_ADD:
return 0x8006;
case GL_MIN:
+ case GL_FACTOR_MIN_AMD:
return 0x8007;
case GL_MAX:
+ case GL_FACTOR_MAX_AMD:
return 0x8008;
case GL_FUNC_SUBTRACT:
return 0x800a;
diff --git a/src/mesa/drivers/dri/nouveau/nv10_context.c
b/src/mesa/drivers/dri/nouveau/nv10_context.c
index 1918f12..6f0e539 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_context.c
@@ -447,6 +447,7 @@ nv10_context_create(struct nouveau_screen *screen, const
struct gl_config *visua
ctx-Extensions.ARB_texture_env_crossbar = true;
ctx-Extensions.ARB_texture_env_combine = true;
ctx-Extensions.ARB_texture_env_dot3 = true;
+ ctx-Extensions.AMD_blend_minmax_factor = true;
ctx-Extensions.NV_fog_distance = true;
ctx-Extensions.NV_texture_rectangle = true;
if (ctx-Mesa_DXTn) {
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
index bd4a78e..bcacae6 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
@@ -62,12 +62,20 @@ void
nv10_emit_blend_equation(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
+ unsigned eqn = ctx-Color.Blend[0].EquationRGB;
BEGIN_NV04(push, NV10_3D(BLEND_FUNC_ENABLE), 1);
PUSH_DATAb(push, ctx-Color.BlendEnabled);
BEGIN_NV04(push, NV10_3D(BLEND_EQUATION), 1);
- PUSH_DATA (push, nvgl_blend_eqn(ctx-Color.Blend[0].EquationRGB));
+ PUSH_DATA (push, nvgl_blend_eqn(eqn));
+
+if(eqn == GL_MIN || eqn == GL_MAX)
+{
+ BEGIN_NV04(push, NV10_3D(BLEND_FUNC_SRC), 2);
+ PUSH_DATA (push, NV10_3D_BLEND_FUNC_SRC_ONE);
+ PUSH_DATA (push, NV10_3D_BLEND_FUNC_DST_ONE);
+}
}
void
diff --git a/src/mesa/drivers/dri/nouveau/nv20_context.c
b/src/mesa/drivers/dri/nouveau/nv20_context.c
index 1d77132..b528798 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_context.c
@@ -458,6 +458,7 @@ nv20_context_create(struct nouveau_screen *screen, const
struct gl_config *visua
ctx-Extensions.ARB_texture_env_crossbar = true;
ctx-Extensions.ARB_texture_env_combine = true;
ctx-Extensions.ARB_texture_env_dot3 = true;
+ ctx-Extensions.AMD_blend_minmax_factor = true;
ctx-Extensions.NV_fog_distance = true;
ctx-Extensions.NV_texture_rectangle = true;
if (ctx-Mesa_DXTn) {
--
1.8.5.2
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Re: [Mesa-dev] [PATCH 2/4] radeon: Add bo statistics dumping support
On Wed, Jan 1, 2014 at 3:57 PM, Lauri Kasanen c...@gmx.com wrote:
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 28921be..2c33ddf 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -209,6 +216,24 @@ bool r600_common_screen_init(struct r600_common_screen
*rscreen,
return false;
}
+ if (rscreen-debug_flags DBG_BO_STATS) {
+ char statsfile[80];
+ const pid_t pid = getpid();
+
+#ifdef __GLIBC__
+ snprintf(statsfile, 80, /tmp/bostats.%u.%s, pid,
program_invocation_short_name);
+#else
+ snprintf(statsfile, 80, /tmp/bostats.%u, pid);
+#endif
+
+ rscreen-ws-bo_stats_file = fopen(statsfile, w);
+ if (!rscreen-ws-bo_stats_file)
+ fprintf(stderr, Failed to open bo stats file %s\n,
statsfile);
+ else
+ fprintf(rscreen-ws-bo_stats_file, Started at
%llu\n,
+ (unsigned long long) os_time_get_nano() /
100);
stats_time_get()?
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Re: [Mesa-dev] [PATCH 18/25] i965: Import surface lowering code.
On 2 December 2013 11:39, Francisco Jerez curroje...@riseup.net wrote:
diff --git a/src/mesa/drivers/dri/i965/brw_surface_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_surface_visitor.cpp
new file mode 100644
index 000..07511b5
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_surface_visitor.cpp
@@ -0,0 +1,1208 @@
+/*
+ * Copyright 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
Software),
+ * to deal in the Software without restriction, including without
limitation
+ * the rights to use, copy, modify, merge, publish, distribute,
sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
next
+ * paragraph) shall be included in all copies or substantial portions of
the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Francisco Jerez curroje...@riseup.net
+ */
+
+#include brw_surface_visitor.h
+#include brw_context.h
+
+brw_surface_visitor::brw_surface_visitor(backend_visitor *v) :
+ v(v)
+{
+}
+
+void
+brw_surface_visitor::visit_atomic_counter_intrinsic(ir_call *ir) const
+{
+ const char *callee = ir-callee-function_name();
+ ir_dereference *deref = static_castir_dereference *(
+ ir-actual_parameters.get_head());
+ const backend_reg offset = v-visit_result(deref);
+ const backend_reg surface =
+ brw_imm_ud(v-stage_prog_data-binding_table.abo_start +
+ deref-variable_referenced()-atomic.buffer_index);
+ backend_reg tmp;
+
+ if (!strcmp(__intrinsic_atomic_read, callee)) {
+ tmp = emit_untyped_read(backend_reg(), surface, offset, 1, 1);
+
+ } else if (!strcmp(__intrinsic_atomic_increment, callee)) {
+ tmp = emit_untyped_atomic(backend_reg(), surface, offset,
+backend_reg(), backend_reg(),
+1, BRW_AOP_INC);
+
+ } else if (!strcmp(__intrinsic_atomic_predecrement, callee)) {
+ tmp = emit_untyped_atomic(backend_reg(), surface, offset,
+backend_reg(), backend_reg(),
+1, BRW_AOP_PREDEC);
+ }
Are these the only calls to emit_untyped_atomic()? If so, why do the flag,
src0, and src1 parameters to this function exist, if we always populate
them with backend_reg() (causing the logic pertaining to them to be
skipped)?
+
+ if (ir-return_deref) {
+ backend_reg dst = v-visit_result(ir-return_deref);
+ emit_assign_vector(dst, tmp, 1);
+ }
+}
+
+namespace {
+ /**
+* Process the parameters passed to an image intrinsic call.
+*/
This sounds like a description of a function, not a structure. How about
just The parameters passed to an image intrinsic call?
+ struct image_intrinsic_parameters {
+ image_intrinsic_parameters(backend_visitor *v, ir_call *ir)
+ {
+ exec_list_iterator it = ir-actual_parameters.iterator();
+
+ image_var = static_castir_dereference *(it.get())-
+variable_referenced();
+
+ image = visit_next(v, it);
+ addr = visit_next(v, it);
+
+ if (image_var-type-fields.image.dimension == GLSL_IMAGE_DIM_MS)
+sample = visit_next(v, it);
+
+ for (int i = 0; it.has_next(); ++i)
+src[i] = visit_next(v, it);
A bug in the front end could cause us to overflow the src array. To catch
that, let's add:
assert(i Elements(src));
to the body of the loop.
+
+ if (ir-return_deref)
+dst = v-visit_result(ir-return_deref);
+ }
+
+ ir_variable *image_var;
+
+ backend_reg image;
+ backend_reg addr;
+ backend_reg sample;
+ backend_reg src[2];
It looks like there are not too many possibilities for what will be
contained in the src array:
- For imageSize and imageLoad, src[0] and src[1] are unused.
- For imageAtomicCompSwap, src[0] is the compare parameter, and src[1] is
the data parameter.
- For all other functions, src[0] is the data parameter, and src[1] is
unused.
At the very least we should have a comment above the declaration of src
with this information.
However, it seems like all the other functions that have to deal with these
src values would be easier to read if we replaced
Re: [Mesa-dev] [PATCH] ilo: build pipe-loader driver]
On Thu, Jan 2, 2014 at 10:39 PM, Steven Newbury st...@snewbury.org.uk wrote:
Forgot to add signed-off-by...
In trying to get gallium-nine working with the ilo Gallium driver I
noticed there's no ilo pipe-loader driver being built.
This patch simply puts in place the missing pieces.
The driver descriptor is named ilo, rather than i965 as the ilo DRI
driver currently names itself, this is necessary as otherwise the
pipe-loader refuses to load as it has a sanity check verifying the name
matches. A follow-up patch renames the ilo DRI driver descriptor to
match.
Signed-off-by: Steven Newbury st...@snewbury.org.uk
---
include/pci_ids/pci_id_driver_map.h | 4 +++-
src/gallium/targets/pipe-loader/Makefile.am | 17 +
src/gallium/targets/pipe-loader/pipe_ilo.c | 27 +++
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/include/pci_ids/pci_id_driver_map.h
b/include/pci_ids/pci_id_driver_map.h
index 8a97c6f..1fb0467 100644
--- a/include/pci_ids/pci_id_driver_map.h
+++ b/include/pci_ids/pci_id_driver_map.h
@@ -64,10 +64,12 @@ static const struct {
int num_chips_ids;
} driver_map[] = {
{ 0x8086, i915, i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
- { 0x8086, i965, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
#ifndef DRIVER_MAP_GALLIUM_ONLY
+ { 0x8086, i965, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x1002, radeon, r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, r200, r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
+#else
+ { 0x8086, ilo, i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
#endif
Moving i965 into the #ifndef looks correct to me, but having ilo
in the #else looks hacky. For in this map, ilo should be always
defined by definition, and supports a subset of i965_chip_ids.
I am actually in favor of an environment variable that overrides the
auto-detection of the driver in the pipe loader, thus skipping this
map.
{ 0x1002, r300, r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
{ 0x1002, r600, r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
diff --git a/src/gallium/targets/pipe-loader/Makefile.am
b/src/gallium/targets/pipe-loader/Makefile.am
index 6875453..8fa3873 100644
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -47,6 +47,23 @@ PIPE_LIBS = \
-lpthread \
-lm
+if HAVE_GALLIUM_ILO
+pipe_LTLIBRARIES += pipe_ilo.la
+pipe_ilo_la_SOURCES = pipe_ilo.c
+pipe_ilo_la_LIBADD = \
+ $(PIPE_LIBS) \
+ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \
+ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \
+ $(LIBDRM_LIBS) \
+ $(INTEL_LIBS)
+pipe_ilo_la_LDFLAGS = -no-undefined -avoid-version -module
+if HAVE_MESA_LLVM
+nodist_EXTRA_pipe_ilo_la_SOURCES = dummy.cpp
+pipe_ilo_la_LIBADD += $(LLVM_LIBS)
+pipe_ilo_la_LDFLAGS += $(LLVM_LDFLAGS)
+endif
+endif
+
if HAVE_GALLIUM_I915
pipe_LTLIBRARIES += pipe_i915.la
pipe_i915_la_SOURCES = pipe_i915.c
diff --git a/src/gallium/targets/pipe-loader/pipe_ilo.c
b/src/gallium/targets/pipe-loader/pipe_ilo.c
new file mode 100644
index 000..11be2d1
--- /dev/null
+++ b/src/gallium/targets/pipe-loader/pipe_ilo.c
@@ -0,0 +1,27 @@
+
+#include target-helpers/inline_debug_helper.h
+#include state_tracker/drm_driver.h
+#include intel/intel_winsys.h
+#include ilo/ilo_public.h
+
+static struct pipe_screen *
+create_screen(int fd)
+{
+ struct intel_winsys *iws;
+ struct pipe_screen *screen;
+
+ iws = intel_winsys_create_for_fd(fd);
+ if (!iws)
+ return NULL;
+
+ screen = ilo_screen_create(iws);
+ if (!screen)
+ return NULL;
+
+ screen = debug_screen_wrap(screen);
+
+ return screen;
+}
+
+PUBLIC
+DRM_DRIVER_DESCRIPTOR(ilo, i915, create_screen, NULL)
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--
o...@lunarg.com
___
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[Mesa-dev] [PATCH] i965: Use default contexts when possible.
Will full PPGTT support it can be assumed that every file descriptor
gets its own hardware context. As such, there is no need to allocate
anew context in order to use the features provided by hardware contexts.
Eliminating this extra context allocation saves both physical memory
(currently PPGTT pages are pinned forever), GGTT space on IVB, and HSW,
as well as the associated startup cost of allocating the second context
- which can include an eviction in pathological cases.
Unfortunately, this requires a libdrm version bump as it requires a new
interface.
NOTE: I am uncertain if the share context idea is valid. Needs mesa
eyes.
Cc: Kenneth Graunke kenneth.w.grau...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
configure.ac| 2 +-
src/mesa/drivers/dri/i965/brw_context.c | 9 -
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index f75325d..a0ae0b3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -29,7 +29,7 @@ AC_SUBST([OSMESA_VERSION])
dnl Versions for external dependencies
LIBDRM_REQUIRED=2.4.24
LIBDRM_RADEON_REQUIRED=2.4.50
-LIBDRM_INTEL_REQUIRED=2.4.49
+LIBDRM_INTEL_REQUIRED=2.4.51
LIBDRM_NVVIEUX_REQUIRED=2.4.33
LIBDRM_NOUVEAU_REQUIRED=2.4.33 libdrm = 2.4.41
LIBDRM_FREEDRENO_REQUIRED=2.4.39
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 78c06fc..f5a66e1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -674,7 +674,14 @@ brwCreateContext(gl_api api,
intel_fbo_init(brw);
- if (brw-gen = 6) {
+ /* We assume that the hw_ctx is the first created for the file descriptor if
+* this is not a share context. If that assumption turns false then we'll
+* end up having hw_ctx for two contexts using the same actual context.
+*/
+ if (!shareCtx)
+ brw-hw_ctx = drm_intel_gem_default_context_get(brw-bufmgr);
+
+ if (!brw-hw_ctx brw-gen = 6) {
/* Create a new hardware context. Using a hardware context means that
* our GPU state will be saved/restored on context switch, allowing us
* to assume that the GPU is in the same state we left it in.
--
1.8.5.2
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[Mesa-dev] [PATCHv2] i965: Avoid extraneous fast depth clears
When the depth buffer is already cleared, skip GEN6_HIZ_OP_DEPTH_CLEAR. This
is made possible by tracking which slices have been cleared in
struct intel_mipmap_level. The hiz_cleared flag is unset when the depth
buffer is rendered to or when a HiZ resolve is needed.
For Unigine Tropics, the FPS improvement is 1.32134% +/- 0.161878% (n=13).
v2:
- unset hiz_cleared automatically in intel_miptree_slice_set_needs_hiz_resolve
- set/unset hiz_cleared with intel_renderbuffer_att_set_needs_depth_resolve
Signed-off-by: Chia-I Wu o...@lunarg.com
---
src/mesa/drivers/dri/i965/brw_clear.c | 54 +++
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/intel_fbo.c | 18 -
src/mesa/drivers/dri/i965/intel_fbo.h | 4 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 39 +++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 21 +++
6 files changed, 118 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 1cac996..8622584 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -164,34 +164,58 @@ brw_fast_clear_depth(struct gl_context *ctx)
break;
}
+ unsigned num_layers_cleared = 0;
+ bool clear_all_layers = false;
+
/* If we're clearing to a new clear value, then we need to resolve any clear
* flags out of the HiZ buffer into the real depth buffer.
*/
if (mt-depth_clear_value != depth_clear_value) {
intel_miptree_all_slices_resolve_depth(brw, mt);
mt-depth_clear_value = depth_clear_value;
- }
- /* From the Sandy Bridge PRM, volume 2 part 1, page 313:
-*
-* If other rendering operations have preceded this clear, a
-* PIPE_CONTROL with write cache flush enabled and Z-inhibit disabled
-* must be issued before the rectangle primitive used for the depth
-* buffer clear operation.
-*/
- intel_batchbuffer_emit_mi_flush(brw);
+ clear_all_layers = true;
+ }
if (fb-NumLayers 0) {
assert(fb-NumLayers == depth_irb-mt-level[depth_irb-mt_level].depth);
for (unsigned layer = 0; layer fb-NumLayers; layer++) {
- intel_hiz_exec(brw, mt, depth_irb-mt_level, layer,
-GEN6_HIZ_OP_DEPTH_CLEAR);
+ if (clear_all_layers ||
+ !intel_miptree_slice_get_hiz_cleared(mt,
+ depth_irb-mt_level,
+ layer)) {
+/* From the Sandy Bridge PRM, volume 2 part 1, page 313:
+ *
+ * If other rendering operations have preceded this clear, a
+ * PIPE_CONTROL with write cache flush enabled and Z-inhibit
+ * disabled must be issued before the rectangle primitive used
+ * for the depth buffer clear operation.
+ */
+if (num_layers_cleared == 0)
+ intel_batchbuffer_emit_mi_flush(brw);
+
+intel_hiz_exec(brw, mt, depth_irb-mt_level, layer,
+ GEN6_HIZ_OP_DEPTH_CLEAR);
+
+num_layers_cleared++;
+ }
}
} else {
- intel_hiz_exec(brw, mt, depth_irb-mt_level, depth_irb-mt_layer,
- GEN6_HIZ_OP_DEPTH_CLEAR);
+ if (clear_all_layers ||
+ !intel_miptree_slice_get_hiz_cleared(mt,
+ depth_irb-mt_level,
+ depth_irb-mt_layer)) {
+ intel_batchbuffer_emit_mi_flush(brw);
+ intel_hiz_exec(brw, mt, depth_irb-mt_level, depth_irb-mt_layer,
+GEN6_HIZ_OP_DEPTH_CLEAR);
+
+ num_layers_cleared = 1;
+ }
}
+ if (num_layers_cleared == 0)
+ return true;
+
if (brw-gen == 6) {
/* From the Sandy Bridge PRM, volume 2 part 1, page 314:
*
@@ -203,9 +227,9 @@ brw_fast_clear_depth(struct gl_context *ctx)
}
/* Now, the HiZ buffer contains data that needs to be resolved to the depth
-* buffer.
+* buffer. And set its cleared state to avoid unnecessary clears.
*/
- intel_renderbuffer_att_set_needs_depth_resolve(depth_att);
+ intel_renderbuffer_att_set_needs_depth_resolve(depth_att, true);
return true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index b898cd3..2138174 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -364,7 +364,7 @@ static void brw_postdraw_set_buffers_need_resolve(struct
brw_context *brw)
if (back_irb)
intel_renderbuffer_set_needs_downsample(back_irb);
if (depth_irb ctx-Depth.Mask)
- intel_renderbuffer_att_set_needs_depth_resolve(depth_att);
+ intel_renderbuffer_att_set_needs_depth_resolve(depth_att, false);
}
/* May fail if out of video
Re: [Mesa-dev] [PATCH] i965: Avoid extraneous fast depth clears
On Fri, Dec 27, 2013 at 7:25 AM, Chad Versace
chad.vers...@linux.intel.com wrote:
On 12/10/2013 09:54 PM, Chia-I Wu wrote:
When the depth buffer is already cleared, skip GEN6_HIZ_OP_DEPTH_CLEAR.
This
is made possible by tracking which slices have been cleared in
struct intel_mipmap_level. The hiz_cleared flag is unset when the depth
buffer is rendered to or when a HiZ resolve is needed.
For Unigine Tropics, the FPS improvement is 1.32134% +/- 0.161878% (n=13).
The code looks correct to me, and the perf improvement is nice. I have
comments below that should improve the maintainability of the affected
codepaths.
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 1 +
src/mesa/drivers/dri/i965/brw_clear.c | 58
+--
src/mesa/drivers/dri/i965/brw_draw.c | 16 +++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 37 +
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 21 ++
5 files changed, 119 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 51a3bef..d9ec3e9 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -173,6 +173,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
brw_blorp_exec(brw, params);
intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level,
dst_layer);
+ intel_miptree_slice_set_hiz_cleared(dst_mt, dst_level, dst_layer,
false);
If the miptree slice needs a hiz resolve, then the hiz buffer is not
cleared. You captured
this invariant by appending ``intel_miptree_slice_set_hiz_cleared(false)``
to each occurrence
``intel_miptree_slice_set_needs_hiz_resolve()``.
In effect, this patch introduces the requirement that all calls to
``intel_miptree_slice_set_needs_hiz_resolve()``
be followed by ``intel_miptree_slice_set_hiz_cleared(false)``. Rather than
introducing an implicit
requirement, ``intel_miptree_slice_set_needs_hiz_resolve()`` should
automatically set ``hiz_cleared = false``.
}
static void
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 1cac996..9dfb94a 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -164,34 +164,66 @@ brw_fast_clear_depth(struct gl_context *ctx)
break;
}
+ unsigned num_layers_cleared = 0;
+ bool clear_all_layers = false;
+
/* If we're clearing to a new clear value, then we need to resolve
any clear
* flags out of the HiZ buffer into the real depth buffer.
*/
if (mt-depth_clear_value != depth_clear_value) {
intel_miptree_all_slices_resolve_depth(brw, mt);
mt-depth_clear_value = depth_clear_value;
- }
- /* From the Sandy Bridge PRM, volume 2 part 1, page 313:
-*
-* If other rendering operations have preceded this clear, a
-* PIPE_CONTROL with write cache flush enabled and Z-inhibit
disabled
-* must be issued before the rectangle primitive used for the
depth
-* buffer clear operation.
-*/
- intel_batchbuffer_emit_mi_flush(brw);
+ clear_all_layers = true;
+ }
if (fb-NumLayers 0) {
assert(fb-NumLayers ==
depth_irb-mt-level[depth_irb-mt_level].depth);
for (unsigned layer = 0; layer fb-NumLayers; layer++) {
- intel_hiz_exec(brw, mt, depth_irb-mt_level, layer,
-GEN6_HIZ_OP_DEPTH_CLEAR);
+ if (clear_all_layers ||
+ !intel_miptree_slice_get_hiz_cleared(mt,
+ depth_irb-mt_level,
+ layer)) {
+/* From the Sandy Bridge PRM, volume 2 part 1, page 313:
+ *
+ * If other rendering operations have preceded this
clear, a
+ * PIPE_CONTROL with write cache flush enabled and
Z-inhibit
+ * disabled must be issued before the rectangle
primitive used
+ * for the depth buffer clear operation.
+ */
+if (!num_layers_cleared)
This is an integer, not a boolean, and therefore ``num_layers_cleared == 0``
is more
readable.
+ intel_batchbuffer_emit_mi_flush(brw);
+
+intel_hiz_exec(brw, mt, depth_irb-mt_level, layer,
+ GEN6_HIZ_OP_DEPTH_CLEAR);
+
+intel_miptree_slice_set_hiz_cleared(mt,
+depth_irb-mt_level,
+layer,
+true);
+num_layers_cleared++;
+ }
}
} else {
- intel_hiz_exec(brw, mt, depth_irb-mt_level, depth_irb-mt_layer,
-
[Mesa-dev] [PATCH] gl_uniform_storage data container
Hello; Patch changes gl_uniform_storage to include a data container for misc variables. This makes serilization of the storage easier. Patch is similar to changes made earlier for ir_variable but smaller in amount of changes. Here's a branch of oes_get_program_binary that benefits from this change in gl_shader_program serialization: http://cgit.freedesktop.org/~tpalli/mesa/log/?h=oes_get_program_binary2 Plan is to continue making these kind of changes to minimize the code size introduced by binary shader cache and also make it more robust. Tapani Pälli (1): glsl: introduce data section to gl_uniform_storage src/glsl/ir_uniform.h | 132 + src/glsl/link_atomics.cpp | 6 +- src/glsl/link_uniform_initializers.cpp | 23 ++--- src/glsl/link_uniforms.cpp | 50 +- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 +- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +- src/mesa/main/shaderapi.c | 2 +- src/mesa/main/uniform_query.cpp| 42 src/mesa/main/uniforms.c | 6 +- src/mesa/program/ir_to_mesa.cpp| 6 +- src/mesa/program/sampler.cpp | 4 +- src/mesa/state_tracker/st_draw.c | 2 +- 12 files changed, 142 insertions(+), 137 deletions(-) -- 1.8.3.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] glsl: introduce data section to gl_uniform_storage
Data section helps serialization of gl_uniform_storage which is required
for binary shader cache implementation, no functional changes.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/ir_uniform.h | 132 +
src/glsl/link_atomics.cpp | 6 +-
src/glsl/link_uniform_initializers.cpp | 23 ++---
src/glsl/link_uniforms.cpp | 50 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +-
src/mesa/main/shaderapi.c | 2 +-
src/mesa/main/uniform_query.cpp| 42
src/mesa/main/uniforms.c | 6 +-
src/mesa/program/ir_to_mesa.cpp| 6 +-
src/mesa/program/sampler.cpp | 4 +-
src/mesa/state_tracker/st_draw.c | 2 +-
12 files changed, 142 insertions(+), 137 deletions(-)
diff --git a/src/glsl/ir_uniform.h b/src/glsl/ir_uniform.h
index 13faab7..fda7552 100644
--- a/src/glsl/ir_uniform.h
+++ b/src/glsl/ir_uniform.h
@@ -86,37 +86,81 @@ struct gl_uniform_storage {
*/
const struct glsl_type *type;
- /**
-* The number of elements in this uniform.
-*
-* For non-arrays, this is always 0. For arrays, the value is the size of
-* the array.
-*/
- unsigned array_elements;
+ struct uniform_storage_data {
+ /**
+ * The number of elements in this uniform.
+ *
+ * For non-arrays, this is always 0. For arrays, the value is the size
of
+ * the array.
+ */
+ unsigned array_elements;
- /**
-* Has this uniform ever been set?
-*/
- bool initialized;
+ /**
+ * Has this uniform ever been set?
+ */
+ bool initialized;
+
+ struct {
+ /**
+ * Base sampler index
+ *
+ * If \c ::base_type is \c GLSL_TYPE_SAMPLER, this represents the
index
+ * of this sampler. If \c ::array_elements is not zero, the array
will
+ * use sampler indices \c ::sampler through \c ::sampler +
+ * \c ::array_elements - 1, inclusive.
+ *
+ * Note that the index may be different in each shader stage.
+ */
+ uint8_t index;
+
+ /**
+ * Whether this sampler is used in this shader stage.
+ */
+ bool active;
+ } sampler[MESA_SHADER_TYPES];
+
+ /** Fields for GL_ARB_uniform_buffer_object
+ * @{
+ */
- struct {
/**
- * Base sampler index
- *
- * If \c ::base_type is \c GLSL_TYPE_SAMPLER, this represents the index
- * of this sampler. If \c ::array_elements is not zero, the array will
- * use sampler indices \c ::sampler through \c ::sampler +
- * \c ::array_elements - 1, inclusive.
- *
- * Note that the index may be different in each shader stage.
+ * GL_UNIFORM_BLOCK_INDEX: index of the uniform block containing
+ * the uniform, or -1 for the default uniform block. Note that the
+ * index is into the linked program's UniformBlocks[] array, not
+ * the linked shader's.
+ */
+ int block_index;
+
+ /** GL_UNIFORM_OFFSET: byte offset within the uniform block, or -1. */
+ int offset;
+
+ /**
+ * GL_UNIFORM_MATRIX_STRIDE: byte stride between columns or rows of
+ * a matrix. Set to 0 for non-matrices in UBOs, or -1 for uniforms
+ * in the default uniform block.
*/
- uint8_t index;
+ int matrix_stride;
/**
- * Whether this sampler is used in this shader stage.
+ * GL_UNIFORM_ARRAY_STRIDE: byte stride between elements of the
+ * array. Set to zero for non-arrays in UBOs, or -1 for uniforms
+ * in the default uniform block.
*/
- bool active;
- } sampler[MESA_SHADER_TYPES];
+ int array_stride;
+
+ /** GL_UNIFORM_ROW_MAJOR: true iff it's a row-major matrix in a UBO */
+ bool row_major;
+
+ /** @} */
+
+ /**
+ * Index within gl_shader_program::AtomicBuffers[] of the atomic
+ * counter buffer this uniform is stored in, or -1 if this is not
+ * an atomic counter.
+ */
+ int atomic_buffer_index;
+
+ } data;
/**
* Storage used by the driver for the uniform
@@ -133,46 +177,6 @@ struct gl_uniform_storage {
*/
union gl_constant_value *storage;
- /** Fields for GL_ARB_uniform_buffer_object
-* @{
-*/
-
- /**
-* GL_UNIFORM_BLOCK_INDEX: index of the uniform block containing
-* the uniform, or -1 for the default uniform block. Note that the
-* index is into the linked program's UniformBlocks[] array, not
-* the linked shader's.
-*/
- int block_index;
-
- /** GL_UNIFORM_OFFSET: byte offset within the uniform block, or -1. */
- int offset;
-
- /**
-* GL_UNIFORM_MATRIX_STRIDE: byte stride between columns or rows of
-* a
