[Mesa-dev] [Bug 82253] JanusVR Browser rendering misses floors on radeonsi, works on intel
https://bugs.freedesktop.org/show_bug.cgi?id=82253 Michel Dänzer mic...@daenzer.net changed: What|Removed |Added Assignee|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop. |.org|org Component|Drivers/Gallium/radeonsi|Mesa core --- Comment #4 from Michel Dänzer mic...@daenzer.net --- Could be an issue in st/mesa or other driver-independent Gallium code then. Does glretrace also report a few OpenGL API errors like these on intel? 5946: message: major api error 1: GL_INVALID_OPERATION in Inside glBegin/glEnd 5947 @0 glTranslatef(x = 2.85, y = 0, z = 0) 5947: warning: glGetError(glTranslatef) = GL_INVALID_OPERATION -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa (master): mesa/formats: Add layout and swizzle information
On 07.08.2014 02:02, Jason Ekstrand wrote: Michael, Close, but no cigar. :) Could you please point me at the failing tests. spec/!OpenGL 1.1/depthstencil-default_fb-drawpixels-FLOAT-and-USHORT spec/!OpenGL 1.1/draw-pixels spec/!OpenGL 1.1/stencil-drawpixels spec/!OpenGL 1.4/copy-pixels spec/ARB_depth_buffer_float/fbo-depthstencil-GL_DEPTH32F_STENCIL8-drawpixels-FLOAT-and-USHORT spec/ARB_depth_buffer_float/fbo-stencil-GL_DEPTH32F_STENCIL8-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX14-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-drawpixels spec/EXT_packed_depth_stencil/fbo-depthstencil-GL_DEPTH24_STENCIL8-drawpixels-FLOAT-and-USHORT spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-drawpixels (The total number of regressions is around 20 because some of these are run for several numbers of samples) I don't have a radeon, but I can run with llvmpipe or dri swrast and try to find the bug that way. At least the draw-pixels test indeed regressed with llvmpipe as well. Would it be possible for you to verify that there are no piglit gpu.py regressions with llvmpipe before pushing changes like these? -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/6] r600g: remove useless r600_resource_va calls
Am 06.08.2014 um 23:49 schrieb Marek Olšák:
From: Marek Olšák marek.ol...@amd.com
Wanted to do this for a while as well.
The whole series is: Reviewed-by: Christian König christian.koe...@amd.com
R600-R700 don't support virtual memory.
---
src/gallium/drivers/r600/r600_state.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_state.c
b/src/gallium/drivers/r600/r600_state.c
index 258ffd1..607b199 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -595,25 +595,22 @@ texture_buffer_sampler_view(struct r600_pipe_sampler_view
*view,
unsigned width0, unsigned height0)
{
- struct pipe_context *ctx = view-base.context;
struct r600_texture *tmp = (struct r600_texture*)view-base.texture;
- uint64_t va;
int stride = util_format_get_blocksize(view-base.format);
unsigned format, num_format, format_comp, endian;
- unsigned offset = view-base.u.buf.first_element * stride;
+ uint64_t offset = view-base.u.buf.first_element * stride;
unsigned size = (view-base.u.buf.last_element -
view-base.u.buf.first_element + 1) * stride;
r600_vertex_data_type(view-base.format,
format, num_format, format_comp,
endian);
- va = r600_resource_va(ctx-screen, view-base.texture) + offset;
view-tex_resource = tmp-resource;
-
view-skip_mip_address_reloc = true;
- view-tex_resource_words[0] = va;
+
+ view-tex_resource_words[0] = offset;
view-tex_resource_words[1] = size - 1;
- view-tex_resource_words[2] = S_038008_BASE_ADDRESS_HI(va 32UL) |
+ view-tex_resource_words[2] = S_038008_BASE_ADDRESS_HI(offset 32UL) |
S_038008_STRIDE(stride) |
S_038008_DATA_FORMAT(format) |
S_038008_NUM_FORMAT_ALL(num_format) |
@@ -1105,8 +1102,7 @@ static void r600_init_depth_surface(struct r600_context
*rctx,
/* use htile only for first level */
if (rtex-htile_buffer !level) {
- uint64_t va = r600_resource_va(rctx-screen-b.b,
rtex-htile_buffer-b.b);
- surf-db_htile_data_base = va 8;
+ surf-db_htile_data_base = 0;
surf-db_htile_surface = S_028D24_HTILE_WIDTH(1) |
S_028D24_HTILE_HEIGHT(1) |
S_028D24_FULL_CACHE(1) |
@@ -1944,7 +1940,6 @@ static void r600_emit_shader_stages(struct r600_context
*rctx, struct r600_atom
static void r600_emit_gs_rings(struct r600_context *rctx, struct r600_atom *a)
{
- struct pipe_screen *screen = rctx-b.b.screen;
struct radeon_winsys_cs *cs = rctx-b.rings.gfx.cs;
struct r600_gs_rings_state *state = (struct r600_gs_rings_state*)a;
struct r600_resource *rbuffer;
@@ -1955,8 +1950,7 @@ static void r600_emit_gs_rings(struct r600_context *rctx,
struct r600_atom *a)
if (state-enable) {
rbuffer =(struct r600_resource*)state-esgs_ring.buffer;
- r600_write_config_reg(cs, R_008C40_SQ_ESGS_RING_BASE,
- (r600_resource_va(screen, rbuffer-b.b)) 8);
+ r600_write_config_reg(cs, R_008C40_SQ_ESGS_RING_BASE, 0);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, r600_context_bo_reloc(rctx-b,
rctx-b.rings.gfx, rbuffer,
RADEON_USAGE_READWRITE,
@@ -1965,8 +1959,7 @@ static void r600_emit_gs_rings(struct r600_context *rctx,
struct r600_atom *a)
state-esgs_ring.buffer_size 8);
rbuffer =(struct r600_resource*)state-gsvs_ring.buffer;
- r600_write_config_reg(cs, R_008C48_SQ_GSVS_RING_BASE,
- (r600_resource_va(screen, rbuffer-b.b)) 8);
+ r600_write_config_reg(cs, R_008C48_SQ_GSVS_RING_BASE, 0);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, r600_context_bo_reloc(rctx-b,
rctx-b.rings.gfx, rbuffer,
RADEON_USAGE_READWRITE,
@@ -2644,8 +2637,7 @@ void r600_update_gs_state(struct pipe_context *ctx,
struct r600_pipe_shader *sha
r600_store_context_reg(cb, R_02887C_SQ_PGM_RESOURCES_GS,
S_02887C_NUM_GPRS(rshader-bc.ngpr) |
S_02887C_STACK_SIZE(rshader-bc.nstack));
- r600_store_context_reg(cb, R_02886C_SQ_PGM_START_GS,
- r600_resource_va(ctx-screen, (void *)shader-bo)
8);
+ r600_store_context_reg(cb, R_02886C_SQ_PGM_START_GS, 0);
/* After that, the NOP relocation packet must be emitted (shader-bo,
RADEON_USAGE_READ). */
}
@@ -2659,8 +2651,7 @@ void r600_update_es_state(struct pipe_context
[Mesa-dev] [Bug 82253] JanusVR Browser rendering misses floors on radeonsi, works on intel
https://bugs.freedesktop.org/show_bug.cgi?id=82253 --- Comment #5 from Christoph Haag haa...@frickel.club --- (In reply to comment #4) Could be an issue in st/mesa or other driver-independent Gallium code then. Does glretrace also report a few OpenGL API errors like these on intel? 5946: message: major api error 1: GL_INVALID_OPERATION in Inside glBegin/glEnd 5947 @0 glTranslatef(x = 2.85, y = 0, z = 0) 5947: warning: glGetError(glTranslatef) = GL_INVALID_OPERATION Yes, it produces exactly the same error log with intel, radeonsi and llvmpipe. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 8/9] i915: Don't call _mesa_meta_glsl_Clear() on gen2
On Wed, Aug 06, 2014 at 01:44:45PM -0700, Eric Anholt wrote: ville.syrj...@linux.intel.com writes: From: Ville Syrjälä ville.syrj...@linux.intel.com Gen2 doesn't have fragmnts shaders so we shouldn't be calling spelling^ Fixed locally. Other than that, patches 4-9 are: Reviewed-by: Eric Anholt e...@anholt.net Thanks. -- Ville Syrjälä Intel OTC ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 3/9] i915: Use L8A8 instead of I8 to simulate A8 on gen2
From: Ville Syrjälä ville.syrj...@linux.intel.com Gen2 doesn't support the A8 texture format. Currently the driver substitutes it with I8, but that results in incorrect RGB values. Use A8L8 instead. We end up wasting a bit of memory, but at least we should get the correct results. v2: Handle the fallback in _mesa_choose_tex_format() and also do it for all alpha formats that currently accept A8 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72819 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80050 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38873 Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com --- src/mesa/drivers/dri/i915/i830_texstate.c | 2 -- src/mesa/drivers/dri/i915/i915_context.c | 3 ++- src/mesa/main/texformat.c | 3 +++ 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index 58d3356..b1414c7 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -47,8 +47,6 @@ translate_texture_format(GLuint mesa_format) return MAPSURF_8BIT | MT_8BIT_L8; case MESA_FORMAT_I_UNORM8: return MAPSURF_8BIT | MT_8BIT_I8; - case MESA_FORMAT_A_UNORM8: - return MAPSURF_8BIT | MT_8BIT_I8; /* Kludge! */ case MESA_FORMAT_L8A8_UNORM: return MAPSURF_16BIT | MT_16BIT_AY88; case MESA_FORMAT_B5G6R5_UNORM: diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index 7f43896..3fd571d 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -109,7 +109,8 @@ intel_init_texture_formats(struct gl_context *ctx) ctx-TextureFormatSupported[MESA_FORMAT_B5G5R5A1_UNORM] = true; ctx-TextureFormatSupported[MESA_FORMAT_B5G6R5_UNORM] = true; ctx-TextureFormatSupported[MESA_FORMAT_L_UNORM8] = true; - ctx-TextureFormatSupported[MESA_FORMAT_A_UNORM8] = true; + if (intel-gen == 3) + ctx-TextureFormatSupported[MESA_FORMAT_A_UNORM8] = true; ctx-TextureFormatSupported[MESA_FORMAT_I_UNORM8] = true; ctx-TextureFormatSupported[MESA_FORMAT_L8A8_UNORM] = true; diff --git a/src/mesa/main/texformat.c b/src/mesa/main/texformat.c index c61a748..f414ea3 100644 --- a/src/mesa/main/texformat.c +++ b/src/mesa/main/texformat.c @@ -155,12 +155,14 @@ _mesa_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_ALPHA4: case GL_ALPHA8: RETURN_IF_SUPPORTED(MESA_FORMAT_A_UNORM8); + RETURN_IF_SUPPORTED(MESA_FORMAT_L8A8_UNORM); break; case GL_ALPHA12: case GL_ALPHA16: RETURN_IF_SUPPORTED(MESA_FORMAT_A_UNORM16); RETURN_IF_SUPPORTED(MESA_FORMAT_A_UNORM8); + RETURN_IF_SUPPORTED(MESA_FORMAT_L8A8_UNORM); break; /* Luminance formats */ @@ -224,6 +226,7 @@ _mesa_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_COMPRESSED_ALPHA_ARB: RETURN_IF_SUPPORTED(MESA_FORMAT_A_UNORM8); + RETURN_IF_SUPPORTED(MESA_FORMAT_L8A8_UNORM); break; case GL_COMPRESSED_LUMINANCE_ARB: RETURN_IF_SUPPORTED(MESA_FORMAT_L_UNORM8); -- 1.8.5.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] r600g/compute: Fix Warnings
I have followed the following convention:
- Positions in the pool are now 'int' (start_in_dw and related)
- Sizes are 'unsigned' (size_in_dw and related)
- IDs are 'unsigned'
The pool and item's status are left as uint32_t
The shadow has been also left as a pointer to an uint32_t
---
src/gallium/drivers/r600/compute_memory_pool.c | 56 +-
src/gallium/drivers/r600/compute_memory_pool.h | 26 ++--
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/src/gallium/drivers/r600/compute_memory_pool.c
b/src/gallium/drivers/r600/compute_memory_pool.c
index 0ee8ceb..8bcab00 100644
--- a/src/gallium/drivers/r600/compute_memory_pool.c
+++ b/src/gallium/drivers/r600/compute_memory_pool.c
@@ -76,7 +76,7 @@ static void compute_memory_pool_init(struct
compute_memory_pool * pool,
unsigned initial_size_in_dw)
{
- COMPUTE_DBG(pool-screen, * compute_memory_pool_init()
initial_size_in_dw = %ld\n,
+ COMPUTE_DBG(pool-screen, * compute_memory_pool_init()
initial_size_in_dw = %u\n,
initial_size_in_dw);
pool-size_in_dw = initial_size_in_dw;
@@ -104,9 +104,9 @@ void compute_memory_pool_delete(struct compute_memory_pool*
pool)
* \param size_in_dw The size of the space we are looking for.
* \return -1 on failure
*/
-int64_t compute_memory_prealloc_chunk(
+int compute_memory_prealloc_chunk(
struct compute_memory_pool* pool,
- int64_t size_in_dw)
+ unsigned size_in_dw)
{
struct compute_memory_item *item;
@@ -114,7 +114,7 @@ int64_t compute_memory_prealloc_chunk(
assert(size_in_dw = pool-size_in_dw);
- COMPUTE_DBG(pool-screen, * compute_memory_prealloc_chunk() size_in_dw
= %ld\n,
+ COMPUTE_DBG(pool-screen, * compute_memory_prealloc_chunk() size_in_dw
= %u\n,
size_in_dw);
LIST_FOR_EACH_ENTRY(item, pool-item_list, link) {
@@ -139,13 +139,13 @@ int64_t compute_memory_prealloc_chunk(
*/
struct list_head *compute_memory_postalloc_chunk(
struct compute_memory_pool* pool,
- int64_t start_in_dw)
+ int start_in_dw)
{
struct compute_memory_item *item;
struct compute_memory_item *next;
struct list_head *next_link;
- COMPUTE_DBG(pool-screen, * compute_memory_postalloc_chunck()
start_in_dw = %ld\n,
+ COMPUTE_DBG(pool-screen, * compute_memory_postalloc_chunck()
start_in_dw = %i\n,
start_in_dw);
/* Check if we can insert it in the front of the list */
@@ -181,12 +181,12 @@ struct list_head *compute_memory_postalloc_chunk(
* \see compute_memory_finalize_pending
*/
int compute_memory_grow_defrag_pool(struct compute_memory_pool *pool,
- struct pipe_context *pipe, int new_size_in_dw)
+ struct pipe_context *pipe, unsigned new_size_in_dw)
{
new_size_in_dw = align(new_size_in_dw, ITEM_ALIGNMENT);
COMPUTE_DBG(pool-screen, * compute_memory_grow_defrag_pool()
- new_size_in_dw = %d (%d bytes)\n,
+ new_size_in_dw = %u (%u bytes)\n,
new_size_in_dw, new_size_in_dw * 4);
assert(new_size_in_dw = pool-size_in_dw);
@@ -274,17 +274,17 @@ int compute_memory_finalize_pending(struct
compute_memory_pool* pool,
{
struct compute_memory_item *item, *next;
- int64_t allocated = 0;
- int64_t unallocated = 0;
- int64_t last_pos;
+ unsigned allocated = 0;
+ unsigned unallocated = 0;
+ int last_pos;
int err = 0;
COMPUTE_DBG(pool-screen, * compute_memory_finalize_pending()\n);
LIST_FOR_EACH_ENTRY(item, pool-item_list, link) {
- COMPUTE_DBG(pool-screen, + list: offset = %i id = %i size =
%i
- (%i bytes)\n,item-start_in_dw, item-id,
+ COMPUTE_DBG(pool-screen, + list: offset = %i id = %u size =
%u
+ (%u bytes)\n, item-start_in_dw, item-id,
item-size_in_dw, item-size_in_dw * 4);
}
@@ -347,7 +347,7 @@ void compute_memory_defrag(struct compute_memory_pool *pool,
struct pipe_context *pipe)
{
struct compute_memory_item *item;
- int64_t last_pos;
+ int last_pos;
COMPUTE_DBG(pool-screen, * compute_memory_defrag()\n);
@@ -374,7 +374,7 @@ void compute_memory_defrag(struct compute_memory_pool *pool,
*/
int compute_memory_promote_item(struct compute_memory_pool *pool,
struct compute_memory_item *item, struct pipe_context *pipe,
- int64_t start_in_dw)
+ int start_in_dw)
{
struct pipe_screen *screen = (struct pipe_screen *)pool-screen;
struct r600_context *rctx = (struct r600_context *)pipe;
@@ -383,8 +383,8 @@ int compute_memory_promote_item(struct compute_memory_pool
*pool,
struct pipe_box box;
COMPUTE_DBG(pool-screen, * compute_memory_promote_item()\n
- + Promoting Item: %i , starting at: %u (%u
[Mesa-dev] [PATCH 2/2] r600g/compute: Decrement map_count when unmapping items
This patch adds a new struct: r600_transfer_global. It will
act as a wrapper around an r600_resource_global and an r600_transfer.
It will be used for calling r600_compute_global_transfer_unmap when
transfer_unmap is called. And at the same time, keep all the transfer
information, so we can call r600_buffer_transfer_unmap with the
'real' transfer.
---
src/gallium/drivers/r600/evergreen_compute.c | 46 +---
src/gallium/drivers/r600/evergreen_compute.h | 5 +++
2 files changed, 40 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index f50f94a..ac72256 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -970,10 +970,16 @@ void *r600_compute_global_transfer_map(
struct r600_resource_global* buffer =
(struct r600_resource_global*)resource;
+ struct r600_transfer_global *trans = NULL;
+ uint8_t *data;
+
struct compute_memory_item *item = buffer-chunk;
struct pipe_resource *dst = NULL;
unsigned offset = box-x;
+ trans = CALLOC(1, sizeof(struct r600_transfer_global));
+ trans-resource = resource;
+
if (is_item_in_pool(item)) {
compute_memory_demote_item(pool, item, ctx_);
}
@@ -1004,8 +1010,11 @@ void *r600_compute_global_transfer_map(
assert(box-z == 0);
///TODO: do it better, mapping is not possible if the pool is too big
- return pipe_buffer_map_range(ctx_, dst,
- offset, box-width, usage, ptransfer);
+ data = pipe_buffer_map_range(ctx_, dst,
+ offset, box-width, usage, trans-ptransfer);
+
+ *ptransfer = (struct pipe_transfer *)trans;
+ return data;
}
void r600_compute_global_transfer_unmap(
@@ -1013,16 +1022,31 @@ void r600_compute_global_transfer_unmap(
struct pipe_transfer* transfer)
{
/* struct r600_resource_global are not real resources, they just map
-* to an offset within the compute memory pool. The function
-* r600_compute_global_transfer_map() maps the memory pool
-* resource rather than the struct r600_resource_global passed to
-* it as an argument and then initalizes ptransfer-resource with
-* the memory pool resource (via pipe_buffer_map_range).
-* When transfer_unmap is called it uses the memory pool's
-* vtable which calls r600_buffer_transfer_map() rather than
-* this function.
+* to an offset within the compute memory pool. The function
+* r600_compute_global_transfer_map() creates a struct
+* r600_transfer_global, which has as resource an r600_global_resource
+* and an r600_transfer which will act as the 'real' pipe_transfer
+* that will be passed to pipe_buffer_map_range.
+*
+* This allows us to use an r600_resource_global vtable when
transfer_unmap
+* is called, and still have the full information about the transfer,
+* which will be used to actually unmap the resource.
*/
- assert (!This function should not be called);
+
+ struct r600_context *rctx = (struct r600_context *)ctx_;
+ struct r600_transfer_global *trans =
+ (struct r600_transfer_global *)transfer;
+ struct r600_resource_global *buffer =
+ (struct r600_resource_global *)trans-resource;
+ struct compute_memory_item *item = buffer-chunk;
+
+ COMPUTE_DBG(rctx-screen, * r600_compute_global_transfer_unmap()\n
+ Unmaping Buffer: %u\n, item-id);
+
+ ctx_-transfer_unmap(ctx_, trans-ptransfer);
+ item-map_count--;
+
+ FREE(trans);
}
void r600_compute_global_transfer_flush_region(
diff --git a/src/gallium/drivers/r600/evergreen_compute.h
b/src/gallium/drivers/r600/evergreen_compute.h
index 4fb53a1..842e5e4 100644
--- a/src/gallium/drivers/r600/evergreen_compute.h
+++ b/src/gallium/drivers/r600/evergreen_compute.h
@@ -38,6 +38,11 @@ struct r600_resource_global {
struct compute_memory_item *chunk;
};
+struct r600_transfer_global {
+ struct pipe_resource *resource;
+ struct pipe_transfer *ptransfer;
+};
+
void *evergreen_create_compute_state(struct pipe_context *ctx, const struct
pipe_compute_state *cso);
void evergreen_delete_compute_state(struct pipe_context *ctx, void *state);
void evergreen_compute_upload_input(struct pipe_context *context, const uint
*block_layout, const uint *grid_layout, const void *input);
--
2.0.4
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[Mesa-dev] [PATCH 0/2] [RFC] r600g/compute: Track better how items are mapped
Hi, This series adds support for actually knowing when an item is not mapped. Previously, when an item was marked as 'MAPPED_FOR_READING' we couldn't really remove that status because although we controlled how items were mapped, we didn't control how they were unmapped. Patch 1 modifies how items track how they are mapped. As an item can be mapped multiple times for reading/writing, we should also know how many times the item is mapped. Patch 2 adds a new structure that will be used to actually make possible that r600_compute_global_transfer_unmap is called when we try to unmap an item, so we can decrement the map count. Patch 2 is a bit of hack that seems to work, but any suggestions about it are welcomed. Thanks in advance! Bruno Bruno Jiménez (2): r600g/compute: Add a member to the items to track how many maps it has r600g/compute: Decrement map_count when unmapping items src/gallium/drivers/r600/compute_memory_pool.c | 5 +-- src/gallium/drivers/r600/compute_memory_pool.h | 1 + src/gallium/drivers/r600/evergreen_compute.c | 49 +++--- src/gallium/drivers/r600/evergreen_compute.h | 5 +++ 4 files changed, 45 insertions(+), 15 deletions(-) -- 2.0.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/2] r600g/compute: Add a member to the items to track how many maps it has
This will be necessary to know how many mappings for read it has, as
the spec allows to have as many as desired.
---
src/gallium/drivers/r600/compute_memory_pool.c | 5 +++--
src/gallium/drivers/r600/compute_memory_pool.h | 1 +
src/gallium/drivers/r600/evergreen_compute.c | 3 +--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/r600/compute_memory_pool.c
b/src/gallium/drivers/r600/compute_memory_pool.c
index 0ee8ceb..497ff90 100644
--- a/src/gallium/drivers/r600/compute_memory_pool.c
+++ b/src/gallium/drivers/r600/compute_memory_pool.c
@@ -403,11 +403,12 @@ int compute_memory_promote_item(struct
compute_memory_pool *pool,
dst, 0, item-start_in_dw * 4, 0 ,0,
src, 0, box);
- /* We check if the item is mapped for reading.
+ /* We check if the item is mapped. At this point, only
+* buffers mapped for reading should still be mapped.
* In this case, we need to keep the temporary buffer 'alive'
* because it is possible to keep a map active for reading
* while a kernel (that reads from it) executes */
- if (!(item-status ITEM_MAPPED_FOR_READING)) {
+ if (item-map_count == 0) {
pool-screen-b.b.resource_destroy(screen, src);
item-real_buffer = NULL;
}
diff --git a/src/gallium/drivers/r600/compute_memory_pool.h
b/src/gallium/drivers/r600/compute_memory_pool.h
index 161ddd5..8fcd75b 100644
--- a/src/gallium/drivers/r600/compute_memory_pool.h
+++ b/src/gallium/drivers/r600/compute_memory_pool.h
@@ -41,6 +41,7 @@ struct compute_memory_item
int64_t id; /** ID of the memory chunk */
uint32_t status;/** Will track the status of the item */
+ uint32_t map_count; /** Will track the number of maps done to the
item */
/** Start pointer in dwords relative in the pool bo. If an item
* is unallocated, then this value must be -1 to indicate this. */
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index 1970414..f50f94a 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -986,8 +986,7 @@ void *r600_compute_global_transfer_map(
dst = (struct pipe_resource*)item-real_buffer;
- if (usage PIPE_TRANSFER_READ)
- buffer-chunk-status |= ITEM_MAPPED_FOR_READING;
+ item-map_count++;
COMPUTE_DBG(rctx-screen, * r600_compute_global_transfer_map()\n
level = %u, usage = %u, box(x = %u, y = %u, z = %u
--
2.0.4
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Re: [Mesa-dev] [PATCH] r600g/radeon: Don't try to allocate CMASK BO of size 0
I would rather like to find the core problem.
r600_num_tile_pipes might be 0 for some reason. This recent commit
could cause the issue:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b046474c95f15338d4c748df9b62871bba6f36f
Marek
On Thu, Aug 7, 2014 at 7:46 AM, Michel Dänzer mic...@daenzer.net wrote:
From: Michel Dänzer michel.daen...@amd.com
Prevents logs from getting spammed with BO allocation failure messages.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82162
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeon/r600_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 482bbff..0ecbb9e 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -463,6 +463,8 @@ static void r600_texture_alloc_cmask_separate(struct
r600_common_screen *rscreen
} else {
r600_texture_get_cmask_info(rscreen, rtex, rtex-cmask);
}
+ if (rtex-cmask.size == 0)
+ return;
rtex-cmask_buffer = (struct r600_resource *)
pipe_buffer_create(rscreen-b, PIPE_BIND_CUSTOM,
--
2.0.1
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[Mesa-dev] [PATCH] r600g/compute: Add information about how compute_memory_pool works
---
NOTE: if the two patches I have just send for tracking how buffers are mapped
are good, we may drop the last item from the TODO list.
src/gallium/drivers/r600/compute_memory_pool.c | 47 ++
1 file changed, 47 insertions(+)
diff --git a/src/gallium/drivers/r600/compute_memory_pool.c
b/src/gallium/drivers/r600/compute_memory_pool.c
index 0ee8ceb..58f07c0 100644
--- a/src/gallium/drivers/r600/compute_memory_pool.c
+++ b/src/gallium/drivers/r600/compute_memory_pool.c
@@ -22,6 +22,53 @@
* Adam Rak adam@streamnovation.com
*/
+/**
+ * \file compute_memory_pool.c
+ * Pool for computation resources
+ *
+ * Summary of how it works:
+ * First, items are added to the pool by compute_memory_alloc. These
+ * items aren't allocated yet, don't have a position at the pool
+ * and are added to the \a unallocated_list.
+ * Now, when this items are actually used in a kernel, they are
+ * promoted to the pool by compute_memory_promote_item. This means
+ * that they will be placed somewhere in the pool and they will be
+ * moved from the \a unallocated_list to the \a item_list.
+ * The process of ensuring that there's enough memory for all the items
+ * and that everything goes to its correct place is done by
+ * compute_memory_finalize_pending. This function first sums the
+ * size of all the items that are already in the pool and of those
+ * that will be added. If the size is more than the total of the pool
+ * then it will be grown so that all the items will fit. After this
+ * if the pool is fragmented (meaning that there may be gaps between
+ * items) it will be defragmented. Finally, all the items marked
+ * for promotion are promoted to the pool.
+ * For now, the defragmentation is very simple: it just loops for all
+ * the allocated items checking where they should start, and if any
+ * item starts further back than where it should, it is moved forward.
+ *
+ * Mapping buffers is done in an inefficient way, result of the limitation
+ * of not being able to have buffers mapped when a pool is grown,
+ * which should only happen at the moment of launching kernels.
+ * When a buffer is going to be mapped, first it is demoted from the
+ * pool, so we can assure that its position will never change, even
+ * if the pool gets relocated as a result of it being grown.
+ * This means that we have to actually copy the whole buffer to a new
+ * resource before mapping it.
+ * As an example of why we have to do this imagine this case:
+ * Pool with a size of 16 with buffers A, B, C and D (size 4 each)
+ * We map buffer A and launch a kernel that needs of a new item E.
+ * As we need to add a new item, the pool will grow, possibly
+ * geting relocated in the process. This means that the mapping
+ * for buffer A won't be valid any more.
+ *
+ * Things still TODO:
+ * - Find a better way of having items mapped when a kernel is launched
+ * - Find a better way of adding items to the pool when it is fragmented
+ * - Decide what to do with '{post,pre}alloc_chunk' now that they aren't used
+ * - Actually be able to remove the 'ITEM_MAPPED_FOR_READING' status
+ */
+
#include pipe/p_defines.h
#include pipe/p_state.h
#include pipe/p_context.h
--
2.0.4
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Re: [Mesa-dev] [PATCH 08/20] i965/cfg: Add functions to test if a block is a successor/predecessor.
On Wed, Aug 06, 2014 at 03:03:55PM -0700, Matt Turner wrote:
On Wed, Aug 6, 2014 at 11:19 AM, Matt Turner matts...@gmail.com wrote:
On Tue, Aug 5, 2014 at 10:21 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Thu, Jul 24, 2014 at 07:54:15PM -0700, Matt Turner wrote:
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 24
src/mesa/drivers/dri/i965/brw_cfg.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.cpp
b/src/mesa/drivers/dri/i965/brw_cfg.cpp
index d806b83..9cd8b9f 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cfg.cpp
@@ -71,6 +71,30 @@ bblock_t::add_successor(void *mem_ctx, bblock_t
*successor)
children.push_tail(::link(mem_ctx, successor));
}
+bool
+bblock_t::is_predecessor_of(const bblock_t *block) const
+{
+ foreach_list_typed_safe (bblock_link, parent, link, block-parents) {
I read patch number three again, and noticed this small formatting change
there as well. I haven't seen us leaving the space before ( anywhere
else.
I figure I should have a space between the macro and the ( since we
put a space there for regular for loops.
Sounds reasonable.
+ if (parent-block == this) {
+ return true;
+ }
We have one line blocks with and without {}. I just thought I mention in
case you didn't mean to.
Right, I'll drop the {}.
Oh, this is inside another {} set. I'd rather include the braces when
they're nested.
This also.
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[Mesa-dev] [PATCH] clover: Add support for CL_MAP_WRITE_INVALIDATE_REGION
OpenCL 1.2 CL_MAP_WRITE_INVALIDATE_REGION sounds a lot like
PIPE_TRANSFER_DISCARD_RANGE:
From OpenCL 1.2 spec:
The contents of the region being mapped are to be discarded.
From p_defines.h:
Discards the memory within the mapped region.
---
src/gallium/state_trackers/clover/core/resource.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core/resource.cpp
b/src/gallium/state_trackers/clover/core/resource.cpp
index 7b8a40a..f7d24ef 100644
--- a/src/gallium/state_trackers/clover/core/resource.cpp
+++ b/src/gallium/state_trackers/clover/core/resource.cpp
@@ -172,8 +172,14 @@ mapping::mapping(command_queue q, resource r,
const resource::vector origin,
const resource::vector region) :
pctx(q.pipe) {
+ if (((flags CL_MAP_WRITE) || (flags CL_MAP_READ))
+(flags CL_MAP_WRITE_INVALIDATE_REGION))
+ throw error(CL_INVALID_VALUE);
+
unsigned usage = ((flags CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) |
(flags CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) |
+ (flags CL_MAP_WRITE_INVALIDATE_REGION ?
+PIPE_TRANSFER_DISCARD_RANGE : 0) |
(!blocking ? PIPE_TRANSFER_UNSYNCHRONIZED : 0));
p = pctx-transfer_map(pctx, r.pipe, 0, usage,
--
2.0.4
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Re: [Mesa-dev] [PATCH 05/20] i965/cfg: Add a foreach_inst_in_block_safe macro.
On Wed, Aug 06, 2014 at 11:16:20AM -0700, Matt Turner wrote:
On Wed, Aug 6, 2014 at 5:22 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Tue, Aug 05, 2014 at 09:14:55PM +0300, Pohjolainen, Topi wrote:
On Thu, Jul 24, 2014 at 07:54:12PM -0700, Matt Turner wrote:
---
src/mesa/drivers/dri/i965/brw_cfg.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.h
b/src/mesa/drivers/dri/i965/brw_cfg.h
index a5d2df5..913a1ed 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.h
+++ b/src/mesa/drivers/dri/i965/brw_cfg.h
@@ -120,6 +120,14 @@ struct cfg_t {
__inst != __block-end-next; \
__inst = (__type *)__inst-next)
+#define foreach_inst_in_block_safe(__type, __inst, __block)\
+ for (__type *__inst = (__type *)__block-start, \
+ *__next = (__type *)__inst-next, \
+ *__end = (__type *)__block-end-next-next;\
Patches 4 and 7 make sense but the double -next-next here is not obvious
to me.
Right, yep. exec_list uses head and tail sentinels, so the double-next
handles that. Explained below:
I tried handwriting instructions into blocks (this is purely arbitrary):
ipopcode
--
0 : BRW_OPCODE_?
..
k : BRW_OPCODE_IF
k+1: BRW_OPCODE_?
..
n : BRW_OPCODE_ELSE
n+1: BRW_OPCODE_?
..
m : BRW_OPCODE_ENDIF
m+1: BRW_OPCODE_?
..
t : BRW_OPCODE_?
Following the logic in the constructor of cfg_t, I would deduce this:
block 0:
start_ip = 0
num = 0
start = inst_0
end = inst_k (if)
block 1:
start_ip = k+1
num = 1
start = inst_k+1
end = inst_n (else)
block 2:
start_ip = n+1
num = 2
start = inst_n+1
end = inst_m-1
block 3:
start_ip = m
num = 3
start = inst_m(endif)
end = inst_t
And as instructions are inherited from exec_node, for block 3 end-next
should be NULL, right?
Since exec_list uses head and tail sentinels, so block[3]-end-next
will actually be the tail sentinel (and block[2]-end-next will be
the first instruction of block[3]).
The __end variable prevents us from dereferencing NULL if we remove
the last instruction in a block (and therefore remove the block). Note
that the continuing condition is (__next != __end). For each block, we
want to iterate through the instructions until we hit
block-end-next-next because if the block
- isn't the last block, end-next-next will be two nodes (I say
node, rather than instruction because of the tail sentinel) after the
end
- is the last block, end-next-next will be NULL.
In both cases we want to compare with __next, which after the
iteration is one past the node after block-end.
Does that make sense? There are really two things to remember: (1)
head and tail sentinels, and (2) this macro is _safe, so we're
comparing with __next (i.e., one past the end).
It does, I missed the sentinels, thanks for taking time to explain it. Patches
4,5,7 and 8 are
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
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Re: [Mesa-dev] [PATCH] clover: Add support for CL_MAP_WRITE_INVALIDATE_REGION
Bruno Jiménez brunoji...@gmail.com writes:
OpenCL 1.2 CL_MAP_WRITE_INVALIDATE_REGION sounds a lot like
PIPE_TRANSFER_DISCARD_RANGE:
From OpenCL 1.2 spec:
The contents of the region being mapped are to be discarded.
From p_defines.h:
Discards the memory within the mapped region.
---
src/gallium/state_trackers/clover/core/resource.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core/resource.cpp
b/src/gallium/state_trackers/clover/core/resource.cpp
index 7b8a40a..f7d24ef 100644
--- a/src/gallium/state_trackers/clover/core/resource.cpp
+++ b/src/gallium/state_trackers/clover/core/resource.cpp
@@ -172,8 +172,14 @@ mapping::mapping(command_queue q, resource r,
const resource::vector origin,
const resource::vector region) :
pctx(q.pipe) {
+ if (((flags CL_MAP_WRITE) || (flags CL_MAP_READ))
+(flags CL_MAP_WRITE_INVALIDATE_REGION))
+ throw error(CL_INVALID_VALUE);
+
This parameter check belongs in the front-end (clover/api/transfer.cpp).
Otherwise looks OK to me.
unsigned usage = ((flags CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) |
(flags CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) |
+ (flags CL_MAP_WRITE_INVALIDATE_REGION ?
+PIPE_TRANSFER_DISCARD_RANGE : 0) |
(!blocking ? PIPE_TRANSFER_UNSYNCHRONIZED : 0));
p = pctx-transfer_map(pctx, r.pipe, 0, usage,
--
2.0.4
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Re: [Mesa-dev] [PATCH v2 0/12] Add support for BPTC texture compression
Chris Forbes chr...@ijw.co.nz writes: Does this actually work on all Gen7? The IVB PRM Vol 4 Part 1 Page 83 says: Errata: BC6H_SF16, BC6H_UF16, and BC7_SRGB are not supported and may result in data corruption if used. I'm pretty sure this is referring to pre-production hardware and unfortunately this erratum is left in the PRM due to the way the documentation is generated. I've run the piglit tests on an IvyBridge laptop and they do all pass. The piglit tests include tests for all three of those formats and there is a pretty exhaustive one for the two half-float formats. Thanks for taking a look at it. Regards, - Neil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 04/12] mesa/format_info: Add support for the BPTC layout
Jason Ekstrand ja...@jlekstrand.net writes: Sorry, said that just a little early. Do we really want 4 bits for a floating-point format? How many bits does nvidia report? NVidia reports the RGB components as 8/8/8 for the two normalized formats and 32/32/32 for the two half-float formats. I think the 8 makes some sense because the interpolation phase of the decompression is done on an 8-bit value so it you wanted to accurately store all of the potential values of the decompressed image you would need 8 bits. The 32 bits is a bit more weird because the decompressor can only generate half-float values so at most 16 bits should be needed. I don't know what it says for the alpha components because I just now realised that I made a mistake in the quick test code that I wrote late last night when I had access to an NVidia card. It also says 8/8/8 for the DXT3 and DXT5 formats of S3TC so I guess if we wanted to copy what NVidia does we could also change the bits we report for those formats. Regards, - Neil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/6] Add support for BPTC texture compression
Kristian Høgsberg k...@bitplanet.net writes: That's a great reference image. Do you have a version of the image compressed with nVidias online compressor? I finally got access to an NVidia card last night so I've added an image from their online compressor to the bottom of that page. http://busydoingnothing.co.uk/doge/ Apparently NVidia's driver is powered by some sort of magic because it looks indistinguishable to my eye compared to the original image and it took no noticeable time to compress. I zoomed in on it with the Gimp to verify that it is actually different, and it is a little bit. Changing the compressor hint makes no difference and the resulting image is byte-for-byte identical. Regards, - Neil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: Drop USE_IEEE define.
On 08/06/2014 05:54 PM, Matt Turner wrote: I think OpenVMS was the only platform that Mesa ran on that used a non-IEEE representation for floats. We removed OpenVMS support a while back, and this should alleviate the need to continue updating the this-platform-uses-IEEE list. The one bit of this patch that needs review is the IS_INF_OR_NAN, because I'm not sure if MSVC supports isfinite. Bugzilla: https://urldefense.proofpoint.com/v1/url?u=https://bugs.freedesktop.org/show_bug.cgi?id%3D82268k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=lGQMzzTgII0I7jefp2FHq7WtZ%2BTLs8wadB%2BiIj9xpBY%3D%0Am=qpFrFaVk9Le%2Fvop6RCMCcKv5D0yZLSihxGjqPEOSVqA%3D%0As=347af2b199daf0bee356bc0d21fbc6d1ffb166984c7efb70271c6faf3fb52fcb --- src/mesa/main/compiler.h| 18 -- src/mesa/main/imports.h | 27 +++ src/mesa/main/macros.h | 2 +- src/mesa/program/prog_execute.c | 5 - 4 files changed, 4 insertions(+), 48 deletions(-) Looks OK to me. The MSVC build seems fine with this patch. Reviewed-by: Brian Paul bri...@vmware.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] util: add src/util/format_srgb.c to .gitignore
format_srgb.c is generated by format_srgb.py python script, having format_srgb.c in git ignore list will silence git complaints about untracked file. Signed-off-by: Juha-Pekka Heikkila juhapekka.heikk...@gmail.com --- src/util/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 src/util/.gitignore diff --git a/src/util/.gitignore b/src/util/.gitignore new file mode 100644 index 000..e945ecb --- /dev/null +++ b/src/util/.gitignore @@ -0,0 +1 @@ +format_srgb.c -- 2.0.0.rc4.1.g4a28f16 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/3] cl workdim v2
Jan Vesely jan.ves...@rutgers.edu writes: This respin includes Francisco's approach of providing implicit in the arg vector passed from clover, and Tom's idea of appending implicit args after the kernel args. Hmmm... Maybe it would make sense to add some sort of versioning (e.g. as part of the target triple) to the binary interface between clover and the kernel instead, so we can handle this sort of non-backwards compatible changes and the compiler back-end and libclc have some way to find out whether some specific feature is available and e.g. some specific extension should be enabled. I assumed it's not safe to modify exec.input, so the input vector is copied before appending work dim. Why wouldn't it be safe? You just need to make sure they're appended before the compute state is created. Passes get-work-dim piglit on turks without any regression, I have not tested SI as I don't have the hw. jan Jan Vesely (3): gallium: Pass input data size to launch_grid clover: Add work dimension implicit param to input r600,radeonsi: Copy implicit args provided by clover src/gallium/drivers/ilo/ilo_gpgpu.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 4 +- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 2 +- src/gallium/drivers/r600/evergreen_compute.c | 14 +- src/gallium/drivers/r600/evergreen_compute.h | 1 - src/gallium/drivers/radeonsi/si_compute.c | 6 +- src/gallium/include/pipe/p_context.h | 2 +- src/gallium/state_trackers/clover/core/kernel.cpp | 162 -- src/gallium/tests/trivial/compute.c | 40 +++--- 10 files changed, 122 insertions(+), 113 deletions(-) -- 1.9.3 pgpsDxcX29drE.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/6] r600g: remove useless r600_resource_va calls
On Wed, Aug 6, 2014 at 5:49 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
R600-R700 don't support virtual memory.
For consistency, it might be nice to use gpu_address here as well, but
just set it to 0 for 6xx/7xx. Either way, series is:
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/drivers/r600/r600_state.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_state.c
b/src/gallium/drivers/r600/r600_state.c
index 258ffd1..607b199 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -595,25 +595,22 @@ texture_buffer_sampler_view(struct
r600_pipe_sampler_view *view,
unsigned width0, unsigned height0)
{
- struct pipe_context *ctx = view-base.context;
struct r600_texture *tmp = (struct r600_texture*)view-base.texture;
- uint64_t va;
int stride = util_format_get_blocksize(view-base.format);
unsigned format, num_format, format_comp, endian;
- unsigned offset = view-base.u.buf.first_element * stride;
+ uint64_t offset = view-base.u.buf.first_element * stride;
unsigned size = (view-base.u.buf.last_element -
view-base.u.buf.first_element + 1) * stride;
r600_vertex_data_type(view-base.format,
format, num_format, format_comp,
endian);
- va = r600_resource_va(ctx-screen, view-base.texture) + offset;
view-tex_resource = tmp-resource;
-
view-skip_mip_address_reloc = true;
- view-tex_resource_words[0] = va;
+
+ view-tex_resource_words[0] = offset;
view-tex_resource_words[1] = size - 1;
- view-tex_resource_words[2] = S_038008_BASE_ADDRESS_HI(va 32UL) |
+ view-tex_resource_words[2] = S_038008_BASE_ADDRESS_HI(offset
32UL) |
S_038008_STRIDE(stride) |
S_038008_DATA_FORMAT(format) |
S_038008_NUM_FORMAT_ALL(num_format) |
@@ -1105,8 +1102,7 @@ static void r600_init_depth_surface(struct r600_context
*rctx,
/* use htile only for first level */
if (rtex-htile_buffer !level) {
- uint64_t va = r600_resource_va(rctx-screen-b.b,
rtex-htile_buffer-b.b);
- surf-db_htile_data_base = va 8;
+ surf-db_htile_data_base = 0;
surf-db_htile_surface = S_028D24_HTILE_WIDTH(1) |
S_028D24_HTILE_HEIGHT(1) |
S_028D24_FULL_CACHE(1) |
@@ -1944,7 +1940,6 @@ static void r600_emit_shader_stages(struct r600_context
*rctx, struct r600_atom
static void r600_emit_gs_rings(struct r600_context *rctx, struct r600_atom
*a)
{
- struct pipe_screen *screen = rctx-b.b.screen;
struct radeon_winsys_cs *cs = rctx-b.rings.gfx.cs;
struct r600_gs_rings_state *state = (struct r600_gs_rings_state*)a;
struct r600_resource *rbuffer;
@@ -1955,8 +1950,7 @@ static void r600_emit_gs_rings(struct r600_context
*rctx, struct r600_atom *a)
if (state-enable) {
rbuffer =(struct r600_resource*)state-esgs_ring.buffer;
- r600_write_config_reg(cs, R_008C40_SQ_ESGS_RING_BASE,
- (r600_resource_va(screen, rbuffer-b.b))
8);
+ r600_write_config_reg(cs, R_008C40_SQ_ESGS_RING_BASE, 0);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, r600_context_bo_reloc(rctx-b,
rctx-b.rings.gfx, rbuffer,
RADEON_USAGE_READWRITE,
@@ -1965,8 +1959,7 @@ static void r600_emit_gs_rings(struct r600_context
*rctx, struct r600_atom *a)
state-esgs_ring.buffer_size 8);
rbuffer =(struct r600_resource*)state-gsvs_ring.buffer;
- r600_write_config_reg(cs, R_008C48_SQ_GSVS_RING_BASE,
- (r600_resource_va(screen, rbuffer-b.b))
8);
+ r600_write_config_reg(cs, R_008C48_SQ_GSVS_RING_BASE, 0);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, r600_context_bo_reloc(rctx-b,
rctx-b.rings.gfx, rbuffer,
RADEON_USAGE_READWRITE,
@@ -2644,8 +2637,7 @@ void r600_update_gs_state(struct pipe_context *ctx,
struct r600_pipe_shader *sha
r600_store_context_reg(cb, R_02887C_SQ_PGM_RESOURCES_GS,
S_02887C_NUM_GPRS(rshader-bc.ngpr) |
S_02887C_STACK_SIZE(rshader-bc.nstack));
- r600_store_context_reg(cb, R_02886C_SQ_PGM_START_GS,
- r600_resource_va(ctx-screen, (void
*)shader-bo) 8);
+ r600_store_context_reg(cb, R_02886C_SQ_PGM_START_GS, 0);
/*
Re: [Mesa-dev] [PATCH] clover: Add support for CL_MAP_WRITE_INVALIDATE_REGION
On Thu, 2014-08-07 at 14:57 +0300, Francisco Jerez wrote:
Bruno Jiménez brunoji...@gmail.com writes:
OpenCL 1.2 CL_MAP_WRITE_INVALIDATE_REGION sounds a lot like
PIPE_TRANSFER_DISCARD_RANGE:
From OpenCL 1.2 spec:
The contents of the region being mapped are to be discarded.
From p_defines.h:
Discards the memory within the mapped region.
---
src/gallium/state_trackers/clover/core/resource.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core/resource.cpp
b/src/gallium/state_trackers/clover/core/resource.cpp
index 7b8a40a..f7d24ef 100644
--- a/src/gallium/state_trackers/clover/core/resource.cpp
+++ b/src/gallium/state_trackers/clover/core/resource.cpp
@@ -172,8 +172,14 @@ mapping::mapping(command_queue q, resource r,
const resource::vector origin,
const resource::vector region) :
pctx(q.pipe) {
+ if (((flags CL_MAP_WRITE) || (flags CL_MAP_READ))
+(flags CL_MAP_WRITE_INVALIDATE_REGION))
+ throw error(CL_INVALID_VALUE);
+
This parameter check belongs in the front-end (clover/api/transfer.cpp).
Otherwise looks OK to me.
Sure, I will add a 'validate_flags' function for it.
unsigned usage = ((flags CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) |
(flags CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) |
+ (flags CL_MAP_WRITE_INVALIDATE_REGION ?
+PIPE_TRANSFER_DISCARD_RANGE : 0) |
(!blocking ? PIPE_TRANSFER_UNSYNCHRONIZED : 0));
p = pctx-transfer_map(pctx, r.pipe, 0, usage,
--
2.0.4
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[Mesa-dev] [PATCH] winsys/radeon: use zero sized buffers for fences if the kernel supports it
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/pipebuffer/pb_buffer.h | 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h
b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
index 03bdce3..531f05e 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
@@ -196,7 +196,7 @@ pb_get_base_buffer( struct pb_buffer *buf,
assert(buf-vtbl-get_base_buffer);
buf-vtbl-get_base_buffer(buf, base_buf, offset);
assert(*base_buf);
- assert(*offset (*base_buf)-size);
+ assert(*offset (*base_buf)-size || !(*base_buf)-size);
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 73f8d38..6361879 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -532,7 +532,7 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct
pb_manager *_mgr,
bo-initial_domain = rdesc-initial_domains;
pipe_mutex_init(bo-map_mutex);
-if (mgr-va) {
+if (mgr-va size) {
struct drm_radeon_gem_va va;
bo-va = radeon_bomgr_find_va(mgr, size, desc-alignment);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index a06ecb2..faf99e9 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -602,10 +602,11 @@ static struct pipe_fence_handle *
radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
+unsigned size = cs-ws-info.drm_minor = 40 ? 0 : 1;
struct pb_buffer *fence;
/* Create a fence, which is a dummy BO. */
-fence = cs-ws-base.buffer_create(cs-ws-base, 1, 1, TRUE,
+fence = cs-ws-base.buffer_create(cs-ws-base, size, 0, TRUE,
RADEON_DOMAIN_GTT, 0);
/* Add the fence as a dummy relocation. */
cs-ws-base.cs_add_reloc(rcs, cs-ws-base.buffer_get_cs_handle(fence),
--
1.9.1
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Re: [Mesa-dev] [PATCH 0/6] Add support for BPTC texture compression
Am 07.08.2014 14:30, schrieb Neil Roberts: Kristian Høgsberg k...@bitplanet.net writes: That's a great reference image. Do you have a version of the image compressed with nVidias online compressor? I finally got access to an NVidia card last night so I've added an image from their online compressor to the bottom of that page. https://urldefense.proofpoint.com/v1/url?u=http://busydoingnothing.co.uk/doge/k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=F4msKE2WxRzA%2BwN%2B25muztFm5TSPwE8HKJfWfR2NgfY%3D%0Am=CGSAZSTw9Un5ItoSGQ8sSdQn8W9K0TvyiPG2a5VuGBY%3D%0As=5d3b47158c2e45f532200334cb2e6a584fc16a357f259e25113089e6052d3e43 Apparently NVidia's driver is powered by some sort of magic because it looks indistinguishable to my eye compared to the original image and it took no noticeable time to compress. I zoomed in on it with the Gimp to verify that it is actually different, and it is a little bit. Changing the compressor hint makes no difference and the resulting image is byte-for-byte identical. If it is computationally intensive, maybe they are doing it on the gpu? Though I guess in this case the time would be different if you'd run it on a GT 520 or a GTX 780 :-). Roland ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2] clover: Add support for CL_MAP_WRITE_INVALIDATE_REGION
OpenCL 1.2 CL_MAP_WRITE_INVALIDATE_REGION sounds a lot like
PIPE_TRANSFER_DISCARD_RANGE:
From OpenCL 1.2 spec:
The contents of the region being mapped are to be discarded.
From p_defines.h:
Discards the memory within the mapped region.
v2: Move the code for validating flags to the front-end as
suggested by Francisco Jerez
---
src/gallium/state_trackers/clover/api/transfer.cpp | 13 +
src/gallium/state_trackers/clover/core/resource.cpp | 2 ++
2 files changed, 15 insertions(+)
diff --git a/src/gallium/state_trackers/clover/api/transfer.cpp
b/src/gallium/state_trackers/clover/api/transfer.cpp
index 07d8a73..37c3074 100644
--- a/src/gallium/state_trackers/clover/api/transfer.cpp
+++ b/src/gallium/state_trackers/clover/api/transfer.cpp
@@ -168,6 +168,17 @@ namespace {
}
///
+ /// Checks that the mapping flags are correct
+ ///
+ void
+ validate_flags(const cl_map_flags flags) {
+ if (((flags CL_MAP_WRITE) || (flags CL_MAP_READ))
+ (flags CL_MAP_WRITE_INVALIDATE_REGION))
+ throw error(CL_INVALID_VALUE);
+ }
+
+
+ ///
/// Class that encapsulates the task of mapping an object of type
/// \a T. The return value of get() should be implicitly
/// convertible to \a void *.
@@ -629,6 +640,7 @@ clEnqueueMapBuffer(cl_command_queue d_q, cl_mem d_mem,
cl_bool blocking,
validate_common(q, deps);
validate_object(q, mem, obj_origin, obj_pitch, region);
+ validate_flags(flags);
void *map = mem.resource(q).add_map(q, flags, blocking, obj_origin, region);
@@ -656,6 +668,7 @@ clEnqueueMapImage(cl_command_queue d_q, cl_mem d_mem,
cl_bool blocking,
validate_common(q, deps);
validate_object(q, img, origin, region);
+ validate_flags(flags);
void *map = img.resource(q).add_map(q, flags, blocking, origin, region);
diff --git a/src/gallium/state_trackers/clover/core/resource.cpp
b/src/gallium/state_trackers/clover/core/resource.cpp
index 7b8a40a..34c0cd5 100644
--- a/src/gallium/state_trackers/clover/core/resource.cpp
+++ b/src/gallium/state_trackers/clover/core/resource.cpp
@@ -174,6 +174,8 @@ mapping::mapping(command_queue q, resource r,
pctx(q.pipe) {
unsigned usage = ((flags CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) |
(flags CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) |
+ (flags CL_MAP_WRITE_INVALIDATE_REGION ?
+PIPE_TRANSFER_DISCARD_RANGE : 0) |
(!blocking ? PIPE_TRANSFER_UNSYNCHRONIZED : 0));
p = pctx-transfer_map(pctx, r.pipe, 0, usage,
--
2.0.4
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Re: [Mesa-dev] [PATCH] RFC: glsl/glcpp: Allow for '#' characters to appear in shader body
On Tue, Aug 5, 2014 at 11:22 PM, Carl Worth cwo...@cworth.org wrote:
Kenneth Graunke kenn...@whitecape.org writes:
I agree that this is pretty bogus.
I'm coming around to thinking it's totally bogus.
How about emitting a warning in the RETURN_TOKEN ('#') case?
Thanks for the review, and thanks for suggesting the warning. I added
the warning, then decided it needed some additional testing. So I
whipped up a test that uses every possible non-identifier character
to separate a macro name from its definition, like so:
#define S* splat
(defining a macro S to expand to * splat). This is first patch
attached below.
With this test, there's the question of whether it's even legal to have
no space between a macro name and the replacement list in a macro
definition. As usual, the GLSL specification is mute on the question,
(deferring just to as is standard for C++). If we choose GCC as the
standard, it does accept this case, (and emits a missing space
warning). By accident, glcpp has always silently accepted this, until
recently barfing, but only when '#' was the separating character.
My next patch expanded this new test so that '#' is tested as well, (and
ensuring the warning about the known-bogus '#' character was
emitted). This is the second patch attached below.
The expanded test looks really odd to me. Even though there are
something like two-dozen pieces of punctuation used a separators, only
the case with '#' emits a warning.
The insight is that the warning really has nothing to do with #define
FOO* but everything to do with the '#' character appearing out of
proper context. So what we really want is better testing of illegal
characters in various contexts.
So I wrote two additional new tests. The first runs every possible legal
character through glcpp, ensuring they are all passed through correctly.
It turns out this test caught a long-standing bug, (glcpp was tripping
up on vertical tab and form-feed for which the GLSL specification is
explicit should be allowed). The second test runs every possible illegal
character through glcpp, ensuring that an error is generated for each.
Instead of attaching those two tests, I'll send patches for them to the
list. They're independent of the current discussion.
And what was _really_ striking when looking at the final test (as I
first wrote it, but not as I will submit it), is that every illegal
character was generating an error message except for '#' which was just
generating a warning. So that sealed it for me that this treatment is
bogus.
So I'm inclined to leave Mesa breaking Reaction Quake, (but I'll
go file a bug against that application).
Now, what we could do if we were so inclined, would be to defer the
errors for illegal characters until they actually appeared in the
pre-processor output. That, is, a line such as:
$
would be an immediate error, (Illegal character '$'), but a line such
as:
#define DOLLAR $
would be accepted with no error in and of itself, (the illegal character
has appeared in a replacement list, but may not ever appear in the
output to be seen by the compiler). Then, a subsequent line such as:
DOLLAR
would then emit the Illegal character '$' error.
If we had all of that in place, that would un-break Reaction Quake in a
way that wouldn't feel creepy to me, (and none of the tests would have
odd-looking exceptional behavior).
What you describe here seems to actually be what the standard requires:
The relevant bit of the parse rule for a define statement of this type
is like so (Section 16 [cpp] of the C++ spec):
# define identifier replacement-list new-line
...And:
replacement-list:
pp-tokens(opt)
pp-tokens:
preprocessing-token
pp-tokens preprocessing-token
And Section 2.4 [lex.pptoken] defines:
preprocessing-token:
header-name
identifier
pp-number
character-literal
string-literal
preprocessing-op-or-punc
each non-white-space character that cannot be one of the above
So, from the preprocessor's point of view, '#' is allowed in a macro,
as it matches preprocessing-op-or-punc (or if we consider the #
operator removed from the cpp-spec due to lack of strings, it still
matches that each non-white-space character that cannot be one of the
above-rule). It's AFAICT not until such a pp-token gets converted to
a glsl-token that this might become an error. And (as you kind of
pointed out), if a macro is never used, it never gets converted.
Note that '$' is a bit different, as it's not a part of the
preprocessor's character set, so using it might be interpreted as
undefined behavior.
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Re: [Mesa-dev] [PATCH 13/20] i965: Use basic-block aware insertion/removal functions.
On Thu, Jul 24, 2014 at 07:54:20PM -0700, Matt Turner wrote:
To avoid invalidating and recreating the control flow graph. Also stop
invalidating the CFG in places we didn't add or remove an instruction.
cfg calculations: 202951 - 80307 (-60.43%)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 45
+-
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 8 ++--
.../dri/i965/brw_fs_dead_code_eliminate.cpp| 6 +--
.../drivers/dri/i965/brw_fs_register_coalesce.cpp | 7 ++--
.../dri/i965/brw_fs_saturate_propagation.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 ++---
.../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 8 ++--
9 files changed, 50 insertions(+), 40 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 59d46e8..30fc137 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -46,6 +46,7 @@ extern C {
#include brw_wm.h
}
#include brw_fs.h
+#include brw_cfg.h
#include brw_dead_control_flow.h
#include main/uniforms.h
#include brw_fs_live_variables.h
@@ -1695,7 +1696,7 @@ fs_visitor::split_virtual_grfs()
}
}
}
- invalidate_live_intervals();
+ invalidate_live_intervals(false);
}
/**
@@ -1733,7 +1734,7 @@ fs_visitor::compact_virtual_grfs()
if (remap_table[i] != -1) {
remap_table[i] = new_index;
virtual_grf_sizes[new_index] = virtual_grf_sizes[i];
- invalidate_live_intervals();
+ invalidate_live_intervals(false);
++new_index;
}
}
@@ -1902,7 +1903,9 @@ fs_visitor::assign_constant_locations()
void
fs_visitor::demote_pull_constants()
{
- foreach_in_list(fs_inst, inst, instructions) {
+ calculate_cfg();
+
+ foreach_block_and_inst (block, fs_inst, inst, cfg) {
for (int i = 0; i inst-sources; i++) {
if (inst-src[i].file != UNIFORM)
continue;
@@ -1925,14 +1928,14 @@ fs_visitor::demote_pull_constants()
surf_index,
*inst-src[i].reladdr,
pull_index);
-inst-insert_before(list);
+inst-insert_before(block, list);
inst-src[i].reladdr = NULL;
} else {
fs_reg offset = fs_reg((unsigned)(pull_index * 4) ~15);
fs_inst *pull =
new(mem_ctx) fs_inst(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD,
dst, surf_index, offset);
-inst-insert_before(pull);
+inst-insert_before(block, pull);
inst-src[i].set_smear(pull_index 3);
}
@@ -1942,7 +1945,7 @@ fs_visitor::demote_pull_constants()
inst-src[i].reg_offset = 0;
}
}
- invalidate_live_intervals();
+ invalidate_live_intervals(false);
}
bool
@@ -2232,7 +2235,9 @@ fs_visitor::remove_duplicate_mrf_writes()
memset(last_mrf_move, 0, sizeof(last_mrf_move));
- foreach_in_list_safe(fs_inst, inst, instructions) {
+ calculate_cfg();
+
+ foreach_block_and_inst_safe (block, fs_inst, inst, cfg) {
if (inst-is_control_flow()) {
memset(last_mrf_move, 0, sizeof(last_mrf_move));
}
@@ -2241,7 +2246,7 @@ fs_visitor::remove_duplicate_mrf_writes()
inst-dst.file == MRF) {
fs_inst *prev_inst = last_mrf_move[inst-dst.reg];
if (prev_inst inst-equals(prev_inst)) {
- inst-remove();
+ inst-remove(block);
progress = true;
continue;
}
@@ -2280,7 +2285,7 @@ fs_visitor::remove_duplicate_mrf_writes()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_live_intervals(false);
return progress;
}
@@ -2515,7 +2520,9 @@ fs_visitor::insert_gen4_send_dependency_workarounds()
void
fs_visitor::lower_uniform_pull_constant_loads()
{
- foreach_in_list(fs_inst, inst, instructions) {
+ calculate_cfg();
+
+ foreach_block_and_inst (block, fs_inst, inst, cfg) {
if (inst-opcode != FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD)
continue;
@@ -2540,7 +2547,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
setup-ir = inst-ir;
setup-annotation = inst-annotation;
- inst-insert_before(setup);
+ inst-insert_before(block, setup);
/* Similarly, this will only populate the first 4 channels of the
* result register (since we only use smear values from 0-3), but we
@@ -2549,7 +2556,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
inst-opcode = FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7;
inst-src[1] =
Re: [Mesa-dev] [PATCH 12/20] i965: Add invalidate_cfg parameter to invalidate_live_intervals().
On Thu, Jul 24, 2014 at 07:54:19PM -0700, Matt Turner wrote: Will let us avoid invalidating the CFG if the optimization pass has removed instructions using the new basic block methods. --- src/mesa/drivers/dri/i965/brw_fs.h| 2 +- src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 5 +++-- src/mesa/drivers/dri/i965/brw_shader.h| 2 +- src/mesa/drivers/dri/i965/brw_vec4.h | 2 +- src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp | 5 +++-- 5 files changed, 9 insertions(+), 7 deletions(-) Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: Drop USE_IEEE define.
On Thu, Aug 7, 2014 at 5:35 AM, Brian Paul bri...@vmware.com wrote: On 08/06/2014 05:54 PM, Matt Turner wrote: I think OpenVMS was the only platform that Mesa ran on that used a non-IEEE representation for floats. We removed OpenVMS support a while back, and this should alleviate the need to continue updating the this-platform-uses-IEEE list. The one bit of this patch that needs review is the IS_INF_OR_NAN, because I'm not sure if MSVC supports isfinite. Bugzilla: https://urldefense.proofpoint.com/v1/url?u=https://bugs.freedesktop.org/show_bug.cgi?id%3D82268k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=lGQMzzTgII0I7jefp2FHq7WtZ%2BTLs8wadB%2BiIj9xpBY%3D%0Am=qpFrFaVk9Le%2Fvop6RCMCcKv5D0yZLSihxGjqPEOSVqA%3D%0As=347af2b199daf0bee356bc0d21fbc6d1ffb166984c7efb70271c6faf3fb52fcb --- src/mesa/main/compiler.h| 18 -- src/mesa/main/imports.h | 27 +++ src/mesa/main/macros.h | 2 +- src/mesa/program/prog_execute.c | 5 - 4 files changed, 4 insertions(+), 48 deletions(-) Looks OK to me. The MSVC build seems fine with this patch. Reviewed-by: Brian Paul bri...@vmware.com Thanks Brian! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 14/20] i965/fs: Preserve CFG in register allocation.
On Thu, Jul 24, 2014 at 07:54:21PM -0700, Matt Turner wrote: --- src/mesa/drivers/dri/i965/brw_fs.h| 4 ++-- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 20 2 files changed, 14 insertions(+), 10 deletions(-) Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/3] cl workdim v2
On Thu, Aug 07, 2014 at 04:02:40PM +0300, Francisco Jerez wrote: Jan Vesely jan.ves...@rutgers.edu writes: This respin includes Francisco's approach of providing implicit in the arg vector passed from clover, and Tom's idea of appending implicit args after the kernel args. Hmmm... Maybe it would make sense to add some sort of versioning (e.g. as part of the target triple) to the binary interface between clover and the kernel instead, so we can handle this sort of non-backwards compatible changes and the compiler back-end and libclc have some way to find out whether some specific feature is available and e.g. some specific extension should be enabled. I was thinking the way to do this would be to use calling conventions on the kernel functions to specify which binary interface to use. However, I don't want to change the binary interface right now, because it is still missing a lot of things, and I don't want to have to change it every time we add something new. I think we should keep the current interface of: Offset | Data -|-- 0: Kernel Arguments sizeof(Kernel Inputs): work_dim sizeof(Kernel Inputs) + 4: ... We can always revisit this once clover is more mature and we think we have a binary interface that won't change. Although, personally I prefer adding implicit inputs to the end of the kernel arguments rather than having of them somewhere else. -Tom I assumed it's not safe to modify exec.input, so the input vector is copied before appending work dim. Why wouldn't it be safe? You just need to make sure they're appended before the compute state is created. Passes get-work-dim piglit on turks without any regression, I have not tested SI as I don't have the hw. jan Jan Vesely (3): gallium: Pass input data size to launch_grid clover: Add work dimension implicit param to input r600,radeonsi: Copy implicit args provided by clover src/gallium/drivers/ilo/ilo_gpgpu.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 4 +- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 2 +- src/gallium/drivers/r600/evergreen_compute.c | 14 +- src/gallium/drivers/r600/evergreen_compute.h | 1 - src/gallium/drivers/radeonsi/si_compute.c | 6 +- src/gallium/include/pipe/p_context.h | 2 +- src/gallium/state_trackers/clover/core/kernel.cpp | 162 -- src/gallium/tests/trivial/compute.c | 40 +++--- 10 files changed, 122 insertions(+), 113 deletions(-) -- 1.9.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] util: add src/util/format_srgb.c to .gitignore
Reviewed-by: Marek Olšák marek.ol...@amd.com Marek On Thu, Aug 7, 2014 at 2:58 PM, Juha-Pekka Heikkila juhapekka.heikk...@gmail.com wrote: format_srgb.c is generated by format_srgb.py python script, having format_srgb.c in git ignore list will silence git complaints about untracked file. Signed-off-by: Juha-Pekka Heikkila juhapekka.heikk...@gmail.com --- src/util/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 src/util/.gitignore diff --git a/src/util/.gitignore b/src/util/.gitignore new file mode 100644 index 000..e945ecb --- /dev/null +++ b/src/util/.gitignore @@ -0,0 +1 @@ +format_srgb.c -- 2.0.0.rc4.1.g4a28f16 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] winsys/radeon: use zero sized buffers for fences if the kernel supports it
On Thu, Aug 7, 2014 at 4:31 PM, Christian König deathsim...@vodafone.de wrote:
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/pipebuffer/pb_buffer.h | 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h
b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
index 03bdce3..531f05e 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
@@ -196,7 +196,7 @@ pb_get_base_buffer( struct pb_buffer *buf,
assert(buf-vtbl-get_base_buffer);
buf-vtbl-get_base_buffer(buf, base_buf, offset);
assert(*base_buf);
- assert(*offset (*base_buf)-size);
+ assert(*offset (*base_buf)-size || !(*base_buf)-size);
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 73f8d38..6361879 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -532,7 +532,7 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct
pb_manager *_mgr,
bo-initial_domain = rdesc-initial_domains;
pipe_mutex_init(bo-map_mutex);
-if (mgr-va) {
+if (mgr-va size) {
struct drm_radeon_gem_va va;
bo-va = radeon_bomgr_find_va(mgr, size, desc-alignment);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index a06ecb2..faf99e9 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -602,10 +602,11 @@ static struct pipe_fence_handle *
radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
+unsigned size = cs-ws-info.drm_minor = 40 ? 0 : 1;
This should be = 41.
With that fixed:
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
struct pb_buffer *fence;
/* Create a fence, which is a dummy BO. */
-fence = cs-ws-base.buffer_create(cs-ws-base, 1, 1, TRUE,
+fence = cs-ws-base.buffer_create(cs-ws-base, size, 0, TRUE,
RADEON_DOMAIN_GTT, 0);
/* Add the fence as a dummy relocation. */
cs-ws-base.cs_add_reloc(rcs, cs-ws-base.buffer_get_cs_handle(fence),
--
1.9.1
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[Mesa-dev] [PATCH] docs: List GL+GLSL versions as parts of a whole.
Listing the GLSL version as an individual component of a GL version, separate from the extensions isn't really right. The GLSL changes are (almost?) entirely comprised of changes listed in the extensions. --- docs/GL3.txt | 27 +-- 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index e241257..7f18cd7 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -18,9 +18,8 @@ are exposed in the 3.0 context as extensions. Feature Status - -GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.30 DONE () glBindFragDataLocation, glGetFragDataLocation DONE Conditional rendering (GL_NV_conditional_render) DONE (r300, swrast) Map buffer subranges (GL_ARB_map_buffer_range)DONE (r300, swrast) @@ -49,9 +48,8 @@ GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi Multisample anti-aliasing DONE (r300) -GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.1, GLSL 1.40 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.40 DONE () Forward compatible context support/deprecations DONE () Instanced drawing (GL_ARB_draw_instanced) DONE (swrast) Buffer copying (GL_ARB_copy_buffer) DONE (r300, swrast) @@ -63,10 +61,9 @@ GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi Signed normalized textures (GL_EXT_texture_snorm) DONE (r300) -GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi Core/compatibility profiles DONE - GLSL 1.50 DONE () Geometry shaders DONE () BGRA vertex order (GL_ARB_vertex_array_bgra) DONE (r300, swrast) Base vertex offset(GL_ARB_draw_elements_base_vertex) DONE (r300, swrast) @@ -79,9 +76,8 @@ GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi GLX_ARB_create_context_profileDONE -GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 3.30 DONE () GL_ARB_blend_func_extendedDONE (softpipe) GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL) GL_ARB_occlusion_query2 DONE (r300, swrast) @@ -94,9 +90,8 @@ GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi GL_ARB_vertex_type_2_10_10_10_rev DONE () -GL 4.0: +GL 4.0, GLSL 4.00: - GLSL 4.0 not started GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965, nvc0, radeonsi, softpipe, llvmpipe) GL_ARB_gpu_shader5 started @@ -124,9 +119,8 @@ GL 4.0: GL_ARB_transform_feedback3 DONE (i965, nv50, nvc0, r600, radeonsi) -GL 4.1: +GL 4.1, GLSL 4.10: - GLSL 4.1 not started GL_ARB_ES2_compatibility DONE (i965, nv50, nvc0, r300, r600, radeonsi) GL_ARB_get_program_binaryDONE (0 binary formats) GL_ARB_separate_shader_objects DONE (all drivers) @@ -135,9 +129,8 @@ GL 4.1: GL_ARB_viewport_arrayDONE (i965, nv50, nvc0, r600) -GL 4.2: +GL 4.2, GLSL 4.20: - GLSL 4.2 not started GL_ARB_texture_compression_bptc not started GL_ARB_compressed_texture_pixel_storage DONE (all drivers) GL_ARB_shader_atomic_countersDONE (i965) @@ -151,9 +144,8 @@ GL 4.2: GL_ARB_map_buffer_alignment DONE (all drivers) -GL 4.3: +GL 4.3, GLSL 4.30: - GLSL 4.3 not started GL_ARB_arrays_of_arrays started (Timothy) GL_ARB_ES3_compatibility DONE (i965) GL_ARB_clear_buffer_object DONE (all drivers) @@ -178,9 +170,8 @@ GL 4.3: GL_ARB_vertex_attrib_binding DONE (all drivers) -GL 4.4: +GL 4.4, GLSL 4.40: - GLSL 4.4 not started GL_MAX_VERTEX_ATTRIB_STRIDE not started GL_ARB_buffer_storageDONE (i965, nv30, nv50, nvc0, r300, r600, radeonsi)
[Mesa-dev] [PATCH] i965/vec4: Remove unused emit_bool_comparison method.
Apparently unused since it was added in commit af3c9803.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 14 --
2 files changed, 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3d0df77..950b592 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -486,7 +486,6 @@ public:
src_reg src0, src_reg src1, src_reg one);
void emit_bool_to_cond_code(ir_rvalue *ir, enum brw_predicate *predicate);
- void emit_bool_comparison(unsigned int op, dst_reg dst, src_reg src0,
src_reg src1);
void emit_if_gen6(ir_if *ir);
void emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 23d1dae..c46325a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1174,20 +1174,6 @@ vec4_visitor::try_emit_b2f_of_compare(ir_expression *ir)
}
void
-vec4_visitor::emit_bool_comparison(unsigned int op,
-dst_reg dst, src_reg src0, src_reg src1)
-{
- /* original gen4 does destination conversion before comparison. */
- if (brw-gen 5)
- dst.type = src0.type;
-
- emit(CMP(dst, src0, src1, brw_conditional_for_comparison(op)));
-
- dst.type = BRW_REGISTER_TYPE_D;
- emit(AND(dst, src_reg(dst), src_reg(0x1)));
-}
-
-void
vec4_visitor::emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
src_reg src0, src_reg src1)
{
--
1.8.5.5
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[Mesa-dev] [PATCH] glsl: Remove unused initialized field from gl_uniform_storage.
---
Should this have been used somewhere?
src/glsl/ir_uniform.h | 5 -
src/glsl/link_uniform_initializers.cpp | 4
src/glsl/link_uniforms.cpp | 1 -
src/mesa/main/uniform_query.cpp| 4
4 files changed, 14 deletions(-)
diff --git a/src/glsl/ir_uniform.h b/src/glsl/ir_uniform.h
index 2f73528..9c25507 100644
--- a/src/glsl/ir_uniform.h
+++ b/src/glsl/ir_uniform.h
@@ -116,11 +116,6 @@ struct gl_uniform_storage {
*/
unsigned array_elements;
- /**
-* Has this uniform ever been set?
-*/
- bool initialized;
-
struct gl_opaque_uniform_index sampler[MESA_SHADER_STAGES];
struct gl_opaque_uniform_index image[MESA_SHADER_STAGES];
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl/link_uniform_initializers.cpp
index c6fe6a9..809aae5 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -128,8 +128,6 @@ set_sampler_binding(gl_shader_program *prog, const char
*name, int binding)
}
}
}
-
- storage-initialized = true;
}
void
@@ -226,8 +224,6 @@ set_uniform_initializer(void *mem_ctx, gl_shader_program
*prog,
}
}
}
-
- storage-initialized = true;
}
}
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 3251097..f02a074 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -580,7 +580,6 @@ private:
this-uniforms[id].name = ralloc_strdup(this-uniforms, name);
this-uniforms[id].type = base_type;
- this-uniforms[id].initialized = 0;
this-uniforms[id].num_driver_storage = 0;
this-uniforms[id].driver_storage = NULL;
this-uniforms[id].storage = this-values;
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 609d94b..88012dd 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -806,8 +806,6 @@ _mesa_uniform(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
/* If the uniform is a sampler, do the extra magic necessary to propagate
@@ -982,8 +980,6 @@ _mesa_uniform_matrix(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
}
--
1.8.5.5
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Re: [Mesa-dev] [PATCH] docs: List GL+GLSL versions as parts of a whole.
Reviewed-by: Marek Olšák marek.ol...@amd.com Marek On Thu, Aug 7, 2014 at 7:35 PM, Matt Turner matts...@gmail.com wrote: Listing the GLSL version as an individual component of a GL version, separate from the extensions isn't really right. The GLSL changes are (almost?) entirely comprised of changes listed in the extensions. --- docs/GL3.txt | 27 +-- 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index e241257..7f18cd7 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -18,9 +18,8 @@ are exposed in the 3.0 context as extensions. Feature Status - -GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.30 DONE () glBindFragDataLocation, glGetFragDataLocation DONE Conditional rendering (GL_NV_conditional_render) DONE (r300, swrast) Map buffer subranges (GL_ARB_map_buffer_range)DONE (r300, swrast) @@ -49,9 +48,8 @@ GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi Multisample anti-aliasing DONE (r300) -GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.1, GLSL 1.40 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.40 DONE () Forward compatible context support/deprecations DONE () Instanced drawing (GL_ARB_draw_instanced) DONE (swrast) Buffer copying (GL_ARB_copy_buffer) DONE (r300, swrast) @@ -63,10 +61,9 @@ GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi Signed normalized textures (GL_EXT_texture_snorm) DONE (r300) -GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi Core/compatibility profiles DONE - GLSL 1.50 DONE () Geometry shaders DONE () BGRA vertex order (GL_ARB_vertex_array_bgra) DONE (r300, swrast) Base vertex offset(GL_ARB_draw_elements_base_vertex) DONE (r300, swrast) @@ -79,9 +76,8 @@ GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi GLX_ARB_create_context_profileDONE -GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 3.30 DONE () GL_ARB_blend_func_extendedDONE (softpipe) GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL) GL_ARB_occlusion_query2 DONE (r300, swrast) @@ -94,9 +90,8 @@ GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi GL_ARB_vertex_type_2_10_10_10_rev DONE () -GL 4.0: +GL 4.0, GLSL 4.00: - GLSL 4.0 not started GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965, nvc0, radeonsi, softpipe, llvmpipe) GL_ARB_gpu_shader5 started @@ -124,9 +119,8 @@ GL 4.0: GL_ARB_transform_feedback3 DONE (i965, nv50, nvc0, r600, radeonsi) -GL 4.1: +GL 4.1, GLSL 4.10: - GLSL 4.1 not started GL_ARB_ES2_compatibility DONE (i965, nv50, nvc0, r300, r600, radeonsi) GL_ARB_get_program_binaryDONE (0 binary formats) GL_ARB_separate_shader_objects DONE (all drivers) @@ -135,9 +129,8 @@ GL 4.1: GL_ARB_viewport_arrayDONE (i965, nv50, nvc0, r600) -GL 4.2: +GL 4.2, GLSL 4.20: - GLSL 4.2 not started GL_ARB_texture_compression_bptc not started GL_ARB_compressed_texture_pixel_storage DONE (all drivers) GL_ARB_shader_atomic_countersDONE (i965) @@ -151,9 +144,8 @@ GL 4.2: GL_ARB_map_buffer_alignment DONE (all drivers) -GL 4.3: +GL 4.3, GLSL 4.30: - GLSL 4.3 not started GL_ARB_arrays_of_arrays started (Timothy) GL_ARB_ES3_compatibility DONE (i965) GL_ARB_clear_buffer_object DONE (all drivers) @@ -178,9 +170,8 @@ GL 4.3: GL_ARB_vertex_attrib_binding DONE (all drivers) -GL 4.4: +GL 4.4, GLSL 4.40: - GLSL 4.4
Re: [Mesa-dev] [PATCH] glsl: Remove unused initialized field from gl_uniform_storage.
On Thu, Aug 7, 2014 at 10:36 AM, Matt Turner matts...@gmail.com wrote:
---
Should this have been used somewhere?
src/mesa/state_tracker/st_draw.c uses this to generate a _mesa_warning().
src/glsl/ir_uniform.h | 5 -
src/glsl/link_uniform_initializers.cpp | 4
src/glsl/link_uniforms.cpp | 1 -
src/mesa/main/uniform_query.cpp| 4
4 files changed, 14 deletions(-)
diff --git a/src/glsl/ir_uniform.h b/src/glsl/ir_uniform.h
index 2f73528..9c25507 100644
--- a/src/glsl/ir_uniform.h
+++ b/src/glsl/ir_uniform.h
@@ -116,11 +116,6 @@ struct gl_uniform_storage {
*/
unsigned array_elements;
- /**
-* Has this uniform ever been set?
-*/
- bool initialized;
-
struct gl_opaque_uniform_index sampler[MESA_SHADER_STAGES];
struct gl_opaque_uniform_index image[MESA_SHADER_STAGES];
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl/link_uniform_initializers.cpp
index c6fe6a9..809aae5 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -128,8 +128,6 @@ set_sampler_binding(gl_shader_program *prog, const char
*name, int binding)
}
}
}
-
- storage-initialized = true;
}
void
@@ -226,8 +224,6 @@ set_uniform_initializer(void *mem_ctx, gl_shader_program
*prog,
}
}
}
-
- storage-initialized = true;
}
}
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 3251097..f02a074 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -580,7 +580,6 @@ private:
this-uniforms[id].name = ralloc_strdup(this-uniforms, name);
this-uniforms[id].type = base_type;
- this-uniforms[id].initialized = 0;
this-uniforms[id].num_driver_storage = 0;
this-uniforms[id].driver_storage = NULL;
this-uniforms[id].storage = this-values;
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 609d94b..88012dd 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -806,8 +806,6 @@ _mesa_uniform(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
/* If the uniform is a sampler, do the extra magic necessary to propagate
@@ -982,8 +980,6 @@ _mesa_uniform_matrix(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
}
--
1.8.5.5
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Re: [Mesa-dev] [PATCH] i965/vec4: Remove unused emit_bool_comparison method.
On Thu, Aug 7, 2014 at 10:35 AM, Matt Turner matts...@gmail.com wrote:
Apparently unused since it was added in commit af3c9803.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 14 --
2 files changed, 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3d0df77..950b592 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -486,7 +486,6 @@ public:
src_reg src0, src_reg src1, src_reg one);
void emit_bool_to_cond_code(ir_rvalue *ir, enum brw_predicate *predicate);
- void emit_bool_comparison(unsigned int op, dst_reg dst, src_reg src0,
src_reg src1);
void emit_if_gen6(ir_if *ir);
void emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 23d1dae..c46325a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1174,20 +1174,6 @@ vec4_visitor::try_emit_b2f_of_compare(ir_expression
*ir)
}
void
-vec4_visitor::emit_bool_comparison(unsigned int op,
-dst_reg dst, src_reg src0, src_reg src1)
-{
- /* original gen4 does destination conversion before comparison. */
- if (brw-gen 5)
- dst.type = src0.type;
-
- emit(CMP(dst, src0, src1, brw_conditional_for_comparison(op)));
-
- dst.type = BRW_REGISTER_TYPE_D;
- emit(AND(dst, src_reg(dst), src_reg(0x1)));
-}
-
-void
vec4_visitor::emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg
dst,
src_reg src0, src_reg src1)
{
--
1.8.5.5
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Re: [Mesa-dev] [PATCH] docs: List GL+GLSL versions as parts of a whole.
On Thu, Aug 7, 2014 at 10:35 AM, Matt Turner matts...@gmail.com wrote: Listing the GLSL version as an individual component of a GL version, separate from the extensions isn't really right. The GLSL changes are (almost?) entirely comprised of changes listed in the extensions. --- docs/GL3.txt | 27 +-- 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index e241257..7f18cd7 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -18,9 +18,8 @@ are exposed in the 3.0 context as extensions. Feature Status - -GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.30 DONE () glBindFragDataLocation, glGetFragDataLocation DONE Conditional rendering (GL_NV_conditional_render) DONE (r300, swrast) Map buffer subranges (GL_ARB_map_buffer_range)DONE (r300, swrast) @@ -49,9 +48,8 @@ GL 3.0 --- all DONE: i965, nv50, nvc0, r600, radeonsi Multisample anti-aliasing DONE (r300) -GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.1, GLSL 1.40 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 1.40 DONE () Forward compatible context support/deprecations DONE () Instanced drawing (GL_ARB_draw_instanced) DONE (swrast) Buffer copying (GL_ARB_copy_buffer) DONE (r300, swrast) @@ -63,10 +61,9 @@ GL 3.1 --- all DONE: i965, nv50, nvc0, r600, radeonsi Signed normalized textures (GL_EXT_texture_snorm) DONE (r300) -GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi Core/compatibility profiles DONE - GLSL 1.50 DONE () Geometry shaders DONE () BGRA vertex order (GL_ARB_vertex_array_bgra) DONE (r300, swrast) Base vertex offset(GL_ARB_draw_elements_base_vertex) DONE (r300, swrast) @@ -79,9 +76,8 @@ GL 3.2 --- all DONE: i965, nv50, nvc0, r600, radeonsi GLX_ARB_create_context_profileDONE -GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi +GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi - GLSL 3.30 DONE () GL_ARB_blend_func_extendedDONE (softpipe) GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL) GL_ARB_occlusion_query2 DONE (r300, swrast) @@ -94,9 +90,8 @@ GL 3.3 --- all DONE: i965, nv50, nvc0, r600, radeonsi GL_ARB_vertex_type_2_10_10_10_rev DONE () -GL 4.0: +GL 4.0, GLSL 4.00: - GLSL 4.0 not started GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965, nvc0, radeonsi, softpipe, llvmpipe) GL_ARB_gpu_shader5 started @@ -124,9 +119,8 @@ GL 4.0: GL_ARB_transform_feedback3 DONE (i965, nv50, nvc0, r600, radeonsi) -GL 4.1: +GL 4.1, GLSL 4.10: - GLSL 4.1 not started GL_ARB_ES2_compatibility DONE (i965, nv50, nvc0, r300, r600, radeonsi) GL_ARB_get_program_binaryDONE (0 binary formats) GL_ARB_separate_shader_objects DONE (all drivers) @@ -135,9 +129,8 @@ GL 4.1: GL_ARB_viewport_arrayDONE (i965, nv50, nvc0, r600) -GL 4.2: +GL 4.2, GLSL 4.20: - GLSL 4.2 not started GL_ARB_texture_compression_bptc not started GL_ARB_compressed_texture_pixel_storage DONE (all drivers) GL_ARB_shader_atomic_countersDONE (i965) @@ -151,9 +144,8 @@ GL 4.2: GL_ARB_map_buffer_alignment DONE (all drivers) -GL 4.3: +GL 4.3, GLSL 4.30: - GLSL 4.3 not started GL_ARB_arrays_of_arrays started (Timothy) GL_ARB_ES3_compatibility DONE (i965) GL_ARB_clear_buffer_object DONE (all drivers) @@ -178,9 +170,8 @@ GL 4.3: GL_ARB_vertex_attrib_binding DONE (all drivers) -GL 4.4: +GL 4.4, GLSL 4.40: - GLSL 4.4 not started GL_MAX_VERTEX_ATTRIB_STRIDE
Re: [Mesa-dev] [PATCH v2 3/9] i915: Use L8A8 instead of I8 to simulate A8 on gen2
ville.syrj...@linux.intel.com writes: From: Ville Syrjälä ville.syrj...@linux.intel.com Gen2 doesn't support the A8 texture format. Currently the driver substitutes it with I8, but that results in incorrect RGB values. Use A8L8 instead. We end up wasting a bit of memory, but at least we should get the correct results. v2: Handle the fallback in _mesa_choose_tex_format() and also do it for all alpha formats that currently accept A8 Reviewed-by: Eric Anholt e...@anholt.net pgp_XSal5Kybr.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa (master): mesa/formats: Add layout and swizzle information
Michel, On Thu, Aug 7, 2014 at 12:04 AM, Michel Dänzer mic...@daenzer.net wrote: On 07.08.2014 02:02, Jason Ekstrand wrote: Michael, Close, but no cigar. :) I'm sorry about that. I must have read too quickly. :-/ Could you please point me at the failing tests. spec/!OpenGL 1.1/depthstencil-default_fb-drawpixels-FLOAT-and-USHORT spec/!OpenGL 1.1/draw-pixels spec/!OpenGL 1.1/stencil-drawpixels spec/!OpenGL 1.4/copy-pixels spec/ARB_depth_buffer_float/fbo-depthstencil-GL_DEPTH32F_STENCIL8-drawpixels-FLOAT-and-USHORT spec/ARB_depth_buffer_float/fbo-stencil-GL_DEPTH32F_STENCIL8-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX14-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-drawpixels spec/EXT_packed_depth_stencil/fbo-depthstencil-GL_DEPTH24_STENCIL8-drawpixels-FLOAT-and-USHORT spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-drawpixels (The total number of regressions is around 20 because some of these are run for several numbers of samples) I don't have a radeon, but I can run with llvmpipe or dri swrast and try to find the bug that way. At least the draw-pixels test indeed regressed with llvmpipe as well. The draw pixels regression on llvmpipe is different. The changes I made to texture upload included a subtle change in the way we handle signed input data. In older GL versions there were two formulas, one which mapped [-128, 127] to [-1, 1] and one which mapped [-127, 127] to [-1, 1]. The former formula was used when uploading a non-snorm texture from signed integer data or when doing operations such as DrawPixels and ReadPixels. In GL 4.3, this first formula is going away and we will only have the later formula. (The later formula has the advantage of mapping 0 to 0.) If we think it's needed, I can add code to the swizzle_and_convert function to be able to handle the legacy formula in those cases where older GL versions say that it's needed. Would it be possible for you to verify that there are no piglit gpu.py regressions with llvmpipe before pushing changes like these? Yeah, I'm going to get my personal testing infrastructure set up to make that easier and hopefully I can do so in the future. --Jason Ekstrand ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glsl: Remove unused initialized field from gl_uniform_storage.
On Thu, Aug 7, 2014 at 11:08 AM, Anuj Phogat anuj.pho...@gmail.com wrote: On Thu, Aug 7, 2014 at 10:36 AM, Matt Turner matts...@gmail.com wrote: --- Should this have been used somewhere? src/mesa/state_tracker/st_draw.c uses this to generate a _mesa_warning(). Ah, okay. I didn't see that because I didn't build gallium. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa (master): mesa/formats: Add layout and swizzle information
On Wed, Aug 6, 2014 at 11:09 AM, Marek Olšák mar...@gmail.com wrote: FYI, it seems to be DrawPixels(GL_STENCIL_INDEX) that is broken. We actually use S8 texturing for DrawPixels and some of the functions you changed probably don't support S8 anymore. Marek, Would you mind being a bit more specific? I don't think I changed any of the upload code for stencil formats. Also, I still don't see what any of this has to do with data in formats.c. --Jason Marek On Wed, Aug 6, 2014 at 7:37 PM, Jason Ekstrand ja...@jlekstrand.net wrote: Michael, With the two patches I just sent to the list, the generated format_info structure is now binary-identical to the original structure commited to git with the following two exceptions: The string name parameter for MESA_FORMAT_R9G9B9E5_FLOAT was updated from MESA_FORMAT_RGB9_E5 to MESA_FORMAT_R9G9B9E5_FLOAT. The LATC formats now report 8 bits of precision instead of 4; This makes the LATC formats match the RGTC formats which use exactly the same compression just interpreted differently. I'm really confused about where the bug is coming from. That said, I'm going to run some llvmpipe tests to see if I can reproduce. --Jason Ekstrand On Wed, Aug 6, 2014 at 10:02 AM, Jason Ekstrand ja...@jlekstrand.net wrote: Michael, Could you please point me at the failing tests. I don't have a radeon, but I can run with llvmpipe or dri swrast and try to find the bug that way. --Jason Ekstrand On Wed, Aug 6, 2014 at 2:36 AM, Michel Dänzer mic...@daenzer.net wrote: On 06.08.2014 18:28, Michel Dänzer wrote: On 06.08.2014 03:08, Jason Ekstrand wrote: Module: Mesa Branch: master Commit: 850fb0d1dca616179d3239a7b7bd94fe1979604c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=850fb0d1dca616179d3239a7b7bd94fe1979604c Author: Jason Ekstrand jason.ekstr...@intel.com Date: Thu Jul 10 23:59:42 2014 -0700 mesa/formats: Add layout and swizzle information v2: Move the MESA_FORMAT_SWIZZLE enum to the top of the file Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com Reviewed-by: Brian Paul bri...@vmware.com As of this commit, ~20 depth/stencil related piglit tests have regressed with the radeonsi driver compared to before your changes. See below for an example failure of the draw-pixels test. That test is already broken with the previous commits, each of them with slightly different failure symptoms. I meant to write: 'That test is already broken with the three previous commits, [...]' -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa (master): mesa/formats: Add layout and swizzle information
I think I know where the problem is. I'll send a patch. Marek On Thu, Aug 7, 2014 at 8:38 PM, Jason Ekstrand ja...@jlekstrand.net wrote: On Wed, Aug 6, 2014 at 11:09 AM, Marek Olšák mar...@gmail.com wrote: FYI, it seems to be DrawPixels(GL_STENCIL_INDEX) that is broken. We actually use S8 texturing for DrawPixels and some of the functions you changed probably don't support S8 anymore. Marek, Would you mind being a bit more specific? I don't think I changed any of the upload code for stencil formats. Also, I still don't see what any of this has to do with data in formats.c. --Jason Marek On Wed, Aug 6, 2014 at 7:37 PM, Jason Ekstrand ja...@jlekstrand.net wrote: Michael, With the two patches I just sent to the list, the generated format_info structure is now binary-identical to the original structure commited to git with the following two exceptions: The string name parameter for MESA_FORMAT_R9G9B9E5_FLOAT was updated from MESA_FORMAT_RGB9_E5 to MESA_FORMAT_R9G9B9E5_FLOAT. The LATC formats now report 8 bits of precision instead of 4; This makes the LATC formats match the RGTC formats which use exactly the same compression just interpreted differently. I'm really confused about where the bug is coming from. That said, I'm going to run some llvmpipe tests to see if I can reproduce. --Jason Ekstrand On Wed, Aug 6, 2014 at 10:02 AM, Jason Ekstrand ja...@jlekstrand.net wrote: Michael, Could you please point me at the failing tests. I don't have a radeon, but I can run with llvmpipe or dri swrast and try to find the bug that way. --Jason Ekstrand On Wed, Aug 6, 2014 at 2:36 AM, Michel Dänzer mic...@daenzer.net wrote: On 06.08.2014 18:28, Michel Dänzer wrote: On 06.08.2014 03:08, Jason Ekstrand wrote: Module: Mesa Branch: master Commit: 850fb0d1dca616179d3239a7b7bd94fe1979604c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=850fb0d1dca616179d3239a7b7bd94fe1979604c Author: Jason Ekstrand jason.ekstr...@intel.com Date: Thu Jul 10 23:59:42 2014 -0700 mesa/formats: Add layout and swizzle information v2: Move the MESA_FORMAT_SWIZZLE enum to the top of the file Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com Reviewed-by: Brian Paul bri...@vmware.com As of this commit, ~20 depth/stencil related piglit tests have regressed with the radeonsi driver compared to before your changes. See below for an example failure of the draw-pixels test. That test is already broken with the previous commits, each of them with slightly different failure symptoms. I meant to write: 'That test is already broken with the three previous commits, [...]' -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Mesa (master): mesa/formats: Add layout and swizzle information
Am 07.08.2014 20:25, schrieb Jason Ekstrand: Michel, On Thu, Aug 7, 2014 at 12:04 AM, Michel Dänzer mic...@daenzer.net mailto:mic...@daenzer.net wrote: On 07.08.2014 02:02, Jason Ekstrand wrote: Michael, Close, but no cigar. :) I'm sorry about that. I must have read too quickly. :-/ Could you please point me at the failing tests. spec/!OpenGL 1.1/depthstencil-default_fb-drawpixels-FLOAT-and-USHORT spec/!OpenGL 1.1/draw-pixels spec/!OpenGL 1.1/stencil-drawpixels spec/!OpenGL 1.4/copy-pixels spec/ARB_depth_buffer_float/fbo-depthstencil-GL_DEPTH32F_STENCIL8-drawpixels-FLOAT-and-USHORT spec/ARB_depth_buffer_float/fbo-stencil-GL_DEPTH32F_STENCIL8-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX14-drawpixels spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-drawpixels spec/EXT_packed_depth_stencil/fbo-depthstencil-GL_DEPTH24_STENCIL8-drawpixels-FLOAT-and-USHORT spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-drawpixels (The total number of regressions is around 20 because some of these are run for several numbers of samples) I don't have a radeon, but I can run with llvmpipe or dri swrast and try to find the bug that way. At least the draw-pixels test indeed regressed with llvmpipe as well. The draw pixels regression on llvmpipe is different. The changes I made to texture upload included a subtle change in the way we handle signed input data. In older GL versions there were two formulas, one which mapped [-128, 127] to [-1, 1] and one which mapped [-127, 127] to [-1, 1]. The former formula was used when uploading a non-snorm texture from signed integer data or when doing operations such as DrawPixels and ReadPixels. In GL 4.3, this first formula is going away and we will only have the later formula. (The later formula has the advantage of mapping 0 to 0.) If we think it's needed, I can add code to the swizzle_and_convert function to be able to handle the legacy formula in those cases where older GL versions say that it's needed. Yeah the two different formulas in older GL versions are quite a pity. I'm not sure if we really need to honor the old formula, but I guess if binary drivers do we might be required to as well. The gallium util code though never did. Maybe should just make the tests more lenient... Roland ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] st/mesa: fix DrawPixels(GL_STENCIL_INDEX)
From: Marek Olšák marek.ol...@amd.com
This is a bug which was probably uncovered recently by Jason's commits
and broke this.
The problem is _mesa_base_tex_format(GL_STENCIL_INDEX) returns -1.
---
src/mesa/state_tracker/st_cb_drawpixels.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c
b/src/mesa/state_tracker/st_cb_drawpixels.c
index fce75d1..5ae092b 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -494,22 +494,19 @@ make_texture(struct st_context *st,
pipeFormat = st_choose_matching_format(st, PIPE_BIND_SAMPLER_VIEW,
format, type, unpack-SwapBytes);
- if (pipeFormat != PIPE_FORMAT_NONE) {
- mformat = st_pipe_format_to_mesa_format(pipeFormat);
- baseInternalFormat = _mesa_get_format_base_format(mformat);
- }
- else {
+ if (pipeFormat == PIPE_FORMAT_NONE) {
/* Use the generic approach. */
GLenum intFormat = internal_format(ctx, format, type);
- baseInternalFormat = _mesa_base_tex_format(ctx, intFormat);
pipeFormat = st_choose_format(st, intFormat, format, type,
PIPE_TEXTURE_2D, 0, PIPE_BIND_SAMPLER_VIEW,
FALSE);
assert(pipeFormat != PIPE_FORMAT_NONE);
- mformat = st_pipe_format_to_mesa_format(pipeFormat);
}
+ mformat = st_pipe_format_to_mesa_format(pipeFormat);
+ baseInternalFormat = _mesa_get_format_base_format(mformat);
+
pixels = _mesa_map_pbo_source(ctx, unpack, pixels);
if (!pixels)
return NULL;
--
1.9.1
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[Mesa-dev] [PATCH] radeonsi: fix CMASK and HTILE allocation on Tahiti
From: Marek Olšák marek.ol...@amd.com
Tahiti has 12 tile pipes, but P8 pipe config.
It looks like there is no way to get the pipe config except for reading
GB_TILE_MODE. The TILING_CONFIG ioctl doesn't return more than 8 pipes,
so we can't use that for Hawaii.
This fixes a regression caused by 9b046474c95f15338d4c748df9b62871bba6f36f
on Tahiti.
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeon/r600_texture.c | 4 +--
src/gallium/drivers/radeonsi/si_pipe.c| 52 ++-
2 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 6c84624..d07c9a0 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -389,7 +389,7 @@ static void si_texture_get_cmask_info(struct
r600_common_screen *rscreen,
struct r600_cmask_info *out)
{
unsigned pipe_interleave_bytes = rscreen-tiling_info.group_bytes;
- unsigned num_pipes = rscreen-info.r600_num_tile_pipes;
+ unsigned num_pipes = rscreen-tiling_info.num_channels;
unsigned cl_width, cl_height;
switch (num_pipes) {
@@ -486,7 +486,7 @@ static unsigned si_texture_htile_alloc_size(struct
r600_common_screen *rscreen,
{
unsigned cl_width, cl_height, width, height;
unsigned slice_elements, slice_bytes, pipe_interleave_bytes, base_align;
- unsigned num_pipes = rscreen-info.r600_num_tile_pipes;
+ unsigned num_pipes = rscreen-tiling_info.num_channels;
/* HTILE is broken with 1D tiling on old kernels and CIK. */
if (rtex-surface.level[0].mode == RADEON_SURF_MODE_1D
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 9c66fd3..3679aeb 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -23,6 +23,7 @@
#include si_pipe.h
#include si_public.h
+#include sid.h
#include radeon/radeon_uvd.h
#include util/u_blitter.h
@@ -392,6 +393,54 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
r600_destroy_common_screen(sscreen-b);
}
+#define SI_TILE_MODE_COLOR_2D_8BPP 14
+
+/* Initialize pipe config. This is especially important for GPUs
+ * with 16 pipes and more where it's initialized incorrectly by
+ * the TILING_CONFIG ioctl. */
+static bool si_initialize_pipe_config(struct si_screen *sscreen)
+{
+ unsigned mode2d;
+
+ /* This is okay, because there can be no 2D tiling without
+* the tile mode array, so we won't need the pipe config.
+* Return success.
+*/
+ if (!sscreen-b.info.si_tile_mode_array_valid)
+ return true;
+
+ /* The same index is used for the 2D mode on CIK too. */
+ mode2d = sscreen-b.info.si_tile_mode_array[SI_TILE_MODE_COLOR_2D_8BPP];
+
+ switch (G_009910_PIPE_CONFIG(mode2d)) {
+ case V_02803C_ADDR_SURF_P2:
+ sscreen-b.tiling_info.num_channels = 2;
+ break;
+ case V_02803C_X_ADDR_SURF_P4_8X16:
+ case V_02803C_X_ADDR_SURF_P4_16X16:
+ case V_02803C_X_ADDR_SURF_P4_16X32:
+ case V_02803C_X_ADDR_SURF_P4_32X32:
+ sscreen-b.tiling_info.num_channels = 4;
+ break;
+ case V_02803C_X_ADDR_SURF_P8_16X16_8X16:
+ case V_02803C_X_ADDR_SURF_P8_16X32_8X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_8X16:
+ case V_02803C_X_ADDR_SURF_P8_16X32_16X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_16X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_16X32:
+ case V_02803C_X_ADDR_SURF_P8_32X64_32X32:
+ sscreen-b.tiling_info.num_channels = 8;
+ break;
+ case V_02803C_X_ADDR_SURF_P16_32X32_8X16:
+ case V_02803C_X_ADDR_SURF_P16_32X32_16X16:
+ sscreen-b.tiling_info.num_channels = 16;
+ break;
+ default:
+ return false;
+ }
+ return true;
+}
+
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
@@ -407,7 +456,8 @@ struct pipe_screen *radeonsi_screen_create(struct
radeon_winsys *ws)
sscreen-b.b.is_format_supported = si_is_format_supported;
sscreen-b.b.resource_create = r600_resource_create_common;
- if (!r600_common_screen_init(sscreen-b, ws)) {
+ if (!r600_common_screen_init(sscreen-b, ws) ||
+ !si_initialize_pipe_config(sscreen)) {
FREE(sscreen);
return NULL;
}
--
1.9.1
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[Mesa-dev] [PATCH 2/2] draw: hack around weird primitive id input in gs
From: Roland Scheidegger srol...@vmware.com
The distinction between system values and ordinary inputs is not very
obvious in gallium - further fueled by the fact that they use the same
semantic names.
Still, if there's any value which imho really is a system value, it's the
primitive id input into the gs (while earlier (tessleation) stages could read
it, it is _always_ generated by the system). For some odd reason though (which
I'd classify as a bug but seems too complicated to fix) the glsl compiler in
mesa treats this as an ordinary varying, and everything else after that
(including the state tracker and other drivers) just go along with that.
But input fetching in gs for llvm based draw was definitely limited to the
ordinary (2-dimensional) inputs so only worked with other state trackers,
the code was also additionally relying on tgsi_scan_shader filling
uses_primid correctly which did not happen neither (would set it only for
all stages if it was a system value, but only set it for the fragment shader
if it was an input value).
This fixes piglit glsl-1.50-geometry-primitive-id-restart and primitive-id-in
in llvmpipe.
---
src/gallium/auxiliary/draw/draw_gs.c| 8 ++--
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 12
src/gallium/auxiliary/tgsi/tgsi_scan.c | 6 +++---
3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_gs.c
b/src/gallium/auxiliary/draw/draw_gs.c
index 2b6d2a0..bbf515a 100644
--- a/src/gallium/auxiliary/draw/draw_gs.c
+++ b/src/gallium/auxiliary/draw/draw_gs.c
@@ -228,8 +228,7 @@ llvm_fetch_gs_input(struct draw_geometry_shader *shader,
const float (*input_ptr)[4];
float
(*input_data)[6][PIPE_MAX_SHADER_INPUTS][TGSI_NUM_CHANNELS][TGSI_NUM_CHANNELS]
= shader-gs_input-data;
- shader-llvm_prim_ids[shader-fetched_prim_count] =
- shader-in_prim_idx;
+ shader-llvm_prim_ids[shader-fetched_prim_count] = shader-in_prim_idx;
input_ptr = shader-input;
@@ -244,6 +243,11 @@ llvm_fetch_gs_input(struct draw_geometry_shader *shader,
for (slot = 0, vs_slot = 0; slot shader-info.num_inputs; ++slot) {
if (shader-info.input_semantic_name[slot] == TGSI_SEMANTIC_PRIMID) {
/* skip. we handle system values through gallivm */
+/* NOTE: If we hit this case here it's an ordinary input not a sv,
+ * even though it probably should be a sv.
+ * Not sure how to set it up as regular input however if that even,
+ * would make sense so hack around this later in gallivm.
+ */
} else {
vs_slot = draw_gs_get_input_index(
shader-info.input_semantic_name[slot],
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 02a4a52..f54e856 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1408,12 +1408,24 @@ emit_fetch_gs_input(
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
struct gallivm_state *gallivm = bld-bld_base.base.gallivm;
+ const struct tgsi_shader_info *info = bld-bld_base.info;
LLVMBuilderRef builder = gallivm-builder;
LLVMValueRef attrib_index = NULL;
LLVMValueRef vertex_index = NULL;
LLVMValueRef swizzle_index = lp_build_const_int32(gallivm, swizzle);
LLVMValueRef res;
+ if (info-input_semantic_name[reg-Register.Index] == TGSI_SEMANTIC_PRIMID)
{
+ /* This is really a system value not a regular input */
+ assert(!reg-Register.Indirect);
+ assert(!reg-Dimension.Indirect);
+ res = bld-system_values.prim_id;
+ if (stype != TGSI_TYPE_UNSIGNED stype != TGSI_TYPE_SIGNED) {
+ res = LLVMBuildBitCast(builder, res, bld_base-base.vec_type, );
+ }
+ return res;
+ }
+
if (reg-Register.Indirect) {
attrib_index = get_indirect_index(bld,
reg-Register.File,
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 563d2c5..c71bb36 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -191,11 +191,11 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
info-input_cylindrical_wrap[reg] =
(ubyte)fulldecl-Interp.CylindricalWrap;
info-num_inputs++;
- if (procType == TGSI_PROCESSOR_FRAGMENT) {
+ if (semName == TGSI_SEMANTIC_PRIMID)
+ info-uses_primid = TRUE;
+ else if (procType == TGSI_PROCESSOR_FRAGMENT) {
if (semName == TGSI_SEMANTIC_POSITION)
info-reads_position = TRUE;
- else if (semName == TGSI_SEMANTIC_PRIMID)
-info-uses_primid = TRUE;
else if (semName == TGSI_SEMANTIC_FACE)
[Mesa-dev] [PATCH 1/2] draw: fix prim id float cast for non-llvm path
From: Roland Scheidegger srol...@vmware.com
These values are always uints, casting them to floats does no good.
Fixes piglit glsl-1.50-geometry-primitive-id-restart tests for softpipe.
---
src/gallium/auxiliary/draw/draw_gs.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_gs.c
b/src/gallium/auxiliary/draw/draw_gs.c
index f622822..2b6d2a0 100644
--- a/src/gallium/auxiliary/draw/draw_gs.c
+++ b/src/gallium/auxiliary/draw/draw_gs.c
@@ -144,14 +144,10 @@ static void tgsi_fetch_gs_input(struct
draw_geometry_shader *shader,
for (slot = 0, vs_slot = 0; slot shader-info.num_inputs; ++slot) {
unsigned idx = i * TGSI_EXEC_MAX_INPUT_ATTRIBS + slot;
if (shader-info.input_semantic_name[slot] == TGSI_SEMANTIC_PRIMID) {
-machine-Inputs[idx].xyzw[0].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[1].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[2].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[3].f[prim_idx] =
- (float)shader-in_prim_idx;
+machine-Inputs[idx].xyzw[0].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[1].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[2].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[3].u[prim_idx] = shader-in_prim_idx;
} else {
vs_slot = draw_gs_get_input_index(
shader-info.input_semantic_name[slot],
--
1.9.1
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[Mesa-dev] [PATCH 00/11] glsl: Collection of algebraic optimizations
From: Thomas Helland thomashellan...@gmail.com Some of these patches have been posted to the list before. Eric showed interest in these being merged, so I addressed his points. Pathces 1 - 7 I've added Eric's R-B on. Patch 8 drops the part that people had doubt on. Patch 9 has been posted before, and seemed to be accepted as OK. However, it no longer gives us the same profit, but instead causes some more crashes in a piglit quick run. Patch 10 gives us some profit on some TF2 shaders. Patch 11 is a hit-and-miss since patch 10 proved usefull. This shows no effect on shader-db however. If anyone want's to see them merged then maybe that person could push them upstream? I don't have commit access, and currently don't feel git-savvy enough that I feel comfortable pokeing around in upstream either :) Thomas Helland (11): glsl: Optimize X - X == 0 glsl: Optimize !A || A == 1 glsl: Optimize !A A glsl: Optimize (A || B) A == A glsl: Optimize log(x) + log(y) == log(x*y) glsl: Optimize exp(x) * exp(y) == exp(x*y) glsl: Optimize some more pow() special cases glsl: Optimize A - neg(B) = A + B glsl: Optimize logic operation A || (A B) glsl: Optimize X + neg(X) == 0 and the other way around glsl: Optimize X / X == 1 src/glsl/opt_algebraic.cpp | 97 +- 1 file changed, 96 insertions(+), 1 deletion(-) -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 01/11] glsl: Optimize X - X == 0
From: Thomas Helland thomashellan...@gmail.com v1 - v2: Corrected indentation. Signed-off-by: Thomas Helland thomashelland90 at gmail.com Reviewed-by: Eric Anholt eric at anholt.net --- src/glsl/opt_algebraic.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index ac7514a..c179d53 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -439,6 +439,9 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) return neg(ir-operands[1]); if (is_vec_zero(op_const[1])) return ir-operands[0]; + /* X - X == 0 */ + if (ir-operands[0]-equals(ir-operands[1])) + return ir_constant::zero(ir, ir-type); break; case ir_binop_mul: -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/11] glsl: Optimize !A A == 0
From: Thomas Helland thomashellan...@gmail.com
Signed-off-by: Thomas Helland thomashelland90 at gmail.com
Reviewed-by: Eric Anholt eric at anholt.net
---
src/glsl/opt_algebraic.cpp | 8
1 file changed, 8 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index 67326c5..cdabdb8 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -551,6 +551,14 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
} else if (ir-operands[0]-equals(ir-operands[1])) {
/* (a a) == a */
return ir-operands[0];
+ } else if (op_expr[0] op_expr[0]-operation == ir_unop_logic_not
+ ir-operands[1]-equals(op_expr[0]-operands[0])) {
+ /* !A A == 0 */
+ return ir_constant::zero(mem_ctx, ir-type);
+ } else if (op_expr[1] op_expr[1]-operation == ir_unop_logic_not
+ ir-operands[0]-equals(op_expr[1]-operands[0])) {
+ /* A !A == 0 */
+ return ir_constant::zero(mem_ctx, ir-type);
}
break;
--
2.0.3
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[Mesa-dev] [PATCH v2 02/11] glsl: Optimize !A || A == 1
From: Thomas Helland thomashellan...@gmail.com
v1 - v2: Correct indentation
Signed-off-by: Thomas Helland thomashelland90 at gmail.com
Reviewed-by: Eric Anholt eric at anholt.net
---
src/glsl/opt_algebraic.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index c179d53..67326c5 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -591,6 +591,18 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
} else if (ir-operands[0]-equals(ir-operands[1])) {
/* (a || a) == a */
return ir-operands[0];
+ } else if ( (op_expr[0] op_expr[0]-operation == ir_unop_logic_not
+ ir-operands[1]-equals(op_expr[0]-operands[0])) ||
+ /* !A || A == 1 */
+ (op_expr[1] op_expr[1]-operation == ir_unop_logic_not
+ ir-operands[0]-equals(op_expr[1]-operands[0])) ) {
+ /* A || !A == 1 */
+ ir_constant_data data;
+
+ for (unsigned i = 0; i 16; i++)
+data.b[i] = true;
+
+ return new(mem_ctx) ir_constant(ir-type, data);
}
break;
--
2.0.3
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[Mesa-dev] [PATCH v2 07/11] glsl: Optimize some more pow() special cases
From: Thomas Helland thomashellan...@gmail.com Specifically x^-1 = rcp(x) .0^x = 0 .x^0 = 1 v1 - v2: Correct indentation Signed-off-by: Thomas Helland thomashelland90 at gmail.com Reviewed-by: Eric Anholt eric at anholt.net --- src/glsl/opt_algebraic.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 0e21ff8..0ecadbe 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -656,6 +656,21 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) if (is_vec_one(op_const[1])) return ir-operands[0]; + /* x^-1 == rcp(x) */ + if (is_vec_negative_one(op_const[1])) + return new(mem_ctx) ir_expression(ir_unop_rcp, + ir-operands[0]-type, + ir-operands[0], + NULL); + + /* 0^x == 0 */ + if (is_vec_zero(op_const[0])) + return ir_constant::zero(ir, ir-type); + + /* x^0 == 1 */ + if (is_vec_zero(op_const[1])) + return new(mem_ctx) ir_constant(1.0f, 1); + /* pow(2,x) == exp2(x) */ if (is_vec_two(op_const[0])) return expr(ir_unop_exp2, ir-operands[1]); -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 06/11] glsl: Optimize exp(x) * exp(y) == exp(x*y)
From: Thomas Helland thomashellan...@gmail.com
And it's exp2() equivalent.
Signed-off-by: Thomas Helland thomashelland90 at gmail.com
Reviewed-by: Eric Anholt eric at anholt.net
---
src/glsl/opt_algebraic.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index 141b930..0e21ff8 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -470,6 +470,17 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
if (is_vec_negative_one(op_const[1]))
return neg(ir-operands[0]);
+ if (op_expr[0] op_expr[1]) {
+ /* exp(x) * exp(y) == exp(x+y) */
+ if (op_expr[0]-operation == ir_unop_exp
+ op_expr[1]-operation == ir_unop_exp)
+return exp(add(op_expr[0]-operands[0], op_expr[1]-operands[0]));
+ /* exp2(x) * exp2(y) == exp2(x+y) */
+ if (op_expr[0]-operation == ir_unop_exp2
+ op_expr[1]-operation == ir_unop_exp2)
+return new (mem_ctx) ir_expression(ir_unop_exp2,
+ add(op_expr[0]-operands[0], op_expr[1]-operands[0]));
+ }
/* Reassociate multiplication of constants so that we can do
* constant folding.
--
2.0.3
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[Mesa-dev] [PATCH v2 04/11] glsl: Optimize (A || B) A == A
From: Thomas Helland thomashellan...@gmail.com
And it's cousins
v1 - v2: Correct indentation
Correct returned operand from second if statement
Signed-off-by: Thomas Helland thomashelland90 at gmail.com
Reviewed-by: Eric Anholt eric at anholt.net
---
src/glsl/opt_algebraic.cpp | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index cdabdb8..42a70e3 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -559,6 +559,16 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
ir-operands[0]-equals(op_expr[1]-operands[0])) {
/* A !A == 0 */
return ir_constant::zero(mem_ctx, ir-type);
+ } else if (op_expr[0] op_expr[0]-operation == ir_binop_logic_or
+ (op_expr[0]-operands[0]-equals(ir-operands[1]) ||
+ op_expr[0]-operands[1]-equals(ir-operands[1]))) {
+ /* (A || B) A == A or (B || A) A == A */
+ return ir-operands[1];
+ } else if (op_expr[1] op_expr[1]-operation == ir_binop_logic_or
+ (op_expr[1]-operands[0]-equals(ir-operands[0]) ||
+ op_expr[1]-operands[1]-equals(ir-operands[0]))) {
+ /* A (A || B) == A or A (B || A) == A */
+ return ir-operands[0];
}
break;
--
2.0.3
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[Mesa-dev] [PATCH v2 05/11] glsl: Optimize log(x) + log(y) == log(x*y)
From: Thomas Helland thomashellan...@gmail.com And the log2() equivalent. v1 - v2: Correct trailing whitespace Signed-off-by: Thomas Helland thomashelland90 at gmail.com Reviewed-by: Eric Anholt eric at anholt.net --- src/glsl/opt_algebraic.cpp | 12 1 file changed, 12 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 42a70e3..141b930 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -380,6 +380,18 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) return expr; } + /* log(x) + log(y) == log(x*y) */ + if (op_expr[0] op_expr[0]-operation == ir_unop_log + op_expr[1] op_expr[1]-operation == ir_unop_log) + return new(mem_ctx) ir_expression( +ir_unop_log, mul(op_expr[0]-operands[0], op_expr[1]-operands[0]) ); + + /* log2(x) + log2(y) == log2(x*y) */ + if (op_expr[0] op_expr[0]-operation == ir_unop_log2 + op_expr[1] op_expr[1]-operation == ir_unop_log2) + return new(mem_ctx) ir_expression( +ir_unop_log2, mul(op_expr[0]-operands[0], op_expr[1]-operands[0]) ); + /* Replace (-x + y) * a + x and commutative variations with lrp(x, y, a). * * (-x + y) * a + x -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 08/11] glsl: Optimize A - neg(B) = A + B
From: Thomas Helland thomashellan...@gmail.com v1 - v2: Drop the neg(A) - B == neg(A+B) part Signed-off-by: Thomas Helland thomashelland90 at gmail.com --- src/glsl/opt_algebraic.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 0ecadbe..c673495 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -454,6 +454,9 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) /* X - X == 0 */ if (ir-operands[0]-equals(ir-operands[1])) return ir_constant::zero(ir, ir-type); + /* A - neg(B) = A + B */ + if (op_expr[1] op_expr[1]-operation == ir_unop_neg) + return add(ir-operands[0], op_expr[1]-operands[0]); break; case ir_binop_mul: -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 09/11] glsl: Optimize logic operation A || (A B)
From: Thomas Helland thomashellan...@gmail.com
Let's cut the needless A B here.
v1 - v2: Correct the comments, return A instead of A B
v2 - v3: Rebase on top of this series
Signed-off-by: Thomas Helland thomashelland90 at gmail.com
---
This was originally posted here:
http://lists.freedesktop.org/archives/mesa-dev/2014-July/063129.html
v2 of the patch got no responses, so I'm reposting it here.
This used to give some effect on a clean shader-db with
some extra shaders from TF2 and portal;
helped: shaders/tf2/2042.shader_test fs16:23 - 21 (-8.70%)
helped: shaders/tf2/2042.shader_test fs8: 23 - 21 (-8.70%)
helped: shaders/tf2/4624.shader_test fs16:21 - 19 (-9.52%)
helped: shaders/tf2/4624.shader_test fs8: 21 - 19 (-9.52%)
helped: shaders/tf2/763.shader_test fs16: 23 - 21 (-8.70%)
helped: shaders/tf2/763.shader_test fs8: 23 - 21 (-8.70%)
HURT: shaders/orbital_explorer.shader_test vs: 1049 - 1052 (0.29%)
total instructions in shared programs: 758979 - 758970 (-0.00%)
instructions in affected programs: 1183 - 1174 (-0.76%)
GAINED:0
LOST: 0
However, current master gets this optimized, probably in i965 backend;
the previously affected shaders now get the same amount of
instructions with master as they did with this patch,
and this patch has no effect.
It does, however, cause 5 extra crashes in a piglit-quick run.
I have not investigated this any further.
---
src/glsl/opt_algebraic.cpp | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index c673495..4008fe7 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -647,7 +647,17 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
data.b[i] = true;
return new(mem_ctx) ir_constant(ir-type, data);
- }
+ } else if (op_expr[0] op_expr[0]-operation == ir_binop_logic_and
+ (op_expr[0]-operands[0]-equals(op_expr[1]) ||
+ op_expr[0]-operands[1]-equals(op_expr[1]))) {
+ /* (A B) || A == A or (B A) || A == A */
+ return ir-operands[1];
+ } else if (op_expr[1] op_expr[1]-operation == ir_binop_logic_and
+ (op_expr[1]-operands[0]-equals(op_expr[0]) ||
+ op_expr[1]-operands[1]-equals(op_expr[0]))) {
+ /* A || (A B) == A or A || (B A) == A */
+ return ir-operands[0];
+ }
break;
case ir_binop_pow:
--
2.0.3
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[Mesa-dev] [PATCH 11/11] glsl: Optimize X / X == 1
From: Thomas Helland thomashellan...@gmail.com Shows no changes for shader-db. Signed-off-by: Thomas Helland thomashelland90 at gmail.com --- src/glsl/opt_algebraic.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 21bf332..a49752d 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -513,6 +513,8 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) } if (is_vec_one(op_const[1])) return ir-operands[0]; + if(ir-operands[0]-equals(ir-operands[1])) + return new(mem_ctx) ir_constant(1.0f, 1); break; case ir_binop_dot: -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 10/11] glsl: Optimize X + neg(X) == 0 and the other way around
From: Thomas Helland thomashellan...@gmail.com Since we lower A - B to A + neg(B) on some architectures lets add a optimization for this pattern. This yields some gains in a shader-db run with extra shaders added from Team Fortress 2 and Portal. helped: shaders/tf2/1684.shader_test fs16: 62 - 60 (-3.23%) helped: shaders/tf2/1684.shader_test fs8:62 - 60 (-3.23%) helped: shaders/tf2/5861.shader_test fs16: 68 - 66 (-2.94%) helped: shaders/tf2/5861.shader_test fs8:68 - 66 (-2.94%) helped: shaders/tf2/5986.shader_test fs16: 68 - 66 (-2.94%) helped: shaders/tf2/5986.shader_test fs8:68 - 66 (-2.94%) helped: shaders/tf2/6926.shader_test fs16: 62 - 60 (-3.23%) helped: shaders/tf2/6926.shader_test fs8:62 - 60 (-3.23%) total instructions in shared programs: 731050 - 731034 (-0.00%) instructions in affected programs: 520 - 504 (-3.08%) GAINED:0 LOST: 0 Signed-off-by: Thomas Helland thomashelland90 at gmail.com --- src/glsl/opt_algebraic.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 4008fe7..21bf332 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -364,6 +364,15 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) if (is_vec_zero(op_const[1])) return ir-operands[0]; + /* X + neg(X) == 0 */ + if (op_expr[1] op_expr[1]-operation == ir_unop_neg + ir-operands[0]-equals(op_expr[1]-operands[0])) + return ir_constant::zero(ir, ir-type); + /* neg(X) + X == 0 */ + if (op_expr[0] op_expr[0]-operation == ir_unop_neg + ir-operands[1]-equals(op_expr[0]-operands[0])) + return ir_constant::zero(ir, ir-type); + /* Reassociate addition of constants so that we can do constant * folding. */ -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/2] draw: fix prim id float cast for non-llvm path
On 08/07/2014 02:50 PM, srol...@vmware.com wrote:
From: Roland Scheidegger srol...@vmware.com
These values are always uints, casting them to floats does no good.
Fixes piglit glsl-1.50-geometry-primitive-id-restart tests for softpipe.
---
src/gallium/auxiliary/draw/draw_gs.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_gs.c
b/src/gallium/auxiliary/draw/draw_gs.c
index f622822..2b6d2a0 100644
--- a/src/gallium/auxiliary/draw/draw_gs.c
+++ b/src/gallium/auxiliary/draw/draw_gs.c
@@ -144,14 +144,10 @@ static void tgsi_fetch_gs_input(struct
draw_geometry_shader *shader,
for (slot = 0, vs_slot = 0; slot shader-info.num_inputs; ++slot) {
unsigned idx = i * TGSI_EXEC_MAX_INPUT_ATTRIBS + slot;
if (shader-info.input_semantic_name[slot] == TGSI_SEMANTIC_PRIMID) {
-machine-Inputs[idx].xyzw[0].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[1].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[2].f[prim_idx] =
- (float)shader-in_prim_idx;
-machine-Inputs[idx].xyzw[3].f[prim_idx] =
- (float)shader-in_prim_idx;
+machine-Inputs[idx].xyzw[0].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[1].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[2].u[prim_idx] = shader-in_prim_idx;
+machine-Inputs[idx].xyzw[3].u[prim_idx] = shader-in_prim_idx;
} else {
vs_slot = draw_gs_get_input_index(
shader-info.input_semantic_name[slot],
Reviewed-by: Brian Paul bri...@vmware.com
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Re: [Mesa-dev] [PATCH 2/2] draw: hack around weird primitive id input in gs
On 08/07/2014 02:50 PM, srol...@vmware.com wrote:
From: Roland Scheidegger srol...@vmware.com
The distinction between system values and ordinary inputs is not very
obvious in gallium - further fueled by the fact that they use the same
semantic names.
Still, if there's any value which imho really is a system value, it's the
primitive id input into the gs (while earlier (tessleation) stages could read
it, it is _always_ generated by the system). For some odd reason though (which
I'd classify as a bug but seems too complicated to fix) the glsl compiler in
mesa treats this as an ordinary varying, and everything else after that
(including the state tracker and other drivers) just go along with that.
But input fetching in gs for llvm based draw was definitely limited to the
ordinary (2-dimensional) inputs so only worked with other state trackers,
the code was also additionally relying on tgsi_scan_shader filling
uses_primid correctly which did not happen neither (would set it only for
all stages if it was a system value, but only set it for the fragment shader
if it was an input value).
This fixes piglit glsl-1.50-geometry-primitive-id-restart and primitive-id-in
in llvmpipe.
---
src/gallium/auxiliary/draw/draw_gs.c| 8 ++--
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 12
src/gallium/auxiliary/tgsi/tgsi_scan.c | 6 +++---
3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_gs.c
b/src/gallium/auxiliary/draw/draw_gs.c
index 2b6d2a0..bbf515a 100644
--- a/src/gallium/auxiliary/draw/draw_gs.c
+++ b/src/gallium/auxiliary/draw/draw_gs.c
@@ -228,8 +228,7 @@ llvm_fetch_gs_input(struct draw_geometry_shader *shader,
const float (*input_ptr)[4];
float (*input_data)[6][PIPE_MAX_SHADER_INPUTS][TGSI_NUM_CHANNELS][TGSI_NUM_CHANNELS]
= shader-gs_input-data;
- shader-llvm_prim_ids[shader-fetched_prim_count] =
- shader-in_prim_idx;
+ shader-llvm_prim_ids[shader-fetched_prim_count] = shader-in_prim_idx;
input_ptr = shader-input;
@@ -244,6 +243,11 @@ llvm_fetch_gs_input(struct draw_geometry_shader *shader,
for (slot = 0, vs_slot = 0; slot shader-info.num_inputs; ++slot) {
if (shader-info.input_semantic_name[slot] == TGSI_SEMANTIC_PRIMID) {
/* skip. we handle system values through gallivm */
+/* NOTE: If we hit this case here it's an ordinary input not a sv,
+ * even though it probably should be a sv.
+ * Not sure how to set it up as regular input however if that even,
+ * would make sense so hack around this later in gallivm.
+ */
} else {
vs_slot = draw_gs_get_input_index(
shader-info.input_semantic_name[slot],
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 02a4a52..f54e856 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1408,12 +1408,24 @@ emit_fetch_gs_input(
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
struct gallivm_state *gallivm = bld-bld_base.base.gallivm;
+ const struct tgsi_shader_info *info = bld-bld_base.info;
LLVMBuilderRef builder = gallivm-builder;
LLVMValueRef attrib_index = NULL;
LLVMValueRef vertex_index = NULL;
LLVMValueRef swizzle_index = lp_build_const_int32(gallivm, swizzle);
LLVMValueRef res;
+ if (info-input_semantic_name[reg-Register.Index] == TGSI_SEMANTIC_PRIMID)
{
+ /* This is really a system value not a regular input */
+ assert(!reg-Register.Indirect);
+ assert(!reg-Dimension.Indirect);
+ res = bld-system_values.prim_id;
+ if (stype != TGSI_TYPE_UNSIGNED stype != TGSI_TYPE_SIGNED) {
+ res = LLVMBuildBitCast(builder, res, bld_base-base.vec_type, );
+ }
+ return res;
+ }
+
if (reg-Register.Indirect) {
attrib_index = get_indirect_index(bld,
reg-Register.File,
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 563d2c5..c71bb36 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -191,11 +191,11 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
info-input_cylindrical_wrap[reg] =
(ubyte)fulldecl-Interp.CylindricalWrap;
info-num_inputs++;
- if (procType == TGSI_PROCESSOR_FRAGMENT) {
+ if (semName == TGSI_SEMANTIC_PRIMID)
+ info-uses_primid = TRUE;
+ else if (procType == TGSI_PROCESSOR_FRAGMENT) {
if (semName == TGSI_SEMANTIC_POSITION)
info-reads_position = TRUE;
- else if (semName == TGSI_SEMANTIC_PRIMID)
-info-uses_primid = TRUE;
[Mesa-dev] [Bug 79472] [llvmpipe] [softpipe] SIGSEGV src/gallium/auxiliary/draw/draw_cliptest_tmp.h:91
https://bugs.freedesktop.org/show_bug.cgi?id=79472 Roland Scheidegger srol...@vmware.com changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #2 from Roland Scheidegger srol...@vmware.com --- Forgot to mention it in the commit log but this was fixed by 6e9005e8b0e72e7a29cd9700d3bcb2459922c01e -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 11/11] glsl: Optimize X / X == 1
Would this be conformant to GLSL spec if X had a runtime value of 0? Seems unsafe to replace X / X with 1 without a runtime test...maybe GLSL spec allows such optimizations. On Thu, Aug 7, 2014 at 3:51 PM, thomashellan...@gmail.com wrote: From: Thomas Helland thomashellan...@gmail.com Shows no changes for shader-db. Signed-off-by: Thomas Helland thomashelland90 at gmail.com --- src/glsl/opt_algebraic.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 21bf332..a49752d 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -513,6 +513,8 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) } if (is_vec_one(op_const[1])) return ir-operands[0]; + if(ir-operands[0]-equals(ir-operands[1])) + return new(mem_ctx) ir_constant(1.0f, 1); break; case ir_binop_dot: -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 11/11] glsl: Optimize X / X == 1
On Thu, Aug 7, 2014 at 2:13 PM, Patrick Baggett baggett.patr...@gmail.com wrote: Would this be conformant to GLSL spec if X had a runtime value of 0? Seems unsafe to replace X / X with 1 without a runtime test...maybe GLSL spec allows such optimizations. The GLSL spec says Dividing by zero does not cause an exception but does result in an unspecified value. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 11/11] glsl: Optimize X / X == 1
It also doesn't hold true for inf and nan inputs with ieee754 math (just like 0 should be all nan, and in particular making a 1.0 out of a nan that way sounds sort of broken). Earlier glsl versions though had pretty much undefined behavior for infs/nans. Newer versions have more clearly defined behavior, but still say NaNs or not required to be generated and operations and built-in functions that operate on a NaN are not required to return a NaN as the result. Thus my guess is that this is ok. Roland Am 07.08.2014 23:13, schrieb Patrick Baggett: Would this be conformant to GLSL spec if X had a runtime value of 0? Seems unsafe to replace X / X with 1 without a runtime test...maybe GLSL spec allows such optimizations. On Thu, Aug 7, 2014 at 3:51 PM, thomashellan...@gmail.com mailto:thomashellan...@gmail.com wrote: From: Thomas Helland thomashellan...@gmail.com mailto:thomashellan...@gmail.com Shows no changes for shader-db. Signed-off-by: Thomas Helland thomashelland90 at gmail.com https://urldefense.proofpoint.com/v1/url?u=http://gmail.comk=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=F4msKE2WxRzA%2BwN%2B25muztFm5TSPwE8HKJfWfR2NgfY%3D%0Am=024s8S3qVXdOk1UaX8WU6nPiFZ1b0BcBbWJOFGPgJFM%3D%0As=57d5e398c7b48e96a78b2903fd2a9b3310fb2ff07b32213a434528a43bfbb1e2 --- src/glsl/opt_algebraic.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp index 21bf332..a49752d 100644 --- a/src/glsl/opt_algebraic.cpp +++ b/src/glsl/opt_algebraic.cpp @@ -513,6 +513,8 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir) } if (is_vec_one(op_const[1])) return ir-operands[0]; + if(ir-operands[0]-equals(ir-operands[1])) + return new(mem_ctx) ir_constant(1.0f, 1); break; case ir_binop_dot: -- 2.0.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org mailto:mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev https://urldefense.proofpoint.com/v1/url?u=http://lists.freedesktop.org/mailman/listinfo/mesa-devk=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=F4msKE2WxRzA%2BwN%2B25muztFm5TSPwE8HKJfWfR2NgfY%3D%0Am=024s8S3qVXdOk1UaX8WU6nPiFZ1b0BcBbWJOFGPgJFM%3D%0As=075157b65ef32d58d0596ad07524450cd8f32351f15292269ee125be3031acde ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://urldefense.proofpoint.com/v1/url?u=http://lists.freedesktop.org/mailman/listinfo/mesa-devk=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0Ar=F4msKE2WxRzA%2BwN%2B25muztFm5TSPwE8HKJfWfR2NgfY%3D%0Am=024s8S3qVXdOk1UaX8WU6nPiFZ1b0BcBbWJOFGPgJFM%3D%0As=075157b65ef32d58d0596ad07524450cd8f32351f15292269ee125be3031acde ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 7/6] glsl/glcpp: Add testing of illegal characters in macro replacement lists
The desired behavior here is that there is no error for an illegal character appearing in the replacement list of a macro definition. However, any expansion of such a macro, causing the illegal character to appear in the preprocessed source, should emit an error. These two tests exercise both of the cases, ensuring that the error is not emitted until the macro is actually expanded. --- .../142-illegal-characters-in-macro-definition.c | 17 ...legal-characters-in-macro-definition.c.expected | 17 .../tests/143-illegal-characters-in-macro-use.c| 24 + .../143-illegal-characters-in-macro-use.c.expected | 31 ++ 4 files changed, 89 insertions(+) create mode 100644 src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c create mode 100644 src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c.expected create mode 100644 src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c create mode 100644 src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c.expected diff --git a/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c b/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c new file mode 100644 index 000..a58cdcc --- /dev/null +++ b/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c @@ -0,0 +1,17 @@ +/* Our reading of the C++ specification, (as deferred to by the GLSL + * specification), suggests that all characters are legal as part of a macro + * replacement list, but actually using such a macro with an illegal character + * should emit an error. + */ + +/* So no errors here for just defining things with illegal characters. */ +#define DOUBLE_QUOTE +#define DOLLAR $ +#define APOSTROPHE ' +#define AT_SIGN @ +#define BACK_TICK ` +#define HASH # +#define BACK_SLASH_NOT_AT_END \... + +/* See the following test which ensures that using any of the above macros + * will generate an error. */ diff --git a/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c.expected b/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c.expected new file mode 100644 index 000..46c7ab9 --- /dev/null +++ b/src/glsl/glcpp/tests/142-illegal-characters-in-macro-definition.c.expected @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c b/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c new file mode 100644 index 000..b3b1d37 --- /dev/null +++ b/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c @@ -0,0 +1,24 @@ +/* Our reading of the C++ specification, (as deferred to by the GLSL + * specification), suggests that all characters are legal as part of a macro + * replacement list, but actually using such a macro with an illegal character + * should emit an error. + */ + +/* So no errors here for just defining things with illegal characters. + * (See the previous test which ensures there are no errors here.) */ +#define DOUBLE_QUOTE +#define DOLLAR $ +#define APOSTROPHE ' +#define AT_SIGN @ +#define BACK_TICK ` +#define HASH # +#define BACK_SLASH_NOT_AT_END \... + +/* But each of these should cause an error. */ +DOUBLE_QUOTE +DOLLAR +APOSTROPHE +AT_SIGN +BACK_TICK +HASH +BACK_SLASH_NOT_AT_END diff --git a/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c.expected b/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c.expected new file mode 100644 index 000..6b948d6 --- /dev/null +++ b/src/glsl/glcpp/tests/143-illegal-characters-in-macro-use.c.expected @@ -0,0 +1,31 @@ +0:9(22): preprocessor error: Illegal character '' +0:10(16): preprocessor error: Illegal character '$' +0:11(20): preprocessor error: Illegal character ''' +0:12(17): preprocessor error: Illegal character '@' +0:13(19): preprocessor error: Illegal character '`' +0:14(14): preprocessor error: Illegal character '#' +0:15(31): preprocessor error: Illegal character '\' + + + + + + + + + + + + + + + + + + + + + + + +... -- 2.0.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/6 v2.] glsl/glcpp: Emit an error for any illegal GLSL character.
The GLSL Language Specification (version 4.30.6) is quite clear about the GLSL
character set and the expected behavior for other characters:
Section 3.1 Character Set
The source character set used for the OpenGL shading languages, outside of
comments, is a subset of UTF-8. It includes the following characters:
The letters a-z, A-Z, and the underscore ( _ ).
The numbers 0-9.
The symbols period (.), plus (+), dash (-), slash (/), asterisk (*),
percent (%), angled brackets ( and ), square brackets ( [ and ] ),
parentheses ( ( and ) ), braces ( { and } ), caret (^), vertical bar
(|), ampersand (), tilde (~), equals (=), exclamation point (!),
colon (:), semicolon (;), comma (,), and question mark (?).
The number sign (#) for preprocessor use.
The backslash (\) as the line-continuation character when used as the
last character of a line, just before a new line.
White space: the space character, horizontal tab, vertical tab, form
feed, carriage-return, and line-feed.
A compile-time error will be given if any other character is used outside
a comment.
By taking the set of all possible 8-bit characters, and subtracting the above,
we have the set of illegal characters:
0x00 - 0x08 (^A - ^H)
0x0E - 0x1F (^N - ^Z, ^[, ^\, ^], ^^, ^_)
0x22 ()
0x24 ($)
0x27 (')
0x40 (@)
0x60 (')
0x7F (DEL or ^?)
0x80 - 0xFF (non-ASCII)
As well as (#) outside of uses defined by the preprocessor (not starting a
directive, nor as part of a legal paste operator in a replacement list), and
(\) appearing anywhere but at the end of a line.
So instead of the previous whitelist we had for OTHER characters, we now
add a blacklist for ILLEGAL characters based on the above, and then use a
simple regular expression of . to catch any characters that get past the
blacklist.
This approach also means the internal-error rule with . can no longer be
matched, so it goes away now.
v2: Instead of emitting the error as soon as the illegal character is lexed,
we instead emit an ILLEGAL token to the parser. This allows the parser to
allow the character as part of the replacement list of a macro, (since these
are specified to allow any character). However, if such a macro is actually
instantiated, the parser will emit an error when it goes to print the illegal
character as part of the preprocessed output.
---
src/glsl/glcpp/glcpp-lex.l | 32 +++-
src/glsl/glcpp/glcpp-parse.y | 25 ++---
2 files changed, 29 insertions(+), 28 deletions(-)
diff --git a/src/glsl/glcpp/glcpp-lex.l b/src/glsl/glcpp/glcpp-lex.l
index 0dbdab0..0482c4e 100644
--- a/src/glsl/glcpp/glcpp-lex.l
+++ b/src/glsl/glcpp/glcpp-lex.l
@@ -175,15 +175,7 @@ HASH #
IDENTIFIER [_a-zA-Z][_a-zA-Z0-9]*
PP_NUMBER [.]?[0-9]([._a-zA-Z0-9]|[eEpP][-+])*
PUNCTUATION[][(){}.*~!/%^|;,=+-]
-
-/* The OTHER class is simply a catch-all for things that the CPP
-parser just doesn't care about. Since flex regular expressions that
-match longer strings take priority over those matching shorter
-strings, we have to be careful to avoid OTHER matching and hiding
-something that CPP does care about. So we simply exclude all
-characters that appear in any other expressions. */
-
-OTHER [^][_#[:space:]#a-zA-Z0-9(){}.*~!/%^|;,=+-]
+ILLEGAL[\x00-\x08\x0E-\x1F$'@`\x7F\x80-\xFF\\]
DIGITS [0-9][0-9]*
DECIMAL_INTEGER[1-9][0-9]*[uU]?
@@ -276,9 +268,10 @@ HEXADECIMAL_INTEGER0[xX][0-9a-fA-F]+[uU]?
* token. */
if (parser-first_non_space_token_this_line) {
BEGIN HASH;
+ RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);
+ } else {
+ RETURN_STRING_TOKEN (ILLEGAL);
}
-
- RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);
}
HASHversion{HSPACE}+ {
@@ -505,8 +498,8 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
RETURN_TOKEN (yytext[0]);
}
-{OTHER}+ {
- RETURN_STRING_TOKEN (OTHER);
+{ILLEGAL} {
+ RETURN_STRING_TOKEN (ILLEGAL);
}
{HSPACE} {
@@ -539,14 +532,7 @@ HEXADECIMAL_INTEGER0[xX][0-9a-fA-F]+[uU]?
RETURN_TOKEN (NEWLINE);
}
- /* This is a catch-all to avoid the annoying default flex action which
-* matches any character and prints it. If any input ever matches this
-* rule, then we have made a mistake above and need to fix one or more
-* of the preceding patterns to match that input. */
-
-*. {
- glcpp_error(yylloc, yyextra, Internal compiler error: Unexpected
character: %s, yytext);
-
+UNREACHABLE. {
/* We don't actually use the UNREACHABLE start condition. We
only have this block here so that we can pretend to call some
generated functions, (to avoid defined but not used
@@ -557,6 +543,10 @@ HEXADECIMAL_INTEGER0[xX][0-9a-fA-F]+[uU]?
}
}
Re: [Mesa-dev] [PATCH 1/4] gallium: add basic support for BPTC formats
These functions should be updated too:
util_format_srgb
util_format_linear
util_format_fits_8unorm
Marek
On Wed, Jul 23, 2014 at 3:11 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
So... the pack/unpack functions just assert. As far as I can tell, these are
entirely unused until e.g. softpipe or llvmpipe try to make use of this
format. Whoever adds bptc texturing support to those drivers can add the
mesa/texstore integration.
src/gallium/auxiliary/Makefile.sources | 1 +
src/gallium/auxiliary/util/u_format.c| 5 ++
src/gallium/auxiliary/util/u_format.csv | 6 ++
src/gallium/auxiliary/util/u_format.h| 8 +-
src/gallium/auxiliary/util/u_format_bptc.c | 26 +++
src/gallium/auxiliary/util/u_format_bptc.h | 109
+++
src/gallium/auxiliary/util/u_format_pack.py | 2 +-
src/gallium/auxiliary/util/u_format_table.py | 3 +-
src/gallium/include/pipe/p_format.h | 5 ++
9 files changed, 162 insertions(+), 3 deletions(-)
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.c
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.h
diff --git a/src/gallium/auxiliary/Makefile.sources
b/src/gallium/auxiliary/Makefile.sources
index 8919783..8b06c4f 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -113,6 +113,7 @@ C_SOURCES := \
util/u_format_s3tc.c \
util/u_format_rgtc.c \
util/u_format_etc.c \
+ util/u_format_bptc.c \
util/u_format_tests.c \
util/u_format_yuv.c \
util/u_format_zs.c \
diff --git a/src/gallium/auxiliary/util/u_format.c
b/src/gallium/auxiliary/util/u_format.c
index a53ed6f..cf355e5 100644
--- a/src/gallium/auxiliary/util/u_format.c
+++ b/src/gallium/auxiliary/util/u_format.c
@@ -496,6 +496,11 @@ util_format_fits_8unorm(const struct
util_format_description *format_desc)
format_desc-format == PIPE_FORMAT_LATC2_SNORM)
return FALSE;
return TRUE;
+ case UTIL_FORMAT_LAYOUT_BPTC:
+ if (format_desc-format == PIPE_FORMAT_BPTC_RGBA_UNORM ||
+ format_desc-format == PIPE_FORMAT_BPTC_SRGBA_UNORM)
+ return TRUE;
+ return FALSE;
case UTIL_FORMAT_LAYOUT_PLAIN:
/*
diff --git a/src/gallium/auxiliary/util/u_format.csv
b/src/gallium/auxiliary/util/u_format.csv
index 8aa5c36..570ea5a 100644
--- a/src/gallium/auxiliary/util/u_format.csv
+++ b/src/gallium/auxiliary/util/u_format.csv
@@ -160,6 +160,7 @@ PIPE_FORMAT_R8G8Bx_SNORM , other, 1, 1,
sn8 , sn8 , , , x
# - http://www.opengl.org/registry/specs/EXT/texture_compression_s3tc.txt
# - http://www.opengl.org/registry/specs/ARB/texture_compression_rgtc.txt
# - http://www.opengl.org/registry/specs/EXT/texture_compression_latc.txt
+# - http://www.opengl.org/registry/specs/ARB/texture_compression_bptc.txt
# -
http://www.khronos.org/registry/gles/extensions/OES/OES_compressed_ETC1_RGB8_texture.txt
# - http://msdn.microsoft.com/en-us/library/bb694531.aspx
PIPE_FORMAT_DXT1_RGB , s3tc, 4, 4, x64 , , , ,
xyz1, rgb
@@ -183,6 +184,11 @@ PIPE_FORMAT_LATC2_SNORM , rgtc, 4, 4, x128,
, , , xxxy, rg
PIPE_FORMAT_ETC1_RGB8 , etc, 4, 4, x64, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, rgb
+PIPE_FORMAT_BPTC_SRGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, srgb
+PIPE_FORMAT_BPTC_RGB_FLOAT, bptc, 4, 4, x128, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGB_UFLOAT , bptc, 4, 4, x128, , , ,
xyz1, rgb
+
# Straightforward D3D10-like formats (also used for
# vertex buffer element description)
#
diff --git a/src/gallium/auxiliary/util/u_format.h
b/src/gallium/auxiliary/util/u_format.h
index 2e2bf02..1789a28 100644
--- a/src/gallium/auxiliary/util/u_format.h
+++ b/src/gallium/auxiliary/util/u_format.h
@@ -79,9 +79,14 @@ enum util_format_layout {
UTIL_FORMAT_LAYOUT_ETC = 6,
/**
+* BC6/7 Texture Compression
+*/
+ UTIL_FORMAT_LAYOUT_BPTC = 7,
+
+ /**
* Everything else that doesn't fit in any of the above layouts.
*/
- UTIL_FORMAT_LAYOUT_OTHER = 7
+ UTIL_FORMAT_LAYOUT_OTHER = 8
};
@@ -475,6 +480,7 @@ util_format_is_compressed(enum pipe_format format)
case UTIL_FORMAT_LAYOUT_S3TC:
case UTIL_FORMAT_LAYOUT_RGTC:
case UTIL_FORMAT_LAYOUT_ETC:
+ case UTIL_FORMAT_LAYOUT_BPTC:
/* XXX add other formats in the future */
return TRUE;
default:
diff --git a/src/gallium/auxiliary/util/u_format_bptc.c
b/src/gallium/auxiliary/util/u_format_bptc.c
new file mode 100644
index 000..8fb002f
--- /dev/null
+++ b/src/gallium/auxiliary/util/u_format_bptc.c
@@ -0,0 +1,26 @@
+#include u_format.h
+#include u_format_bptc.h
Re: [Mesa-dev] [PATCH 3/4] mesa/st: add BPTC formats, expose ARB_texture_compression_bptc
See st_GetTexImage and search for BPTC. There is a TODO comment which
says what to do. All formats except for SRGBA must be added there.
Marek
On Wed, Jul 23, 2014 at 3:11 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
This trivially depends on Neil's patches which add the mesa/core bits.
src/mesa/state_tracker/st_extensions.c | 6 ++
src/mesa/state_tracker/st_format.c | 36
++
2 files changed, 42 insertions(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index aa59fbf..7297ffb 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -491,6 +491,12 @@ void st_init_extensions(struct st_context *st)
PIPE_FORMAT_DXT3_RGBA,
PIPE_FORMAT_DXT5_RGBA } },
+ { { o(ARB_texture_compression_bptc) },
+{ PIPE_FORMAT_BPTC_RGBA_UNORM,
+ PIPE_FORMAT_BPTC_SRGBA_UNORM,
+ PIPE_FORMAT_BPTC_RGB_FLOAT,
+ PIPE_FORMAT_BPTC_RGB_UFLOAT } },
+
{ { o(EXT_texture_shared_exponent) },
{ PIPE_FORMAT_R9G9B9E5_FLOAT } },
diff --git a/src/mesa/state_tracker/st_format.c
b/src/mesa/state_tracker/st_format.c
index 409079b..4ce5d43 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -326,6 +326,15 @@ st_mesa_format_to_pipe_format(mesa_format mesaFormat)
case MESA_FORMAT_ETC1_RGB8:
return PIPE_FORMAT_ETC1_RGB8;
+ case MESA_FORMAT_BPTC_RGBA_UNORM:
+ return PIPE_FORMAT_BPTC_RGBA_UNORM;
+ case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
+ return PIPE_FORMAT_BPTC_SRGBA_UNORM;
+ case MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT:
+ return PIPE_FORMAT_BPTC_RGB_FLOAT;
+ case MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT:
+ return PIPE_FORMAT_BPTC_RGB_UFLOAT;
+
/* signed normalized formats */
case MESA_FORMAT_R_SNORM8:
return PIPE_FORMAT_R8_SNORM;
@@ -685,6 +694,15 @@ st_pipe_format_to_mesa_format(enum pipe_format format)
case PIPE_FORMAT_ETC1_RGB8:
return MESA_FORMAT_ETC1_RGB8;
+ case PIPE_FORMAT_BPTC_RGBA_UNORM:
+ return MESA_FORMAT_BPTC_RGBA_UNORM;
+ case PIPE_FORMAT_BPTC_SRGBA_UNORM:
+ return MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM;
+ case PIPE_FORMAT_BPTC_RGB_FLOAT:
+ return MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT;
+ case PIPE_FORMAT_BPTC_RGB_UFLOAT:
+ return MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT;
+
/* signed normalized formats */
case PIPE_FORMAT_R8_SNORM:
return MESA_FORMAT_R_SNORM8;
@@ -1238,6 +1256,24 @@ static const struct format_mapping format_map[] = {
{ PIPE_FORMAT_ETC1_RGB8, 0 }
},
+ /* BPTC */
+ {
+ { GL_COMPRESSED_RGBA_BPTC_UNORM, 0 },
+ { PIPE_FORMAT_BPTC_RGBA_UNORM, 0 },
+ },
+ {
+ { GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM, 0 },
+ { PIPE_FORMAT_BPTC_SRGBA_UNORM, 0 },
+ },
+ {
+ { GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT, 0 },
+ { PIPE_FORMAT_BPTC_RGB_FLOAT, 0 },
+ },
+ {
+ { GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT, 0 },
+ { PIPE_FORMAT_BPTC_RGB_UFLOAT, 0 },
+ },
+
/* signed/unsigned integer formats.
*/
{
--
1.8.5.5
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Re: [Mesa-dev] [PATCH 3/4] mesa/st: add BPTC formats, expose ARB_texture_compression_bptc
Yeah, I noticed those later on. The latest patch is at
https://github.com/imirkin/mesa/commit/1a2f6dc41dae3df8d332ce4675e072ee0d9f37c7
Or did you have something else in mind?
On Thu, Aug 7, 2014 at 6:23 PM, Marek Olšák mar...@gmail.com wrote:
See st_GetTexImage and search for BPTC. There is a TODO comment which
says what to do. All formats except for SRGBA must be added there.
Marek
On Wed, Jul 23, 2014 at 3:11 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
This trivially depends on Neil's patches which add the mesa/core bits.
src/mesa/state_tracker/st_extensions.c | 6 ++
src/mesa/state_tracker/st_format.c | 36
++
2 files changed, 42 insertions(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index aa59fbf..7297ffb 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -491,6 +491,12 @@ void st_init_extensions(struct st_context *st)
PIPE_FORMAT_DXT3_RGBA,
PIPE_FORMAT_DXT5_RGBA } },
+ { { o(ARB_texture_compression_bptc) },
+{ PIPE_FORMAT_BPTC_RGBA_UNORM,
+ PIPE_FORMAT_BPTC_SRGBA_UNORM,
+ PIPE_FORMAT_BPTC_RGB_FLOAT,
+ PIPE_FORMAT_BPTC_RGB_UFLOAT } },
+
{ { o(EXT_texture_shared_exponent) },
{ PIPE_FORMAT_R9G9B9E5_FLOAT } },
diff --git a/src/mesa/state_tracker/st_format.c
b/src/mesa/state_tracker/st_format.c
index 409079b..4ce5d43 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -326,6 +326,15 @@ st_mesa_format_to_pipe_format(mesa_format mesaFormat)
case MESA_FORMAT_ETC1_RGB8:
return PIPE_FORMAT_ETC1_RGB8;
+ case MESA_FORMAT_BPTC_RGBA_UNORM:
+ return PIPE_FORMAT_BPTC_RGBA_UNORM;
+ case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
+ return PIPE_FORMAT_BPTC_SRGBA_UNORM;
+ case MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT:
+ return PIPE_FORMAT_BPTC_RGB_FLOAT;
+ case MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT:
+ return PIPE_FORMAT_BPTC_RGB_UFLOAT;
+
/* signed normalized formats */
case MESA_FORMAT_R_SNORM8:
return PIPE_FORMAT_R8_SNORM;
@@ -685,6 +694,15 @@ st_pipe_format_to_mesa_format(enum pipe_format format)
case PIPE_FORMAT_ETC1_RGB8:
return MESA_FORMAT_ETC1_RGB8;
+ case PIPE_FORMAT_BPTC_RGBA_UNORM:
+ return MESA_FORMAT_BPTC_RGBA_UNORM;
+ case PIPE_FORMAT_BPTC_SRGBA_UNORM:
+ return MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM;
+ case PIPE_FORMAT_BPTC_RGB_FLOAT:
+ return MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT;
+ case PIPE_FORMAT_BPTC_RGB_UFLOAT:
+ return MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT;
+
/* signed normalized formats */
case PIPE_FORMAT_R8_SNORM:
return MESA_FORMAT_R_SNORM8;
@@ -1238,6 +1256,24 @@ static const struct format_mapping format_map[] = {
{ PIPE_FORMAT_ETC1_RGB8, 0 }
},
+ /* BPTC */
+ {
+ { GL_COMPRESSED_RGBA_BPTC_UNORM, 0 },
+ { PIPE_FORMAT_BPTC_RGBA_UNORM, 0 },
+ },
+ {
+ { GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM, 0 },
+ { PIPE_FORMAT_BPTC_SRGBA_UNORM, 0 },
+ },
+ {
+ { GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT, 0 },
+ { PIPE_FORMAT_BPTC_RGB_FLOAT, 0 },
+ },
+ {
+ { GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT, 0 },
+ { PIPE_FORMAT_BPTC_RGB_UFLOAT, 0 },
+ },
+
/* signed/unsigned integer formats.
*/
{
--
1.8.5.5
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Re: [Mesa-dev] [PATCH 3/4] mesa/st: add BPTC formats, expose ARB_texture_compression_bptc
On Fri, Aug 8, 2014 at 12:27 AM, Ilia Mirkin imir...@alum.mit.edu wrote: Yeah, I noticed those later on. The latest patch is at https://github.com/imirkin/mesa/commit/1a2f6dc41dae3df8d332ce4675e072ee0d9f37c7 Or did you have something else in mind? No. It looks great. Reviewed-by: Marek Olšák marek.ol...@amd.com Marek ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] RFC: glsl/glcpp: Allow for '#' characters to appear in shader body
Erik Faye-Lund kusmab...@gmail.com writes: On Tue, Aug 5, 2014 at 11:22 PM, Carl Worth cwo...@cworth.org wrote: Now, what we could do if we were so inclined, would be to defer the errors for illegal characters until they actually appeared in the pre-processor output. What you describe here seems to actually be what the standard requires: The relevant bit of the parse rule for a define statement of this type is like so (Section 16 [cpp] of the C++ spec): ... each non-white-space character that cannot be one of the above Yes, that does seem clear. Thanks for chasing that down. Note that '$' is a bit different, as it's not a part of the preprocessor's character set, so using it might be interpreted as undefined behavior. Right. That could easily go either way. Is the phrase each non-white-space character restricted to characters of the original character set? Regardless, I've just sent a second version of the relevant patch from my subsequent series that now implements exactly what is described above. (And I sent another patch (7/6) in that series to test things.) I'm pretty happy with the result, but would of course appreciate review From anyone. -Carl -- carl.d.wo...@intel.com pgp22eE6dRzzK.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/4] gallium: add basic support for BPTC formats
Thanks, will do. I'm also a little concerned that my claims of the
pack/unpack functions not being used are false... I'll need to test
whether e.g. the generate-mipmap stuff doesn't hit it. I don't think
the piglits were ready before, but now they hopefully are. (I should
probably also rebase on the latest version of Neil's code.)
On Thu, Aug 7, 2014 at 6:20 PM, Marek Olšák mar...@gmail.com wrote:
These functions should be updated too:
util_format_srgb
util_format_linear
util_format_fits_8unorm
Marek
On Wed, Jul 23, 2014 at 3:11 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
So... the pack/unpack functions just assert. As far as I can tell, these are
entirely unused until e.g. softpipe or llvmpipe try to make use of this
format. Whoever adds bptc texturing support to those drivers can add the
mesa/texstore integration.
src/gallium/auxiliary/Makefile.sources | 1 +
src/gallium/auxiliary/util/u_format.c| 5 ++
src/gallium/auxiliary/util/u_format.csv | 6 ++
src/gallium/auxiliary/util/u_format.h| 8 +-
src/gallium/auxiliary/util/u_format_bptc.c | 26 +++
src/gallium/auxiliary/util/u_format_bptc.h | 109
+++
src/gallium/auxiliary/util/u_format_pack.py | 2 +-
src/gallium/auxiliary/util/u_format_table.py | 3 +-
src/gallium/include/pipe/p_format.h | 5 ++
9 files changed, 162 insertions(+), 3 deletions(-)
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.c
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.h
diff --git a/src/gallium/auxiliary/Makefile.sources
b/src/gallium/auxiliary/Makefile.sources
index 8919783..8b06c4f 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -113,6 +113,7 @@ C_SOURCES := \
util/u_format_s3tc.c \
util/u_format_rgtc.c \
util/u_format_etc.c \
+ util/u_format_bptc.c \
util/u_format_tests.c \
util/u_format_yuv.c \
util/u_format_zs.c \
diff --git a/src/gallium/auxiliary/util/u_format.c
b/src/gallium/auxiliary/util/u_format.c
index a53ed6f..cf355e5 100644
--- a/src/gallium/auxiliary/util/u_format.c
+++ b/src/gallium/auxiliary/util/u_format.c
@@ -496,6 +496,11 @@ util_format_fits_8unorm(const struct
util_format_description *format_desc)
format_desc-format == PIPE_FORMAT_LATC2_SNORM)
return FALSE;
return TRUE;
+ case UTIL_FORMAT_LAYOUT_BPTC:
+ if (format_desc-format == PIPE_FORMAT_BPTC_RGBA_UNORM ||
+ format_desc-format == PIPE_FORMAT_BPTC_SRGBA_UNORM)
+ return TRUE;
+ return FALSE;
case UTIL_FORMAT_LAYOUT_PLAIN:
/*
diff --git a/src/gallium/auxiliary/util/u_format.csv
b/src/gallium/auxiliary/util/u_format.csv
index 8aa5c36..570ea5a 100644
--- a/src/gallium/auxiliary/util/u_format.csv
+++ b/src/gallium/auxiliary/util/u_format.csv
@@ -160,6 +160,7 @@ PIPE_FORMAT_R8G8Bx_SNORM , other, 1, 1,
sn8 , sn8 , , , x
# - http://www.opengl.org/registry/specs/EXT/texture_compression_s3tc.txt
# - http://www.opengl.org/registry/specs/ARB/texture_compression_rgtc.txt
# - http://www.opengl.org/registry/specs/EXT/texture_compression_latc.txt
+# - http://www.opengl.org/registry/specs/ARB/texture_compression_bptc.txt
# -
http://www.khronos.org/registry/gles/extensions/OES/OES_compressed_ETC1_RGB8_texture.txt
# - http://msdn.microsoft.com/en-us/library/bb694531.aspx
PIPE_FORMAT_DXT1_RGB , s3tc, 4, 4, x64 , , , ,
xyz1, rgb
@@ -183,6 +184,11 @@ PIPE_FORMAT_LATC2_SNORM , rgtc, 4, 4, x128,
, , , xxxy, rg
PIPE_FORMAT_ETC1_RGB8 , etc, 4, 4, x64, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, rgb
+PIPE_FORMAT_BPTC_SRGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, srgb
+PIPE_FORMAT_BPTC_RGB_FLOAT, bptc, 4, 4, x128, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGB_UFLOAT , bptc, 4, 4, x128, , , ,
xyz1, rgb
+
# Straightforward D3D10-like formats (also used for
# vertex buffer element description)
#
diff --git a/src/gallium/auxiliary/util/u_format.h
b/src/gallium/auxiliary/util/u_format.h
index 2e2bf02..1789a28 100644
--- a/src/gallium/auxiliary/util/u_format.h
+++ b/src/gallium/auxiliary/util/u_format.h
@@ -79,9 +79,14 @@ enum util_format_layout {
UTIL_FORMAT_LAYOUT_ETC = 6,
/**
+* BC6/7 Texture Compression
+*/
+ UTIL_FORMAT_LAYOUT_BPTC = 7,
+
+ /**
* Everything else that doesn't fit in any of the above layouts.
*/
- UTIL_FORMAT_LAYOUT_OTHER = 7
+ UTIL_FORMAT_LAYOUT_OTHER = 8
};
@@ -475,6 +480,7 @@ util_format_is_compressed(enum pipe_format format)
case UTIL_FORMAT_LAYOUT_S3TC:
case UTIL_FORMAT_LAYOUT_RGTC:
case
Re: [Mesa-dev] [PATCH] glsl: Remove unused initialized field from gl_uniform_storage.
On 08/07/2014 10:36 AM, Matt Turner wrote:
---
Should this have been used somewhere?
It seems like it was used at one point... did you try any git archaeology?
src/glsl/ir_uniform.h | 5 -
src/glsl/link_uniform_initializers.cpp | 4
src/glsl/link_uniforms.cpp | 1 -
src/mesa/main/uniform_query.cpp| 4
4 files changed, 14 deletions(-)
diff --git a/src/glsl/ir_uniform.h b/src/glsl/ir_uniform.h
index 2f73528..9c25507 100644
--- a/src/glsl/ir_uniform.h
+++ b/src/glsl/ir_uniform.h
@@ -116,11 +116,6 @@ struct gl_uniform_storage {
*/
unsigned array_elements;
- /**
-* Has this uniform ever been set?
-*/
- bool initialized;
-
struct gl_opaque_uniform_index sampler[MESA_SHADER_STAGES];
struct gl_opaque_uniform_index image[MESA_SHADER_STAGES];
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl/link_uniform_initializers.cpp
index c6fe6a9..809aae5 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -128,8 +128,6 @@ set_sampler_binding(gl_shader_program *prog, const char
*name, int binding)
}
}
}
-
- storage-initialized = true;
}
void
@@ -226,8 +224,6 @@ set_uniform_initializer(void *mem_ctx, gl_shader_program
*prog,
}
}
}
-
- storage-initialized = true;
}
}
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 3251097..f02a074 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -580,7 +580,6 @@ private:
this-uniforms[id].name = ralloc_strdup(this-uniforms, name);
this-uniforms[id].type = base_type;
- this-uniforms[id].initialized = 0;
this-uniforms[id].num_driver_storage = 0;
this-uniforms[id].driver_storage = NULL;
this-uniforms[id].storage = this-values;
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 609d94b..88012dd 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -806,8 +806,6 @@ _mesa_uniform(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
/* If the uniform is a sampler, do the extra magic necessary to propagate
@@ -982,8 +980,6 @@ _mesa_uniform_matrix(struct gl_context *ctx, struct
gl_shader_program *shProg,
}
}
- uni-initialized = true;
-
_mesa_propagate_uniforms_to_driver_storage(uni, offset, count);
}
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Re: [Mesa-dev] [PATCH 1/4] gallium: add basic support for BPTC formats
The software fallback for GenerateMipmap is entirely done in
mesa/main, so you don't have to worry about it.
Marek
On Fri, Aug 8, 2014 at 12:34 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Thanks, will do. I'm also a little concerned that my claims of the
pack/unpack functions not being used are false... I'll need to test
whether e.g. the generate-mipmap stuff doesn't hit it. I don't think
the piglits were ready before, but now they hopefully are. (I should
probably also rebase on the latest version of Neil's code.)
On Thu, Aug 7, 2014 at 6:20 PM, Marek Olšák mar...@gmail.com wrote:
These functions should be updated too:
util_format_srgb
util_format_linear
util_format_fits_8unorm
Marek
On Wed, Jul 23, 2014 at 3:11 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
So... the pack/unpack functions just assert. As far as I can tell, these are
entirely unused until e.g. softpipe or llvmpipe try to make use of this
format. Whoever adds bptc texturing support to those drivers can add the
mesa/texstore integration.
src/gallium/auxiliary/Makefile.sources | 1 +
src/gallium/auxiliary/util/u_format.c| 5 ++
src/gallium/auxiliary/util/u_format.csv | 6 ++
src/gallium/auxiliary/util/u_format.h| 8 +-
src/gallium/auxiliary/util/u_format_bptc.c | 26 +++
src/gallium/auxiliary/util/u_format_bptc.h | 109
+++
src/gallium/auxiliary/util/u_format_pack.py | 2 +-
src/gallium/auxiliary/util/u_format_table.py | 3 +-
src/gallium/include/pipe/p_format.h | 5 ++
9 files changed, 162 insertions(+), 3 deletions(-)
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.c
create mode 100644 src/gallium/auxiliary/util/u_format_bptc.h
diff --git a/src/gallium/auxiliary/Makefile.sources
b/src/gallium/auxiliary/Makefile.sources
index 8919783..8b06c4f 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -113,6 +113,7 @@ C_SOURCES := \
util/u_format_s3tc.c \
util/u_format_rgtc.c \
util/u_format_etc.c \
+ util/u_format_bptc.c \
util/u_format_tests.c \
util/u_format_yuv.c \
util/u_format_zs.c \
diff --git a/src/gallium/auxiliary/util/u_format.c
b/src/gallium/auxiliary/util/u_format.c
index a53ed6f..cf355e5 100644
--- a/src/gallium/auxiliary/util/u_format.c
+++ b/src/gallium/auxiliary/util/u_format.c
@@ -496,6 +496,11 @@ util_format_fits_8unorm(const struct
util_format_description *format_desc)
format_desc-format == PIPE_FORMAT_LATC2_SNORM)
return FALSE;
return TRUE;
+ case UTIL_FORMAT_LAYOUT_BPTC:
+ if (format_desc-format == PIPE_FORMAT_BPTC_RGBA_UNORM ||
+ format_desc-format == PIPE_FORMAT_BPTC_SRGBA_UNORM)
+ return TRUE;
+ return FALSE;
case UTIL_FORMAT_LAYOUT_PLAIN:
/*
diff --git a/src/gallium/auxiliary/util/u_format.csv
b/src/gallium/auxiliary/util/u_format.csv
index 8aa5c36..570ea5a 100644
--- a/src/gallium/auxiliary/util/u_format.csv
+++ b/src/gallium/auxiliary/util/u_format.csv
@@ -160,6 +160,7 @@ PIPE_FORMAT_R8G8Bx_SNORM , other, 1, 1,
sn8 , sn8 , , , x
# - http://www.opengl.org/registry/specs/EXT/texture_compression_s3tc.txt
# - http://www.opengl.org/registry/specs/ARB/texture_compression_rgtc.txt
# - http://www.opengl.org/registry/specs/EXT/texture_compression_latc.txt
+# - http://www.opengl.org/registry/specs/ARB/texture_compression_bptc.txt
# -
http://www.khronos.org/registry/gles/extensions/OES/OES_compressed_ETC1_RGB8_texture.txt
# - http://msdn.microsoft.com/en-us/library/bb694531.aspx
PIPE_FORMAT_DXT1_RGB , s3tc, 4, 4, x64 , , , ,
xyz1, rgb
@@ -183,6 +184,11 @@ PIPE_FORMAT_LATC2_SNORM , rgtc, 4, 4, x128,
, , , xxxy, rg
PIPE_FORMAT_ETC1_RGB8 , etc, 4, 4, x64, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, rgb
+PIPE_FORMAT_BPTC_SRGBA_UNORM , bptc, 4, 4, x128, , , ,
xyzw, srgb
+PIPE_FORMAT_BPTC_RGB_FLOAT, bptc, 4, 4, x128, , , ,
xyz1, rgb
+PIPE_FORMAT_BPTC_RGB_UFLOAT , bptc, 4, 4, x128, , , ,
xyz1, rgb
+
# Straightforward D3D10-like formats (also used for
# vertex buffer element description)
#
diff --git a/src/gallium/auxiliary/util/u_format.h
b/src/gallium/auxiliary/util/u_format.h
index 2e2bf02..1789a28 100644
--- a/src/gallium/auxiliary/util/u_format.h
+++ b/src/gallium/auxiliary/util/u_format.h
@@ -79,9 +79,14 @@ enum util_format_layout {
UTIL_FORMAT_LAYOUT_ETC = 6,
/**
+* BC6/7 Texture Compression
+*/
+ UTIL_FORMAT_LAYOUT_BPTC = 7,
+
+ /**
* Everything else that doesn't fit in any of the above layouts.
*/
- UTIL_FORMAT_LAYOUT_OTHER = 7
+
[Mesa-dev] [PATCH] st/mesa: fix blit-based partial TexSubImage for 1D arrays
From: Marek Olšák marek.ol...@amd.com
This fixes piglit spec/EXT_texture_array/render-1darray.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index 5a5efcb..969a05f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -776,6 +776,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
+ zoffset = yoffset;
+ yoffset = 0;
depth = height;
height = 1;
}
--
1.9.1
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Re: [Mesa-dev] [PATCH] st/mesa: fix blit-based partial TexSubImage for 1D arrays
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
Makes sense and also fixes the new piglit on nvc0.
On Thu, Aug 7, 2014 at 6:49 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This fixes piglit spec/EXT_texture_array/render-1darray.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index 5a5efcb..969a05f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -776,6 +776,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
+ zoffset = yoffset;
+ yoffset = 0;
depth = height;
height = 1;
}
--
1.9.1
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Re: [Mesa-dev] [PATCH] exec_list: add a list_foreach_typed_reverse() macro
Reviewed-by: Ian Romanick ian.d.roman...@intel.com But you should wait to push it until you push a patch that uses it... otherwise some may send a patch to remove the unused macro. :) On 07/30/2014 03:52 PM, Connor Abbott wrote: Signed-off-by: Connor Abbott connor.abb...@intel.com --- src/glsl/list.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/glsl/list.h b/src/glsl/list.h index 3ee6cda..c402f48 100644 --- a/src/glsl/list.h +++ b/src/glsl/list.h @@ -644,6 +644,12 @@ inline void exec_node::insert_before(exec_list *before) (__node)-__field.next != NULL; \ (__node) = exec_node_data(__type, (__node)-__field.next, __field)) +#define foreach_list_typed_reverse(__type, __node, __field, __list) \ + for (__type * __node =\ +exec_node_data(__type, (__list)-tail_pred, __field);\ + (__node)-__field.prev != NULL; \ + (__node) = exec_node_data(__type, (__node)-__field.prev, __field)) + #define foreach_list_typed_safe(__type, __node, __field, __list) \ for (__type * __node = \ exec_node_data(__type, (__list)-head, __field),\ ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] st/mesa: fix blit-based partial TexSubImage for 1D arrays
Looks good to me too. I guess on llvmpipe we got lucky because
row_stride and layer_stride were equal so the math worked out the same
in the end :-).
Reviewed-by: Roland Scheidegger srol...@vmware.com
Am 08.08.2014 01:18, schrieb Ilia Mirkin:
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
Makes sense and also fixes the new piglit on nvc0.
On Thu, Aug 7, 2014 at 6:49 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This fixes piglit spec/EXT_texture_array/render-1darray.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index 5a5efcb..969a05f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -776,6 +776,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
+ zoffset = yoffset;
+ yoffset = 0;
depth = height;
height = 1;
}
--
1.9.1
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Re: [Mesa-dev] [PATCH 2/9] i915: Fix GL_DOT3_RGBA a bit
I double checked with the existing code and the extension spec. I
believe this change is correct. If GL_DOT3_RGBA is used, the alpha mode
is ignored.
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
On 08/06/2014 11:56 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
The spec says using DOT4 for alpha is undefined unless DOT4 is also used
for color. It seems to do the right thing anyway, but better safe than sorry.
Also override numAlphaArgs to 2 for DOT4 since that's what it wants.
This migth fix something in case the specified alpha mode has only one
argument. Also avoids emitting a needless 3DSTATE_MAP_BLEND_ARG if
the specified alpha mode has three arguments.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
src/mesa/drivers/dri/i915/i830_texblend.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i830_texblend.c
b/src/mesa/drivers/dri/i915/i830_texblend.c
index 236be59..feea383 100644
--- a/src/mesa/drivers/dri/i915/i830_texblend.c
+++ b/src/mesa/drivers/dri/i915/i830_texblend.c
@@ -136,7 +136,7 @@ i830SetTexEnvCombine(struct i830_context * i830,
GLuint texel_op, GLuint * state, const GLfloat * factor)
{
const GLuint numColorArgs = combine-_NumArgsRGB;
- const GLuint numAlphaArgs = combine-_NumArgsA;
+ GLuint numAlphaArgs = combine-_NumArgsA;
GLuint blendop;
GLuint ablendop;
@@ -209,7 +209,7 @@ i830SetTexEnvCombine(struct i830_context * i830,
break;
case GL_DOT3_RGBA_EXT:
case GL_DOT3_RGBA:
- blendop = TEXBLENDOP_DOT3;
+ blendop = TEXBLENDOP_DOT4;
break;
default:
return pass_through(state, blendUnit);
@@ -273,6 +273,7 @@ i830SetTexEnvCombine(struct i830_context * i830,
if (combine-ModeRGB == GL_DOT3_RGBA_EXT ||
combine-ModeRGB == GL_DOT3_RGBA) {
ablendop = TEXBLENDOP_DOT4;
+ numAlphaArgs = 2;
args_A[0] = TEXBLENDARG_FACTOR; /* the global factor */
args_A[1] = TEXBLENDARG_FACTOR;
args_A[2] = TEXBLENDARG_FACTOR;
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[Mesa-dev] [PATCH 5/5] docs/GL3: Mark ARB_copy_image as implemented on i965
--- docs/GL3.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index e241257..32c530c 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -158,7 +158,7 @@ GL 4.3: GL_ARB_ES3_compatibility DONE (i965) GL_ARB_clear_buffer_object DONE (all drivers) GL_ARB_compute_shaderstarted (currently stalled) - GL_ARB_copy_imagenot started + GL_ARB_copy_imageDONE (i965) GL_KHR_debug DONE (all drivers) GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600) -- 2.0.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/5] i965: Add support for ARB_copy_image
This, together with the meta path, provides a almost-complete implemetation
of ARB_copy_image. The only case that won't work is if one of the textures
is compressed and has a pitch greater than INT16_MAX. I think that's good
enough to justify turning on the extension.
v2: Add a fallback memcpy path for when the texture is too big for the
blitter
v3: Properly support copying between two places on the same texture in the
memcpy fallback
Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
i965: Properly handle blit between the same two images in the fallback path
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_context.c | 1 +
src/mesa/drivers/dri/i965/intel_copy_image.c | 262 +++
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
src/mesa/drivers/dri/i965/intel_tex.h| 2 +
5 files changed, 267 insertions(+)
create mode 100644 src/mesa/drivers/dri/i965/intel_copy_image.c
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
b/src/mesa/drivers/dri/i965/Makefile.sources
index ee28dd9..1e5d1c6 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -8,6 +8,7 @@ i965_FILES = \
intel_blit.c \
intel_buffer_objects.c \
intel_buffers.c \
+ intel_copy_image.c \
intel_debug.c \
intel_extensions.c \
intel_fbo.c \
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 52f2557..60a225e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -245,6 +245,7 @@ brw_init_driver_functions(struct brw_context *brw,
intelInitTextureImageFuncs(functions);
intelInitTextureSubImageFuncs(functions);
intelInitTextureCopyImageFuncs(functions);
+ intelInitCopyImageFuncs(functions);
intelInitClearFuncs(functions);
intelInitBufferFuncs(functions);
intelInitPixelFuncs(functions);
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c
b/src/mesa/drivers/dri/i965/intel_copy_image.c
new file mode 100644
index 000..5471ef6
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_copy_image.c
@@ -0,0 +1,262 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (C) 2014 Intel Corporation All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *Jason Ekstrand jason.ekstr...@intel.com
+ */
+
+#include intel_tex.h
+#include intel_blit.h
+#include intel_mipmap_tree.h
+#include main/formats.h
+#include drivers/common/meta.h
+
+static bool
+copy_image_with_blitter(struct brw_context *brw,
+struct intel_mipmap_tree *src_mt, int src_level,
+int src_x, int src_y, int src_z,
+struct intel_mipmap_tree *dst_mt, int dst_level,
+int dst_x, int dst_y, int dst_z,
+int src_width, int src_height)
+{
+ GLuint bw, bh;
+ int cpp;
+
+ /* The blitter doesn't understand multisampling at all. */
+ if (src_mt-num_samples 0 || dst_mt-num_samples 0)
+ return false;
+
+ /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics
+* Data Size Limitations):
+*
+*The BLT engine is capable of transferring very large quantities of
+*graphics data. Any graphics data read from and written to the
+*destination is permitted to represent a number of pixels that
+*occupies up to 65,536 scan lines and up to 32,768 bytes per scan line
+*at the destination. The maximum number of pixels that may be
+*represented per scan line’s worth of graphics data depends on the
+*color depth.
+*
+* Furthermore, intelEmitCopyBlit (which is called below) uses a signed
+* 16-bit integer to represent buffer pitch, so it can only handle buffer
+* pitches 32k.
+*
+* As a result of
Re: [Mesa-dev] [PATCH] st/mesa: fix blit-based partial TexSubImage for 1D arrays
Hi Roland,
This code isn't used by llvmpipe, because it returns
PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0.
Marek
On Fri, Aug 8, 2014 at 1:33 AM, Roland Scheidegger srol...@vmware.com wrote:
Looks good to me too. I guess on llvmpipe we got lucky because
row_stride and layer_stride were equal so the math worked out the same
in the end :-).
Reviewed-by: Roland Scheidegger srol...@vmware.com
Am 08.08.2014 01:18, schrieb Ilia Mirkin:
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
Makes sense and also fixes the new piglit on nvc0.
On Thu, Aug 7, 2014 at 6:49 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This fixes piglit spec/EXT_texture_array/render-1darray.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index 5a5efcb..969a05f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -776,6 +776,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
+ zoffset = yoffset;
+ yoffset = 0;
depth = height;
height = 1;
}
--
1.9.1
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Re: [Mesa-dev] [PATCH] st/mesa: fix blit-based partial TexSubImage for 1D arrays
Ah right. That's why it didn't matter then :-)
Roland
Am 08.08.2014 02:30, schrieb Marek Olšák:
Hi Roland,
This code isn't used by llvmpipe, because it returns
PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0.
Marek
On Fri, Aug 8, 2014 at 1:33 AM, Roland Scheidegger srol...@vmware.com wrote:
Looks good to me too. I guess on llvmpipe we got lucky because
row_stride and layer_stride were equal so the math worked out the same
in the end :-).
Reviewed-by: Roland Scheidegger srol...@vmware.com
Am 08.08.2014 01:18, schrieb Ilia Mirkin:
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
Makes sense and also fixes the new piglit on nvc0.
On Thu, Aug 7, 2014 at 6:49 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This fixes piglit spec/EXT_texture_array/render-1darray.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index 5a5efcb..969a05f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -776,6 +776,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
+ zoffset = yoffset;
+ yoffset = 0;
depth = height;
height = 1;
}
--
1.9.1
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[Mesa-dev] Mesa build fails after commit gallivm: Fix build with latest LLVM
Today i observer that building mesa fails with gallivm/lp_bld_debug.cpp: In function 'size_t disassemble(const void*, llvm::raw_ostream)': gallivm/lp_bld_debug.cpp:279:57: error: 'class llvm::TargetSubtargetInfo' has no member named 'getInstrInfo' const TargetInstrInfo *TII = TM-getSubtargetImpl()-getInstrInfo(); The git log shows that the latest commit to affect lp_bld_debug.cpp was e28136343b6aa7dfff8ec85f6463574d6625b5a6 gallivm: Fix build with latest LLVM Reverting it made the build complete. I have llvm built from git, latest commit 3d5463d81f1278bc75b273d17ec84ec8438be1a1. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/3] nvc0/ir: describe the tex arguments for fermi/kepler
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 25 ++
1 file changed, 25 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index ade315d..7da9b0b 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -567,6 +567,31 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
const int lyr = arg - (i-tex.target.isMS() ? 2 : 1);
const int chipset = prog-getTarget()-getChipset();
+ // Arguments to the TEX instruction are a little insane. Even though the
+ // encoding is identical between SM20 and SM30, the arguments mean
+ // different things between Fermi and Kepler+. A lot of arguments are
+ // optional based on flags passed to the instruction. This summarizes the
+ // order of things.
+ //
+ // Fermi:
+ // array/indirect
+ // coords
+ // sample
+ // lod bias
+ // depth compare
+ // offsets:
+ //- tg4: 8 bits each, either 2 (1 offset reg) or 8 (2 offset reg)
+ //- other: 4 bits each, single reg
+ //
+ // Kepler+:
+ // indirect handle
+ // array (+ offsets for txd in upper 16 bits)
+ // coords
+ // sample
+ // lod bias
+ // depth compare
+ // offsets (same as fermi, except txd which takes it with array)
+
if (chipset = NVISA_GK104_CHIPSET) {
if (i-tex.rIndirectSrc = 0 || i-tex.sIndirectSrc = 0) {
// XXX this ignores tsc, and assumes a 1:1 mapping
--
1.8.5.5
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[Mesa-dev] [PATCH 2/3] nvc0/ir: add kepler+ support for indirect texture references
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 34 +-
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 4a9e48f..ade315d 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -569,9 +569,17 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
if (chipset = NVISA_GK104_CHIPSET) {
if (i-tex.rIndirectSrc = 0 || i-tex.sIndirectSrc = 0) {
- WARN(indirect TEX not implemented\n);
- }
- if (i-tex.r == i-tex.s) {
+ // XXX this ignores tsc, and assumes a 1:1 mapping
+ assert(i-tex.rIndirectSrc = 0);
+ Value *hnd = loadTexHandle(
+ bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(),
+ i-getIndirectR(), bld.mkImm(2)),
+ i-tex.r);
+ i-tex.r = 0xff;
+ i-tex.s = 0x1f;
+ i-setIndirectR(hnd);
+ i-setIndirectS(NULL);
+ } else if (i-tex.r == i-tex.s) {
i-tex.r += prog-driver-io.texBindBase / 4;
i-tex.s = 0; // only a single cX[] value possible here
} else {
@@ -595,6 +603,16 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
i-setSrc(s, i-getSrc(s - 1));
i-setSrc(0, layer);
}
+ // Move the indirect reference to the first place
+ if (i-tex.rIndirectSrc = 0) {
+ Value *hnd = i-getIndirectR();
+
+ i-setIndirectR(NULL);
+ i-moveSources(0, 1);
+ i-setSrc(0, hnd);
+ i-tex.rIndirectSrc = 0;
+ i-tex.sIndirectSrc = -1;
+ }
} else
// (nvc0) generate and move the tsc/tic/array source to the front
if (i-tex.target.isArray() || i-tex.rIndirectSrc = 0 ||
i-tex.sIndirectSrc = 0) {
@@ -688,14 +706,14 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
// The offset goes into the upper 16 bits of the array index. So
// create it if it's not already there, and INSBF it if it already
// is.
+s = (i-tex.rIndirectSrc = 0) ? 1 : 0;
if (i-tex.target.isArray()) {
bld.mkOp3(OP_INSBF, TYPE_U32, i-getSrc(0),
bld.loadImm(NULL, imm), bld.mkImm(0xc10),
- i-getSrc(0));
+ i-getSrc(s));
} else {
- for (int s = dim; s = 1; --s)
- i-setSrc(s, i-getSrc(s - 1));
- i-setSrc(0, bld.loadImm(NULL, imm 16));
+ i-moveSources(s, 1);
+ i-setSrc(s, bld.loadImm(NULL, imm 16));
}
} else {
i-setSrc(s, bld.loadImm(NULL, imm));
@@ -792,6 +810,8 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd)
if (chipset = NVISA_GK104_CHIPSET) {
if (!txd-tex.target.isArray() txd-tex.useOffsets)
expected_args++;
+ if (txd-tex.rIndirectSrc = 0 || txd-tex.sIndirectSrc = 0)
+ expected_args++;
} else {
if (txd-tex.useOffsets)
expected_args++;
--
1.8.5.5
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[Mesa-dev] [PATCH 1/3] nvc0/ir: add base tex offset for fermi indirect tex case
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index f010767..4a9e48f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -603,10 +603,18 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
Value *ticRel = i-getIndirectR();
Value *tscRel = i-getIndirectS();
- if (ticRel)
+ if (ticRel) {
i-setSrc(i-tex.rIndirectSrc, NULL);
- if (tscRel)
+ if (i-tex.r)
+ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(),
+ticRel, bld.mkImm(i-tex.r));
+ }
+ if (tscRel) {
i-setSrc(i-tex.sIndirectSrc, NULL);
+ if (i-tex.s)
+tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(),
+tscRel, bld.mkImm(i-tex.s));
+ }
Value *arrayIndex = i-tex.target.isArray() ? i-getSrc(lyr) : NULL;
for (int s = dim; s = 1; --s)
--
1.8.5.5
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Re: [Mesa-dev] Mesa build fails after commit gallivm: Fix build with latest LLVM
On 08.08.2014 10:22, Kertesz Laszlo wrote: Today i observer that building mesa fails with gallivm/lp_bld_debug.cpp: In function 'size_t disassemble(const void*, llvm::raw_ostream)': gallivm/lp_bld_debug.cpp:279:57: error: 'class llvm::TargetSubtargetInfo' has no member named 'getInstrInfo' const TargetInstrInfo *TII = TM-getSubtargetImpl()-getInstrInfo(); The git log shows that the latest commit to affect lp_bld_debug.cpp was e28136343b6aa7dfff8ec85f6463574d6625b5a6 gallivm: Fix build with latest LLVM Reverting it made the build complete. I have llvm built from git, latest commit 3d5463d81f1278bc75b273d17ec84ec8438be1a1. That's far from the latest. You need LLVM Git commit 9f85dccfc64b5f0b0c63ddfa0a42d8615aa1fcb3 (SVN r214781) or later. -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] Is the r600 llvm backend supposed to behave exactly the same as the radeonsi llvm?
Is the r600 llvm backend supposed to behave exactly the same as the radeonsi llvm? -- O zi buna, Kertesz Laszlo ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Is the r600 llvm backend supposed to behave exactly the same as the radeonsi llvm?
On Fri, Aug 08, 2014 at 04:53:46AM +0300, Kertesz Laszlo wrote: Is the r600 llvm backend supposed to behave exactly the same as the radeonsi llvm? Support for r600 in LLVM is experimental, but for radeonsi it should work well. -Tom -- O zi buna, Kertesz Laszlo ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] radeonsi: fix CMASK and HTILE allocation on Tahiti
On 08.08.2014 05:44, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
Tahiti has 12 tile pipes, but P8 pipe config.
It looks like there is no way to get the pipe config except for reading
GB_TILE_MODE. The TILING_CONFIG ioctl doesn't return more than 8 pipes,
so we can't use that for Hawaii.
This fixes a regression caused by 9b046474c95f15338d4c748df9b62871bba6f36f
on Tahiti.
Cc: mesa-sta...@lists.freedesktop.org
[...]
+ switch (G_009910_PIPE_CONFIG(mode2d)) {
+ case V_02803C_ADDR_SURF_P2:
+ sscreen-b.tiling_info.num_channels = 2;
+ break;
+ case V_02803C_X_ADDR_SURF_P4_8X16:
+ case V_02803C_X_ADDR_SURF_P4_16X16:
+ case V_02803C_X_ADDR_SURF_P4_16X32:
+ case V_02803C_X_ADDR_SURF_P4_32X32:
+ sscreen-b.tiling_info.num_channels = 4;
+ break;
+ case V_02803C_X_ADDR_SURF_P8_16X16_8X16:
+ case V_02803C_X_ADDR_SURF_P8_16X32_8X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_8X16:
+ case V_02803C_X_ADDR_SURF_P8_16X32_16X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_16X16:
+ case V_02803C_X_ADDR_SURF_P8_32X32_16X32:
+ case V_02803C_X_ADDR_SURF_P8_32X64_32X32:
+ sscreen-b.tiling_info.num_channels = 8;
+ break;
+ case V_02803C_X_ADDR_SURF_P16_32X32_8X16:
+ case V_02803C_X_ADDR_SURF_P16_32X32_16X16:
+ sscreen-b.tiling_info.num_channels = 16;
+ break;
+ default:
+ return false;
+ }
Might be nice to print an error message in the default case, so we can
see if it's ever hit. Either way though,
Reviewed-by: Michel Dänzer michel.daen...@amd.com
--
Earthling Michel Dänzer| http://www.amd.com
Libre software enthusiast |Mesa and X developer
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Re: [Mesa-dev] [PATCH] st/mesa: fix DrawPixels(GL_STENCIL_INDEX)
On 08.08.2014 05:44, Marek Olšák wrote: From: Marek Olšák marek.ol...@amd.com This is a bug which was probably uncovered recently by Jason's commits and broke this. The problem is _mesa_base_tex_format(GL_STENCIL_INDEX) returns -1. Tested-by: Michel Dänzer michel.daen...@amd.com -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/3] clover: stdify compat::vector a little more
make resize work like std::vector
reserve take advantage of capacity
rename members to be uniform with other class
---
src/gallium/state_trackers/clover/core/module.cpp | 2 +-
src/gallium/state_trackers/clover/util/compat.hpp | 113 +++---
2 files changed, 78 insertions(+), 37 deletions(-)
diff --git a/src/gallium/state_trackers/clover/core/module.cpp
b/src/gallium/state_trackers/clover/core/module.cpp
index 55ed91a..2a595d1 100644
--- a/src/gallium/state_trackers/clover/core/module.cpp
+++ b/src/gallium/state_trackers/clover/core/module.cpp
@@ -94,7 +94,7 @@ namespace {
static void
proc(compat::istream is, compat::vectorT v) {
- v.reserve(_procuint32_t(is));
+ v.resize(_procuint32_t(is));
for (size_t i = 0; i v.size(); i++)
new(v[i]) T(_procT(is));
diff --git a/src/gallium/state_trackers/clover/util/compat.hpp
b/src/gallium/state_trackers/clover/util/compat.hpp
index 50e1c7d..6f0f7cc 100644
--- a/src/gallium/state_trackers/clover/util/compat.hpp
+++ b/src/gallium/state_trackers/clover/util/compat.hpp
@@ -40,11 +40,14 @@ namespace clover {
class vector {
protected:
static T *
- alloc(int n, const T *q, int m) {
-T *p = reinterpret_castT *(std::malloc(n * sizeof(T)));
-
-for (int i = 0; i m; ++i)
- new(p[i]) T(q[i]);
+ alloc(size_t n, const T *q) {
+T *p = 0;
+if (n 0) {
+ p = reinterpret_castT *(std::malloc(n * sizeof(T)));
+ if (!p) throw;
+ for (size_t i = 0; i n; ++i)
+ new(p[i]) T(q[i]);
+}
return p;
}
@@ -66,100 +69,138 @@ namespace clover {
typedef std::ptrdiff_t difference_type;
typedef std::size_t size_type;
- vector() : p(NULL), n(0) {
+ vector() : _p(0), _s(0), _c(0) {
}
- vector(const vector v) : p(alloc(v.n, v.p, v.n)), n(v.n) {
+ vector(const vector v) :
+ _p(alloc(v.size(), v.begin())), _s(v.size()), _c(_s) {
}
- vector(const_iterator p, size_type n) : p(alloc(n, p, n)), n(n) {
+ vector(const_iterator v, size_type n) : _p(alloc(n, v)), _s(n), _c(n)
{
}
templatetypename C
vector(const C v) :
-p(alloc(v.size(), *v.begin(), v.size())), n(v.size()) {
+_p(alloc(v.size(), *v.begin())), _s(v.size()), _c(_s) {
}
~vector() {
-free(n, p);
+free(_s, _p);
}
vector
operator=(const vector v) {
-free(n, p);
-
-p = alloc(v.n, v.p, v.n);
-n = v.n;
+size_type old_s = _s;
+_s = v.size();
+T *n_p = alloc(_s, v.begin());
+free(old_s, _p);
+_p = n_p;
+_c = _s;
return *this;
}
void
reserve(size_type m) {
-if (n m) {
- T *q = alloc(m, p, n);
- free(n, p);
-
- p = q;
- n = m;
+if (m _c) {
+ T *n_p = reinterpret_castT *(std::malloc(m * sizeof(T)));
+ for (size_type i = 0; i _s; ++i) {
+ new(n_p[i]) T(_p[i]);
+ _p[i].~T();
+ }
+ std::free(_p);
+ _p = n_p;
+ _c = m;
}
}
void
resize(size_type m, T x = T()) {
-size_type n = size();
+if (_s == m)
+ return;
+
+//delete extra elements and keep capacity
+if (m _s) {
+ size_type old_s = _s;
+ _s = m;
+ for (size_type i = m; i old_s; ++i)
+ _p[i].~T();
+
+ return;
+}
+
+//fill with x
+if (m = _c) {
+ for (size_type i = _s; i m; ++i)
+ new(_p[i]) T(x);
+
+ _s = m;
+ return;
+}
+
+if (m _c) {
+ reserve(m);
-reserve(m);
+ //fill the extended part
+ for (size_type i = _s; i m; ++i)
+ new(_p[i]) T(x);
-for (size_type i = n; i m; ++i)
- new(p[i]) T(x);
+ _s = m;
+ return;
+}
}
void
push_back(const T x) {
-size_type n = size();
-reserve(n + 1);
-new(p[n]) T(x);
+reserve(_s + 1);
+new(_p[_s]) T(x);
+++_s;
}
size_type
size() const {
-return n;
+return _s;
+ }
+
+ size_type
+ capacity() const {
+return _c;
}
iterator
begin() {
-return p;
+
[Mesa-dev] [PATCH 3/3] clover: unsure compat::string is \0 terminated
otherwise c_str() is not safe
---
src/gallium/state_trackers/clover/util/compat.hpp | 54 ---
1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/src/gallium/state_trackers/clover/util/compat.hpp
b/src/gallium/state_trackers/clover/util/compat.hpp
index 6f0f7cc..7ca1f85 100644
--- a/src/gallium/state_trackers/clover/util/compat.hpp
+++ b/src/gallium/state_trackers/clover/util/compat.hpp
@@ -197,7 +197,7 @@ namespace clover {
return _p[i];
}
- private:
+ protected:
iterator _p; //memory array
size_type _s; //size
size_type _c; //capacity
@@ -306,18 +306,56 @@ namespace clover {
class string : public vectorchar {
public:
- string() : vector() {
+ string() : vector(0, 1) {
+_p[_s - 1] = '\0';
}
- string(const char *p) : vector(p, std::strlen(p)) {
+ string(const char *p) : vector(p, std::strlen(p) + 1) {
+_p[_s - 1] = '\0';
}
templatetypename C
- string(const C v) : vector(v) {
+ string(const C v) : vector(*v.begin(), v.size() + 1) {
+_p[_s - 1] = '\0';
}
- operator std::string() const {
-return std::string(begin(), end());
+ void
+ reserve(size_type m) {
+vector::reserve(m + 1);
+ }
+
+ void
+ resize(size_type m, char x = '\0') {
+vector::resize(m + 1, x);
+_p[_s - 1] = '\0';
+ }
+
+ void
+ push_back(char x) {
+reserve(_s + 1);
+_p[_s - 1] = x;
+_p[_s] = '\0';
+++_s;
+ }
+
+ size_type
+ size() const {
+return _s - 1;
+ }
+
+ size_type
+ capacity() const {
+return _c - 1;
+ }
+
+ iterator
+ end() {
+return _p + size();
+ }
+
+ const_iterator
+ end() const {
+return _p + size();
}
const char *
@@ -325,6 +363,10 @@ namespace clover {
return begin();
}
+ operator std::string() const {
+return std::string(begin(), end());
+ }
+
const char *
find(const string s) const {
for (size_t i = 0; i + s.size() size(); ++i) {
--
2.0.4
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