[Mesa-dev] [PATCH] glsl: do not attempt to dump_shader if no shaderobj

2015-09-20 Thread Tapani Pälli
Patch fixes a crash in conformance test that tries out different
invalid arguments for glShaderSource and glGetShaderSource:

   ES2-CTS.gtf.GL.glGetShaderSource.getshadersource_programhandle

This is a regression from commit:
   04e201d0c02cd30ace5c6fe80e9f021ebb733682

Signed-off-by: Tapani Pälli 
---
 src/mesa/main/shaderapi.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index f31980b..7733d02 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1699,15 +1699,17 @@ _mesa_ShaderSource(GLhandleARB shaderObj, GLsizei count,
 #if defined(HAVE_SHA1)
sh = _mesa_lookup_shader(ctx, shaderObj);
 
-   /* Dump original shader source to MESA_SHADER_DUMP_PATH and replace
-* if corresponding entry found from MESA_SHADER_READ_PATH.
-*/
-   dump_shader(sh->Stage, source);
+   if (sh) {
+  /* Dump original shader source to MESA_SHADER_DUMP_PATH and replace
+   * if corresponding entry found from MESA_SHADER_READ_PATH.
+   */
+  dump_shader(sh->Stage, source);
 
-   replacement = read_shader(sh->Stage, source);
-   if (replacement) {
-  free(source);
-  source = replacement;
+  replacement = read_shader(sh->Stage, source);
+  if (replacement) {
+ free(source);
+ source = replacement;
+  }
}
 #endif /* HAVE_SHA1 */
 
-- 
2.4.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH 5/5] i965: Maximum allowed size of SEND messages is 15 (4 bits)

2015-09-20 Thread Iago Toral
On Fri, 2015-09-18 at 09:09 -0700, Kenneth Graunke wrote:
> On Friday, September 18, 2015 10:08:52 AM Iago Toral Quiroga wrote:
> > Until now we only used MRFs 1..15 for regular SEND messages, so the
> > message length could not possibly exceed the maximum size. Now that
> > we allow to use MRF registers 1..23 in gen6, we need to be careful
> > not to build messages that can go beyond the limit. That could occur,
> > specifically, when building URB write messages, which we may need to
> > split in chunks due to their size. Previously we would simply go and
> > create a new message when we reached MRF 13 (since 13..15 were
> > reserved for spilling), now we also want to check the size of the
> > message explicitly.
> > 
> > Besides adding that condition to split URB write messages properly,
> > this patch also adds asserts in the generator. Notice that
> > brw_inst_set_mlen already asserts for this, but asserting in the
> > generators is easy and can make debugging easier in some cases.
> > ---
> >  src/mesa/drivers/dri/i965/brw_fs_generator.cpp   | 1 +
> >  src/mesa/drivers/dri/i965/brw_inst.h | 3 +++
> >  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 1 +
> >  src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp   | 5 +++--
> >  4 files changed, 8 insertions(+), 2 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
> > b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> > index 6cbd42f..c65084d 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> > @@ -1561,6 +1561,7 @@ fs_generator::generate_code(const cfg_t *cfg, int 
> > dispatch_width)
> >brw_set_default_exec_size(p, cvt(inst->exec_size) - 1);
> >  
> >assert(inst->base_mrf + inst->mlen <= BRW_MAX_MRF(devinfo->gen));
> > +  assert(inst->mlen <= BRW_MAX_MSG_LENGTH);
> >  
> >switch (inst->exec_size) {
> >case 1:
> > diff --git a/src/mesa/drivers/dri/i965/brw_inst.h 
> > b/src/mesa/drivers/dri/i965/brw_inst.h
> > index 46eff1d..c5132ba 100644
> > --- a/src/mesa/drivers/dri/i965/brw_inst.h
> > +++ b/src/mesa/drivers/dri/i965/brw_inst.h
> > @@ -39,6 +39,9 @@
> >  extern "C" {
> >  #endif
> >  
> > +/** Maximum SEND message length */
> > +#define BRW_MAX_MSG_LENGTH 15
> > +
> >  /* brw_context.h has a forward declaration of brw_inst, so name the 
> > struct. */
> >  typedef struct brw_inst {
> > uint64_t data[2];
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
> > b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > index d5943d2..05f2044 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > @@ -1136,6 +1136,7 @@ vec4_generator::generate_code(const cfg_t *cfg)
> >brw_set_default_acc_write_control(p, inst->writes_accumulator);
> >  
> >assert(inst->base_mrf + inst->mlen <= BRW_MAX_MRF(devinfo->gen));
> > +  assert(inst->mlen <= BRW_MAX_MSG_LENGTH);
> >  
> >unsigned pre_emit_nr_insn = p->nr_insn;
> >  
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
> > b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > index 7f06050..514ccd6 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > @@ -3320,9 +3320,10 @@ vec4_visitor::emit_vertex()
> > prog_data->vue_map.slot_to_varying[slot]);
> >  
> >   /* If this was max_usable_mrf, we can't fit anything more into 
> > this
> > -  * URB WRITE.
> > +  * URB WRITE. Same thing if we reached the maximum length 
> > available.
> >*/
> > - if (mrf > max_usable_mrf) {
> > + if (mrf > max_usable_mrf ||
> > + align_interleaved_urb_mlen(devinfo, mrf - base_mrf + 1) > 
> > BRW_MAX_MSG_LENGTH) {
> >  slot++;
> >  break;
> >   }
> > 
> 
> Doesn't this hunk need to go before patch 2?  It seems like otherwise
> we'll be emitting URB write messages that are too long until patch 5.

Yeah, you're right. I'll fix that before pushing.

> With that fixed, the series is:
> Reviewed-by: Kenneth Graunke 
> 
> Thanks for doing this, Iago!

Thanks for reviewing it! ;)

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH 1/4] mesa/cs: Add _mesa_validate_DispatchCompute

2015-09-20 Thread Tapani Pälli

Reviewed-by: Tapani Pälli 

On 09/20/2015 01:50 AM, Jordan Justen wrote:

Move API validation to _mesa_validate_DispatchCompute in
api_validate.c.

Signed-off-by: Jordan Justen 
---
  src/mesa/main/api_validate.c | 44 
  src/mesa/main/api_validate.h |  4 
  src/mesa/main/compute.c  | 28 +---
  3 files changed, 53 insertions(+), 23 deletions(-)

diff --git a/src/mesa/main/api_validate.c b/src/mesa/main/api_validate.c
index 53c8fb8..b46226a 100644
--- a/src/mesa/main/api_validate.c
+++ b/src/mesa/main/api_validate.c
@@ -882,3 +882,47 @@ _mesa_validate_MultiDrawElementsIndirect(struct gl_context 
*ctx,

 return GL_TRUE;
  }
+
+static bool
+check_valid_to_compute(struct gl_context *ctx, const char *function)
+{
+   struct gl_shader_program *prog;
+
+   if (!_mesa_has_compute_shaders(ctx)) {
+  _mesa_error(ctx, GL_INVALID_OPERATION,
+  "unsupported function (%s) called",
+  function);
+  return false;
+   }
+
+   prog = ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE];
+   if (prog == NULL || prog->_LinkedShaders[MESA_SHADER_COMPUTE] == NULL) {
+  _mesa_error(ctx, GL_INVALID_OPERATION,
+  "%s(no active compute shader)",
+  function);
+  return false;
+   }
+
+   return true;
+}
+
+GLboolean
+_mesa_validate_DispatchCompute(struct gl_context *ctx,
+   const GLuint *num_groups)
+{
+   int i;
+   FLUSH_CURRENT(ctx, 0);
+
+   if (!check_valid_to_compute(ctx, "glDispatchCompute"))
+  return GL_FALSE;
+
+   for (i = 0; i < 3; i++) {
+  if (num_groups[i] > ctx->Const.MaxComputeWorkGroupCount[i]) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "glDispatchCompute(num_groups_%c)", 'x' + i);
+ return GL_FALSE;
+  }
+   }
+
+   return GL_TRUE;
+}
diff --git a/src/mesa/main/api_validate.h b/src/mesa/main/api_validate.h
index 0ce7b69..ef2c794 100644
--- a/src/mesa/main/api_validate.h
+++ b/src/mesa/main/api_validate.h
@@ -105,5 +105,9 @@ _mesa_validate_MultiDrawElementsIndirect(struct gl_context 
*ctx,
   GLsizei primcount,
   GLsizei stride);

+extern GLboolean
+_mesa_validate_DispatchCompute(struct gl_context *ctx,
+   const GLuint *num_groups);
+

  #endif
diff --git a/src/mesa/main/compute.c b/src/mesa/main/compute.c
index 37a4ba7..f67ffbb 100644
--- a/src/mesa/main/compute.c
+++ b/src/mesa/main/compute.c
@@ -24,6 +24,7 @@
  #include "glheader.h"
  #include "compute.h"
  #include "context.h"
+#include "api_validate.h"

  void GLAPIENTRY
  _mesa_DispatchCompute(GLuint num_groups_x,
@@ -31,31 +32,12 @@ _mesa_DispatchCompute(GLuint num_groups_x,
GLuint num_groups_z)
  {
 GET_CURRENT_CONTEXT(ctx);
-   int i;
-   struct gl_shader_program *prog;
 const GLuint num_groups[3] = { num_groups_x, num_groups_y, num_groups_z };

-   if (ctx->Extensions.ARB_compute_shader) {
-  for (i = 0; i < 3; i++) {
- if (num_groups[i] > ctx->Const.MaxComputeWorkGroupCount[i]) {
-_mesa_error(ctx, GL_INVALID_VALUE,
-"glDispatchCompute(num_groups_%c)", 'x' + i);
-return;
- }
-  }
-  if (!_mesa_valid_to_render(ctx, "glDispatchCompute"))
- return;
-  prog = ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE];
-  if (prog == NULL || prog->_LinkedShaders[MESA_SHADER_COMPUTE] == NULL) {
- _mesa_error(ctx, GL_INVALID_OPERATION,
- "glDispatchCompute(no active compute shader)");
- return;
-  }
-  ctx->Driver.DispatchCompute(ctx, num_groups);
-   } else {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "unsupported function (glDispatchCompute) called");
-   }
+   if (!_mesa_validate_DispatchCompute(ctx, num_groups))
+  return;
+
+   ctx->Driver.DispatchCompute(ctx, num_groups);
  }

  extern void GLAPIENTRY


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH v4] i965/vec4: Change types as needed to propagate source modifiers using from instruction

2015-09-20 Thread Alejandro Piñeiro
MOV instructions, as long as they don't have source modifiers, are
just copying bits around.  So those kind of instruction could be
propagated even if there are type mismatches. This is needed because
NIR generates integer MOV instructions whenever it doesn't know what
else to generate.

This commit adds support for copy propagation using previous (from)
instruction as reference.

Shader-db results for vec4 programs on Haswell:
total instructions in shared programs: 1683959 -> 1669037 (-0.89%)
instructions in affected programs: 746238 -> 731316 (-2.00%)
helped:6264
HURT:  30

v2: using 'arg' index to get the from inst was wrong, as pointed
by Jason Ekstrand
v3: rebased against last change on the previous patch of the series
v4: don't need to track instructions on struct copy_entry, as we
only set the source on a direct copy, as pointed by Jason
---
 .../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 36 --
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 1522eea..193c7d0 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -271,6 +271,8 @@ try_copy_propagate(const struct brw_device_info *devinfo,
 * vectors better.
 */
src_reg value = *entry->value[0];
+   bool from_inst_has_source_modifiers = value.negate || value.abs;
+
for (int i = 1; i < 4; i++) {
   /* This is equals() except we don't care about the swizzle. */
   if (value.file != entry->value[i]->file ||
@@ -311,6 +313,10 @@ try_copy_propagate(const struct brw_device_info *devinfo,
if (inst->src[arg].negate)
   value.negate = !value.negate;
 
+   /* has_source_modifiers is using the modifiers at the current instruction,
+* while from_inst_source_modifiers is using the modifiers of the source
+* at the instruction the source comes from
+*/
bool has_source_modifiers = value.negate || value.abs;
 
/* gen6 math and gen7+ SENDs from GRFs ignore source modifiers on
@@ -322,7 +328,8 @@ try_copy_propagate(const struct brw_device_info *devinfo,
 
if (has_source_modifiers &&
value.type != inst->src[arg].type &&
-   !can_change_source_types(inst))
+   !can_change_source_types(inst) &&
+   from_inst_has_source_modifiers)
   return false;
 
if (has_source_modifiers &&
@@ -340,7 +347,8 @@ try_copy_propagate(const struct brw_device_info *devinfo,
 * instead. See also resolve_ud_negate().
 */
if (value.negate &&
-   value.type == BRW_REGISTER_TYPE_UD)
+   value.type == BRW_REGISTER_TYPE_UD &&
+   from_inst_has_source_modifiers)
   return false;
 
/* Don't report progress if this is a noop. */
@@ -378,17 +386,25 @@ try_copy_propagate(const struct brw_device_info *devinfo,
 
if (has_source_modifiers &&
value.type != inst->src[arg].type) {
-  /* We are propagating source modifiers from a MOV with a different
-   * type.  If we got here, then we can just change the source and
-   * destination types of the instruction and keep going.
+  /* We are propagating source modifiers from a safe instruction with a
+   * different type. If we got here, then we can just change the source
+   * and destination types of the current instruction or the instruction
+   * from we are propagating.
*/
-  assert(can_change_source_types(inst));
-  for (int i = 0; i < 3; i++) {
- inst->src[i].type = value.type;
+  assert(can_change_source_types(inst) ||
+ !from_inst_has_source_modifiers);
+
+  if (can_change_source_types(inst)) {
+ for (int i = 0; i < 3; i++) {
+inst->src[i].type = value.type;
+ }
+ inst->dst.type = value.type;
+  } else {
+ value.type = inst->src[arg].type;
   }
-  inst->dst.type = value.type;
-   } else
+   } else {
   value.type = inst->src[arg].type;
+   }
inst->src[arg] = value;
return true;
 }
-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH] i965/vec4: Don't coalesce registers in gen6 math ops if reswizzling needed

2015-09-20 Thread Jason Ekstrand
On Sep 20, 2015 11:11 AM, "Matt Turner"  wrote:
>
> On Sun, Sep 20, 2015 at 8:48 AM, Antia Puentes 
wrote:
> > Math operations in SandyBridge do not support source swizzling
>
> I can't find any documentation to support this claim, but I remember
> that SNB math must be in align1 mode so it can't do swizzles or
> writemasking (see commit e14cc504).

Probably my fault.  I replied to the bug with a hunch and zero research.
She was quoting me.

> But, the documentation actually says "The supported regioning modes
> for math instruction are align16, align1 with the following
> restrictions: ..."
>
> Would be nice if we could actually find a PRM citation.

Agreed

--Jason

> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92033
> > ---
> >  src/mesa/drivers/dri/i965/brw_ir_vec4.h |  3 ++-
> >  src/mesa/drivers/dri/i965/brw_vec4.cpp  | 11 +--
> >  2 files changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> > index 966a410..a48bb68 100644
> > --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> > +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> > @@ -175,7 +175,8 @@ public:
> >
> > bool is_send_from_grf();
> > unsigned regs_read(unsigned arg) const;
> > -   bool can_reswizzle(int dst_writemask, int swizzle, int
swizzle_mask);
> > +   bool can_reswizzle(const struct brw_device_info *devinfo, int
dst_writemask,
> > +  int swizzle, int swizzle_mask);
> > void reswizzle(int dst_writemask, int swizzle);
> > bool can_do_source_mods(const struct brw_device_info *devinfo);
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > index ed49cd3..d7192e4 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > @@ -941,10 +941,17 @@ vec4_visitor::opt_set_dependency_control()
> >  }
> >
> >  bool
> > -vec4_instruction::can_reswizzle(int dst_writemask,
> > +vec4_instruction::can_reswizzle(const struct brw_device_info *devinfo,
> > +int dst_writemask,
> >  int swizzle,
> >  int swizzle_mask)
> >  {
> > +
>
> Extra new line.
>
> > +   /* gen6 math instructions can not manage source swizzles */
>
> If we can find documentation, we should update this comment. If not,
> let's change it to read
>
> /* Gen6 MATH instructions can not execute in align16 mode, so swizzles
> are not allowed. */
>
> (linewrapped as appropriate)
>
> With those changes,
>
> Reviewed-by: Matt Turner 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 0/3][RFC] Improve GLSL support of GL_ARB_separate_shader_objects

2015-09-20 Thread Gregory Hainaut
Current GLSL badly optimizes the code making it incompatible with the
GL_ARB_separate_shader_objects extension.

Typical example of the current behavior:

VS:
out SHADER
{
vec4 var_zero; // location will always be 0
vec2 var_one; // location will always be 1
} VSout;

FS:
in SHADER
{
vec4 var_zero;
vec2 var_one; // ERROR: location would be wrongly set to 0 if var_zero is 
inactive
} PSin;

In short, SSO allow to match by name but you can't make any hypothesis on the
previous/next stage. Therefore you must consider all inputs as actives.

Commit decription:
patch 1/ Tighten up some linker error checks to avoid dependency with the
 deadcode optimization phase. Phase that will be partially removed in
 patch 3.

patch 2/ Add a new variable flags in the AST to distinguish attribute from
 varying. It is still legal to removed unused attribute.

patch 3/ Disable the optimization of varying inputs that don't have an explicit
 location. The idea was to keep the optimization for all builtins
 varyings. Besides it won't trigger the bug if explicit location are
 used for all variables. I'm not sure what it is the best solutions.


Piglit test done on older Mesa/Nouveau (8276ba260) due to libdrm newer 
requirement.

[30454/30454] crash: 29, fail: 221, pass: 20749, skip: 9451, warn: 4 -

The fix was validated on the PCSX2 application. I will try to create a
piglit tests of the above situation.


Gregory Hainaut (3):
  glsl/link: don't consider unused variable as read variable.
  glsl/ast2hir: add a new flag attribute_input for VS input
  glsl/opt: disable optimization of varying input

 src/glsl/ast_to_hir.cpp|  4 
 src/glsl/ir.h  |  9 +
 src/glsl/link_varyings.cpp |  4 ++--
 src/glsl/opt_dead_code.cpp | 16 
 4 files changed, 31 insertions(+), 2 deletions(-)

-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 3/3] glsl/opt: disable optimization of varying input

2015-09-20 Thread Gregory Hainaut
GL_ARB_separate_shader_objects allow to match by name variable or block
interface. Input varying can't be removed as it is will impact the location
assignment.

The patch only disable deadcode optimization for inputs that don't have
an explicit location. It allows to remove various builtin variables.

In theory, I think we must keep them as it could impact the location
assignment. However I'm not sure anyone use a mix of match by names/by
locations.

Interface example:
layout (location = 0) vec4 zero;
vec4 one;  // assignment might be 0 if zero isn't used.

It fixes the bug 79783 and likely any application that uses
GL_ARB_separate_shader_objects extension.

Signed-off-by: Gregory Hainaut 
---
 src/glsl/opt_dead_code.cpp | 16 
 1 file changed, 16 insertions(+)

diff --git a/src/glsl/opt_dead_code.cpp b/src/glsl/opt_dead_code.cpp
index e4bf874..9852747 100644
--- a/src/glsl/opt_dead_code.cpp
+++ b/src/glsl/opt_dead_code.cpp
@@ -131,6 +131,22 @@ do_dead_code(exec_list *instructions, bool 
uniform_locations_assigned)
continue;
  }
 
+ /* Section 7.4.1 (Shader Interface Matching) of the OpenGL 4.5
+  * (Core Profile) spec says:
+  *
+  *"With separable program objects, interfaces between shader
+  *stages may involve the outputs from one program object and the
+  *inputs from a second program object.  For such interfaces, it is
+  *not possible to detect mismatches at link time, because the
+  *programs are linked separately. When each such program is
+  *linked, all inputs or outputs interfacing with another program
+  *stage are treated as active."
+  */
+if (entry->var->data.mode == ir_var_shader_in &&
+   !entry->var->data.attribute_input &&
+   !entry->var->data.explicit_location)
+   continue;
+
 entry->var->remove();
 progress = true;
 
-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 1/3] glsl/link: don't consider unused variable as read variable.

2015-09-20 Thread Gregory Hainaut
Current checks rely on the optimization phase to remove deadcode
varying. Therefore remaining varying are used.

Deadcode Optimizations won't be possible anymore with the support of
GL_ARB_separate_shader_objects. So it requires to check the used flag of
the varying.

Signed-off-by: Gregory Hainaut 
---
 src/glsl/link_varyings.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index f7a7b8c..72d6632 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -1579,7 +1579,7 @@ assign_varying_locations(struct gl_context *ctx,
 
  if (var && var->data.mode == ir_var_shader_in &&
  var->data.is_unmatched_generic_inout) {
-if (prog->IsES) {
+if (var->data.used && prog->IsES) {
/*
 * On Page 91 (Page 97 of the PDF) of the GLSL ES 1.0 spec:
 *
@@ -1594,7 +1594,7 @@ assign_varying_locations(struct gl_context *ctx,
   _mesa_shader_stage_to_string(consumer->Stage),
   var->name,
   _mesa_shader_stage_to_string(producer->Stage));
-} else if (prog->Version <= 120) {
+} else if (var->data.used && prog->Version <= 120) {
/* On page 25 (page 31 of the PDF) of the GLSL 1.20 spec:
 *
 * Only those varying variables used (i.e. read) in
-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 2/3] glsl/ast2hir: add a new flag attribute_input for VS input

2015-09-20 Thread Gregory Hainaut
GL_ARB_separate_shader_objects requires that all inputs varying remains active.

This flag allow to distinguish input attribute from the input varying.

Flag will be used on next commit.

Signed-off-by: Gregory Hainaut 
---
 src/glsl/ast_to_hir.cpp | 4 
 src/glsl/ir.h   | 9 +
 2 files changed, 13 insertions(+)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 72c6459..16bf849 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2590,6 +2590,10 @@ apply_type_qualifier_to_variable(const struct 
ast_type_qualifier *qual,
_mesa_shader_stage_to_string(state->stage));
}
 
+   if (state->stage == MESA_SHADER_VERTEX &&
+ (qual->flags.q.attribute || qual->flags.q.in))
+  var->data.attribute_input = 1;
+
/* Disallow layout qualifiers which may only appear on layout declarations. 
*/
if (qual->flags.q.prim_type) {
   _mesa_glsl_error(loc, state,
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index f9ddf74..a1f5fa0 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -627,6 +627,15 @@ public:
   unsigned precise:1;
 
   /**
+   * Is the variable an input from the Vertex Shader?
+   *
+   * GL_ARB_separate_shader_objects doesn't allow the optimization of
+   * unused varying variable. However unused-attribute must still be
+   * optimized.
+   */
+  unsigned attribute_input:1;
+
+  /**
* Has this variable been used for reading or writing?
*
* Several GLSL semantic checks require knowledge of whether or not a
-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH] i965/vec4: Don't coalesce registers in gen6 math ops if reswizzling needed

2015-09-20 Thread Matt Turner
On Sun, Sep 20, 2015 at 8:48 AM, Antia Puentes  wrote:
> Math operations in SandyBridge do not support source swizzling

I can't find any documentation to support this claim, but I remember
that SNB math must be in align1 mode so it can't do swizzles or
writemasking (see commit e14cc504).

But, the documentation actually says "The supported regioning modes
for math instruction are align16, align1 with the following
restrictions: ..."

Would be nice if we could actually find a PRM citation.

> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92033
> ---
>  src/mesa/drivers/dri/i965/brw_ir_vec4.h |  3 ++-
>  src/mesa/drivers/dri/i965/brw_vec4.cpp  | 11 +--
>  2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h 
> b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> index 966a410..a48bb68 100644
> --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> @@ -175,7 +175,8 @@ public:
>
> bool is_send_from_grf();
> unsigned regs_read(unsigned arg) const;
> -   bool can_reswizzle(int dst_writemask, int swizzle, int swizzle_mask);
> +   bool can_reswizzle(const struct brw_device_info *devinfo, int 
> dst_writemask,
> +  int swizzle, int swizzle_mask);
> void reswizzle(int dst_writemask, int swizzle);
> bool can_do_source_mods(const struct brw_device_info *devinfo);
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
> b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index ed49cd3..d7192e4 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -941,10 +941,17 @@ vec4_visitor::opt_set_dependency_control()
>  }
>
>  bool
> -vec4_instruction::can_reswizzle(int dst_writemask,
> +vec4_instruction::can_reswizzle(const struct brw_device_info *devinfo,
> +int dst_writemask,
>  int swizzle,
>  int swizzle_mask)
>  {
> +

Extra new line.

> +   /* gen6 math instructions can not manage source swizzles */

If we can find documentation, we should update this comment. If not,
let's change it to read

/* Gen6 MATH instructions can not execute in align16 mode, so swizzles
are not allowed. */

(linewrapped as appropriate)

With those changes,

Reviewed-by: Matt Turner 
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [Bug 77449] Tracker bug for all bugs related to Steam titles

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=77449

Kai  changed:

   What|Removed |Added

 Depends on||92059

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH] i965/vec4: Don't coalesce registers in gen6 math ops if reswizzling needed

2015-09-20 Thread Antia Puentes
Math operations in SandyBridge do not support source swizzling

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92033
---
 src/mesa/drivers/dri/i965/brw_ir_vec4.h |  3 ++-
 src/mesa/drivers/dri/i965/brw_vec4.cpp  | 11 +--
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h 
b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
index 966a410..a48bb68 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
@@ -175,7 +175,8 @@ public:
 
bool is_send_from_grf();
unsigned regs_read(unsigned arg) const;
-   bool can_reswizzle(int dst_writemask, int swizzle, int swizzle_mask);
+   bool can_reswizzle(const struct brw_device_info *devinfo, int dst_writemask,
+  int swizzle, int swizzle_mask);
void reswizzle(int dst_writemask, int swizzle);
bool can_do_source_mods(const struct brw_device_info *devinfo);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index ed49cd3..d7192e4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -941,10 +941,17 @@ vec4_visitor::opt_set_dependency_control()
 }
 
 bool
-vec4_instruction::can_reswizzle(int dst_writemask,
+vec4_instruction::can_reswizzle(const struct brw_device_info *devinfo,
+int dst_writemask,
 int swizzle,
 int swizzle_mask)
 {
+
+   /* gen6 math instructions can not manage source swizzles */
+   if (devinfo->gen == 6 && is_math() &&
+   swizzle != BRW_SWIZZLE_XYZW)
+  return false;
+
/* If this instruction sets anything not referenced by swizzle, then we'd
 * totally break it when we reswizzle.
 */
@@ -1077,7 +1084,7 @@ vec4_visitor::opt_register_coalesce()
break;
 
 /* If we can't handle the swizzle, bail. */
-if (!scan_inst->can_reswizzle(inst->dst.writemask,
+if (!scan_inst->can_reswizzle(devinfo, inst->dst.writemask,
   inst->src[0].swizzle,
   chans_needed)) {
break;
-- 
2.1.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH] Revert "mesa/extensions: restrict GL_OES_EGL_image to GLES"

2015-09-20 Thread Marek Olšák
Thanks for reverting this.

The extension is required for importing dmabuf as textures in desktop
GL, so it can't removed no matter what the spec says.

Marek

On Wed, Sep 16, 2015 at 5:00 PM, Dave Airlie  wrote:
> This reverts commit 48961fa3ba37999a6f8fd812458b735e39604a95.
>
> glamor/Xwayland use this, the spec saying something when it
> was written, and the fact that the comment says Mesa relies on it
> hasn't changed.
>
> I also don't have a copy of this patch in my mail archive, which
> seems wierd, did it get posted to mesa-dev?
>
> Signed-off-by: Dave Airlie 
> ---
>  src/mesa/main/extensions.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
> index 767c50e..b2c88c3 100644
> --- a/src/mesa/main/extensions.c
> +++ b/src/mesa/main/extensions.c
> @@ -307,7 +307,8 @@ static const struct extension extension_table[] = {
> { "GL_OES_depth_texture_cube_map",  
> o(OES_depth_texture_cube_map), ES2, 2012 },
> { "GL_OES_draw_texture",o(OES_draw_texture),  
>ES1,   2004 },
> { "GL_OES_EGL_sync",o(dummy_true),
>ES1 | ES2, 2010 },
> -   { "GL_OES_EGL_image",   o(OES_EGL_image), 
>ES1 | ES2, 2006 },
> +   /*  FIXME: Mesa expects GL_OES_EGL_image to be available in OpenGL 
> contexts. */
> +   { "GL_OES_EGL_image",   o(OES_EGL_image), 
>   GL | ES1 | ES2, 2006 },
> { "GL_OES_EGL_image_external",  
> o(OES_EGL_image_external),   ES1 | ES2, 2010 },
> { "GL_OES_element_index_uint",  o(dummy_true),
>ES1 | ES2, 2005 },
> { "GL_OES_fbo_render_mipmap",   o(dummy_true),
>ES1 | ES2, 2005 },
> --
> 2.4.3
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 25/24] glsl: add std140 layout support for AoA

2015-09-20 Thread Timothy Arceri
---
 I noticed this problem after adding AoA support [1] to Ian's random UBO test
 script [2].

 [1] http://patchwork.freedesktop.org/patch/59956/
 [2] http://cgit.freedesktop.org/~idr/piglit/log/?h=ubo-lolz

 src/glsl/glsl_types.cpp | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl_types.cpp
index 86f0ea5..952bd0a 100644
--- a/src/glsl/glsl_types.cpp
+++ b/src/glsl/glsl_types.cpp
@@ -1310,8 +1310,8 @@ glsl_type::std140_size(bool row_major) const
   unsigned int array_len;
 
   if (this->is_array()) {
-element_type = this->fields.array;
-array_len = this->length;
+element_type = this->without_array();
+array_len = this->arrays_of_arrays_size();
   } else {
 element_type = this;
 array_len = 1;
@@ -1344,12 +1344,13 @@ glsl_type::std140_size(bool row_major) const
 *  the array are laid out in order, according to rule (9).
 */
if (this->is_array()) {
-  if (this->fields.array->is_record()) {
-return this->length * this->fields.array->std140_size(row_major);
+  if (this->without_array()->is_record()) {
+return this->arrays_of_arrays_size() *
+this->without_array()->std140_size(row_major);
   } else {
 unsigned element_base_align =
-   this->fields.array->std140_base_alignment(row_major);
-return this->length * MAX2(element_base_align, 16);
+   this->without_array()->std140_base_alignment(row_major);
+return this->arrays_of_arrays_size() * MAX2(element_base_align, 16);
   }
}
 
-- 
2.4.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [Bug 92054] make check gbm-symbols-check regression

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=92054

Marcin Slusarz  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #2 from Marcin Slusarz  ---
Fixed by:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f6fd57db2275df8f86a5a173575b7d807508625

Thanks for reporting.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] Mesa 10.6.8

2015-09-20 Thread Emil Velikov
Mesa 10.6.8 is now available.

With this release we have mostly nouveau fixes, although we have the odd
i965, llvmpipe (big endian) and gbm bugfix.


Alejandro Piñeiro (1):
  i965/vec4: fill src_reg type using the constructor type parameter

Antia Puentes (1):
  i965/vec4: Fix saturation errors when coalescing registers

Emil Velikov (4):
  docs: add sha256 checksums for 10.6.7
  cherry-ignore: add commit non applicable for 10.6
  Update version to 10.6.8
  docs: add release notes for 10.6.8

Hans de Goede (4):
  nv30: Fix creation of scanout buffers
  nv30: Implement color resolve for msaa
  nv30: Fix max width / height checks in nv30 sifm code
  nv30: Disable msaa unless requested from the env by NV30_MAX_MSAA

Ian Romanick (2):
  mesa: Pass the type to _mesa_uniform_matrix as a glsl_base_type
  mesa: Don't allow wrong type setters for matrix uniforms

Ilia Mirkin (5):
  st/mesa: don't fall back to 16F when 32F is requested
  nvc0: always emit a full shader colormask
  nvc0: remove BGRA4 format support
  st/mesa: avoid integer overflows with buffers >= 512MB
  nv50, nvc0: fix max texture buffer size to 128M elements

Jason Ekstrand (1):
  i965/vec4: Don't reswizzle hardware registers

Jose Fonseca (1):
  gallivm: Workaround LLVM PR23628.

Kenneth Graunke (1):
  i965: Momentarily pretend to support ARB_texture_stencil8 for blits.

Oded Gabbay (1):
  llvmpipe: convert double to long long instead of unsigned long long

Ray Strode (1):
  gbm: convert gbm bo format to fourcc format on dma-buf import

Ulrich Weigand (1):
  mesa: Fix texture compression on big-endian systems

Vinson Lee (1):
  gallivm: Do not use NoFramePointerElim with LLVM 3.7.


git tag: mesa-10.6.8

ftp://ftp.freedesktop.org/pub/mesa/10.6.8/mesa-10.6.8.tar.gz
MD5: 1e38fa73f39a16de5c2c430a92d81f90  mesa-10.6.8.tar.gz
SHA1: 6fa7a0519556492e36f1f2e09d5dad5e653d1f7f  mesa-10.6.8.tar.gz
SHA256: 1f34dba2a8059782e3e4e0f18b9628004e253b2c69085f735b846d2e63c9e250  
mesa-10.6.8.tar.gz
PGP: ftp://ftp.freedesktop.org/pub/mesa/10.6.8/mesa-10.6.8.tar.gz.sig

ftp://ftp.freedesktop.org/pub/mesa/10.6.8/mesa-10.6.8.tar.xz
MD5: 51a2c4c2c3fa767366ae7920fc26a7bc  mesa-10.6.8.tar.xz
SHA1: b7397d2dcbd15a7a846f60fe8baa3742623b7429  mesa-10.6.8.tar.xz
SHA256: e36ee5ceeadb3966fb5ce5b4cf18322dbb76a4f075558ae49c3bba94f57d58fd  
mesa-10.6.8.tar.xz
PGP: ftp://ftp.freedesktop.org/pub/mesa/10.6.8/mesa-10.6.8.tar.xz.sig

--
-Emil



signature.asc
Description: OpenPGP digital signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [RFC 0/2] Use hash tables for opt_constant_propagation() acp sets

2015-09-20 Thread Rhys Kidd
Kenneth Graunke in 4654439fdd766f79a78fe0d812fd916f5815e7e6 refactored
kill sets in opt_constant_propagation() to use hash tables. This patch set
makes the suggested changes to use hash tables for acp sets, as well as
correcting documentation within the file for recent hash table changes.

RFC as I do not have access to hardware sufficient to test performance
improvements to the shader suggested in #91857 (GLSL 3.30 required).

No piglit regressions on Intel Ironlake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Rhys Kidd 

Rhys Kidd (2):
  glsl: Use hash tables for opt_constant_propagation() acp sets.
  glsl: Update kill set comments for opt_constant_propagation() hash
table.

 src/glsl/opt_constant_propagation.cpp | 69 +--
 1 file changed, 41 insertions(+), 28 deletions(-)

-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [RFC 2/2] glsl: Update kill set comments for opt_constant_propagation() hash table.

2015-09-20 Thread Rhys Kidd
---
 src/glsl/opt_constant_propagation.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/glsl/opt_constant_propagation.cpp 
b/src/glsl/opt_constant_propagation.cpp
index b6cbf61..272a180 100644
--- a/src/glsl/opt_constant_propagation.cpp
+++ b/src/glsl/opt_constant_propagation.cpp
@@ -123,7 +123,7 @@ public:
hash_table *acp;
 
/**
-* List of kill_entry: The masks of variables whose values were
+* Hash table of kill_entry: The masks of variables whose values were
 * killed in this block.
 */
hash_table *kills;
@@ -467,7 +467,7 @@ ir_constant_propagation_visitor::kill(ir_variable *var, 
unsigned write_mask)
   }
}
 
-   /* Add this writemask of the variable to the list of killed
+   /* Add this writemask of the variable to the hash table of killed
 * variables in this block.
 */
hash_entry *kill_hash_entry = _mesa_hash_table_search(this->kills, var);
@@ -476,7 +476,7 @@ ir_constant_propagation_visitor::kill(ir_variable *var, 
unsigned write_mask)
   entry->write_mask |= write_mask;
   return;
}
-   /* Not already in the list.  Make new entry. */
+   /* Not already in the hash table.  Make new entry. */
_mesa_hash_table_insert(this->kills, var,
new(this->mem_ctx) kill_entry(var, write_mask));
 }
-- 
2.1.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [RFC 1/2] glsl: Use hash tables for opt_constant_propagation() acp sets.

2015-09-20 Thread Rhys Kidd
---
 src/glsl/opt_constant_propagation.cpp | 63 +--
 1 file changed, 38 insertions(+), 25 deletions(-)

diff --git a/src/glsl/opt_constant_propagation.cpp 
b/src/glsl/opt_constant_propagation.cpp
index 184aaa1..b6cbf61 100644
--- a/src/glsl/opt_constant_propagation.cpp
+++ b/src/glsl/opt_constant_propagation.cpp
@@ -95,7 +95,8 @@ public:
   progress = false;
   killed_all = false;
   mem_ctx = ralloc_context(0);
-  this->acp = new(mem_ctx) exec_list;
+  this->acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
+  _mesa_key_pointer_equal);
   this->kills = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
 _mesa_key_pointer_equal);
}
@@ -118,8 +119,8 @@ public:
void handle_if_block(exec_list *instructions);
void handle_rvalue(ir_rvalue **rvalue);
 
-   /** List of acp_entry: The available constants to propagate */
-   exec_list *acp;
+   /** Hash table of acp_entry: The available constants to propagate */
+   hash_table *acp;
 
/**
 * List of kill_entry: The masks of variables whose values were
@@ -206,11 +207,13 @@ 
ir_constant_propagation_visitor::constant_propagation(ir_rvalue **rvalue) {
 channel = i;
   }
 
-  foreach_in_list(acp_entry, entry, this->acp) {
-if (entry->var == deref->var && entry->write_mask & (1 << channel)) {
+  hash_entry *acp_hash_entry;
+  hash_table_foreach(this->acp, acp_hash_entry) {
+ acp_entry *entry = (acp_entry *) acp_hash_entry->data;
+ if (entry->var == deref->var && entry->write_mask & (1 << channel)) {
found = entry;
break;
-}
+ }
   }
 
   if (!found)
@@ -264,11 +267,12 @@ 
ir_constant_propagation_visitor::visit_enter(ir_function_signature *ir)
 * block.  Any instructions at global scope will be shuffled into
 * main() at link time, so they're irrelevant to us.
 */
-   exec_list *orig_acp = this->acp;
+   hash_table *orig_acp = this->acp;
hash_table *orig_kills = this->kills;
bool orig_killed_all = this->killed_all;
 
-   this->acp = new(mem_ctx) exec_list;
+   this->acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
+   _mesa_key_pointer_equal);
this->kills = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
  _mesa_key_pointer_equal);
this->killed_all = false;
@@ -345,7 +349,8 @@ ir_constant_propagation_visitor::visit_enter(ir_call *ir)
/* Since we're unlinked, we don't (necssarily) know the side effects of
 * this call.  So kill all copies.
 */
-   acp->make_empty();
+   acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
this->killed_all = true;
 
return visit_continue_with_parent;
@@ -354,24 +359,29 @@ ir_constant_propagation_visitor::visit_enter(ir_call *ir)
 void
 ir_constant_propagation_visitor::handle_if_block(exec_list *instructions)
 {
-   exec_list *orig_acp = this->acp;
+   hash_table *orig_acp = this->acp;
hash_table *orig_kills = this->kills;
bool orig_killed_all = this->killed_all;
 
-   this->acp = new(mem_ctx) exec_list;
+   this->acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
+   _mesa_key_pointer_equal);
this->kills = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
  _mesa_key_pointer_equal);
this->killed_all = false;
 
/* Populate the initial acp with a constant of the original */
-   foreach_in_list(acp_entry, a, orig_acp) {
-  this->acp->push_tail(new(this->mem_ctx) acp_entry(a));
+   hash_entry *htk;
+   hash_table_foreach(orig_acp, htk) {
+  acp_entry *a = (acp_entry *) htk->data;
+  _mesa_hash_table_insert(this->acp, a,
+  new(this->mem_ctx) acp_entry(a));
}
 
visit_list_elements(this, instructions);
 
if (this->killed_all) {
-  orig_acp->make_empty();
+  orig_acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
}
 
hash_table *new_kills = this->kills;
@@ -379,7 +389,6 @@ ir_constant_propagation_visitor::handle_if_block(exec_list 
*instructions)
this->acp = orig_acp;
this->killed_all = this->killed_all || orig_killed_all;
 
-   hash_entry *htk;
hash_table_foreach(new_kills, htk) {
   kill_entry *k = (kill_entry *) htk->data;
   kill(k->var, k->write_mask);
@@ -402,7 +411,7 @@ ir_constant_propagation_visitor::visit_enter(ir_if *ir)
 ir_visitor_status
 ir_constant_propagation_visitor::visit_enter(ir_loop *ir)
 {
-   exec_list *orig_acp = this->acp;
+   hash_table *orig_acp = this->acp;
hash_table *orig_kills = this->kills;
bool orig_killed_all = this->killed_all;
 
@@ -410,7 +419,8 @@ ir_constant_propagation_vi

[Mesa-dev] [Bug 92054] make check gbm-symbols-check regression

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=92054

Vinson Lee  changed:

   What|Removed |Added

   Keywords||bisected
 CC||emil.l.veli...@gmail.com,
   ||imir...@alum.mit.edu,
   ||marcin.slus...@gmail.com

--- Comment #1 from Vinson Lee  ---
c228514c72cb2fd5fb9e510808e29204fc9e7ae1 is the first bad commit
commit c228514c72cb2fd5fb9e510808e29204fc9e7ae1
Author: Marcin Ślusarz 
Date:   Sat Sep 19 19:17:34 2015 +0200

dri/common: use sysconfdir when looking for drirc

Useful when locally installed mesa has more quirks than the system one.

Signed-off-by: Marcin Ślusarz 
Reviewed-by: Ilia Mirkin 
Reviewed-by: Emil Velikov 

:04 04 164b86ae5e101466dd80f39fcc1af8330a9846dc
25d88a6f14f85d0d8560c0a571c6c27365b27bbc Mdocs
:04 04 3184b1ec5b329e97451d9d655f84fbee3faf62e9
9d02ba8b37a8ad8f0088a4735c18ded954609505 Msrc
bisect run success

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [Bug 92052] nir/nir_builder.h:79: error: expected primary-expression before ‘.’ token

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=92052

Vinson Lee  changed:

   What|Removed |Added

   Keywords||bisected
 CC||ja...@jlekstrand.net,
   ||t_arc...@yahoo.com.au

--- Comment #1 from Vinson Lee  ---
ef8eebc6ad5d86e524426f0755c0f7d0b4c0cd3e is the first bad commit
commit ef8eebc6ad5d86e524426f0755c0f7d0b4c0cd3e
Author: Timothy Arceri 
Date:   Wed Aug 26 22:18:36 2015 +1000

nir: support indirect indexing samplers in struct arrays

As a bonus we get indirect support for arrays of arrays for free.

V5: couple of small clean-ups suggested by Jason.

V4: fix struct member location caclulation, use nir_ssa_def rather than
nir_src for the indirect as suggested by Jason

V3: Use nir_instr_rewrite_src() with empty src rather then clearing
the use_link list directly for the old indirects as suggested by Jason

V2: Fixed validation error in debug build

Reviewed-by: Jason Ekstrand 

:04 04 083959ec82e909e081f9b469eaba4b52c5f18b92
fe8a25cf7cff07ec5d39df88bcf7f472a5e8d2a0 Msrc
bisect run success

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [Bug 92054] make check gbm-symbols-check regression

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=92054

Bug ID: 92054
   Summary: make check gbm-symbols-check regression
   Product: Mesa
   Version: git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Keywords: regression
  Severity: normal
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: v...@freedesktop.org
QA Contact: mesa-dev@lists.freedesktop.org

mesa: 99b1f4751f97631011b64fabcb57acf6beae01ac (master 11.1.0-devel)

src/gbm/test-suite.log 
===
   Mesa 11.1.0-devel: src/gbm/test-suite.log
===

# TOTAL: 1
# PASS:  0
# SKIP:  0
# XFAIL: 0
# FAIL:  1
# XPASS: 0
# ERROR: 0

.. contents:: :depth: 2

FAIL: gbm-symbols-check
===

driCheckOption driDestroyOptionCache driDestroyOptionInfo driParseConfigFiles
driParseOptionInfo driQueryOptionb driQueryOptionf driQueryOptioni
driQueryOptionstr

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [Bug 92052] nir/nir_builder.h:79: error: expected primary-expression before ‘.’ token

2015-09-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=92052

Bug ID: 92052
   Summary: nir/nir_builder.h:79: error: expected
primary-expression before ‘.’ token
   Product: Mesa
   Version: git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Keywords: regression
  Severity: normal
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: v...@freedesktop.org
QA Contact: mesa-dev@lists.freedesktop.org

mesa: 99b1f4751f97631011b64fabcb57acf6beae01ac (master 11.1.0-devel)

  CXXnir/nir_lower_samplers.lo
In file included from nir/nir_lower_samplers.cpp:27:
nir/nir_builder.h: In function ‘nir_ssa_def* nir_imm_float(nir_builder*,
float)’:
nir/nir_builder.h:79: error: expected primary-expression before ‘.’ token
nir/nir_builder.h:79: warning: extended initializer lists only available with
-std=c++0x or -std=gnu++0x
nir/nir_builder.h: In function ‘nir_ssa_def* nir_imm_vec4(nir_builder*, float,
float, float, float)’:
nir/nir_builder.h:86: error: expected primary-expression before ‘.’ token
nir/nir_builder.h:86: warning: extended initializer lists only available with
-std=c++0x or -std=gnu++0x
nir/nir_builder.h: In function ‘nir_ssa_def* nir_imm_int(nir_builder*, int)’:
nir/nir_builder.h:93: error: expected primary-expression before ‘.’ token
nir/nir_builder.h:93: warning: extended initializer lists only available with
-std=c++0x or -std=gnu++0x

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev