[Mesa-dev] [PATCH shader-db 2/3] run: work with tessellation shaders
---
run.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/run.c b/run.c
index de85665..2c2a810 100644
--- a/run.c
+++ b/run.c
@@ -80,6 +80,8 @@ get_shaders(const struct context_info *core, const struct
context_info *compat,
static const char *gs = "geometry shader]\n";
static const char *fs = "fragment ";
static const char *vs = "vertex ";
+static const char *tcs = "tessellation control shader]\n";
+static const char *tes = "tessellation evaluation shader]\n";
static const char *shder = "shader]\n";
static const char *program = "program]\n";
static const char *test = "test]\n";
@@ -169,6 +171,14 @@ get_shaders(const struct context_info *core, const struct
context_info *compat,
text += strlen(gs);
shader[i].type = GL_GEOMETRY_SHADER;
shader[i].text = text;
+} else if (memcmp(text, tcs, strlen(tcs)) == 0) {
+text += strlen(tcs);
+shader[i].type = GL_TESS_CONTROL_SHADER;
+shader[i].text = text;
+} else if (memcmp(text, tes, strlen(tes)) == 0) {
+text += strlen(tes);
+shader[i].type = GL_TESS_EVALUATION_SHADER;
+shader[i].text = text;
} else if (memcmp(text, test, strlen(test)) == 0) {
shader[i - 1].length = save_text + 1 - shader[i - 1].text;
goto out;
--
2.4.10
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[Mesa-dev] [PATCH shader-db 1/3] split-to-files: deal with minimum versions, other shader types
---
split-to-files.py | 24
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/split-to-files.py b/split-to-files.py
index 4a02b02..151681e 100755
--- a/split-to-files.py
+++ b/split-to-files.py
@@ -68,17 +68,33 @@ def write_shader_test(filename, shaders):
print("Writing {0}".format(filename))
out = open(filename, 'w')
+min_version = 110
+for stage, num in shaders:
+shader = shaders[(stage, num)]
+m = re.match(r"^#version (\d\d\d)", shader)
+if m:
+version = int(m.group(1), 10)
+if version > min_version:
+min_version = version
+
out.write("[require]\n")
-out.write("GLSL >= 1.10\n")
+out.write("GLSL >= %.2f\n" % (min_version / 100.))
out.write("\n")
for stage, num in shaders:
if stage == "vertex":
out.write("[vertex shader]\n")
-out.write(shaders[(stage, num)])
-if stage == "fragment":
+elif stage == "fragment":
out.write("[fragment shader]\n")
-out.write(shaders[(stage, num)])
+elif stage == "geometry":
+out.write("[geometry shader]\n")
+elif stage == "tess ctrl":
+out.write("[tessellation control shader]\n")
+elif stage == "tess eval":
+out.write("[tessellation evaluation shader]\n")
+else:
+assert False, stage
+out.write(shaders[(stage, num)])
out.close()
--
2.4.10
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[Mesa-dev] [PATCH shader-db 3/3] nv-report: initial checkin for nouveau
---
nv-report.py | 108 +++
1 file changed, 108 insertions(+)
create mode 100644 nv-report.py
diff --git a/nv-report.py b/nv-report.py
new file mode 100644
index 000..b97f4a1
--- /dev/null
+++ b/nv-report.py
@@ -0,0 +1,108 @@
+#!/usr/bin/python
+
+"""
+We're matching lines like
+
+5.shader_test - type: 1, local: 0, gpr: 4, inst: 7, bytes: 56
+11.shader_test - type: 1, local: 0, gpr: 4, inst: 1, bytes: 8
+"""
+
+import re
+import sys
+
+class Stat(object):
+
+def __init__(self, m=None):
+if m:
+self.local = int(m.group("local"), 10)
+self.gpr = int(m.group("gpr"), 10)
+self.inst = int(m.group("inst"), 10)
+self.bytes = int(m.group("bytes"), 10)
+else:
+self.local = 0
+self.gpr = 0
+self.inst = 0
+self.bytes = 0
+
+def __eq__(self, other):
+return (self.local == other.local and
+self.gpr == other.gpr and
+self.inst == other.inst and
+self.bytes == other.bytes)
+
+class Stats(object):
+
+def __init__(self):
+self.stats = {}
+self.local = 0
+self.gpr = 0
+self.inst = 0
+self.bytes = 0
+
+def record(self, name, stat):
+assert name not in self.stats, name
+self.stats[name] = stat
+for attr in ("local", "gpr", "inst", "bytes"):
+setattr(self, attr, getattr(self, attr) + getattr(stat, attr))
+
+RE = re.compile(r"^(?P.*) - type: (?P\d+), local: (?P\d+), "
+r"gpr: (?P\d+), inst: (?P\d+), "
+r"bytes: (?P\d+)$")
+
+def analyze(fname):
+stats = Stats()
+with open(fname, "r") as f:
+for line in f.xreadlines():
+if line.startswith("Thread "):
+continue
+m = RE.match(line)
+assert m, line
+stats.record(m.group("name") + " - " + m.group("type"), Stat(m))
+
+return stats
+
+def diff(a, b):
+return "%d -> %d (%.2f%%)" % (a, b, b * 100. / a - 100.)
+
+def main(argv):
+# Count up each of the metrics in the before and after, and
+# produce hurt/helped comparisons.
+before = analyze(argv[1])
+after = analyze(argv[2])
+keys = before.stats.keys()
+assert after.stats.keys() == keys
+
+helped = Stat()
+hurt = Stat()
+for key in keys:
+a = after.stats[key]
+b = before.stats[key]
+if a != b:
+for attr in ("local", "gpr", "inst", "bytes"):
+aa = getattr(a, attr)
+ba = getattr(b, attr)
+if aa == ba:
+continue
+if aa < ba:
+setattr(helped, attr,
+getattr(helped, attr) + 1)
+else:
+setattr(hurt, attr,
+getattr(hurt, attr) + 1)
+
+print "total instructions in shared programs :", diff(before.inst,
after.inst)
+print "total gprs used in shared programs:", diff(before.gpr,
after.gpr)
+print "total local used in shared programs :", diff(before.local,
after.local)
+print
+print "%10s %10s %10s %10s %10s " % ("", "local", "gpr", "inst", "bytes")
+print "%10s " % "helped",
+for attr in ("local", "gpr", "inst", "bytes"):
+print "%10d " % getattr(helped, attr),
+print
+print "%10s " % "hurt",
+for attr in ("local", "gpr", "inst", "bytes"):
+print "%10d " % getattr(hurt, attr),
+
+
+if __name__ == "__main__":
+main(sys.argv)
--
2.4.10
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Re: [Mesa-dev] [PATCH 1/3] glsl: Parse shared keyword for compute shader variables
On 2015-11-06 19:33:38, Timothy Arceri wrote:
> On Fri, 2015-11-06 at 17:56 -0800, Jordan Justen wrote:
> > Signed-off-by: Jordan Justen
> > ---
> >
> > Notes:
> > git://people.freedesktop.org/~jljusten/mesa cs-parse-shared-vars-v1
> > http://patchwork.freedesktop.org/bundle/jljusten/cs-parse-shared-vars-v1
> >
> > With these environment overrides:
> >
> > export MESA_GL_VERSION_OVERRIDE=4.3
> > export MESA_GLSL_VERSION_OVERRIDE=430
> > export MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader
> >
> > This fixes my recently posted piglit test:
> >
> > tests/spec/arb_compute_shader/compiler/shared-variables.comp
> > http://patchwork.freedesktop.org/patch/63944/
> >
> > src/glsl/ast_to_hir.cpp | 2 +-
> > src/glsl/glsl_lexer.ll | 2 ++
> > src/glsl/glsl_parser.yy | 6 ++
> > 3 files changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> > index 0306530..dd5ba4e 100644
> > --- a/src/glsl/ast_to_hir.cpp
> > +++ b/src/glsl/ast_to_hir.cpp
> > @@ -3081,7 +3081,7 @@ apply_type_qualifier_to_variable(const struct
> > ast_type_qualifier *qual,
> > if (qual->flags.q.std140 ||
> > qual->flags.q.std430 ||
> > qual->flags.q.packed ||
> > - qual->flags.q.shared) {
> > + (qual->flags.q.shared && (state->stage != MESA_SHADER_COMPUTE))) {
> >_mesa_glsl_error(loc, state,
> > "uniform and shader storage block layout qualifiers
> > "
> > "std140, std430, packed, and shared can only be "
> > diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
> > index 2142817..e59f93e 100644
> > --- a/src/glsl/glsl_lexer.ll
> > +++ b/src/glsl/glsl_lexer.ll
> > @@ -414,6 +414,8 @@ writeonly KEYWORD_WITH_ALT(420, 300, 420, 310,
> > yyextra->ARB_shader_image_lo
> >
> > atomic_uint KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra
> > ->ARB_shader_atomic_counters_enable, ATOMIC_UINT);
> >
> > +shared KEYWORD_WITH_ALT(430, 310, 430, 310, yyextra
> > ->ARB_compute_shader_enable, SHARED);
> > +
> > struct return STRUCT;
> > void return VOID_TOK;
> >
> > diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
> > index 4636435..2598356 100644
> > --- a/src/glsl/glsl_parser.yy
> > +++ b/src/glsl/glsl_parser.yy
> > @@ -165,6 +165,7 @@ static bool match_layout_qualifier(const char *s1, const
> > char *s2,
> > %token IMAGE1DSHADOW IMAGE2DSHADOW IMAGE1DARRAYSHADOW IMAGE2DARRAYSHADOW
> > %token COHERENT VOLATILE RESTRICT READONLY WRITEONLY
> > %token ATOMIC_UINT
> > +%token SHARED
> > %token STRUCT VOID_TOK WHILE
> > %token IDENTIFIER TYPE_IDENTIFIER NEW_IDENTIFIER
> > %type any_identifier
> > @@ -1958,6 +1959,11 @@ memory_qualifier:
> >memset(& $$, 0, sizeof($$));
> >$$.flags.q.write_only = 1;
> > }
> > + | SHARED
> > + {
> > + memset(& $$, 0, sizeof($$));
> > + $$.flags.q.shared = 1;
> > + }
>
> Hi Jordan,
>
> This should be in storage_qualifier: rather than memory_qualifier:
>
> Also it should be restricted to the computer shader stage e.g.
>
> if (state->stage == MESA_SHADER_COMPUTE) {
> memset(& $$, 0, sizeof($$));
> $$.flags.q.shared = 1;
> } else {
> _mesa_glsl_error(&@1, state, "the shared storage qualifiers can only
> "be used with compute shaders");
> }
>
> Maybe add a piglit test to make sure it fails in another stage?
I tested nvidia, and they don't fail to compile when a variable is
declared as shared in the render stages.
The spec says:
"Variables declared as shared may only be used in compute shaders"
Unfortunately, that doesn't specifically say that it should fail at
the compile step.
I think it is fine for us to fail at the compile phase, but I'm not
sure about tests for this.
-Jordan
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[Mesa-dev] [PATCH] freedreno: expose GLSL 140 and fake MSAA for GL3.0/3.1 support
Signed-off-by: Ilia Mirkin --- src/gallium/drivers/freedreno/freedreno_screen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 8529f86..9d2cd31 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -177,6 +177,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: case PIPE_CAP_CONDITIONAL_RENDER: case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: + case PIPE_CAP_FAKE_SW_MSAA: return is_a3xx(screen) || is_a4xx(screen); case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: @@ -206,7 +207,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_FEATURE_LEVEL: if (glsl120) return 120; - return is_ir3(screen) ? 130 : 120; + return is_ir3(screen) ? 140 : 120; /* Unsupported features. */ case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: @@ -221,7 +222,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: case PIPE_CAP_TEXTURE_GATHER_SM5: - case PIPE_CAP_FAKE_SW_MSAA: case PIPE_CAP_TEXTURE_QUERY_LOD: case PIPE_CAP_SAMPLE_SHADING: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: -- 2.4.10 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] freedreno: add support for conditional rendering, required for GL3.0
A smarter implementation would make it possible to attach this to emit
state for the BY_REGION versions to avoid breaking the tiling. But this
is a start.
Signed-off-by: Ilia Mirkin
---
docs/relnotes/11.1.0.html | 1 +
src/gallium/drivers/freedreno/freedreno_context.h | 4 +++
src/gallium/drivers/freedreno/freedreno_draw.c | 8 ++
src/gallium/drivers/freedreno/freedreno_query.c| 11
src/gallium/drivers/freedreno/freedreno_resource.c | 33 +++---
src/gallium/drivers/freedreno/freedreno_resource.h | 2 ++
src/gallium/drivers/freedreno/freedreno_screen.c | 4 +--
7 files changed, 57 insertions(+), 6 deletions(-)
diff --git a/docs/relnotes/11.1.0.html b/docs/relnotes/11.1.0.html
index 3c85231..6f194cc 100644
--- a/docs/relnotes/11.1.0.html
+++ b/docs/relnotes/11.1.0.html
@@ -60,6 +60,7 @@ Note: some of the new features are only available with
certain drivers.
GL_EXT_buffer_storage implemented for when ES 3.1 support is gained
GL_EXT_draw_elements_base_vertex on all drivers
GL_EXT_texture_compression_rgtc / latc on freedreno (a3xx)
+GL_NV_conditional_render on freedreno
GL_OES_draw_elements_base_vertex on all drivers
EGL_KHR_create_context on softpipe, llvmpipe
EGL_KHR_gl_colorspace on softpipe, llvmpipe
diff --git a/src/gallium/drivers/freedreno/freedreno_context.h
b/src/gallium/drivers/freedreno/freedreno_context.h
index 61c4c6d..571c814 100644
--- a/src/gallium/drivers/freedreno/freedreno_context.h
+++ b/src/gallium/drivers/freedreno/freedreno_context.h
@@ -359,6 +359,10 @@ struct fd_context {
struct fd_streamout_stateobj streamout;
struct pipe_clip_state ucp;
+ struct pipe_query *cond_query;
+ bool cond_cond; /* inverted rendering condition */
+ uint cond_mode;
+
/* GMEM/tile handling fxns: */
void (*emit_tile_init)(struct fd_context *ctx);
void (*emit_tile_prep)(struct fd_context *ctx, struct fd_tile *tile);
diff --git a/src/gallium/drivers/freedreno/freedreno_draw.c
b/src/gallium/drivers/freedreno/freedreno_draw.c
index 7bf3343..bf803cc 100644
--- a/src/gallium/drivers/freedreno/freedreno_draw.c
+++ b/src/gallium/drivers/freedreno/freedreno_draw.c
@@ -88,6 +88,10 @@ fd_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
return;
}
+ /* TODO: push down the region versions into the tiles */
+ if (!fd_render_condition_check(pctx))
+ return;
+
/* emulate unsupported primitives: */
if (!fd_supported_prim(ctx, info->mode)) {
if (ctx->streamout.num_targets > 0)
@@ -220,6 +224,10 @@ fd_clear(struct pipe_context *pctx, unsigned buffers,
unsigned cleared_buffers;
int i;
+ /* TODO: push down the region versions into the tiles */
+ if (!fd_render_condition_check(pctx))
+ return;
+
/* for bookkeeping about which buffers have been cleared (and thus
* can fully or partially skip mem2gmem) we need to ignore buffers
* that have already had a draw, in case apps do silly things like
diff --git a/src/gallium/drivers/freedreno/freedreno_query.c
b/src/gallium/drivers/freedreno/freedreno_query.c
index db2683c..b87e825 100644
--- a/src/gallium/drivers/freedreno/freedreno_query.c
+++ b/src/gallium/drivers/freedreno/freedreno_query.c
@@ -81,6 +81,16 @@ fd_get_query_result(struct pipe_context *pctx, struct
pipe_query *pq,
return q->funcs->get_query_result(fd_context(pctx), q, wait, result);
}
+static void
+fd_render_condition(struct pipe_context *pctx, struct pipe_query *pq,
+ boolean condition, uint mode)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->cond_query = pq;
+ ctx->cond_cond = condition;
+ ctx->cond_mode = mode;
+}
+
static int
fd_get_driver_query_info(struct pipe_screen *pscreen,
unsigned index, struct pipe_driver_query_info *info)
@@ -118,4 +128,5 @@ fd_query_context_init(struct pipe_context *pctx)
pctx->begin_query = fd_begin_query;
pctx->end_query = fd_end_query;
pctx->get_query_result = fd_get_query_result;
+ pctx->render_condition = fd_render_condition;
}
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c
b/src/gallium/drivers/freedreno/freedreno_resource.c
index b099b3d..994684d 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -660,7 +660,7 @@ fail:
return NULL;
}
-static void fd_blitter_pipe_begin(struct fd_context *ctx);
+static void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond);
static void fd_blitter_pipe_end(struct fd_context *ctx);
/**
@@ -682,7 +682,7 @@ fd_blitter_pipe_copy_region(struct fd_context *ctx,
if (!util_blitter_is_copy_supported(ctx->blitter, dst, src))
return false;
- fd_blitter_pipe_begin(ctx);
+
[Mesa-dev] [PATCH v5] gallium/hud: control visibility at startup and runtime.
- env GALLIUM_HUD_VISIBLE: control default visibility
- env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
---
Added static to sig_handled as it should have been.
docs/envvars.html | 6 ++
src/gallium/auxiliary/hud/hud_context.c | 28
2 files changed, 34 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index bdfe999..530bbb7 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -179,6 +179,12 @@ Mesa EGL supports different sets of environment variables.
See the
GALLIUM_HUD - draws various information on the screen, like framerate,
cpu load, driver statistics, performance counters, etc.
Set GALLIUM_HUD=help and run e.g. glxgears for more info.
+GALLIUM_HUD_VISIBLE - control default visibility, defaults to true.
+GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal.
+Especially useful to toggle hud at specific points of application and
+disable for unencumbered viewing the rest of the time. For example, set
+GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10 (SIGUSR1).
+Use kill -10 to toggle the hud as desired.
GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings, etc.
rather than stderr.
GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index ffe30b8..4324e0c 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -33,6 +33,7 @@
* Set GALLIUM_HUD=help for more info.
*/
+#include
#include
#include "hud/hud_context.h"
@@ -51,6 +52,8 @@
#include "tgsi/tgsi_text.h"
#include "tgsi/tgsi_dump.h"
+/* Control the visibility of all HUD contexts */
+static boolean huds_visible = TRUE;
struct hud_context {
struct pipe_context *pipe;
@@ -95,6 +98,11 @@ struct hud_context {
} text, bg, whitelines;
};
+static void
+signal_visible_handler(int sig, siginfo_t *siginfo, void *context)
+{
+ huds_visible = !huds_visible;
+}
static void
hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
@@ -441,6 +449,9 @@ hud_draw(struct hud_context *hud, struct pipe_resource *tex)
struct hud_pane *pane;
struct hud_graph *gr;
+ if (!huds_visible)
+ return;
+
hud->fb_width = tex->width0;
hud->fb_height = tex->height0;
hud->constants.two_div_fb_width = 2.0f / hud->fb_width;
@@ -1125,6 +1136,10 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
struct pipe_sampler_view view_templ;
unsigned i;
const char *env = debug_get_option("GALLIUM_HUD", NULL);
+ unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
+ static boolean sig_handled = FALSE;
+ struct sigaction action = {};
+ huds_visible = debug_get_bool_option("GALLIUM_HUD_VISIBLE", TRUE);
if (!env || !*env)
return NULL;
@@ -1267,6 +1282,19 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
LIST_INITHEAD(&hud->pane_list);
+ /* setup sig handler once for all hud contexts */
+ if (!sig_handled && signo != 0) {
+ action.sa_sigaction = &signal_visible_handler;
+ action.sa_flags = SA_SIGINFO;
+
+ if (signo >= NSIG)
+ fprintf(stderr, "gallium_hud: invalid signal %u\n", signo);
+ else if (sigaction(signo, &action, NULL) < 0)
+ fprintf(stderr, "gallium_hud: unable to set handler for signal %u\n",
signo);
+
+ sig_handled = TRUE;
+ }
+
hud_parse_env_var(hud, env);
return hud;
}
--
2.6.2
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[Mesa-dev] [PATCH 4/4] i965: Allow indirect GS input indexing in the scalar backend.
This allows arbitrary non-constant indices on GS input arrays,
both for the vertex index, and any array offsets beyond that.
All indirects are handled via the pull model. We could potentially
handle indirect addressing of pushed data as well, but it would add
additional code complexity, and we usually have to pull inputs anyway
due to the sheer volume of input data. Plus, marking pushed inputs
as live due to indirect addressing could exacerbate register pressure
problems pretty badly. We'd need to be careful.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 17
src/mesa/drivers/dri/i965/brw_fs.h | 3 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 129 ---
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +
4 files changed, 106 insertions(+), 46 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index ee10c9d..9d00379 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1636,24 +1636,7 @@ fs_visitor::assign_gs_urb_setup()
first_non_payload_grf +=
8 * vue_prog_data->urb_read_length * nir->info.gs.vertices_in;
- const unsigned first_icp_handle = payload.num_regs -
- (vue_prog_data->include_vue_handles ? nir->info.gs.vertices_in : 0);
-
foreach_block_and_inst(block, fs_inst, inst, cfg) {
- /* Lower URB_READ_SIMD8 opcodes into real messages. */
- if (inst->opcode == SHADER_OPCODE_URB_READ_SIMD8) {
- assert(inst->src[0].file == IMM);
- inst->src[0] = retype(brw_vec8_grf(first_icp_handle +
-inst->src[0].fixed_hw_reg.dw1.ud,
-0), BRW_REGISTER_TYPE_UD);
- /* for now, assume constant - we can do per-slot offsets later */
- assert(inst->src[1].file == IMM);
- inst->offset = inst->src[1].fixed_hw_reg.dw1.ud;
- inst->src[1] = fs_reg();
- inst->mlen = 1;
- inst->base_mrf = -1;
- }
-
/* Rewrite all ATTR file references to HW_REGs. */
convert_attr_sources_to_hw_regs(inst);
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index fb70f0c..67f9f59 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -302,7 +302,8 @@ public:
unsigned stream_id);
void emit_gs_thread_end();
void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
- unsigned offset, unsigned num_components);
+ const fs_reg &indirect_offset, unsigned imm_offset,
+ unsigned num_components);
void emit_cs_terminate();
fs_reg *emit_cs_local_invocation_id_setup();
fs_reg *emit_cs_work_group_id_setup();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 7f033f2..3bc02c5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1543,42 +1543,112 @@ fs_visitor::emit_gs_vertex(const nir_src
&vertex_count_nir_src,
void
fs_visitor::emit_gs_input_load(const fs_reg &dst,
const nir_src &vertex_src,
- unsigned input_offset,
+ const fs_reg &indirect_offset,
+ unsigned imm_offset,
unsigned num_components)
{
- const brw_vue_prog_data *vue_prog_data = (const brw_vue_prog_data *)
prog_data;
- const unsigned vertex = nir_src_as_const_value(vertex_src)->u[0];
+ struct brw_gs_prog_data *gs_prog_data = (struct brw_gs_prog_data *)
prog_data;
- const unsigned array_stride = vue_prog_data->urb_read_length * 8;
+ /* Offset 0 is the VUE header, which contains VARYING_SLOT_LAYER [.y],
+* VARYING_SLOT_VIEWPORT [.z], and VARYING_SLOT_PSIZ [.w]. Only
+* gl_PointSize is available as a GS input, however, so it must be that.
+*/
+ const bool is_point_size =
+ indirect_offset.file == BAD_FILE && imm_offset == 0;
+
+ nir_const_value *vertex_const = nir_src_as_const_value(vertex_src);
+ const unsigned push_reg_count = gs_prog_data->base.urb_read_length * 8;
+
+ if (indirect_offset.file == BAD_FILE && vertex_const != NULL &&
+ 4 * imm_offset < push_reg_count) {
+ imm_offset = 4 * imm_offset + vertex_const->u[0] * push_reg_count;
+ /* This input was pushed into registers. */
+ if (is_point_size) {
+ /* gl_PointSize comes in .w */
+ bld.MOV(dst, fs_reg(ATTR, imm_offset + 3, dst.type));
+ } else {
+ for (unsigned i = 0; i < num_components; i++) {
+bld.MOV(offset(dst, bld, i),
+fs_reg(ATTR, imm_offset + i, dst.type));
+ }
+ }
+ } else {
+ /* Resort to the pull model. Ensure the VUE handles are provided. */
+ gs_prog_data->base
[Mesa-dev] [PATCH 1/4] i965/brw_reg: Add a brw_VxH_indirect helper
From: Jason Ekstrand
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_reg.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 083c46a..c3f77c0 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -995,6 +995,17 @@ brw_vec1_indirect(unsigned subnr, int offset)
}
static inline struct brw_reg
+brw_VxH_indirect(unsigned subnr, int offset)
+{
+ struct brw_reg reg = brw_vec1_grf(0, 0);
+ reg.vstride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL;
+ reg.subnr = subnr;
+ reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
+ reg.dw1.bits.indirect_offset = offset;
+ return reg;
+}
+
+static inline struct brw_reg
deref_4f(struct brw_indirect ptr, int offset)
{
return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset);
--
2.6.2
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[Mesa-dev] [PATCH 2/4] i965: Introduce a INDIRECT_THREAD_PAYLOAD_MOV opcode.
The geometry and tessellation control shader stages both read from
multiple URB entries (one per vertex). The thread payload contains
several URB handles which reference these separate memory segments.
In GLSL, these inputs are represented as per-vertex arrays; the
outermost array index selects which vertex's inputs to read. This
array index does not necessarily need to be constant.
To handle that, we need to use indirect addressing on GRFs to select
which of the thread payload registers has the appropriate URB handle.
(This is before we can even think about applying the pull model!)
This patch introduces a new opcode which performs a MOV from a
source using VxH indirect addressing (which allows each of the 8
SIMD channels to select distinct data.) It also marks a whole
segment of the payload as "used", so the register allocator recognizes
the read and avoids reusing those registers.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h | 11
src/mesa/drivers/dri/i965/brw_fs.h| 4 +++
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_generator.cpp| 32 +++
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 10 +++
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++
6 files changed, 60 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 6433cff..288d8b2 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1264,6 +1264,17 @@ enum opcode {
* Calculate the high 32-bits of a 32x32 multiply.
*/
SHADER_OPCODE_MULH,
+
+ /**
+* A SIMD8 VxH indirect addressed MOV from the thread payload.
+*
+* This can be used to select GS or TCS input URB handles.
+*
+* Source 0: Immediate offset in bytes (UD immediate).
+* Source 1: Indirect offset in bytes (UD GRF).
+* Source 2: Number of registers that could be indirectly addressed.
+*/
+ SHADER_OPCODE_INDIRECT_THREAD_PAYLOAD_MOV,
};
enum brw_urb_write_flags {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 8a93b56..fb70f0c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -526,6 +526,10 @@ private:
struct brw_reg offset,
struct brw_reg value);
+ void generate_indirect_thread_payload_mov(struct brw_reg dst,
+ struct brw_reg imm_byte_offset,
+ struct brw_reg
indirect_byte_offset);
+
bool patch_discard_jumps_to_fb_writes();
const struct brw_compiler *compiler;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 3a28c8d..699baab 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -78,6 +78,7 @@ is_expression(const fs_visitor *v, const fs_inst *const inst)
case FS_OPCODE_LINTERP:
case SHADER_OPCODE_FIND_LIVE_CHANNEL:
case SHADER_OPCODE_BROADCAST:
+ case SHADER_OPCODE_INDIRECT_THREAD_PAYLOAD_MOV:
return true;
case SHADER_OPCODE_RCP:
case SHADER_OPCODE_RSQ:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e207a77..7d51c0e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -368,6 +368,33 @@ fs_generator::generate_fb_write(fs_inst *inst, struct
brw_reg payload)
}
void
+fs_generator::generate_indirect_thread_payload_mov(struct brw_reg dst,
+ struct brw_reg
imm_byte_offset_reg,
+ struct brw_reg
indirect_byte_offset)
+{
+ assert(imm_byte_offset_reg.type == BRW_REGISTER_TYPE_UD);
+ assert(imm_byte_offset_reg.file == BRW_IMMEDIATE_VALUE);
+ assert(indirect_byte_offset.type == BRW_REGISTER_TYPE_UD);
+ assert(indirect_byte_offset.file == BRW_GENERAL_REGISTER_FILE);
+ unsigned imm_byte_offset = imm_byte_offset_reg.dw1.ud;
+
+ /* We use VxH indirect addressing, clobbering a0.0 through a0.7. */
+ struct brw_reg addr = vec8(brw_address_reg(0));
+
+ /* The destination stride of an instruction (in bytes) must be greater
+* than or equal to the size of the rest of the instruction. Since the
+* address register is of type UW, we can't use a D-type instruction.
+* In order to get around this, re re-type to UW and use a stride.
+*/
+ indirect_byte_offset =
+ retype(spread(indirect_byte_offset, 2), BRW_REGISTER_TYPE_UW);
+
+ brw_MOV(p, addr, indirect_byte_offset);
+ brw_inst_set_mask_control(devinfo, brw_last_inst, BRW_MASK_DISABLE);
+ brw_MOV(p, dst, retype(brw_VxH_indirect(0, imm_byte_offset), dst.type));
+}
+
+void
fs_generator::gen
[Mesa-dev] [PATCH 3/4] i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.
We need to use per-slot offsets when there's non-uniform indexing,
as each SIMD channel could have a different index. We want to use
them for any non-constant index (even if uniform), as it lives in
the message header instead of the descriptor, allowing us to set
offsets in GRFs rather than immediates.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h| 7 ++-
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++
4 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 288d8b2..1bce515 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1027,13 +1027,10 @@ enum opcode {
SHADER_OPCODE_GEN7_SCRATCH_READ,
/**
-* Gen8+ SIMD8 URB Read message.
-*
-* Source 0: The header register, containing URB handles (g1).
-*
-* Currently only supports constant offsets, in inst->offset.
+* Gen8+ SIMD8 URB Read messages.
*/
SHADER_OPCODE_URB_READ_SIMD8,
+ SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT,
SHADER_OPCODE_URB_WRITE_SIMD8,
SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 4cc9626..ee10c9d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -284,6 +284,7 @@ fs_inst::is_send_from_grf() const
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT:
case SHADER_OPCODE_URB_READ_SIMD8:
+ case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
return true;
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
return src[1].file == GRF;
@@ -793,6 +794,7 @@ fs_inst::regs_read(int arg) const
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT:
case SHADER_OPCODE_URB_READ_SIMD8:
+ case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 7d51c0e..c1f8045 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -410,6 +410,9 @@ fs_generator::generate_urb_read(fs_inst *inst,
brw_inst_set_sfid(p->devinfo, send, BRW_SFID_URB);
brw_inst_set_urb_opcode(p->devinfo, send, GEN8_URB_OPCODE_SIMD8_READ);
+ if (inst->opcode == SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT)
+ brw_inst_set_urb_per_slot_offset(p->devinfo, send, true);
+
brw_inst_set_mlen(p->devinfo, send, inst->mlen);
brw_inst_set_rlen(p->devinfo, send, inst->regs_written);
brw_inst_set_header_present(p->devinfo, send, true);
@@ -2118,6 +2121,7 @@ fs_generator::generate_code(const cfg_t *cfg, int
dispatch_width)
break;
case SHADER_OPCODE_URB_READ_SIMD8:
+ case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
generate_urb_read(inst, dst, src[0]);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 5e407e9..fef5246 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -423,6 +423,8 @@ brw_instruction_name(enum opcode op)
return "gen8_urb_write_simd8_masked_per_slot";
case SHADER_OPCODE_URB_READ_SIMD8:
return "urb_read_simd8";
+ case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
+ return "urb_read_simd8_per_slot";
case SHADER_OPCODE_FIND_LIVE_CHANNEL:
return "find_live_channel";
--
2.6.2
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Re: [Mesa-dev] [PATCH v4] gallium/hud: control visibility at startup and runtime.
On Sat, Nov 7, 2015 at 11:42 PM, Jimmy Berry wrote:
> - env GALLIUM_HUD_VISIBLE: control default visibility
> - env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
> ---
>
> per imirkin's comments:
> - long to unsigned
> - ignore signal value of 0 rather than always printing error message
> (oversight)
>
> docs/envvars.html | 6 ++
> src/gallium/auxiliary/hud/hud_context.c | 28
> 2 files changed, 34 insertions(+)
>
> diff --git a/docs/envvars.html b/docs/envvars.html
> index bdfe999..530bbb7 100644
> --- a/docs/envvars.html
> +++ b/docs/envvars.html
> @@ -179,6 +179,12 @@ Mesa EGL supports different sets of environment
> variables. See the
> GALLIUM_HUD - draws various information on the screen, like framerate,
> cpu load, driver statistics, performance counters, etc.
> Set GALLIUM_HUD=help and run e.g. glxgears for more info.
> +GALLIUM_HUD_VISIBLE - control default visibility, defaults to true.
> +GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal.
> +Especially useful to toggle hud at specific points of application and
> +disable for unencumbered viewing the rest of the time. For example, set
> +GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10
> (SIGUSR1).
> +Use kill -10 to toggle the hud as desired.
> GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings,
> etc.
> rather than stderr.
> GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment
> diff --git a/src/gallium/auxiliary/hud/hud_context.c
> b/src/gallium/auxiliary/hud/hud_context.c
> index ffe30b8..f9dfcc7 100644
> --- a/src/gallium/auxiliary/hud/hud_context.c
> +++ b/src/gallium/auxiliary/hud/hud_context.c
> @@ -33,6 +33,7 @@
> * Set GALLIUM_HUD=help for more info.
> */
>
> +#include
> #include
>
> #include "hud/hud_context.h"
> @@ -51,6 +52,8 @@
> #include "tgsi/tgsi_text.h"
> #include "tgsi/tgsi_dump.h"
>
> +/* Control the visibility of all HUD contexts */
> +static boolean huds_visible = TRUE;
>
> struct hud_context {
> struct pipe_context *pipe;
> @@ -95,6 +98,11 @@ struct hud_context {
> } text, bg, whitelines;
> };
>
> +static void
> +signal_visible_handler(int sig, siginfo_t *siginfo, void *context)
> +{
> + huds_visible = !huds_visible;
> +}
>
> static void
> hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
> @@ -441,6 +449,9 @@ hud_draw(struct hud_context *hud, struct pipe_resource
> *tex)
> struct hud_pane *pane;
> struct hud_graph *gr;
>
> + if (!huds_visible)
> + return;
> +
> hud->fb_width = tex->width0;
> hud->fb_height = tex->height0;
> hud->constants.two_div_fb_width = 2.0f / hud->fb_width;
> @@ -1125,6 +1136,10 @@ hud_create(struct pipe_context *pipe, struct
> cso_context *cso)
> struct pipe_sampler_view view_templ;
> unsigned i;
> const char *env = debug_get_option("GALLIUM_HUD", NULL);
> + unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
> + boolean sig_handled = FALSE;
> + struct sigaction action = {};
> + huds_visible = debug_get_bool_option("GALLIUM_HUD_VISIBLE", TRUE);
>
> if (!env || !*env)
>return NULL;
> @@ -1267,6 +1282,19 @@ hud_create(struct pipe_context *pipe, struct
> cso_context *cso)
>
> LIST_INITHEAD(&hud->pane_list);
>
> + /* setup sig handler once for all hud contexts */
> + if (!sig_handled && signo != 0) {
> + action.sa_sigaction = &signal_visible_handler;
> + action.sa_flags = SA_SIGINFO;
> +
> + if (signo >= NSIG)
> + fprintf(stderr, "gallium_hud: invalid signal %u\n", signo);
> + else if (sigaction(signo, &action, NULL) < 0)
> + fprintf(stderr, "gallium_hud: unable to set handler for signal
> %u\n", signo);
> +
> + sig_handled = TRUE;
sig_handled is scoped to this function, so this will have fairly
minimal effect. Did you mean to make it a global / pthread_once_t type
of thing?
> + }
> +
> hud_parse_env_var(hud, env);
> return hud;
> }
> --
> 2.6.2
>
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[Mesa-dev] [PATCH v4] gallium/hud: control visibility at startup and runtime.
- env GALLIUM_HUD_VISIBLE: control default visibility
- env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
---
per imirkin's comments:
- long to unsigned
- ignore signal value of 0 rather than always printing error message (oversight)
docs/envvars.html | 6 ++
src/gallium/auxiliary/hud/hud_context.c | 28
2 files changed, 34 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index bdfe999..530bbb7 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -179,6 +179,12 @@ Mesa EGL supports different sets of environment variables.
See the
GALLIUM_HUD - draws various information on the screen, like framerate,
cpu load, driver statistics, performance counters, etc.
Set GALLIUM_HUD=help and run e.g. glxgears for more info.
+GALLIUM_HUD_VISIBLE - control default visibility, defaults to true.
+GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal.
+Especially useful to toggle hud at specific points of application and
+disable for unencumbered viewing the rest of the time. For example, set
+GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10 (SIGUSR1).
+Use kill -10 to toggle the hud as desired.
GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings, etc.
rather than stderr.
GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index ffe30b8..f9dfcc7 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -33,6 +33,7 @@
* Set GALLIUM_HUD=help for more info.
*/
+#include
#include
#include "hud/hud_context.h"
@@ -51,6 +52,8 @@
#include "tgsi/tgsi_text.h"
#include "tgsi/tgsi_dump.h"
+/* Control the visibility of all HUD contexts */
+static boolean huds_visible = TRUE;
struct hud_context {
struct pipe_context *pipe;
@@ -95,6 +98,11 @@ struct hud_context {
} text, bg, whitelines;
};
+static void
+signal_visible_handler(int sig, siginfo_t *siginfo, void *context)
+{
+ huds_visible = !huds_visible;
+}
static void
hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
@@ -441,6 +449,9 @@ hud_draw(struct hud_context *hud, struct pipe_resource *tex)
struct hud_pane *pane;
struct hud_graph *gr;
+ if (!huds_visible)
+ return;
+
hud->fb_width = tex->width0;
hud->fb_height = tex->height0;
hud->constants.two_div_fb_width = 2.0f / hud->fb_width;
@@ -1125,6 +1136,10 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
struct pipe_sampler_view view_templ;
unsigned i;
const char *env = debug_get_option("GALLIUM_HUD", NULL);
+ unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
+ boolean sig_handled = FALSE;
+ struct sigaction action = {};
+ huds_visible = debug_get_bool_option("GALLIUM_HUD_VISIBLE", TRUE);
if (!env || !*env)
return NULL;
@@ -1267,6 +1282,19 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
LIST_INITHEAD(&hud->pane_list);
+ /* setup sig handler once for all hud contexts */
+ if (!sig_handled && signo != 0) {
+ action.sa_sigaction = &signal_visible_handler;
+ action.sa_flags = SA_SIGINFO;
+
+ if (signo >= NSIG)
+ fprintf(stderr, "gallium_hud: invalid signal %u\n", signo);
+ else if (sigaction(signo, &action, NULL) < 0)
+ fprintf(stderr, "gallium_hud: unable to set handler for signal %u\n",
signo);
+
+ sig_handled = TRUE;
+ }
+
hud_parse_env_var(hud, env);
return hud;
}
--
2.6.2
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Re: [Mesa-dev] [PATCH v3] gallium/hud: control visibility at startup and runtime.
On Sat, Nov 7, 2015 at 11:05 PM, Jimmy Berry wrote:
> - env GALLIUM_HUD_VISIBLE: control default visibility
> - env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
> ---
> docs/envvars.html | 6 ++
> src/gallium/auxiliary/hud/hud_context.c | 28
> 2 files changed, 34 insertions(+)
>
> diff --git a/docs/envvars.html b/docs/envvars.html
> index bdfe999..530bbb7 100644
> --- a/docs/envvars.html
> +++ b/docs/envvars.html
> @@ -179,6 +179,12 @@ Mesa EGL supports different sets of environment
> variables. See the
> GALLIUM_HUD - draws various information on the screen, like framerate,
> cpu load, driver statistics, performance counters, etc.
> Set GALLIUM_HUD=help and run e.g. glxgears for more info.
> +GALLIUM_HUD_VISIBLE - control default visibility, defaults to true.
> +GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal.
> +Especially useful to toggle hud at specific points of application and
> +disable for unencumbered viewing the rest of the time. For example, set
> +GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10
> (SIGUSR1).
> +Use kill -10 to toggle the hud as desired.
> GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings,
> etc.
> rather than stderr.
> GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment
> diff --git a/src/gallium/auxiliary/hud/hud_context.c
> b/src/gallium/auxiliary/hud/hud_context.c
> index ffe30b8..31e55cd 100644
> --- a/src/gallium/auxiliary/hud/hud_context.c
> +++ b/src/gallium/auxiliary/hud/hud_context.c
> @@ -33,6 +33,7 @@
> * Set GALLIUM_HUD=help for more info.
> */
>
> +#include
> #include
>
> #include "hud/hud_context.h"
> @@ -51,6 +52,8 @@
> #include "tgsi/tgsi_text.h"
> #include "tgsi/tgsi_dump.h"
>
> +/* Control the visibility of all HUD contexts */
> +static boolean huds_visible = TRUE;
>
> struct hud_context {
> struct pipe_context *pipe;
> @@ -95,6 +98,11 @@ struct hud_context {
> } text, bg, whitelines;
> };
>
> +static void
> +signal_visible_handler(int sig, siginfo_t *siginfo, void *context)
> +{
> + huds_visible = !huds_visible;
> +}
>
> static void
> hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
> @@ -441,6 +449,9 @@ hud_draw(struct hud_context *hud, struct pipe_resource
> *tex)
> struct hud_pane *pane;
> struct hud_graph *gr;
>
> + if (!huds_visible)
> + return;
> +
> hud->fb_width = tex->width0;
> hud->fb_height = tex->height0;
> hud->constants.two_div_fb_width = 2.0f / hud->fb_width;
> @@ -1125,6 +1136,10 @@ hud_create(struct pipe_context *pipe, struct
> cso_context *cso)
> struct pipe_sampler_view view_templ;
> unsigned i;
> const char *env = debug_get_option("GALLIUM_HUD", NULL);
> + long signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
unsigned, to avoid complications?
> + boolean sig_handled = FALSE;
> + struct sigaction action = {};
> + huds_visible = debug_get_bool_option("GALLIUM_HUD_VISIBLE", TRUE);
>
> if (!env || !*env)
>return NULL;
> @@ -1267,6 +1282,19 @@ hud_create(struct pipe_context *pipe, struct
> cso_context *cso)
>
> LIST_INITHEAD(&hud->pane_list);
>
> + /* setup sig handler once for all hud contexts */
> + if (!sig_handled) {
> + action.sa_sigaction = &signal_visible_handler;
> + action.sa_flags = SA_SIGINFO;
> +
> + if (signo < 1 || signo >= NSIG)
> + fprintf(stderr, "gallium_hud: invalid signal %ld\n", signo);
So every time I launch a program with the HUD enabled I'm going to see
this error unless I also do the signal thing? Undesirable, IMO.
> + else if (sigaction(signo, &action, NULL) < 0)
> + fprintf(stderr, "gallium_hud: unable to set handler for signal
> %ld\n", signo);
> +
> + sig_handled = TRUE;
> + }
> +
> hud_parse_env_var(hud, env);
> return hud;
> }
> --
> 2.6.2
>
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[Mesa-dev] [PATCH v3] gallium/hud: control visibility at startup and runtime.
- env GALLIUM_HUD_VISIBLE: control default visibility
- env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
---
docs/envvars.html | 6 ++
src/gallium/auxiliary/hud/hud_context.c | 28
2 files changed, 34 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index bdfe999..530bbb7 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -179,6 +179,12 @@ Mesa EGL supports different sets of environment variables.
See the
GALLIUM_HUD - draws various information on the screen, like framerate,
cpu load, driver statistics, performance counters, etc.
Set GALLIUM_HUD=help and run e.g. glxgears for more info.
+GALLIUM_HUD_VISIBLE - control default visibility, defaults to true.
+GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal.
+Especially useful to toggle hud at specific points of application and
+disable for unencumbered viewing the rest of the time. For example, set
+GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10 (SIGUSR1).
+Use kill -10 to toggle the hud as desired.
GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings, etc.
rather than stderr.
GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index ffe30b8..31e55cd 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -33,6 +33,7 @@
* Set GALLIUM_HUD=help for more info.
*/
+#include
#include
#include "hud/hud_context.h"
@@ -51,6 +52,8 @@
#include "tgsi/tgsi_text.h"
#include "tgsi/tgsi_dump.h"
+/* Control the visibility of all HUD contexts */
+static boolean huds_visible = TRUE;
struct hud_context {
struct pipe_context *pipe;
@@ -95,6 +98,11 @@ struct hud_context {
} text, bg, whitelines;
};
+static void
+signal_visible_handler(int sig, siginfo_t *siginfo, void *context)
+{
+ huds_visible = !huds_visible;
+}
static void
hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
@@ -441,6 +449,9 @@ hud_draw(struct hud_context *hud, struct pipe_resource *tex)
struct hud_pane *pane;
struct hud_graph *gr;
+ if (!huds_visible)
+ return;
+
hud->fb_width = tex->width0;
hud->fb_height = tex->height0;
hud->constants.two_div_fb_width = 2.0f / hud->fb_width;
@@ -1125,6 +1136,10 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
struct pipe_sampler_view view_templ;
unsigned i;
const char *env = debug_get_option("GALLIUM_HUD", NULL);
+ long signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
+ boolean sig_handled = FALSE;
+ struct sigaction action = {};
+ huds_visible = debug_get_bool_option("GALLIUM_HUD_VISIBLE", TRUE);
if (!env || !*env)
return NULL;
@@ -1267,6 +1282,19 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
LIST_INITHEAD(&hud->pane_list);
+ /* setup sig handler once for all hud contexts */
+ if (!sig_handled) {
+ action.sa_sigaction = &signal_visible_handler;
+ action.sa_flags = SA_SIGINFO;
+
+ if (signo < 1 || signo >= NSIG)
+ fprintf(stderr, "gallium_hud: invalid signal %ld\n", signo);
+ else if (sigaction(signo, &action, NULL) < 0)
+ fprintf(stderr, "gallium_hud: unable to set handler for signal
%ld\n", signo);
+
+ sig_handled = TRUE;
+ }
+
hud_parse_env_var(hud, env);
return hud;
}
--
2.6.2
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[Mesa-dev] [PATCH] freedreno/a3xx: add fake RGTC support (required for GL3)
Also throw in LATC while we're at it (same exact format). This could be
made more efficient by keeping a shadow compressed texture to use for
returning at map time. However... it's not worth it for now...
presumably compressed textures are not updated often.
Signed-off-by: Ilia Mirkin
---
docs/relnotes/11.1.0.html | 1 +
src/gallium/drivers/freedreno/a3xx/fd3_format.c| 20 +++
src/gallium/drivers/freedreno/a3xx/fd3_format.h| 1 +
src/gallium/drivers/freedreno/a3xx/fd3_texture.c | 2 +-
src/gallium/drivers/freedreno/freedreno_resource.c | 142 ++---
src/gallium/drivers/freedreno/freedreno_texture.c | 4 +
6 files changed, 154 insertions(+), 16 deletions(-)
diff --git a/docs/relnotes/11.1.0.html b/docs/relnotes/11.1.0.html
index dfaa790..3c85231 100644
--- a/docs/relnotes/11.1.0.html
+++ b/docs/relnotes/11.1.0.html
@@ -59,6 +59,7 @@ Note: some of the new features are only available with
certain drivers.
GL_ARB_vertex_type_2_10_10_10_rev on freedreno (a3xx)
GL_EXT_buffer_storage implemented for when ES 3.1 support is gained
GL_EXT_draw_elements_base_vertex on all drivers
+GL_EXT_texture_compression_rgtc / latc on freedreno (a3xx)
GL_OES_draw_elements_base_vertex on all drivers
EGL_KHR_create_context on softpipe, llvmpipe
EGL_KHR_gl_colorspace on softpipe, llvmpipe
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_format.c
b/src/gallium/drivers/freedreno/a3xx/fd3_format.c
index 9b313b5..52ea944 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_format.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_format.c
@@ -275,6 +275,16 @@ static struct fd3_format formats[PIPE_FORMAT_COUNT] = {
_T(DXT3_SRGBA, DXT3, NONE, WZYX),
_T(DXT5_RGBA, DXT5, NONE, WZYX),
_T(DXT5_SRGBA, DXT5, NONE, WZYX),
+
+ /* faked */
+ _T(RGTC1_UNORM, 8_8_8_8_UNORM, NONE, WZYX),
+ _T(RGTC1_SNORM, 8_8_8_8_SNORM, NONE, WZYX),
+ _T(RGTC2_UNORM, 8_8_8_8_UNORM, NONE, WZYX),
+ _T(RGTC2_SNORM, 8_8_8_8_SNORM, NONE, WZYX),
+ _T(LATC1_UNORM, 8_8_8_8_UNORM, NONE, WZYX),
+ _T(LATC1_SNORM, 8_8_8_8_SNORM, NONE, WZYX),
+ _T(LATC2_UNORM, 8_8_8_8_UNORM, NONE, WZYX),
+ _T(LATC2_SNORM, 8_8_8_8_SNORM, NONE, WZYX),
};
enum a3xx_vtx_fmt
@@ -314,6 +324,8 @@ fd3_pipe2fetchsize(enum pipe_format format)
{
if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
format = PIPE_FORMAT_Z32_FLOAT;
+ else if (util_format_description(format)->layout ==
UTIL_FORMAT_LAYOUT_RGTC)
+ format = PIPE_FORMAT_R8G8B8A8_UNORM;
switch (util_format_get_blocksizebits(format) /
util_format_get_blockwidth(format)) {
case 8: return TFETCH_1_BYTE;
case 16: return TFETCH_2_BYTE;
@@ -328,6 +340,14 @@ fd3_pipe2fetchsize(enum pipe_format format)
}
}
+unsigned
+fd3_pipe2nblocksx(enum pipe_format format, unsigned width)
+{
+ if (util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC)
+ format = PIPE_FORMAT_R8G8B8A8_UNORM;
+ return util_format_get_nblocksx(format, width);
+}
+
/* we need to special case a bit the depth/stencil restore, because we are
* using the texture sampler to blit into the depth/stencil buffer, *not*
* into a color buffer. Otherwise fd3_tex_swiz() will do the wrong thing,
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_format.h
b/src/gallium/drivers/freedreno/a3xx/fd3_format.h
index 05c5ea3..48c503e 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_format.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_format.h
@@ -37,6 +37,7 @@ enum a3xx_color_fmt fd3_pipe2color(enum pipe_format format);
enum pipe_format fd3_gmem_restore_format(enum pipe_format format);
enum a3xx_color_fmt fd3_fs_output_format(enum pipe_format format);
enum a3xx_color_swap fd3_pipe2swap(enum pipe_format format);
+unsigned fd3_pipe2nblocksx(enum pipe_format format, unsigned width);
uint32_t fd3_tex_swiz(enum pipe_format format, unsigned swizzle_r,
unsigned swizzle_g, unsigned swizzle_b, unsigned swizzle_a);
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
b/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
index 2d6ecb2..15e63e7 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
@@ -240,7 +240,7 @@ fd3_sampler_view_create(struct pipe_context *pctx, struct
pipe_resource *prsc,
A3XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
/* when emitted, A3XX_TEX_CONST_2_INDX() must be OR'd in: */
so->texconst2 =
-
A3XX_TEX_CONST_2_PITCH(util_format_get_nblocksx(cso->format,
rsc->slices[lvl].pitch) * rsc->cpp);
+ A3XX_TEX_CONST_2_PITCH(fd3_pipe2nblocksx(cso->format,
rsc->slices[lvl].pitch) * rsc->cpp);
switch (prsc->target) {
case PIPE_TEXTURE_1D_ARRAY:
case PIPE_TEXTURE_2D_ARRAY:
diff --git a/src/gallium/drivers/freedreno/freedreno_resour
[Mesa-dev] [PATCH] freedreno/a3xx: add missing formats to enable ARB_vertex_type_2_10_10_10_rev
The previously RE'd formats were from an ES driver implementing
OES_vertex_type_10_10_10_2 and thus backwards. A future change could add
the 2_10_10_10 support.
Signed-off-by: Ilia Mirkin
---
docs/relnotes/11.1.0.html | 1 +
src/gallium/drivers/freedreno/a3xx/a3xx.xml.h | 8
src/gallium/drivers/freedreno/a3xx/fd3_format.c | 4
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/docs/relnotes/11.1.0.html b/docs/relnotes/11.1.0.html
index c35d91f..dfaa790 100644
--- a/docs/relnotes/11.1.0.html
+++ b/docs/relnotes/11.1.0.html
@@ -56,6 +56,7 @@ Note: some of the new features are only available with
certain drivers.
GL_ARB_texture_barrier / GL_NV_texture_barrier on i965
GL_ARB_texture_query_lod on softpipe
GL_ARB_texture_view on radeonsi
+GL_ARB_vertex_type_2_10_10_10_rev on freedreno (a3xx)
GL_EXT_buffer_storage implemented for when ES 3.1 support is gained
GL_EXT_draw_elements_base_vertex on all drivers
GL_OES_draw_elements_base_vertex on all drivers
diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
index b5e1dda..9f382ba 100644
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -111,10 +111,10 @@ enum a3xx_vtx_fmt {
VFMT_8_8_SNORM = 53,
VFMT_8_8_8_SNORM = 54,
VFMT_8_8_8_8_SNORM = 55,
- VFMT_10_10_10_2_UINT = 60,
- VFMT_10_10_10_2_UNORM = 61,
- VFMT_10_10_10_2_SINT = 62,
- VFMT_10_10_10_2_SNORM = 63,
+ VFMT_10_10_10_2_UINT = 56,
+ VFMT_10_10_10_2_UNORM = 57,
+ VFMT_10_10_10_2_SINT = 58,
+ VFMT_10_10_10_2_SNORM = 59,
};
enum a3xx_tex_fmt {
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_format.c
b/src/gallium/drivers/freedreno/a3xx/fd3_format.c
index 857d156..9b313b5 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_format.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_format.c
@@ -188,9 +188,13 @@ static struct fd3_format formats[PIPE_FORMAT_COUNT] = {
VT(B10G10R10A2_UNORM, 10_10_10_2_UNORM, R10G10B10A2_UNORM, WXYZ),
_T(B10G10R10X2_UNORM, 10_10_10_2_UNORM, R10G10B10A2_UNORM, WXYZ),
V_(R10G10B10A2_SNORM, 10_10_10_2_SNORM, NONE, WZYX),
+ V_(B10G10R10A2_SNORM, 10_10_10_2_SNORM, NONE, WXYZ),
V_(R10G10B10A2_UINT,10_10_10_2_UINT, NONE, WZYX),
+ V_(B10G10R10A2_UINT,10_10_10_2_UINT, NONE, WXYZ),
V_(R10G10B10A2_USCALED, 10_10_10_2_UINT, NONE, WZYX),
+ V_(B10G10R10A2_USCALED, 10_10_10_2_UINT, NONE, WXYZ),
V_(R10G10B10A2_SSCALED, 10_10_10_2_SINT, NONE, WZYX),
+ V_(B10G10R10A2_SSCALED, 10_10_10_2_SINT, NONE, WXYZ),
_T(R11G11B10_FLOAT, 11_11_10_FLOAT, R11G11B10_FLOAT, WZYX),
_T(R9G9B9E5_FLOAT, 9_9_9_E5_FLOAT, NONE,WZYX),
--
2.4.10
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Re: [Mesa-dev] [Mesa-stable] New stable-branch 11.0 candidate pushed
Hi Emil, I get this regression testing the new branch: piglit.spec.oes_compressed_paletted_texture.basic api /tmp/build_root/m64/lib/piglit/bin/oes_compressed_paletted_texture-api -auto -fbo Trying glTexImage2D... Trying glCompressedTexImage2D... Unexpected GL error: GL_INVALID_ENUM 0x500 (Error at /home/jenkins/workspace/Leeroy/repos/piglit/tests/spec/oes_compressed_paletted_texture/oes_compressed_paletted_texture-api.c:135) Expected GL error: GL_INVALID_VALUE 0x501 Do you see the same thing? -Mark Emil Velikov writes: > Hello list, > > The candidate for the Mesa 11.0.5 is now available. Currently we have: > - 31 queued > - 13 nominated (outstanding) > - and 6 rejected/obsolete patches > > Currently we have mostly driver related fixes - some in i965 and > nouveau, a few llvm related, the odd bugfix in the VA state-tracker. > Additionally we have a few new PCI ids for i965 and radeonsi. > > Take a look at section "Mesa stable queue" for more information. > > > Jason, Kenneth, > > I had to pick a few extra commits as prerequirements to the "nir: > Properly invalidate metadata in nir_foo" patches. Can you let me know > if any of these should not be in 11.0. Thanks ! > > commit 800217a1654ab7932870b1510981f5e38712d58b > Author: Kenneth Graunke > > nir: Report progress from nir_split_var_copies(). > > (cherry picked from commit dc18b9357b553a972ea439facfbc55e376f1179f) > > > commit 2cc4e973962c1d5ea0357685036879c7bf9575ce > Author: Jason Ekstrand > > nir/lower_vec_to_movs: Pass the shader around directly > > (cherry picked from commit b7eeced3c724bf5de05290551ced8621ce2c7c52) > > > commit ef4e862396ae81b0d59f172d0d5273a4e6b5992d > Author: Jason Ekstrand > > nir: Report progress from lower_vec_to_movs(). > > (cherry picked from commit 9f5e7ae9d83ce6de761936b95cd0b7ba4c1219c4) > > > > > Testing > --- > The following results are against piglit 4b6848c131c. > > > Changes - classic i965(snb) > --- > None. > > > Changes - swrast classic > > None. > > > Changes - gallium softpipe > -- > None. > > > Changes - gallium llvmpipe (LLVM 3.7) > - > None. > > > Testing reports/general approval > > Any testing reports (or general approval of the state of the branch) > will be greatly appreciated. > > > Trivial merge conflicts > --- > commit ef4e862396ae81b0d59f172d0d5273a4e6b5992d > Author: Jason Ekstrand > > nir: Report progress from lower_vec_to_movs(). > > (cherry picked from commit 9f5e7ae9d83ce6de761936b95cd0b7ba4c1219c4) > > > The plan is to have 11.0.5 this Monday (9th of November) or shortly after. > > If you have any questions or comments that you would like to share > before the release, please go ahead. > > > Cheers, > Emil > > > Mesa stable queue > - > > Nominated (13) > == > > Ben Widawsky (1): > i965/skl/gt4: Fix URB programming restriction. > > Boyan Ding (1): > i915: Add XRGB format to intel_screen_make_configs > > Brian Paul (1): > configure: don't try to build gallium DRI drivers if --disable-dri is > set > > Dave Airlie (1): > gallium/swrast: fix front buffer blitting. (v2) > > Emil Velikov (3): > i965: store reference to the context within struct brw_fence > egl/dri2: expose srgb configs when KHR_gl_colorspace is available > mesa; add get-extra-pick-list.sh script into bin/ > > Jean-Sébastien Pédron (1): > ralloc: Use __attribute__((destructor)) instead of atexit(3) > > Tapani Pälli (1): > mesa: fix error type for GetFramebufferAttachmentParameteriv > > Tom Stellard (4): > clover: Call clBuildProgram() notification function when build > completes v2 > gallium/drivers: Add threadsafe wrappers for pipe_context v2 > clover: Use threadsafe wrappers for pipe_context v2 > clover: Properly initialize LLVM targets when linking with component > libs > > > > Queued (31) > === > > Alex Deucher (1): > radeon/uvd: don't expose HEVC on old UVD hw (v3) > > Ben Widawsky (1): > i965/skl: Add GT4 PCI IDs > > Emil Velikov (2): > docs: add sha256 checksums for 11.0.4 > cherry-ignore: ignore a possible wrong nomination > > Emmanuel Gil Peyrot (1): > gbm.h: Add a missing stddef.h include for size_t. > > Eric Anholt (1): > vc4: When the create ioctl fails, free our cache and try again. > > Ian Romanick (1): > i965: Fix is-renderable check in intel_image_target_renderbuffer_storage > > Ilia Mirkin (3): > nvc0: respect edgeflag attribute width > nouveau: set MaxDrawBuffers to the same value as MaxColorAttachments > nouveau: relax fence emit space assert > > Ivan Kalvachev (1): > r600g: Fix special negative immediate constants when using ABS modifier. > > Jason Ekstrand (2): > nir/lower_vec_to_movs: Pass the shader around directly >
Re: [Mesa-dev] [PATCH] gallium/swrast: fix front buffer blitting. (v2)
On 8 November 2015 at 02:47, Emil Velikov wrote: > Hi Dave, > > On 9 October 2015 at 01:38, Dave Airlie wrote: >> From: Dave Airlie >> >> So I've known this was broken before, cogl has a workaround >> for it from what I know, but with the gallium based swrast >> drivers BlitFramebuffer from back to front or vice-versa >> was pretty broken. >> >> The legacy swrast driver tracks when a front buffer is used >> and does the get/put images when it is mapped/unmapped, >> so this patch attempts to add the same functionality to the >> gallium drivers. >> >> It creates a new context interface to denote when a front >> buffer is being created, and passes a private pointer to it, >> this pointer is then used to decide on map/unmap if the >> contents should be updated from the real frontbuffer using >> get/put image. >> >> This is primarily to make gtk's gl code work, the only >> thing I've tested so far is the glarea test from >> https://github.com/ebassi/glarea-example.git >> >> v2: bump extension version, >> check extension version before calling get image. (Ian) >> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91930 >> >> Signed-off-by: Dave Airlie > Seems that you've added the mesa-stable tag just prior to pushing. > > Thus as I picked it up was welcomed by some 200 regressions (and three > front buffer rendering fixes) on softpipe and for llvmpipe > hiz-depth-test-window-stencil1 was consistently going into a deadloop, > and killing it was dragging down the whole piglit run :( > Are you seeing a similar thing or there is something funny with my setup ? > > I've removed the patch from the queue for now, and if we cannot > resolve the regressions I will have to drop it from 11.0. Drop it for now. threads and xlib fun by the looks of it. I'll have to revisit asap. I've disabled it upstream for llvmpipe for now. Dave. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/2] A couple of patches to fix the build
Both are r-b me, go ahead and push them. On Sat, Nov 7, 2015 at 3:03 PM, Jason Ekstrand wrote: > These are pretty trivial fixes. I pushed a patch that I'd pulled of > another branch and forgot I had these in it. > > Jason Ekstrand (2): > nir/types: Add an is_vector_or_scalar helper > nir: Add a nir_deref_tail helper > > src/glsl/nir/nir.h | 9 + > src/glsl/nir/nir_lower_var_copies.c | 15 ++- > src/glsl/nir/nir_split_var_copies.c | 12 ++-- > src/glsl/nir/nir_types.cpp | 6 ++ > src/glsl/nir/nir_types.h| 1 + > 5 files changed, 20 insertions(+), 23 deletions(-) > > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] nir: Add a nir_deref_tail helper
---
src/glsl/nir/nir.h | 9 +
src/glsl/nir/nir_lower_var_copies.c | 15 ++-
src/glsl/nir/nir_split_var_copies.c | 12 ++--
3 files changed, 13 insertions(+), 23 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index ef39df5..2559ef2 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -785,6 +785,15 @@ NIR_DEFINE_CAST(nir_deref_as_var, nir_deref,
nir_deref_var, deref)
NIR_DEFINE_CAST(nir_deref_as_array, nir_deref, nir_deref_array, deref)
NIR_DEFINE_CAST(nir_deref_as_struct, nir_deref, nir_deref_struct, deref)
+/* Returns the last deref in the chain. */
+static inline nir_deref *
+nir_deref_tail(nir_deref *deref)
+{
+ while (deref->child)
+ deref = deref->child;
+ return deref;
+}
+
typedef struct {
nir_instr instr;
diff --git a/src/glsl/nir/nir_lower_var_copies.c
b/src/glsl/nir/nir_lower_var_copies.c
index 2167290..98c107a 100644
--- a/src/glsl/nir/nir_lower_var_copies.c
+++ b/src/glsl/nir/nir_lower_var_copies.c
@@ -53,17 +53,6 @@ deref_next_wildcard_parent(nir_deref *deref)
return NULL;
}
-/* Returns the last deref in the chain.
- */
-static nir_deref *
-get_deref_tail(nir_deref *deref)
-{
- while (deref->child)
- deref = deref->child;
-
- return deref;
-}
-
/* This function recursively walks the given deref chain and replaces the
* given copy instruction with an equivalent sequence load/store
* operations.
@@ -121,8 +110,8 @@ emit_copy_load_store(nir_intrinsic_instr *copy_instr,
} else {
/* In this case, we have no wildcards anymore, so all we have to do
* is just emit the load and store operations. */
- src_tail = get_deref_tail(src_tail);
- dest_tail = get_deref_tail(dest_tail);
+ src_tail = nir_deref_tail(src_tail);
+ dest_tail = nir_deref_tail(dest_tail);
assert(src_tail->type == dest_tail->type);
diff --git a/src/glsl/nir/nir_split_var_copies.c
b/src/glsl/nir/nir_split_var_copies.c
index d463f7b..bfbef72 100644
--- a/src/glsl/nir/nir_split_var_copies.c
+++ b/src/glsl/nir/nir_split_var_copies.c
@@ -67,14 +67,6 @@ struct split_var_copies_state {
bool progress;
};
-static nir_deref *
-get_deref_tail(nir_deref *deref)
-{
- while (deref->child != NULL)
- deref = deref->child;
- return deref;
-}
-
/* Recursively constructs deref chains to split a copy instruction into
* multiple (if needed) copy instructions with full-length deref chains.
* External callers of this function should pass the tail and head of the
@@ -227,8 +219,8 @@ split_var_copies_block(nir_block *block, void *void_state)
nir_deref *dest_head = &intrinsic->variables[0]->deref;
nir_deref *src_head = &intrinsic->variables[1]->deref;
- nir_deref *dest_tail = get_deref_tail(dest_head);
- nir_deref *src_tail = get_deref_tail(src_head);
+ nir_deref *dest_tail = nir_deref_tail(dest_head);
+ nir_deref *src_tail = nir_deref_tail(src_head);
switch (glsl_get_base_type(src_tail->type)) {
case GLSL_TYPE_ARRAY:
--
2.5.0.400.gff86faf
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[Mesa-dev] [PATCH 1/2] nir/types: Add an is_vector_or_scalar helper
---
src/glsl/nir/nir_types.cpp | 6 ++
src/glsl/nir/nir_types.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp
index 965f423..135591a 100644
--- a/src/glsl/nir/nir_types.cpp
+++ b/src/glsl/nir/nir_types.cpp
@@ -144,6 +144,12 @@ glsl_type_is_scalar(const struct glsl_type *type)
}
bool
+glsl_type_is_vector_or_scalar(const struct glsl_type *type)
+{
+ return type->is_vector() || type->is_scalar();
+}
+
+bool
glsl_type_is_matrix(const struct glsl_type *type)
{
return type->is_matrix();
diff --git a/src/glsl/nir/nir_types.h b/src/glsl/nir/nir_types.h
index 60d561b..b0b5184 100644
--- a/src/glsl/nir/nir_types.h
+++ b/src/glsl/nir/nir_types.h
@@ -70,6 +70,7 @@ unsigned glsl_get_record_location_offset(const struct
glsl_type *type,
bool glsl_type_is_void(const struct glsl_type *type);
bool glsl_type_is_vector(const struct glsl_type *type);
bool glsl_type_is_scalar(const struct glsl_type *type);
+bool glsl_type_is_vector_or_scalar(const struct glsl_type *type);
bool glsl_type_is_matrix(const struct glsl_type *type);
const struct glsl_type *glsl_void_type(void);
--
2.5.0.400.gff86faf
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[Mesa-dev] [PATCH 0/2] A couple of patches to fix the build
These are pretty trivial fixes. I pushed a patch that I'd pulled of another branch and forgot I had these in it. Jason Ekstrand (2): nir/types: Add an is_vector_or_scalar helper nir: Add a nir_deref_tail helper src/glsl/nir/nir.h | 9 + src/glsl/nir/nir_lower_var_copies.c | 15 ++- src/glsl/nir/nir_split_var_copies.c | 12 ++-- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h| 1 + 5 files changed, 20 insertions(+), 23 deletions(-) -- 2.5.0.400.gff86faf ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] New stable-branch 11.0 candidate pushed
On Saturday, November 07, 2015 04:37:05 PM Emil Velikov wrote: > Jason, Kenneth, > > I had to pick a few extra commits as prerequirements to the "nir: > Properly invalidate metadata in nir_foo" patches. Can you let me know > if any of these should not be in 11.0. Thanks ! > > commit 800217a1654ab7932870b1510981f5e38712d58b > Author: Kenneth Graunke > > nir: Report progress from nir_split_var_copies(). > > (cherry picked from commit dc18b9357b553a972ea439facfbc55e376f1179f) > > > commit 2cc4e973962c1d5ea0357685036879c7bf9575ce > Author: Jason Ekstrand > > nir/lower_vec_to_movs: Pass the shader around directly > > (cherry picked from commit b7eeced3c724bf5de05290551ced8621ce2c7c52) > > > commit ef4e862396ae81b0d59f172d0d5273a4e6b5992d > Author: Jason Ekstrand > > nir: Report progress from lower_vec_to_movs(). > > (cherry picked from commit 9f5e7ae9d83ce6de761936b95cd0b7ba4c1219c4) Looks reasonable to me - thanks, and sorry for the trouble! --Ken signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] egl/wayland: Ignore rects from SwapBuffersWithDamage
eglSwapBuffersWithDamage accepts damage-region rectangles to hint the
compositor that it only needs to redraw certain areas, which was passed
through the wl_surface_damage request, as designed.
Wayland also offers a buffer transformation interface, e.g. to allow
users to render pre-rotated buffers. Unfortunately, there is no way to
query buffer transforms, and the damage region was provided in surface,
rather than buffer, co-ordinate space.
Users could perhaps account for this themselves, but EGL also requires
co-ordinates to be passed in GL/mathematical co-ordinate space, with an
inversion to Wayland's natural/scanout co-orodinate space, so the
transformation is so convoluted that it's unreasonable to expect anyone
to do it.
Pending creation and acceptance of a wl_surface.buffer_damage request,
which will accept co-ordinates in buffer co-ordinate space, pessimise to
always sending full-surface damage.
bce64c6c provides the explanation for why we send maximum-range damage,
rather than the full size of the surface: in the presence of buffer
transformations, full-surface damage may not actually cover the entire
surface.
Signed-off-by: Daniel Stone
Cc: Jasper St. Pierre
---
src/egl/drivers/dri2/platform_wayland.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_wayland.c
b/src/egl/drivers/dri2/platform_wayland.c
index 0d161f6..9e8e6ce 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -703,18 +703,8 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
dri2_surf->dx = 0;
dri2_surf->dy = 0;
- if (n_rects == 0) {
- wl_surface_damage(dri2_surf->wl_win->surface,
-0, 0, INT32_MAX, INT32_MAX);
- } else {
- for (i = 0; i < n_rects; i++) {
- const int *rect = &rects[i * 4];
- wl_surface_damage(dri2_surf->wl_win->surface,
- rect[0],
- dri2_surf->base.Height - rect[1] - rect[3],
- rect[2], rect[3]);
- }
- }
+wl_surface_damage(dri2_surf->wl_win->surface,
+ 0, 0, INT32_MAX, INT32_MAX);
if (dri2_dpy->is_different_gpu) {
_EGLContext *ctx = _eglGetCurrentContext();
--
2.5.0
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Re: [Mesa-dev] [PATCH] gallium/swrast: fix front buffer blitting. (v2)
Hi Dave, On 9 October 2015 at 01:38, Dave Airlie wrote: > From: Dave Airlie > > So I've known this was broken before, cogl has a workaround > for it from what I know, but with the gallium based swrast > drivers BlitFramebuffer from back to front or vice-versa > was pretty broken. > > The legacy swrast driver tracks when a front buffer is used > and does the get/put images when it is mapped/unmapped, > so this patch attempts to add the same functionality to the > gallium drivers. > > It creates a new context interface to denote when a front > buffer is being created, and passes a private pointer to it, > this pointer is then used to decide on map/unmap if the > contents should be updated from the real frontbuffer using > get/put image. > > This is primarily to make gtk's gl code work, the only > thing I've tested so far is the glarea test from > https://github.com/ebassi/glarea-example.git > > v2: bump extension version, > check extension version before calling get image. (Ian) > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91930 > > Signed-off-by: Dave Airlie Seems that you've added the mesa-stable tag just prior to pushing. Thus as I picked it up was welcomed by some 200 regressions (and three front buffer rendering fixes) on softpipe and for llvmpipe hiz-depth-test-window-stencil1 was consistently going into a deadloop, and killing it was dragging down the whole piglit run :( Are you seeing a similar thing or there is something funny with my setup ? I've removed the patch from the queue for now, and if we cannot resolve the regressions I will have to drop it from 11.0. Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/skl/gt4: Fix URB programming restriction.
On Fri, Nov 06, 2015 at 07:29:18PM -0800, Kenneth Graunke wrote:
> On Friday, November 06, 2015 06:12:27 PM Ben Widawsky wrote:
> > The comment in the code details the restriction. Thanks to Ken for having a
> > very
> > helpful conversation with me, and spotting the blurb in the link I sent him
> > :P.
> >
> > There are still stability problems for me on GT4, but this definitely helps
> > with
> > some of the failures.
> >
> > Cc: Kenneth Graunke
> > Cc: Jordan Justen
> > Cc: mesa-sta...@lists.freedesktop.org (if the original gt4 patch goes to
> > stable)
> > ---
> >
> > Sarah, you should check this on KBL.
> > Cc: Sarah Sharp
> > ---
> > src/mesa/drivers/dri/i965/brw_device_info.c | 8
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c
> > b/src/mesa/drivers/dri/i965/brw_device_info.c
> > index 2ebc084..6117fd3 100644
> > --- a/src/mesa/drivers/dri/i965/brw_device_info.c
> > +++ b/src/mesa/drivers/dri/i965/brw_device_info.c
> > @@ -337,6 +337,14 @@ static const struct brw_device_info
> > brw_device_info_skl_gt3 = {
> >
> > static const struct brw_device_info brw_device_info_skl_gt4 = {
> > GEN9_FEATURES, .gt = 4,
> > + /* From the docs:
> > +* URB is limited to 1008KB due to programming restrictions. This is
> > not a
> > +* restriction of the L3 implementation, but of the FF and other
> > clients.
> > +* Therefore, in a GT4 implementation it is possible for the
> > programmed
> > +* allocation of the L3 data array to provide 3*384KB=1152MB [sic]
> > for URB,
> > +* but only 1008KB of this will be used.
> > +*/
>
> We should at least say which page/section this comes from (the section
> name exists in the Broadwell PRM, so it's not particularly secret).
>
> Please put the text in quotes too. My suggested formatting:
>
>/* From the "L3 Allocation and Programming" documentation:
> *
> * "URB is limited to 1008KB due to programming restrictions. This
> * is not a restriction of the L3 implementation, but of the FF and
> * other clients. Therefore, in a GT4 implementation it is
> * possible for the programmed allocation of the L3 data array to
> * provide 3*384KB=1152MB [sic] for URB, but only 1008KB of this
> * will be used."
> */
>
> Regardless,
> Reviewed-by: Kenneth Graunke
>
Thanks! I had no idea it was in the BDW PRMs.
> > + .urb.size = 1008 / 3,
> > };
> >
> > static const struct brw_device_info brw_device_info_bxt = {
> >
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Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs
On Sat, Nov 7, 2015 at 10:59 AM, Jason Ekstrand wrote:
> On Sat, Nov 7, 2015 at 5:21 AM, Rob Clark wrote:
>> On Fri, Nov 6, 2015 at 10:20 PM, Jason Ekstrand wrote:
>>> On Fri, Nov 6, 2015 at 5:10 PM, Rob Clark wrote:
On Fri, Nov 6, 2015 at 6:39 PM, Rob Clark wrote:
> On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand
> wrote:
>> On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> Signed-off-by: Rob Clark
>>> ---
>>> src/glsl/nir/nir_lower_clip.c| 2 ++
>>> src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
>>> 2 files changed, 4 insertions(+)
>>>
>>> diff --git a/src/glsl/nir/nir_lower_clip.c
>>> b/src/glsl/nir/nir_lower_clip.c
>>> index 31ccfb2..4a91527 100644
>>> --- a/src/glsl/nir/nir_lower_clip.c
>>> +++ b/src/glsl/nir/nir_lower_clip.c
>>> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned
>>> drvloc,
>>>
>>> if (output) {
>>>exec_list_push_tail(&shader->outputs, &var->node);
>>> + shader->num_outputs++;
>>> }
>>> else {
>>>exec_list_push_tail(&shader->inputs, &var->node);
>>> + shader->num_inputs++;
>>
>> I'm not sure what I think about this. Usually, num_inputs/outputs is
>> set by nir_lower_io or similar. They don't have to be vec4's. In the
>> i965 driver, FS inputs are in terms of floats. Maybe tgsi_to_nir
>> provides you those guarantees but we haven't for i965.
>
> hmm, what do you recommend then? There isn't really any
> straightforward way to run this *prior* to lower_io... tgsi->nir gives
> me something that is already i/o lowered, and what I'm doing so far w/
> gallium support for glsl->nir is doing lower_io (and a few other
> steps) in gallium so that the result the driver gets is equivalent to
> tgsi->nir..
>>>
>>> Hrm... That does make things a bit sticky. If you'd like, you can go
>>> ahead and push it with
>>>
>>> Akced-by: Jason Ekstrand
>>>
btw Jason, how do you feel about stuffing the type_size fxn ptr in
nir_shader_compiler_options? It shouldn't ever change over the
lifetime of the shader, we could drop it as arg to
nir_assign_var_locations() (err, well, replace w/ nir_shader ptr), and
we could use it to dtrt here..
>>>
>>> That won't work. The type_size function we use depends on shader
>>> stage, gen, and type of thing we're lowering. Stuffing it into
>>> nir_shader_compiler_options won't work.
>>
>> hmm, but the type_size should be invariant over the lifetime of the
>> nir_shader object, shouldn't it? (Well, maybe we need to be able to
>> specify different one's for uniform/input/output?) I guess if you
>> don't already have different compiler_options's for scalar vs simd
>> modes, then they could be passed in to nir_shader_create() instead..
>
> We could restructure things to make nir_compiler_options something we
> create more on-the-fly but, as it currently stands, we create 1 or 2
> of them total for the life of the driver.
>
>> The other option is just to pass type_size into these other lowering
>> passes and use that instead of +=1.. but seems like type_size should
>> be constant for a given nir_shader, so not having to pass them around
>> all over the place seems nice.
>
> Like I said above, go ahead and push it. We can sort out the issues
> once we have multiple drivers using it. Trying to sort it out now is
> kind of theoretical at best.
ok.. I'll have one more pass, potentially inserting a uniform (this
time, ypos-transform), as part of my evolving gallium glsl_to_nir
patchset.. but for now I'll just add some notes in appropriate spots
in the code that the num_{uniforms,inputs,outputs} increment should
use type_size()..
BR,
-R
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[Mesa-dev] New stable-branch 11.0 candidate pushed
Hello list, The candidate for the Mesa 11.0.5 is now available. Currently we have: - 31 queued - 13 nominated (outstanding) - and 6 rejected/obsolete patches Currently we have mostly driver related fixes - some in i965 and nouveau, a few llvm related, the odd bugfix in the VA state-tracker. Additionally we have a few new PCI ids for i965 and radeonsi. Take a look at section "Mesa stable queue" for more information. Jason, Kenneth, I had to pick a few extra commits as prerequirements to the "nir: Properly invalidate metadata in nir_foo" patches. Can you let me know if any of these should not be in 11.0. Thanks ! commit 800217a1654ab7932870b1510981f5e38712d58b Author: Kenneth Graunke nir: Report progress from nir_split_var_copies(). (cherry picked from commit dc18b9357b553a972ea439facfbc55e376f1179f) commit 2cc4e973962c1d5ea0357685036879c7bf9575ce Author: Jason Ekstrand nir/lower_vec_to_movs: Pass the shader around directly (cherry picked from commit b7eeced3c724bf5de05290551ced8621ce2c7c52) commit ef4e862396ae81b0d59f172d0d5273a4e6b5992d Author: Jason Ekstrand nir: Report progress from lower_vec_to_movs(). (cherry picked from commit 9f5e7ae9d83ce6de761936b95cd0b7ba4c1219c4) Testing --- The following results are against piglit 4b6848c131c. Changes - classic i965(snb) --- None. Changes - swrast classic None. Changes - gallium softpipe -- None. Changes - gallium llvmpipe (LLVM 3.7) - None. Testing reports/general approval Any testing reports (or general approval of the state of the branch) will be greatly appreciated. Trivial merge conflicts --- commit ef4e862396ae81b0d59f172d0d5273a4e6b5992d Author: Jason Ekstrand nir: Report progress from lower_vec_to_movs(). (cherry picked from commit 9f5e7ae9d83ce6de761936b95cd0b7ba4c1219c4) The plan is to have 11.0.5 this Monday (9th of November) or shortly after. If you have any questions or comments that you would like to share before the release, please go ahead. Cheers, Emil Mesa stable queue - Nominated (13) == Ben Widawsky (1): i965/skl/gt4: Fix URB programming restriction. Boyan Ding (1): i915: Add XRGB format to intel_screen_make_configs Brian Paul (1): configure: don't try to build gallium DRI drivers if --disable-dri is set Dave Airlie (1): gallium/swrast: fix front buffer blitting. (v2) Emil Velikov (3): i965: store reference to the context within struct brw_fence egl/dri2: expose srgb configs when KHR_gl_colorspace is available mesa; add get-extra-pick-list.sh script into bin/ Jean-Sébastien Pédron (1): ralloc: Use __attribute__((destructor)) instead of atexit(3) Tapani Pälli (1): mesa: fix error type for GetFramebufferAttachmentParameteriv Tom Stellard (4): clover: Call clBuildProgram() notification function when build completes v2 gallium/drivers: Add threadsafe wrappers for pipe_context v2 clover: Use threadsafe wrappers for pipe_context v2 clover: Properly initialize LLVM targets when linking with component libs Queued (31) === Alex Deucher (1): radeon/uvd: don't expose HEVC on old UVD hw (v3) Ben Widawsky (1): i965/skl: Add GT4 PCI IDs Emil Velikov (2): docs: add sha256 checksums for 11.0.4 cherry-ignore: ignore a possible wrong nomination Emmanuel Gil Peyrot (1): gbm.h: Add a missing stddef.h include for size_t. Eric Anholt (1): vc4: When the create ioctl fails, free our cache and try again. Ian Romanick (1): i965: Fix is-renderable check in intel_image_target_renderbuffer_storage Ilia Mirkin (3): nvc0: respect edgeflag attribute width nouveau: set MaxDrawBuffers to the same value as MaxColorAttachments nouveau: relax fence emit space assert Ivan Kalvachev (1): r600g: Fix special negative immediate constants when using ABS modifier. Jason Ekstrand (2): nir/lower_vec_to_movs: Pass the shader around directly nir: Report progress from lower_vec_to_movs(). Jose Fonseca (2): gallivm: Translate all util_cpu_caps bits to LLVM attributes. gallivm: Explicitly disable unsupported CPU features. Julien Isorce (4): st/va: pass picture desc to begin and decode nvc0: fix crash when nv50_miptree_from_handle fails st/va: do not destroy old buffer when new one failed st/va: add more errors checks in vlVaBufferSetNumElements and vlVaMapBuffer Kenneth Graunke (6): i965: Fix missing BRW_NEW_*_PROG_DATA flagging caused by cache reuse. nir: Report progress from nir_split_var_copies(). nir: Properly invalidate metadata in nir_split_var_copies(). nir: Properly invalidate metadata in nir_opt_copy_prop(). nir: Properly invalidate metadata in nir_lower_vec_to
[Mesa-dev] Mesa 11.1.0 release plan
Hi all, It's time to get the idea of where were are wrt the next Mesa release - 11.1.0. As usual here is the normal plan, although everyone interested in more than welcome to chime in November 20th 2015 - Feature freeze/Release candidate 1 November 27th 2015 - Release candidate 2 December 04th 2015 - Release candidate 3 December 11th 2015 - Release candidate 4/Mesa 11.1.0 We have roughly _two_ weeks to get any more new features in. Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug
On 6 November 2015 at 17:50, Brian Paul wrote: > On 11/06/2015 09:40 AM, Emil Velikov wrote: >> >> Hi Brian, >> >> On 31 October 2015 at 13:38, Brian Paul wrote: >>> >>> Very long line loops which spanned 3 or more vertex buffers were not >>> handled correctly and could result in stray lines. >>> >>> The piglit lineloop test draws 1 vertices by default, and is not >>> long enough to trigger this. Even 'lineloop -count 10' doesn't >>> trigger the bug. >>> >>> For future reference, the issue can be reproduced by changing Mesa's >>> VBO_VERT_BUFFER_SIZE to 4096 and changing the piglit lineloop test to >>> use glVertex2f(), draw 3 loops instead of 1, and specifying -count >>> 1023. >> >> I haven't been following on the VBO patches that you've sent recently. >> Do you think that any of them are mesa-stable material ? If so can you >> please forward the sha's the the ML (or just list them here). > > > I'd like to wait a bit to give time to see if any more corner case bugs are > exposed. > Ack fair enough. > When is the 11.1 release expected? > 11.1-branchpoint (rc1) in 2 weeks time. 11.1.0 around 10th December. Thanks Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] egl/dri2: expose srgb configs when KHR_gl_colorspace is available
On 6 November 2015 at 19:26, Marek Olšák wrote: > On Fri, Nov 6, 2015 at 8:24 PM, Marek Olšák wrote: >> On Thu, Oct 15, 2015 at 2:28 PM, Emil Velikov >> wrote: >>> On 3 October 2015 at 12:19, Emil Velikov wrote: On 3 October 2015 at 02:12, Marek Olšák wrote: > I'm not sure if this is correct or if we should just return NULL in > this case like the "case" statement above that does. > Actually I was thinking about bailing out when the requested attribute is set. I.e. diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 1740ee3..0450269 100644 --- a/src/egl/drivers/dri2/egl_dri2.c +++ b/src/egl/drivers/dri2/egl_dri2.c @@ -237,6 +237,8 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id, case __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE: srgb = value != 0; + if (!dpy->Extensions.KHR_gl_colorspace && srgb) +return NULL; break; default: >>> Guys can anyone give this patch a quick test ? Afaict it is very >>> uncommon to get here, but it still does the right thing. >> >> It doesn't cause any piglit regressions. Sadly, I don't have any EGL >> apps. eglgears_x11 in mesa/demos is already broken for me on VI/Tonga. >> It might be a hw-specific issue. > > BTW, I had to fix a compile failure in your patch. > Hmm seems like we dropped the mesa-dev somewhere along the way. In brief: - there is a typo - s/dpy/disp/ - with KHR_gl_colorspace enabled or disabled, things seems to work fine on android land. - locally things seem to work as well. The original conversation can be seen below. -Emil On 18 October 2015 at 22:41, Mauro Rossi wrote: > Hi Emil, > > I've tested the two patches for egl_dri2.c on top of mesa 11.0.3 and > 11.1.0devel and I saw no regression. > > Mauro > > Il venerdì 16 ottobre 2015, Emil Velikov ha > scritto: >> >> On 15 October 2015 at 22:27, Mauro Rossi wrote: >> > Hi Emil, >> > >> > I get the following building error >> > >> > external/mesa/src/egl/drivers/dri2/egl_dri2.c: In function >> > 'dri2_add_config': >> > external/mesa/src/egl/drivers/dri2/egl_dri2.c:238:15: error: 'dpy' >> > undeclared (first use in this function) >> > if (!dpy->Extensions.KHR_gl_colorspace && srgb) >> >^ >> > >> > Shouldn't it be the patched as follows with !disp instead of !dpy? >> > Thanks for your confirmation >> Oops, silly typo :-\ >> >> Yes you are correct. Can you try the patch in conjunction with the one >> in https://bugs.freedesktop.org/show_bug.cgi?id=91596#c8 >> >> Thanks >> Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs
On Sat, Nov 7, 2015 at 5:21 AM, Rob Clark wrote:
> On Fri, Nov 6, 2015 at 10:20 PM, Jason Ekstrand wrote:
>> On Fri, Nov 6, 2015 at 5:10 PM, Rob Clark wrote:
>>> On Fri, Nov 6, 2015 at 6:39 PM, Rob Clark wrote:
On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand
wrote:
> On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark wrote:
>> From: Rob Clark
>>
>> Signed-off-by: Rob Clark
>> ---
>> src/glsl/nir/nir_lower_clip.c| 2 ++
>> src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/src/glsl/nir/nir_lower_clip.c
>> b/src/glsl/nir/nir_lower_clip.c
>> index 31ccfb2..4a91527 100644
>> --- a/src/glsl/nir/nir_lower_clip.c
>> +++ b/src/glsl/nir/nir_lower_clip.c
>> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned
>> drvloc,
>>
>> if (output) {
>>exec_list_push_tail(&shader->outputs, &var->node);
>> + shader->num_outputs++;
>> }
>> else {
>>exec_list_push_tail(&shader->inputs, &var->node);
>> + shader->num_inputs++;
>
> I'm not sure what I think about this. Usually, num_inputs/outputs is
> set by nir_lower_io or similar. They don't have to be vec4's. In the
> i965 driver, FS inputs are in terms of floats. Maybe tgsi_to_nir
> provides you those guarantees but we haven't for i965.
hmm, what do you recommend then? There isn't really any
straightforward way to run this *prior* to lower_io... tgsi->nir gives
me something that is already i/o lowered, and what I'm doing so far w/
gallium support for glsl->nir is doing lower_io (and a few other
steps) in gallium so that the result the driver gets is equivalent to
tgsi->nir..
>>
>> Hrm... That does make things a bit sticky. If you'd like, you can go
>> ahead and push it with
>>
>> Akced-by: Jason Ekstrand
>>
>>> btw Jason, how do you feel about stuffing the type_size fxn ptr in
>>> nir_shader_compiler_options? It shouldn't ever change over the
>>> lifetime of the shader, we could drop it as arg to
>>> nir_assign_var_locations() (err, well, replace w/ nir_shader ptr), and
>>> we could use it to dtrt here..
>>
>> That won't work. The type_size function we use depends on shader
>> stage, gen, and type of thing we're lowering. Stuffing it into
>> nir_shader_compiler_options won't work.
>
> hmm, but the type_size should be invariant over the lifetime of the
> nir_shader object, shouldn't it? (Well, maybe we need to be able to
> specify different one's for uniform/input/output?) I guess if you
> don't already have different compiler_options's for scalar vs simd
> modes, then they could be passed in to nir_shader_create() instead..
We could restructure things to make nir_compiler_options something we
create more on-the-fly but, as it currently stands, we create 1 or 2
of them total for the life of the driver.
> The other option is just to pass type_size into these other lowering
> passes and use that instead of +=1.. but seems like type_size should
> be constant for a given nir_shader, so not having to pass them around
> all over the place seems nice.
Like I said above, go ahead and push it. We can sort out the issues
once we have multiple drivers using it. Trying to sort it out now is
kind of theoretical at best.
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Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs
On Fri, Nov 6, 2015 at 10:20 PM, Jason Ekstrand wrote:
> On Fri, Nov 6, 2015 at 5:10 PM, Rob Clark wrote:
>> On Fri, Nov 6, 2015 at 6:39 PM, Rob Clark wrote:
>>> On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand wrote:
On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/glsl/nir/nir_lower_clip.c| 2 ++
> src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
> index 31ccfb2..4a91527 100644
> --- a/src/glsl/nir/nir_lower_clip.c
> +++ b/src/glsl/nir/nir_lower_clip.c
> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned
> drvloc,
>
> if (output) {
>exec_list_push_tail(&shader->outputs, &var->node);
> + shader->num_outputs++;
> }
> else {
>exec_list_push_tail(&shader->inputs, &var->node);
> + shader->num_inputs++;
I'm not sure what I think about this. Usually, num_inputs/outputs is
set by nir_lower_io or similar. They don't have to be vec4's. In the
i965 driver, FS inputs are in terms of floats. Maybe tgsi_to_nir
provides you those guarantees but we haven't for i965.
>>>
>>> hmm, what do you recommend then? There isn't really any
>>> straightforward way to run this *prior* to lower_io... tgsi->nir gives
>>> me something that is already i/o lowered, and what I'm doing so far w/
>>> gallium support for glsl->nir is doing lower_io (and a few other
>>> steps) in gallium so that the result the driver gets is equivalent to
>>> tgsi->nir..
>
> Hrm... That does make things a bit sticky. If you'd like, you can go
> ahead and push it with
>
> Akced-by: Jason Ekstrand
>
>> btw Jason, how do you feel about stuffing the type_size fxn ptr in
>> nir_shader_compiler_options? It shouldn't ever change over the
>> lifetime of the shader, we could drop it as arg to
>> nir_assign_var_locations() (err, well, replace w/ nir_shader ptr), and
>> we could use it to dtrt here..
>
> That won't work. The type_size function we use depends on shader
> stage, gen, and type of thing we're lowering. Stuffing it into
> nir_shader_compiler_options won't work.
hmm, but the type_size should be invariant over the lifetime of the
nir_shader object, shouldn't it? (Well, maybe we need to be able to
specify different one's for uniform/input/output?) I guess if you
don't already have different compiler_options's for scalar vs simd
modes, then they could be passed in to nir_shader_create() instead..
The other option is just to pass type_size into these other lowering
passes and use that instead of +=1.. but seems like type_size should
be constant for a given nir_shader, so not having to pass them around
all over the place seems nice.
BR,
-R
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