[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100613

--- Comment #37 from Michel Dänzer  ---
(In reply to intermedi...@hotmail.com from comment #35)
> https://bugs.freedesktop.org/show_bug.cgi?id=99859#c19

 The radeonsi driver is known not to work yet on big endian hosts.

Is there anything unclear about this statement?

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Re: [Mesa-dev] [PATCH] i965: Improve conditional rendering in fallback paths.

[Jason Ekstrand]

I'll freely admit that I don't know this code very well and I don't 100%
understand what's going on.  But I think my 60% understanding of the old
code bumped to 80% with your cleanup so that's a good thing. :-)  I left a
couple trivial comments below.

Reviewed-by: Jason Ekstrand 

On Thu, Mar 2, 2017 at 12:06 AM, Kenneth Graunke 
wrote:

> We need to fall back in a couple of cases:
> - Sandybridge (it just doesn't do this in hardware)
> - Occlusion queries on Gen7-7.5 with command parser version < 2
> - Transform feedback overflow queries on Gen7, or on Gen7.5 with
>   command parser version < 7
>
> In these cases, we printed a perf_debug message and fell back to
> _mesa_check_conditional_render(), which stalls until the full
> query result is available.  Additionally, the code to handle this
> was a bit of a mess.
>
> We can do better by using our normal conditional rendering code,
> and setting a new state, BRW_PREDICATE_STATE_STALL_FOR_QUERY, when
> we would have set BRW_PREDICATE_STATE_USE_BIT.  Only if that state
> is set do we perf_debug and potentially stall.  This means we avoid
> stalls when we have a partial query result (i.e. we know it's > 0,
> but don't have the full value).  The perf_debug should trigger less
> often as well.
>
> Still, this is primarily intended as a cleanup.
>
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_conditional_render.c | 84
> +++---
>  src/mesa/drivers/dri/i965/brw_context.c|  3 +-
>  src/mesa/drivers/dri/i965/brw_context.h|  6 +-
>  3 files changed, 48 insertions(+), 45 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_conditional_render.c
> b/src/mesa/drivers/dri/i965/brw_conditional_render.c
> index 046a42b5f52..c9503c5343d 100644
> --- a/src/mesa/drivers/dri/i965/brw_conditional_render.c
> +++ b/src/mesa/drivers/dri/i965/brw_conditional_render.c
> @@ -52,6 +52,19 @@ set_predicate_for_overflow_query(struct brw_context
> *brw,
>   struct brw_query_object *query,
>   int stream_start, int count)
>  {
> +   if (!can_do_mi_math_and_lrr(brw->screen)) {
> +  brw->predicate.state = BRW_PREDICATE_STATE_STALL_FOR_QUERY;
> +  return;
> +   }
> +
> +   brw->predicate.state = BRW_PREDICATE_STATE_USE_BIT;
> +
> +   /* Needed to ensure the memory is coherent for the MI_LOAD_REGISTER_MEM
> +* command when loading the values into the predicate source registers
> for
> +* conditional rendering.
> +*/
> +   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
>

I think Chris is right about this PIPE_CONTROL but that can be it's own
patch.


> +
> hsw_overflow_result_to_gpr0(brw, query, count);
> brw_load_register_reg64(brw, HSW_CS_GPR(0), MI_PREDICATE_SRC0);
> brw_load_register_imm64(brw, MI_PREDICATE_SRC1, 0ull);
> @@ -61,6 +74,19 @@ static void
>  set_predicate_for_occlusion_query(struct brw_context *brw,
>struct brw_query_object *query)
>  {
> +   if (!brw->predicate.supported) {
> +  brw->predicate.state = BRW_PREDICATE_STATE_STALL_FOR_QUERY;
> +  return;
> +   }
> +
> +   brw->predicate.state = BRW_PREDICATE_STATE_USE_BIT;
> +
> +   /* Needed to ensure the memory is coherent for the MI_LOAD_REGISTER_MEM
> +* command when loading the values into the predicate source registers
> for
> +* conditional rendering.
> +*/
> +   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
> +
> brw_load_register_mem64(brw,
> MI_PREDICATE_SRC0,
> query->bo,
> @@ -80,17 +106,10 @@ set_predicate_for_result(struct brw_context *brw,
>   struct brw_query_object *query,
>   bool inverted)
>  {
> -
> int load_op;
>
> assert(query->bo != NULL);
>
> -   /* Needed to ensure the memory is coherent for the MI_LOAD_REGISTER_MEM
> -* command when loading the values into the predicate source registers
> for
> -* conditional rendering.
> -*/
> -   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
> -
> switch (query->Base.Target) {
> case GL_TRANSFORM_FEEDBACK_STREAM_OVERFLOW_ARB:
>set_predicate_for_overflow_query(brw, query, 0, 1);
> @@ -102,19 +121,19 @@ set_predicate_for_result(struct brw_context *brw,
>set_predicate_for_occlusion_query(brw, query);
> }
>
> -   if (inverted)
> -  load_op = MI_PREDICATE_LOADOP_LOAD;
> -   else
> -  load_op = MI_PREDICATE_LOADOP_LOADINV;
> -
> -   BEGIN_BATCH(1);
> -   OUT_BATCH(GEN7_MI_PREDICATE |
> - load_op |
> - MI_PREDICATE_COMBINEOP_SET |
> - MI_PREDICATE_COMPAREOP_SRCS_EQUAL);
> -   ADVANCE_BATCH();
> -
> -   brw->predicate.state = BRW_PREDICATE_STATE_USE_BIT;
> +   if (brw->predicate.state == BRW_PREDICATE_STATE_USE_BIT) {
> +  if (inverted)
> +   

Re: [Mesa-dev] [PATCH V2 1/2] i965: Add and initialize l3_banks field for gen7+

[Francisco Jerez]

Anuj Phogat  writes:

> This new field helps simplify l3 way size computations
> in next patch.
>
> V2: Initialize the l3_banks to 0 in macros.
>

You don't really need to explicitly initialize things to zero in the
macros, zero is the default struct members are initialized to in C when
an explicit initialization is missing from an aggregate initializer.
With the redundant initializers dropped patch is:

Reviewed-by: Francisco Jerez 

> Suggested-by: Francisco Jerez 
> Signed-off-by: Anuj Phogat 
> Cc: Francisco Jerez 
> ---
>  src/intel/common/gen_device_info.c | 33 ++---
>  src/intel/common/gen_device_info.h |  1 +
>  2 files changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/src/intel/common/gen_device_info.c 
> b/src/intel/common/gen_device_info.c
> index 209b293..250ea17 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -125,6 +125,7 @@ static const struct gen_device_info 
> gen_device_info_snb_gt2 = {
> .has_hiz_and_separate_stencil = true,\
> .must_use_separate_stencil = true,   \
> .has_llc = true, \
> +   .l3_banks = 0,   \
> .has_pln = true, \
> .has_surface_tile_offset = true, \
> .timebase_scale = 80
> @@ -132,6 +133,7 @@ static const struct gen_device_info 
> gen_device_info_snb_gt2 = {
>  static const struct gen_device_info gen_device_info_ivb_gt1 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> .max_tes_threads = 36,
> @@ -156,6 +158,7 @@ static const struct gen_device_info 
> gen_device_info_ivb_gt1 = {
>  static const struct gen_device_info gen_device_info_ivb_gt2 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_vs_threads = 128,
> .max_tcs_threads = 128,
> .max_tes_threads = 128,
> @@ -180,6 +183,7 @@ static const struct gen_device_info 
> gen_device_info_ivb_gt2 = {
>  static const struct gen_device_info gen_device_info_byt = {
> GEN7_FEATURES, .is_baytrail = true, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 1,
> .has_llc = false,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> @@ -211,6 +215,7 @@ static const struct gen_device_info gen_device_info_byt = 
> {
>  static const struct gen_device_info gen_device_info_hsw_gt1 = {
> HSW_FEATURES, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_vs_threads = 70,
> .max_tcs_threads = 70,
> .max_tes_threads = 70,
> @@ -235,6 +240,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt1 = {
>  static const struct gen_device_info gen_device_info_hsw_gt2 = {
> HSW_FEATURES, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -259,6 +265,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt2 = {
>  static const struct gen_device_info gen_device_info_hsw_gt3 = {
> HSW_FEATURES, .gt = 3,
> .num_slices = 2,
> +   .l3_banks = 8,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -286,6 +293,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt3 = {
> .has_resource_streamer = true,   \
> .must_use_separate_stencil = true,   \
> .has_llc = true, \
> +   .l3_banks = 0,   \
> .has_pln = true, \
> .supports_simd16_3src = true,\
> .has_surface_tile_offset = true, \
> @@ -299,6 +307,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt3 = {
>  static const struct gen_device_info gen_device_info_bdw_gt1 = {
> GEN8_FEATURES, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_cs_threads = 42,
> .urb = {
>.size = 192,
> @@ -318,6 +327,7 @@ static const struct gen_device_info 
> gen_device_info_bdw_gt1 = {
>  static const struct gen_device_info gen_device_info_bdw_gt2 = {
> GEN8_FEATURES, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_cs_threads = 56,
> .urb = {
>.size = 384,
> @@ -337,6 +347,7 @@ static const struct gen_device_info 
> gen_device_info_bdw_gt2 = {
>  static const struct gen_device_info gen_device_info_bdw_gt3 = {
> GEN8_FEATURES, .gt = 3,
> .num_slices = 2,
> +   .l3_banks = 8,
> .max_cs_threads = 56,
> .urb = {
>.size = 384,
> @@ -357,6 +368,7 @@ static const struct gen_device_info gen_device_info_chv = 
> {
> GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
> .has_llc = false,
> .num_slices = 1,

Re: [Mesa-dev] [PATCH V2 2/2] i965: Simplify l3 way size computations

[Francisco Jerez]

Anuj Phogat  writes:

> By making use of l3_banks field in gen_device_info struct
> l3_way_size for gen7+ = 2 * l3_banks.
>
> V2: Keep the get_l3_way_size() function.
>
> Suggested-by: Francisco Jerez 
> Signed-off-by: Anuj Phogat 
> Cc: Francisco Jerez 

Thanks, patch is:

Reviewed-by: Francisco Jerez 

> ---
>  src/intel/common/gen_l3_config.c | 12 ++--
>  1 file changed, 2 insertions(+), 10 deletions(-)
>
> diff --git a/src/intel/common/gen_l3_config.c 
> b/src/intel/common/gen_l3_config.c
> index 0783217..e0825e9 100644
> --- a/src/intel/common/gen_l3_config.c
> +++ b/src/intel/common/gen_l3_config.c
> @@ -254,16 +254,8 @@ gen_get_l3_config(const struct gen_device_info *devinfo,
>  static unsigned
>  get_l3_way_size(const struct gen_device_info *devinfo)
>  {
> -   if (devinfo->is_baytrail)
> -  return 2;
> -
> -   else if (devinfo->gt == 1 ||
> -devinfo->is_cherryview ||
> -devinfo->is_broxton)
> -  return 4;
> -
> -   else
> -  return 8 * devinfo->num_slices;
> +   assert(devinfo->l3_banks);
> +   return 2 * devinfo->l3_banks;
>  }
>  
>  /**
> -- 
> 2.9.3


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[Mesa-dev] [PATCH V2 2/2] i965: Simplify l3 way size computations

[Anuj Phogat]

By making use of l3_banks field in gen_device_info struct
l3_way_size for gen7+ = 2 * l3_banks.

V2: Keep the get_l3_way_size() function.

Suggested-by: Francisco Jerez 
Signed-off-by: Anuj Phogat 
Cc: Francisco Jerez 
---
 src/intel/common/gen_l3_config.c | 12 ++--
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index 0783217..e0825e9 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -254,16 +254,8 @@ gen_get_l3_config(const struct gen_device_info *devinfo,
 static unsigned
 get_l3_way_size(const struct gen_device_info *devinfo)
 {
-   if (devinfo->is_baytrail)
-  return 2;
-
-   else if (devinfo->gt == 1 ||
-devinfo->is_cherryview ||
-devinfo->is_broxton)
-  return 4;
-
-   else
-  return 8 * devinfo->num_slices;
+   assert(devinfo->l3_banks);
+   return 2 * devinfo->l3_banks;
 }
 
 /**
-- 
2.9.3

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[Mesa-dev] [PATCH V2 1/2] i965: Add and initialize l3_banks field for gen7+

[Anuj Phogat]

This new field helps simplify l3 way size computations
in next patch.

V2: Initialize the l3_banks to 0 in macros.

Suggested-by: Francisco Jerez 
Signed-off-by: Anuj Phogat 
Cc: Francisco Jerez 
---
 src/intel/common/gen_device_info.c | 33 ++---
 src/intel/common/gen_device_info.h |  1 +
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/src/intel/common/gen_device_info.c 
b/src/intel/common/gen_device_info.c
index 209b293..250ea17 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -125,6 +125,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 
= {
.has_hiz_and_separate_stencil = true,\
.must_use_separate_stencil = true,   \
.has_llc = true, \
+   .l3_banks = 0,   \
.has_pln = true, \
.has_surface_tile_offset = true, \
.timebase_scale = 80
@@ -132,6 +133,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 
= {
 static const struct gen_device_info gen_device_info_ivb_gt1 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 36,
.max_tcs_threads = 36,
.max_tes_threads = 36,
@@ -156,6 +158,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 
= {
 static const struct gen_device_info gen_device_info_ivb_gt2 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_vs_threads = 128,
.max_tcs_threads = 128,
.max_tes_threads = 128,
@@ -180,6 +183,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 
= {
 static const struct gen_device_info gen_device_info_byt = {
GEN7_FEATURES, .is_baytrail = true, .gt = 1,
.num_slices = 1,
+   .l3_banks = 1,
.has_llc = false,
.max_vs_threads = 36,
.max_tcs_threads = 36,
@@ -211,6 +215,7 @@ static const struct gen_device_info gen_device_info_byt = {
 static const struct gen_device_info gen_device_info_hsw_gt1 = {
HSW_FEATURES, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 70,
.max_tcs_threads = 70,
.max_tes_threads = 70,
@@ -235,6 +240,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 
= {
 static const struct gen_device_info gen_device_info_hsw_gt2 = {
HSW_FEATURES, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_vs_threads = 280,
.max_tcs_threads = 256,
.max_tes_threads = 280,
@@ -259,6 +265,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 
= {
 static const struct gen_device_info gen_device_info_hsw_gt3 = {
HSW_FEATURES, .gt = 3,
.num_slices = 2,
+   .l3_banks = 8,
.max_vs_threads = 280,
.max_tcs_threads = 256,
.max_tes_threads = 280,
@@ -286,6 +293,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 
= {
.has_resource_streamer = true,   \
.must_use_separate_stencil = true,   \
.has_llc = true, \
+   .l3_banks = 0,   \
.has_pln = true, \
.supports_simd16_3src = true,\
.has_surface_tile_offset = true, \
@@ -299,6 +307,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 
= {
 static const struct gen_device_info gen_device_info_bdw_gt1 = {
GEN8_FEATURES, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_cs_threads = 42,
.urb = {
   .size = 192,
@@ -318,6 +327,7 @@ static const struct gen_device_info gen_device_info_bdw_gt1 
= {
 static const struct gen_device_info gen_device_info_bdw_gt2 = {
GEN8_FEATURES, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_cs_threads = 56,
.urb = {
   .size = 384,
@@ -337,6 +347,7 @@ static const struct gen_device_info gen_device_info_bdw_gt2 
= {
 static const struct gen_device_info gen_device_info_bdw_gt3 = {
GEN8_FEATURES, .gt = 3,
.num_slices = 2,
+   .l3_banks = 8,
.max_cs_threads = 56,
.urb = {
   .size = 384,
@@ -357,6 +368,7 @@ static const struct gen_device_info gen_device_info_chv = {
GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
.has_llc = false,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 80,
.max_tcs_threads = 80,
.max_tes_threads = 80,
@@ -384,6 +396,7 @@ static const struct gen_device_info gen_device_info_chv = {
.has_resource_streamer = true,   \
.must_use_separate_stencil = true,   \
.has_llc = true, \
+   .l3_banks = 0,   \
.has_pln = true, \
.supports_simd16_3src = true,\
.has_surface_tile_offset = true, \
@@ -413,6 +426,7 @@ static const struct 

Re: [Mesa-dev] Mesa 17.1.2 release candidate

[Jason Ekstrand]

On Thu, Jun 1, 2017 at 4:20 PM, Juan A. Suarez Romero 
wrote:

> Hello list,
>
> The candidate for the Mesa 17.1.2 is now available. Currently we have:
>  - 51 queued
>  - 3 nominated (outstanding)
>  - and 9 rejected patch(es)
>
>
> The current queue contains fixes in several places.
>
> The current queue consists of:
>
> Several fixes in the autotools' configure that improves handling of target
> platforms.
>
> Mesa receives a fix for a leaking in a surface.
>
> OMX has a couple of fixes when building in a X11-less setup.
>
> ANV driver receives several fixes, like adding some missing transitions
> between layouts, or improvements in setting memory types and heaps.
>
> There are a few fixes in i965, R100, R200, Radeonsi/GFX9, Radv and
> Freedreno drivers.
>
> Also, EGL/Android receives a fix for a segfault that replaces a previous
> one that was not correct.
>
> Vulkan's Wayland gets some fixes, including the use of proxy wrappers for
> swapchains, or per-display event queue usage.
>
> Likewise EGL's Wayland now use per-surface event queues, as well as other
> fixes like ensuring back buffer is obtained.
>
> Take a look at section "Mesa stable queue" for more information.
>
>
> Testing reports/general approval
> 
>
> Any testing reports (or general approval of the state of the branch)
> will be greatly appreciated.
>
> The plan is to have 17.1.2 this Friday (3rd of June), around or
> shortly after 23:00 GMT.
>
> If you have any questions or suggestions - be that about the current
> patch queue or otherwise, please go ahead.
>
>
> Trivial merge conflicts
> ---
>
> commit e064f7d826812598749ce27868d9ff865c137ef4
> Author: Jason Ekstrand 
>
> anv: Set up memory types and heaps during physical device init
>
> (cherry picked from commit c1f4343807d1040bd7b5440aa2f5fccf5f12842d)
>
> commit ce2b96dd8b5a6c4ea0c80c6c0f46652a0b591515
> Author: Bas Nieuwenhuizen 
>
> radv: Reserve space for descriptor and push constant user SGPR setting.
>
> (cherry picked from commit 18efb404cfb38f722a16df7539390cf9a4a71929)
>
>
> Cheers,
> J.A.
>
>
> Mesa stable queue
> -
>
> Nominated (3)
> =
> Chad Versace(1):
>   i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()
>
> Jason Ekstrand(1):
>   i965: Rework Sandy Bridge HiZ and stencil layouts
>

This just landed in master.


> Nicolas Dechesne(1):
>   util/rand_xor: add missing include statements
>
>
> Queued (51)
> ===
> Bartosz Tomczyk (1):
>   mesa: Avoid leaking surface in st_renderbuffer_delete
>
> Bas Nieuwenhuizen (1):
>   radv: Reserve space for descriptor and push constant user SGPR
> setting.
>
> Daniel Stone (7):
>   vulkan: Fix Wayland uninitialised registry
>   vulkan/wsi/wayland: Remove roundtrip when creating image
>   vulkan/wsi/wayland: Use per-display event queue
>   vulkan/wsi/wayland: Use proxy wrappers for swapchain
> Squashed with
>   vulkan/wsi/wayland: Fix proxy wrappers for swapchain recreation
>   egl/wayland: Don't open-code roundtrip
>   egl/wayland: Use per-surface event queues
> Squashed with
>   egl/wayland: verify event queue was allocated
>   egl/wayland: Ensure we get a back buffer
>
> Emil Velikov (24):
>   docs: add sha256 checksums for 17.1.1
>   configure: move platform handling further up
>   configure: rename remaining HAVE_EGL_PLATFORM_* guards
>   configure: update remaining --with-egl-platforms references
>   configure: loosen --with-platforms heuristics
>   configure: enable the surfaceless platform by default
>   configure: set HAVE_foo_PLATFORM as applicable
>   configure: error out when building GLX w/o the X11 platform
>   configure: check once for DRI3 dependencies
> Squashed with
>   configure.ac: add xcb-fixes to the XCB DRI3 list
> Squashed with
>   configure.ac: s/xcb-fixes/xcb-xfixes/
>   loader: build libloader_dri3_helper.la only with HAVE_PLATFORM_X11
>   configure: error out when building X11 Vulkan without DRI3
>   auxiliary/vl: use vl_*_screen_create stubs when building w/o platform
>   st/va: fix misplaced closing bracket
>   st/omx: remove unneeded X11 include
>   st/omx: fix building against X11-less setups
>   gallium/targets: link against XCB only as needed
>   configure: error out if building VA w/o supported platform
>   configure: error out if building OMX w/o supported platform
>   configure: error out if building VDPAU w/o supported platform
>   configure: error out if building XVMC w/o supported platform
>   travis: remove workarounds for the Vulkan target
>   anv: automake: list shared libraries after the static ones
>   radv: automake: list shared libraries after the static ones
>   egl/wayland: select the format based on the interface used
>
> Ian Romanick (3):
> 

Re: [Mesa-dev] [PATCH 09/21] mesa: add validate_stencil_buffer() helper

[Timothy Arceri]

On 01/06/17 23:04, Samuel Pitoiset wrote:

Signed-off-by: Samuel Pitoiset 
---
  src/mesa/main/blit.c | 111 +++
  1 file changed, 58 insertions(+), 53 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 2c0300eab3..207ce7d501 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -178,6 +178,62 @@ is_valid_blit_filter(const struct gl_context *ctx, GLenum 
filter)
  
  
  static void

+validate_stencil_buffer(struct gl_context *ctx, struct gl_framebuffer *readFb,
+struct gl_framebuffer *drawFb, GLbitfield *mask,
+bool no_error, const char *func)


I'd really really like to avoid passing no_error everywhere. Not only 
does it result in less organized code, it potentially adds unnecessary 
branches in both the no_error and regular code paths.


I think I'd rather if this and the following patches were structured 
something like:


blit_framebuffer(...)
{
   ...

   if (readRb == NULL || drawRb == NULL) {
  *mask &= ~GL_STENCIL_BUFFER_BIT;
   } else if (!no_error) {
  if (!validate_stencil_buffer(...))
 return;
   }

   ...
}

This makes more sense to me also as the first check isn't technically a 
validation but rather a case we ignore.


With that there should be minimal code in the no_error code path and no 
reason for not marking blit_framebuffer() as ALWAYS_INLINE.


To avoid all the error code being inline twice into the 
blit_framebuffer() callers you could simply wrap it in a static function 
e.g.



void static
blit_framebuffer_err(...) {
   /* We are wrapping the err variant of the always inlined
* blit_framebuffer() to avoid inlining it in every caller.
*/
   blit_framebuffer(...);
}

We could create same type of wrapper for the no_error path also but it's 
going to make less of a difference.


It might be interesting to compare the output from gcc before and after 
to see if gcc is smart enough to do this all for us but being explicit 
about it removes any doubt. I suspect gcc won't inline this code on it's 
own.



+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_STENCIL_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_z_bits, draw_z_bits;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination stencil buffer cannot be the "
+ "same)", func);
+ return;
+  }
+
+  if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
+  _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
+ /* There is no need to check the stencil datatype here, because
+  * there is only one: GL_UNSIGNED_INT.
+  */
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment format mismatch)", func);
+ return;
+  }
+
+  read_z_bits = _mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS);
+  draw_z_bits = _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS);
+
+  /* If both buffers also have depth data, the depth formats must match
+   * as well.  If one doesn't have depth, it's not blitted, so we should
+   * ignore the depth format check.
+   */
+  if (read_z_bits > 0 && draw_z_bits > 0 &&
+  (read_z_bits != draw_z_bits ||
+   _mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment depth format mismatch)", func);
+ return;
+  }
+   }
+}
+
+static void
  blit_framebuffer(struct gl_context *ctx,
   struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
   GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
@@ -317,59 +373,8 @@ blit_framebuffer(struct gl_context *ctx,
}
 }
  
-   if (mask & GL_STENCIL_BUFFER_BIT) {

-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_STENCIL_BUFFER_BIT;
-  }
-  

[Mesa-dev] Mesa 17.1.2 release candidate

[Juan A. Suarez Romero]

Hello list,

The candidate for the Mesa 17.1.2 is now available. Currently we have:
 - 51 queued
 - 3 nominated (outstanding)
 - and 9 rejected patch(es)


The current queue contains fixes in several places.

The current queue consists of:

Several fixes in the autotools' configure that improves handling of target 
platforms.

Mesa receives a fix for a leaking in a surface.

OMX has a couple of fixes when building in a X11-less setup.

ANV driver receives several fixes, like adding some missing transitions between 
layouts, or improvements in setting memory types and heaps.

There are a few fixes in i965, R100, R200, Radeonsi/GFX9, Radv and Freedreno 
drivers.

Also, EGL/Android receives a fix for a segfault that replaces a previous one 
that was not correct.

Vulkan's Wayland gets some fixes, including the use of proxy wrappers for 
swapchains, or per-display event queue usage.

Likewise EGL's Wayland now use per-surface event queues, as well as other fixes 
like ensuring back buffer is obtained.

Take a look at section "Mesa stable queue" for more information.


Testing reports/general approval


Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

The plan is to have 17.1.2 this Friday (3rd of June), around or
shortly after 23:00 GMT.

If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.


Trivial merge conflicts
---

commit e064f7d826812598749ce27868d9ff865c137ef4
Author: Jason Ekstrand 

anv: Set up memory types and heaps during physical device init

(cherry picked from commit c1f4343807d1040bd7b5440aa2f5fccf5f12842d)

commit ce2b96dd8b5a6c4ea0c80c6c0f46652a0b591515
Author: Bas Nieuwenhuizen 

radv: Reserve space for descriptor and push constant user SGPR setting.

(cherry picked from commit 18efb404cfb38f722a16df7539390cf9a4a71929)


Cheers,
J.A.


Mesa stable queue
-

Nominated (3)
=
Chad Versace(1):
  i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()

Jason Ekstrand(1):
  i965: Rework Sandy Bridge HiZ and stencil layouts

Nicolas Dechesne(1):
  util/rand_xor: add missing include statements


Queued (51)
===
Bartosz Tomczyk (1):
  mesa: Avoid leaking surface in st_renderbuffer_delete

Bas Nieuwenhuizen (1):
  radv: Reserve space for descriptor and push constant user SGPR setting.

Daniel Stone (7):
  vulkan: Fix Wayland uninitialised registry
  vulkan/wsi/wayland: Remove roundtrip when creating image
  vulkan/wsi/wayland: Use per-display event queue
  vulkan/wsi/wayland: Use proxy wrappers for swapchain
Squashed with
  vulkan/wsi/wayland: Fix proxy wrappers for swapchain recreation
  egl/wayland: Don't open-code roundtrip
  egl/wayland: Use per-surface event queues
Squashed with
  egl/wayland: verify event queue was allocated
  egl/wayland: Ensure we get a back buffer

Emil Velikov (24):
  docs: add sha256 checksums for 17.1.1
  configure: move platform handling further up
  configure: rename remaining HAVE_EGL_PLATFORM_* guards
  configure: update remaining --with-egl-platforms references
  configure: loosen --with-platforms heuristics
  configure: enable the surfaceless platform by default
  configure: set HAVE_foo_PLATFORM as applicable
  configure: error out when building GLX w/o the X11 platform
  configure: check once for DRI3 dependencies
Squashed with
  configure.ac: add xcb-fixes to the XCB DRI3 list
Squashed with
  configure.ac: s/xcb-fixes/xcb-xfixes/
  loader: build libloader_dri3_helper.la only with HAVE_PLATFORM_X11
  configure: error out when building X11 Vulkan without DRI3
  auxiliary/vl: use vl_*_screen_create stubs when building w/o platform
  st/va: fix misplaced closing bracket
  st/omx: remove unneeded X11 include
  st/omx: fix building against X11-less setups
  gallium/targets: link against XCB only as needed
  configure: error out if building VA w/o supported platform
  configure: error out if building OMX w/o supported platform
  configure: error out if building VDPAU w/o supported platform
  configure: error out if building XVMC w/o supported platform
  travis: remove workarounds for the Vulkan target
  anv: automake: list shared libraries after the static ones
  radv: automake: list shared libraries after the static ones
  egl/wayland: select the format based on the interface used

Ian Romanick (3):
  r100: Don't assume that the base mipmap of a texture exists
  r100,r200: Don't assume glVisual is non-NULL during context creation
  r100: Use _mesa_get_format_base_format in radeon_update_wrapper

Jason Ekstrand (8):
  anv: Handle color layout transitions from the UNINITIALIZED layout
  anv: Handle transitioning depth from 

Re: [Mesa-dev] [PATCH 2/2] i965: Simplify l3 way size computations

[Anuj Phogat]

On Thu, Jun 1, 2017 at 3:36 PM, Francisco Jerez  wrote:
> Anuj Phogat  writes:
>
>> By making use of l3_banks field in gen_device_info struct
>> l3_way_size for gen7+ = 2 * l3_banks.
>>
>> Suggested-by: Francisco Jerez 
>> Signed-off-by: Anuj Phogat 
>> Cc: Francisco Jerez 
>> ---
>>  src/intel/common/gen_l3_config.c | 21 ++---
>>  1 file changed, 2 insertions(+), 19 deletions(-)
>>
>> diff --git a/src/intel/common/gen_l3_config.c 
>> b/src/intel/common/gen_l3_config.c
>> index 0783217..f0da0f4 100644
>> --- a/src/intel/common/gen_l3_config.c
>> +++ b/src/intel/common/gen_l3_config.c
>> @@ -249,24 +249,6 @@ gen_get_l3_config(const struct gen_device_info *devinfo,
>>  }
>>
>>  /**
>> - * Return the size of an L3 way in KB.
>> - */
>> -static unsigned
>> -get_l3_way_size(const struct gen_device_info *devinfo)
>> -{
>
> ISTR there were some scattered references to this function from
> comments.  Because it's nice to be able to point people at this function
> when somebody asks the question what units the xxx_l3_configs tables are
> in, I wouldn't mind you leaving the function around even if you cut it
> down to a single line of code (the return statement).  Other than
> that, looks good to me.
>
ok
>> -   if (devinfo->is_baytrail)
>> -  return 2;
>> -
>> -   else if (devinfo->gt == 1 ||
>> -devinfo->is_cherryview ||
>> -devinfo->is_broxton)
>> -  return 4;
>> -
>> -   else
>> -  return 8 * devinfo->num_slices;
>> -}
>> -
>> -/**
>>   * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
>>   * gen_device_info::urb::size.
>>   */
>> @@ -288,8 +270,9 @@ gen_get_l3_config_urb_size(const struct gen_device_info 
>> *devinfo,
>>  * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
>>  * only 1008KB of this will be used."
>>  */
>> +   const unsigned l3_way_size = 2 * devinfo->l3_banks; /* KB */
>> const unsigned max = (devinfo->gen == 9 ? 1008 : ~0);
>> -   return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) /
>> +   return MIN2(max, cfg->n[GEN_L3P_URB] * l3_way_size) /
>>get_urb_size_scale(devinfo);
>>  }
>>
>> --
>> 2.9.3
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Re: [Mesa-dev] [PATCH 1/2] i965: Add and initialize l3_banks field for gen7+

[Anuj Phogat]

On Thu, Jun 1, 2017 at 3:22 PM, Francisco Jerez  wrote:
> Anuj Phogat  writes:
>
>> This new field helps simplify l3 way size computations
>> in next patch.
>>
>> Suggested-by: Francisco Jerez 
>> Signed-off-by: Anuj Phogat 
>> Cc: Francisco Jerez 
>> ---
>>  src/intel/common/gen_device_info.c | 23 ++-
>>  src/intel/common/gen_device_info.h |  1 +
>>  2 files changed, 23 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/intel/common/gen_device_info.c 
>> b/src/intel/common/gen_device_info.c
>> index 209b293..7c1f9b4 100644
>> --- a/src/intel/common/gen_device_info.c
>> +++ b/src/intel/common/gen_device_info.c
>> @@ -132,6 +132,7 @@ static const struct gen_device_info 
>> gen_device_info_snb_gt2 = {
>>  static const struct gen_device_info gen_device_info_ivb_gt1 = {
>> GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
>> .num_slices = 1,
>> +   .l3_banks = 2,
>> .max_vs_threads = 36,
>> .max_tcs_threads = 36,
>> .max_tes_threads = 36,
>> @@ -156,6 +157,7 @@ static const struct gen_device_info 
>> gen_device_info_ivb_gt1 = {
>>  static const struct gen_device_info gen_device_info_ivb_gt2 = {
>> GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
>> .num_slices = 1,
>> +   .l3_banks = 4,
>> .max_vs_threads = 128,
>> .max_tcs_threads = 128,
>> .max_tes_threads = 128,
>> @@ -180,6 +182,7 @@ static const struct gen_device_info 
>> gen_device_info_ivb_gt2 = {
>>  static const struct gen_device_info gen_device_info_byt = {
>> GEN7_FEATURES, .is_baytrail = true, .gt = 1,
>> .num_slices = 1,
>> +   .l3_banks = 1,
>> .has_llc = false,
>> .max_vs_threads = 36,
>> .max_tcs_threads = 36,
>> @@ -211,6 +214,7 @@ static const struct gen_device_info gen_device_info_byt 
>> = {
>>  static const struct gen_device_info gen_device_info_hsw_gt1 = {
>> HSW_FEATURES, .gt = 1,
>> .num_slices = 1,
>> +   .l3_banks = 2,
>> .max_vs_threads = 70,
>> .max_tcs_threads = 70,
>> .max_tes_threads = 70,
>> @@ -235,6 +239,7 @@ static const struct gen_device_info 
>> gen_device_info_hsw_gt1 = {
>>  static const struct gen_device_info gen_device_info_hsw_gt2 = {
>> HSW_FEATURES, .gt = 2,
>> .num_slices = 1,
>> +   .l3_banks = 4,
>> .max_vs_threads = 280,
>> .max_tcs_threads = 256,
>> .max_tes_threads = 280,
>> @@ -259,6 +264,7 @@ static const struct gen_device_info 
>> gen_device_info_hsw_gt2 = {
>>  static const struct gen_device_info gen_device_info_hsw_gt3 = {
>> HSW_FEATURES, .gt = 3,
>> .num_slices = 2,
>> +   .l3_banks = 8,
>> .max_vs_threads = 280,
>> .max_tcs_threads = 256,
>> .max_tes_threads = 280,
>> @@ -299,6 +305,7 @@ static const struct gen_device_info 
>> gen_device_info_hsw_gt3 = {
>>  static const struct gen_device_info gen_device_info_bdw_gt1 = {
>> GEN8_FEATURES, .gt = 1,
>> .num_slices = 1,
>> +   .l3_banks = 2,
>> .max_cs_threads = 42,
>> .urb = {
>>.size = 192,
>> @@ -318,6 +325,7 @@ static const struct gen_device_info 
>> gen_device_info_bdw_gt1 = {
>>  static const struct gen_device_info gen_device_info_bdw_gt2 = {
>> GEN8_FEATURES, .gt = 2,
>> .num_slices = 1,
>> +   .l3_banks = 4,
>> .max_cs_threads = 56,
>> .urb = {
>>.size = 384,
>> @@ -337,6 +345,7 @@ static const struct gen_device_info 
>> gen_device_info_bdw_gt2 = {
>>  static const struct gen_device_info gen_device_info_bdw_gt3 = {
>> GEN8_FEATURES, .gt = 3,
>> .num_slices = 2,
>> +   .l3_banks = 8,
>> .max_cs_threads = 56,
>> .urb = {
>>.size = 384,
>> @@ -357,6 +366,7 @@ static const struct gen_device_info gen_device_info_chv 
>> = {
>> GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
>> .has_llc = false,
>> .num_slices = 1,
>> +   .l3_banks = 2,
>> .max_vs_threads = 80,
>> .max_tcs_threads = 80,
>> .max_tes_threads = 80,
>> @@ -413,6 +423,7 @@ static const struct gen_device_info gen_device_info_chv 
>> = {
>> .gt = 1,\
>> .has_llc = false,   \
>> .num_slices = 1,\
>> +   .l3_banks = 2,  \
>
> I don't think it makes sense to put an L3 bank count default into this
> macro that's almost guaranteed to be inaccurate since every GT
> configuration is different, the default of zero should make it more
> obvious that something is missing.
>
I added it here because macro is used just for the broxton. I'll move the
initialization to gen_device_info_bxt.

>> .max_vs_threads = 112,  \
>> .max_tcs_threads = 112, \
>> .max_tes_threads = 112, \
>> @@ -457,22 +468,26 @@ static const struct gen_device_info 
>> gen_device_info_chv = {
>>  static const struct gen_device_info gen_device_info_skl_gt1 = {
>> 

Re: [Mesa-dev] [PATCH 08/21] mesa: make _mesa_blit_framebuffer() static

[Timothy Arceri]

Reviewed-by: Timothy Arceri 

On 01/06/17 23:04, Samuel Pitoiset wrote:

Signed-off-by: Samuel Pitoiset 
---
  src/mesa/main/blit.c | 29 ++---
  src/mesa/main/blit.h |  8 
  2 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index e739130f98..2c0300eab3 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -177,13 +177,12 @@ is_valid_blit_filter(const struct gl_context *ctx, GLenum 
filter)
  }
  
  
-void

-_mesa_blit_framebuffer(struct gl_context *ctx,
-   struct gl_framebuffer *readFb,
-   struct gl_framebuffer *drawFb,
-   GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
-   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-   GLbitfield mask, GLenum filter, const char *func)
+static void
+blit_framebuffer(struct gl_context *ctx,
+ struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
+ GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
+ GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
+ GLbitfield mask, GLenum filter, const char *func)
  {
 const GLbitfield legalMaskBits = (GL_COLOR_BUFFER_BIT |
   GL_DEPTH_BUFFER_BIT |
@@ -561,10 +560,10 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint 
srcX1, GLint srcY1,
dstX0, dstY0, dstX1, dstY1,
mask, _mesa_enum_to_string(filter));
  
-   _mesa_blit_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,

-  srcX0, srcY0, srcX1, srcY1,
-  dstX0, dstY0, dstX1, dstY1,
-  mask, filter, "glBlitFramebuffer");
+   blit_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, "glBlitFramebuffer");
  }
  
  
@@ -612,8 +611,8 @@ _mesa_BlitNamedFramebuffer(GLuint readFramebuffer, GLuint drawFramebuffer,

 else
drawFb = ctx->WinSysDrawBuffer;
  
-   _mesa_blit_framebuffer(ctx, readFb, drawFb,

-  srcX0, srcY0, srcX1, srcY1,
-  dstX0, dstY0, dstX1, dstY1,
-  mask, filter, "glBlitNamedFramebuffer");
+   blit_framebuffer(ctx, readFb, drawFb,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, "glBlitNamedFramebuffer");
  }
diff --git a/src/mesa/main/blit.h b/src/mesa/main/blit.h
index 88dd4a9ec8..1ca4f83028 100644
--- a/src/mesa/main/blit.h
+++ b/src/mesa/main/blit.h
@@ -34,14 +34,6 @@ _mesa_regions_overlap(int srcX0, int srcY0,
int dstX0, int dstY0,
int dstX1, int dstY1);
  
-extern void

-_mesa_blit_framebuffer(struct gl_context *ctx,
-   struct gl_framebuffer *readFb,
-   struct gl_framebuffer *drawFb,
-   GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
-   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-   GLbitfield mask, GLenum filter, const char *func);
-
  extern void GLAPIENTRY
  _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,


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[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100613

--- Comment #36 from Ben Crocker  ---
(In reply to intermedi...@hotmail.com from comment #35)
> just for information 
> here my story about with Michel Danze reply
> https://bugs.freedesktop.org/show_bug.cgi?id=99859#c19
> 
> But there are many post on many big Endian hardware,
> was only curious if on s390 there was the same issue or not.
> 
> Thanks
> Luigi

So far, at least on this bug (or cluster of bugs), we have seen the
same behavior on both S390 and big-endian Power8 (PPC64).

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Re: [Mesa-dev] [PATCH 4/4] radv: realign cp dma code with radeonsi

[Bas Nieuwenhuizen]

Patches 1,2,4 are also

Reviewed-by: Bas Nieuwenhuizen 

On Thu, Jun 1, 2017 at 6:43 AM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> This reworks this code to be like radeonsi, which will make it
> easier to add GFX9 support to it in the future.
> ---
>  src/amd/vulkan/si_cmd_buffer.c | 156 
> ++---
>  1 file changed, 70 insertions(+), 86 deletions(-)
>
> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
> index 69f57fd..6a8e2af 100644
> --- a/src/amd/vulkan/si_cmd_buffer.c
> +++ b/src/amd/vulkan/si_cmd_buffer.c
> @@ -982,51 +982,76 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer)
>
>  /* Set this if you want the 3D engine to wait until CP DMA is done.
>   * It should be set on the last CP DMA packet. */
> -#define R600_CP_DMA_SYNC   (1 << 0) /* R600+ */
> +#define CP_DMA_SYNC(1 << 0)
>
>  /* Set this if the source data was used as a destination in a previous CP DMA
>   * packet. It's for preventing a read-after-write (RAW) hazard between two
>   * CP DMA packets. */
> -#define SI_CP_DMA_RAW_WAIT (1 << 1) /* SI+ */
> -#define CIK_CP_DMA_USE_L2  (1 << 2)
> +#define CP_DMA_RAW_WAIT(1 << 1)
> +#define CP_DMA_USE_L2  (1 << 2)
> +#define CP_DMA_CLEAR   (1 << 3)
>
>  /* Alignment for optimal performance. */
> -#define CP_DMA_ALIGNMENT   32
> -/* The max number of bytes to copy per packet. */
> -#define CP_DMA_MAX_BYTE_COUNT  ((1 << 21) - CP_DMA_ALIGNMENT)
> +#define SI_CPDMA_ALIGNMENT 32
>
> -static void si_emit_cp_dma_copy_buffer(struct radv_cmd_buffer *cmd_buffer,
> -  uint64_t dst_va, uint64_t src_va,
> -  unsigned size, unsigned flags)
> +/* The max number of bytes that can be copied per packet. */
> +static inline unsigned cp_dma_max_byte_count(struct radv_cmd_buffer 
> *cmd_buffer)
> +{
> +   unsigned max = S_414_BYTE_COUNT_GFX6(~0u);
> +
> +   /* make it aligned for optimal performance */
> +   return max & ~(SI_CPDMA_ALIGNMENT - 1);
> +}
> +
> +static void si_emit_cp_dma(struct radv_cmd_buffer *cmd_buffer,
> +  uint64_t dst_va, uint64_t src_va,
> +  unsigned size, unsigned flags)
>  {
> struct radeon_winsys_cs *cs = cmd_buffer->cs;
> -   uint32_t sync_flag = flags & R600_CP_DMA_SYNC ? S_411_CP_SYNC(1) : 0;
> -   uint32_t wr_confirm = !(flags & R600_CP_DMA_SYNC) ? 
> S_414_DISABLE_WR_CONFIRM_GFX6(1) : 0;
> -   uint32_t raw_wait = flags & SI_CP_DMA_RAW_WAIT ? S_414_RAW_WAIT(1) : 
> 0;
> -   uint32_t sel = flags & CIK_CP_DMA_USE_L2 ?
> -  S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2) |
> -  S_411_DSL_SEL(V_411_DST_ADDR_TC_L2) : 0;
> +   uint32_t header = 0, command = 0;
>
> assert(size);
> -   assert((size & ((1<<21)-1)) == size);
> +   assert(size <= cp_dma_max_byte_count(cmd_buffer));
>
> radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9);
>
> +   command |= S_414_BYTE_COUNT_GFX6(size);
> +
> +   /* Sync flags. */
> +   if (flags & CP_DMA_SYNC)
> +   header |= S_411_CP_SYNC(1);
> +   else {
> +   command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
> +   }
> +
> +   if (flags & CP_DMA_RAW_WAIT)
> +   command |= S_414_RAW_WAIT(1);
> +
> +   /* Src and dst flags. */
> +   if (flags & CP_DMA_USE_L2)
> +   header |= S_411_DSL_SEL(V_411_DST_ADDR_TC_L2);
> +
> +   if (flags & CP_DMA_CLEAR)
> +   header |= S_411_SRC_SEL(V_411_DATA);
> +   else if (flags & CP_DMA_USE_L2)
> +   header |= S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2);
> +
> if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) {
> radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0));
> -   radeon_emit(cs, sync_flag | sel);   /* CP_SYNC [31] */
> +   radeon_emit(cs, header);
> radeon_emit(cs, src_va);/* SRC_ADDR_LO [31:0] 
> */
> radeon_emit(cs, src_va >> 32);  /* SRC_ADDR_HI [31:0] 
> */
> radeon_emit(cs, dst_va);/* DST_ADDR_LO [31:0] 
> */
> radeon_emit(cs, dst_va >> 32);  /* DST_ADDR_HI [31:0] 
> */
> -   radeon_emit(cs, size | wr_confirm | raw_wait);  /* COMMAND 
> [29:22] | BYTE_COUNT [20:0] */
> +   radeon_emit(cs, command);
> } else {
> +   header |= S_411_SRC_ADDR_HI(src_va >> 32);
> radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0));
> radeon_emit(cs, src_va);/* 
> SRC_ADDR_LO [31:0] */
> -   radeon_emit(cs, sync_flag | ((src_va >> 32) & 0x)); /* 
> CP_SYNC [31] | SRC_ADDR_HI [15:0] */
> +   radeon_emit(cs, header);/* 
> SRC_ADDR_HI [15:0] + 

Re: [Mesa-dev] [PATCH 2/2] i965: Simplify l3 way size computations

[Francisco Jerez]

Anuj Phogat  writes:

> By making use of l3_banks field in gen_device_info struct
> l3_way_size for gen7+ = 2 * l3_banks.
>
> Suggested-by: Francisco Jerez 
> Signed-off-by: Anuj Phogat 
> Cc: Francisco Jerez 
> ---
>  src/intel/common/gen_l3_config.c | 21 ++---
>  1 file changed, 2 insertions(+), 19 deletions(-)
>
> diff --git a/src/intel/common/gen_l3_config.c 
> b/src/intel/common/gen_l3_config.c
> index 0783217..f0da0f4 100644
> --- a/src/intel/common/gen_l3_config.c
> +++ b/src/intel/common/gen_l3_config.c
> @@ -249,24 +249,6 @@ gen_get_l3_config(const struct gen_device_info *devinfo,
>  }
>  
>  /**
> - * Return the size of an L3 way in KB.
> - */
> -static unsigned
> -get_l3_way_size(const struct gen_device_info *devinfo)
> -{

ISTR there were some scattered references to this function from
comments.  Because it's nice to be able to point people at this function
when somebody asks the question what units the xxx_l3_configs tables are
in, I wouldn't mind you leaving the function around even if you cut it
down to a single line of code (the return statement).  Other than
that, looks good to me.

> -   if (devinfo->is_baytrail)
> -  return 2;
> -
> -   else if (devinfo->gt == 1 ||
> -devinfo->is_cherryview ||
> -devinfo->is_broxton)
> -  return 4;
> -
> -   else
> -  return 8 * devinfo->num_slices;
> -}
> -
> -/**
>   * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
>   * gen_device_info::urb::size.
>   */
> @@ -288,8 +270,9 @@ gen_get_l3_config_urb_size(const struct gen_device_info 
> *devinfo,
>  * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
>  * only 1008KB of this will be used."
>  */
> +   const unsigned l3_way_size = 2 * devinfo->l3_banks; /* KB */
> const unsigned max = (devinfo->gen == 9 ? 1008 : ~0);
> -   return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) /
> +   return MIN2(max, cfg->n[GEN_L3P_URB] * l3_way_size) /
>get_urb_size_scale(devinfo);
>  }
>  
> -- 
> 2.9.3


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Re: [Mesa-dev] [PATCH 2/4] radv: factor out eop event writing code.

[Bas Nieuwenhuizen]

On Thu, Jun 1, 2017 at 6:52 AM, Dave Airlie  wrote:
> On 1 June 2017 at 14:43, Dave Airlie  wrote:
>> From: Dave Airlie 
>>
>> In prep for GFX9 refactor some of the eop event writing code
>> out.
>
> This triggers an assert, I have to bump some of the command stream size 
> checks.
>
> This does change behaviour by emitting 2 EOPs where we used to emit
> one on CIK/VI,
> but it's also what radeonsi seems to do now.
>
> Dave.

Yeah, the change in radv_CmdEndQuery needs the reservation in the
VK_QUERY_TYPE_PIPELINE_STATISTICS case to be bumped from 10 to 16.

With that:

Reviewed-by: Bas Nieuwenhuizen 
>
>>
>> Signed-off-by: Dave Airlie 
>> ---
>>  src/amd/vulkan/radv_cmd_buffer.c | 22 -
>>  src/amd/vulkan/radv_private.h|  9 +++
>>  src/amd/vulkan/radv_query.c  | 53 
>> 
>>  src/amd/vulkan/si_cmd_buffer.c   | 45 ++
>>  4 files changed, 74 insertions(+), 55 deletions(-)
>>
>> diff --git a/src/amd/vulkan/radv_cmd_buffer.c 
>> b/src/amd/vulkan/radv_cmd_buffer.c
>> index c4d3d7b..43e1a93 100644
>> --- a/src/amd/vulkan/radv_cmd_buffer.c
>> +++ b/src/amd/vulkan/radv_cmd_buffer.c
>> @@ -3233,23 +3233,11 @@ static void write_event(struct radv_cmd_buffer 
>> *cmd_buffer,
>> /* TODO: this is overkill. Probably should figure something out from
>>  * the stage mask. */
>>
>> -   if (cmd_buffer->device->physical_device->rad_info.chip_class == CIK) 
>> {
>> -   radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
>> -   radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) |
>> -   EVENT_INDEX(5));
>> -   radeon_emit(cs, va);
>> -   radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1));
>> -   radeon_emit(cs, 2);
>> -   radeon_emit(cs, 0);
>> -   }
>> -
>> -   radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
>> -   radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) |
>> -   EVENT_INDEX(5));
>> -   radeon_emit(cs, va);
>> -   radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1));
>> -   radeon_emit(cs, value);
>> -   radeon_emit(cs, 0);
>> +   si_cs_emit_write_event_eop(cs,
>> +  
>> cmd_buffer->device->physical_device->rad_info.chip_class == CIK,
>> +  false,
>> +  EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
>> +  1, va, 2, value);
>>
>> assert(cmd_buffer->cs->cdw <= cdw_max);
>>  }
>> diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
>> index 264b6c9..6798ee4 100644
>> --- a/src/amd/vulkan/radv_private.h
>> +++ b/src/amd/vulkan/radv_private.h
>> @@ -838,6 +838,15 @@ void si_write_scissors(struct radeon_winsys_cs *cs, int 
>> first,
>>  uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
>>bool instanced_draw, bool indirect_draw,
>>uint32_t draw_vertex_count);
>> +void si_cs_emit_write_event_eop(struct radeon_winsys_cs *cs,
>> +   enum chip_class chip_class,
>> +   bool is_mec,
>> +   unsigned event, unsigned event_flags,
>> +   unsigned data_sel,
>> +   uint64_t va,
>> +   uint32_t old_fence,
>> +   uint32_t new_fence);
>> +
>>  void si_emit_wait_fence(struct radeon_winsys_cs *cs,
>> uint64_t va, uint32_t ref,
>> uint32_t mask);
>> diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
>> index 910eedd..708879d 100644
>> --- a/src/amd/vulkan/radv_query.c
>> +++ b/src/amd/vulkan/radv_query.c
>> @@ -1153,13 +1153,11 @@ void radv_CmdEndQuery(
>> radeon_emit(cs, va);
>> radeon_emit(cs, va >> 32);
>>
>> -   radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
>> -   radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) |
>> -   EVENT_INDEX(5));
>> -   radeon_emit(cs, avail_va);
>> -   radeon_emit(cs, (avail_va >> 32) | EOP_DATA_SEL(1));
>> -   radeon_emit(cs, 1);
>> -   radeon_emit(cs, 0);
>> +   si_cs_emit_write_event_eop(cs,
>> +  
>> cmd_buffer->device->physical_device->rad_info.chip_class,
>> +  false,
>> +  EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
>> +  1, avail_va, 0, 1);
>> break;
>> default:
>> unreachable("ending unhandled query 

Re: [Mesa-dev] [PATCH 1/2] i965: Add and initialize l3_banks field for gen7+

[Francisco Jerez]

Anuj Phogat  writes:

> This new field helps simplify l3 way size computations
> in next patch.
>
> Suggested-by: Francisco Jerez 
> Signed-off-by: Anuj Phogat 
> Cc: Francisco Jerez 
> ---
>  src/intel/common/gen_device_info.c | 23 ++-
>  src/intel/common/gen_device_info.h |  1 +
>  2 files changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/common/gen_device_info.c 
> b/src/intel/common/gen_device_info.c
> index 209b293..7c1f9b4 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -132,6 +132,7 @@ static const struct gen_device_info 
> gen_device_info_snb_gt2 = {
>  static const struct gen_device_info gen_device_info_ivb_gt1 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> .max_tes_threads = 36,
> @@ -156,6 +157,7 @@ static const struct gen_device_info 
> gen_device_info_ivb_gt1 = {
>  static const struct gen_device_info gen_device_info_ivb_gt2 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_vs_threads = 128,
> .max_tcs_threads = 128,
> .max_tes_threads = 128,
> @@ -180,6 +182,7 @@ static const struct gen_device_info 
> gen_device_info_ivb_gt2 = {
>  static const struct gen_device_info gen_device_info_byt = {
> GEN7_FEATURES, .is_baytrail = true, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 1,
> .has_llc = false,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> @@ -211,6 +214,7 @@ static const struct gen_device_info gen_device_info_byt = 
> {
>  static const struct gen_device_info gen_device_info_hsw_gt1 = {
> HSW_FEATURES, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_vs_threads = 70,
> .max_tcs_threads = 70,
> .max_tes_threads = 70,
> @@ -235,6 +239,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt1 = {
>  static const struct gen_device_info gen_device_info_hsw_gt2 = {
> HSW_FEATURES, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -259,6 +264,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt2 = {
>  static const struct gen_device_info gen_device_info_hsw_gt3 = {
> HSW_FEATURES, .gt = 3,
> .num_slices = 2,
> +   .l3_banks = 8,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -299,6 +305,7 @@ static const struct gen_device_info 
> gen_device_info_hsw_gt3 = {
>  static const struct gen_device_info gen_device_info_bdw_gt1 = {
> GEN8_FEATURES, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_cs_threads = 42,
> .urb = {
>.size = 192,
> @@ -318,6 +325,7 @@ static const struct gen_device_info 
> gen_device_info_bdw_gt1 = {
>  static const struct gen_device_info gen_device_info_bdw_gt2 = {
> GEN8_FEATURES, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
> .max_cs_threads = 56,
> .urb = {
>.size = 384,
> @@ -337,6 +345,7 @@ static const struct gen_device_info 
> gen_device_info_bdw_gt2 = {
>  static const struct gen_device_info gen_device_info_bdw_gt3 = {
> GEN8_FEATURES, .gt = 3,
> .num_slices = 2,
> +   .l3_banks = 8,
> .max_cs_threads = 56,
> .urb = {
>.size = 384,
> @@ -357,6 +366,7 @@ static const struct gen_device_info gen_device_info_chv = 
> {
> GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
> .has_llc = false,
> .num_slices = 1,
> +   .l3_banks = 2,
> .max_vs_threads = 80,
> .max_tcs_threads = 80,
> .max_tes_threads = 80,
> @@ -413,6 +423,7 @@ static const struct gen_device_info gen_device_info_chv = 
> {
> .gt = 1,\
> .has_llc = false,   \
> .num_slices = 1,\
> +   .l3_banks = 2,  \

I don't think it makes sense to put an L3 bank count default into this
macro that's almost guaranteed to be inaccurate since every GT
configuration is different, the default of zero should make it more
obvious that something is missing.

> .max_vs_threads = 112,  \
> .max_tcs_threads = 112, \
> .max_tes_threads = 112, \
> @@ -457,22 +468,26 @@ static const struct gen_device_info gen_device_info_chv 
> = {
>  static const struct gen_device_info gen_device_info_skl_gt1 = {
> GEN9_FEATURES, .gt = 1,
> .num_slices = 1,
> +   .l3_banks = 2,
> .urb.size = 192,
>  };
>  
>  static const struct gen_device_info gen_device_info_skl_gt2 = {
> GEN9_FEATURES, .gt = 2,
> .num_slices = 1,
> +   .l3_banks = 4,
>  };
>  
>  static const struct gen_device_info gen_device_info_skl_gt3 = {
> 

Re: [Mesa-dev] [PATCH 1/1] automake: r600 should only depend on libamd_common if opencl is enabled

[Aaron Watry]

On Thu, Jun 1, 2017 at 3:28 PM, Jan Vesely  wrote:

> Signed-off-by: Jan Vesely 
> ---
> Hi guys,
>
> this is the first step towards dropping libamd_common dependency.
> It's based on Emil's patches 3/5 and 4/5.
> Enabling opencl still falls back to the old way of requiring libamd_common.
> I'll try to address that in the next step (no time estimate, feel free to
> beat me to it). I think we can drop part of those functions rather than
> just copying them.
>

I did a build test of r600 on my laptop with an old libdrm before/after
this patch with/without opencl enabled, and got:
before, no CL: Build Failure
after, no CL: Build succeeded
before, with CL:  Build Failure
after, with CL: Build Failure

I then went and updated libdrm/amdgpu, and the with/without CL build for
r600 works again there.  I then built this on my r600 box and
double-checked that clinfo and piglit's cl-program-tester ran and could
execute a simple kernel (tests/cl/program/execute/builtin/geometric/
length.cl), so I'd say that this is:
Tested-By: Aaron Watry 

And yes, I agree that we should remove the amdgpu dependency from
libamd_common (or at least the parts that r600 depends on), but I'd be ok
with doing that in a follow-up... That, or we also extend vinson's patch
[0] and wrap it in a check for if opencl is enabled so that we get a
configure-time failure if R600 is being built with CL and amdgpu's drm
headers are missing/old.

--Aaron

[0] https://lists.freedesktop.org/archives/mesa-dev/2017-May/157327.html


>
> Emil, I didn't find anything in android build that enabled opencl, so I
> dropped it entirely.
>
> regards,
> Jan
>
>  configure.ac| 3 ++-
>  src/gallium/drivers/r600/Android.mk | 5 -
>  src/gallium/drivers/r600/Automake.inc   | 2 +-
>  src/gallium/targets/pipe-loader/Makefile.am | 2 +-
>  4 files changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index 5caf316..e0996a0 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -2631,7 +2631,8 @@ AM_CONDITIONAL(HAVE_SWRAST_DRI, test
> x$HAVE_SWRAST_DRI = xyes)
>  AM_CONDITIONAL(HAVE_RADEON_VULKAN, test "x$HAVE_RADEON_VULKAN" = xyes)
>  AM_CONDITIONAL(HAVE_INTEL_VULKAN, test "x$HAVE_INTEL_VULKAN" = xyes)
>
> -AM_CONDITIONAL(HAVE_AMD_DRIVERS, test "x$HAVE_GALLIUM_R600" = xyes -o \
> +AM_CONDITIONAL(HAVE_AMD_DRIVERS, test \( "x$HAVE_GALLIUM_R600" = xyes -a
> \
> +  "x$enable_opencl" = xyes \) -o \
>"x$HAVE_GALLIUM_RADEONSI" = xyes -o
> \
>"x$HAVE_RADEON_VULKAN" = xyes)
>
> diff --git a/src/gallium/drivers/r600/Android.mk
> b/src/gallium/drivers/r600/Android.mk
> index 87f433d..18c5bb6 100644
> --- a/src/gallium/drivers/r600/Android.mk
> +++ b/src/gallium/drivers/r600/Android.mk
> @@ -30,11 +30,7 @@ include $(CLEAR_VARS)
>
>  LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
>
> -ifeq ($(MESA_ENABLE_LLVM),true)
> -LOCAL_STATIC_LIBRARIES := libmesa_amd_common
> -else
>  LOCAL_C_INCLUDES += $(MESA_TOP)/src/amd/common
> -endif
>
>  LOCAL_SHARED_LIBRARIES := libdrm_radeon
>  LOCAL_MODULE := libmesa_pipe_r600
> @@ -45,7 +41,6 @@ include $(BUILD_STATIC_LIBRARY)
>  ifneq ($(HAVE_GALLIUM_R600),)
>  $(eval GALLIUM_LIBS += \
> $(LOCAL_MODULE) \
> -   $(LOCAL_STATIC_LIBRARIES) \
> libmesa_winsys_radeon)
>  $(eval GALLIUM_SHARED_LIBS += $(LOCAL_SHARED_LIBRARIES))
>  endif
> diff --git a/src/gallium/drivers/r600/Automake.inc
> b/src/gallium/drivers/r600/Automake.inc
> index fa45735..c96fe74 100644
> --- a/src/gallium/drivers/r600/Automake.inc
> +++ b/src/gallium/drivers/r600/Automake.inc
> @@ -13,7 +13,7 @@ TARGET_RADEON_WINSYS = \
>  TARGET_RADEON_COMMON = \
> $(top_builddir)/src/gallium/drivers/radeon/libradeon.la
>
> -if HAVE_GALLIUM_LLVM
> +if HAVE_AMD_DRIVERS
>  TARGET_RADEON_COMMON += \
> $(top_builddir)/src/amd/common/libamd_common.la
>  endif
> diff --git a/src/gallium/targets/pipe-loader/Makefile.am
> b/src/gallium/targets/pipe-loader/Makefile.am
> index 5f629a2..c991533 100644
> --- a/src/gallium/targets/pipe-loader/Makefile.am
> +++ b/src/gallium/targets/pipe-loader/Makefile.am
> @@ -131,7 +131,7 @@ pipe_r600_la_LIBADD = \
> $(LIBDRM_LIBS) \
> $(RADEON_LIBS)
>
> -if HAVE_GALLIUM_LLVM
> +if HAVE_AMD_DRIVERS
>  pipe_r600_la_LIBADD += \
> $(top_builddir)/src/amd/common/libamd_common.la
>  endif
> --
> 2.9.4
>
>
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Re: [Mesa-dev] [PATCH] i965: Replace 0 with ISL_FORMAT_UNSUPPORTED in format table (v2)

[Matt Turner]

On Thu, Jun 1, 2017 at 12:55 PM, Chad Versace  wrote:
> From: Chad Versace 
>
> When given an *unsupported* mesa_format,
> brw_isl_format_for_mesa_format() returned 0, a *valid* isl_format,
> ISL_FORMAT_R32G32B32A32_FLOAT.  The problem is that
> brw_isl_format_for_mesa_format's inner table used 0 instead of
> ISL_FORMAT_UNSUPPORTED to indicate unsupported mesa formats.
>
> Some callers of brw_isl_format_for_mesa_format() were aware of this
> weirdness, and worked around it. This patch removes those workarounds.
>
> Tested on Broadwell as below, no regressions:
>
> > deqp-egl --deqp-case='dEQP-EGL.functional.image.modify.*'
> Test run totals:
>   Passed:24/37 (64.9%)
>   Failed:0/37 (0.0%)
>   Not supported: 13/37 (35.1%)
>   Warnings:  0/37 (0.0%)
>
> > deqp-gles3 --deqp-case='dEQP-GLES3.functional.texture.format.*'
> Test run totals:
>   Passed:530/530 (100.0%)
>   Failed:0/530 (0.0%)
>   Not supported: 0/530 (0.0%)
>   Warnings:  0/530 (0.0%)
>
>
> v2: Ensure that all array elements are initialized to
>   ISL_FORMAT_UNSUPPORTED, even when new formats are added to enum
>   mesa_format, by using an designated range initializer.
> ---
>
>  src/mesa/drivers/dri/i965/brw_surface_formats.c  | 96 
> ++--
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  2 +-
>  2 files changed, 6 insertions(+), 92 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
> b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> index 52d3acb..f878317 100644
> --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
> +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> @@ -36,31 +36,19 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
>  * staying in sync, so we initialize to 0 even though
>  * ISL_FORMAT_R32G32B32A32_FLOAT happens to also be 0.
>  */
> -   static const uint32_t table[MESA_FORMAT_COUNT] =
> -   {
> -  [MESA_FORMAT_A8B8G8R8_UNORM] = 0,
> +   static const enum isl_format table[MESA_FORMAT_COUNT] = {
> +  [0 ... MESA_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED,
> +

Awesome.

Reviewed-by: Matt Turner 
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[Mesa-dev] [PATCH 1/1] automake: r600 should only depend on libamd_common if opencl is enabled

[Jan Vesely]

Signed-off-by: Jan Vesely 
---
Hi guys,

this is the first step towards dropping libamd_common dependency.
It's based on Emil's patches 3/5 and 4/5.
Enabling opencl still falls back to the old way of requiring libamd_common.
I'll try to address that in the next step (no time estimate, feel free to beat 
me to it). I think we can drop part of those functions rather than just copying 
them.

Emil, I didn't find anything in android build that enabled opencl, so I dropped 
it entirely.

regards,
Jan

 configure.ac| 3 ++-
 src/gallium/drivers/r600/Android.mk | 5 -
 src/gallium/drivers/r600/Automake.inc   | 2 +-
 src/gallium/targets/pipe-loader/Makefile.am | 2 +-
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/configure.ac b/configure.ac
index 5caf316..e0996a0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2631,7 +2631,8 @@ AM_CONDITIONAL(HAVE_SWRAST_DRI, test x$HAVE_SWRAST_DRI = 
xyes)
 AM_CONDITIONAL(HAVE_RADEON_VULKAN, test "x$HAVE_RADEON_VULKAN" = xyes)
 AM_CONDITIONAL(HAVE_INTEL_VULKAN, test "x$HAVE_INTEL_VULKAN" = xyes)
 
-AM_CONDITIONAL(HAVE_AMD_DRIVERS, test "x$HAVE_GALLIUM_R600" = xyes -o \
+AM_CONDITIONAL(HAVE_AMD_DRIVERS, test \( "x$HAVE_GALLIUM_R600" = xyes -a \
+  "x$enable_opencl" = xyes \) -o \
   "x$HAVE_GALLIUM_RADEONSI" = xyes -o \
   "x$HAVE_RADEON_VULKAN" = xyes)
 
diff --git a/src/gallium/drivers/r600/Android.mk 
b/src/gallium/drivers/r600/Android.mk
index 87f433d..18c5bb6 100644
--- a/src/gallium/drivers/r600/Android.mk
+++ b/src/gallium/drivers/r600/Android.mk
@@ -30,11 +30,7 @@ include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
 
-ifeq ($(MESA_ENABLE_LLVM),true)
-LOCAL_STATIC_LIBRARIES := libmesa_amd_common
-else
 LOCAL_C_INCLUDES += $(MESA_TOP)/src/amd/common
-endif
 
 LOCAL_SHARED_LIBRARIES := libdrm_radeon
 LOCAL_MODULE := libmesa_pipe_r600
@@ -45,7 +41,6 @@ include $(BUILD_STATIC_LIBRARY)
 ifneq ($(HAVE_GALLIUM_R600),)
 $(eval GALLIUM_LIBS += \
$(LOCAL_MODULE) \
-   $(LOCAL_STATIC_LIBRARIES) \
libmesa_winsys_radeon)
 $(eval GALLIUM_SHARED_LIBS += $(LOCAL_SHARED_LIBRARIES))
 endif
diff --git a/src/gallium/drivers/r600/Automake.inc 
b/src/gallium/drivers/r600/Automake.inc
index fa45735..c96fe74 100644
--- a/src/gallium/drivers/r600/Automake.inc
+++ b/src/gallium/drivers/r600/Automake.inc
@@ -13,7 +13,7 @@ TARGET_RADEON_WINSYS = \
 TARGET_RADEON_COMMON = \
$(top_builddir)/src/gallium/drivers/radeon/libradeon.la
 
-if HAVE_GALLIUM_LLVM
+if HAVE_AMD_DRIVERS
 TARGET_RADEON_COMMON += \
$(top_builddir)/src/amd/common/libamd_common.la
 endif
diff --git a/src/gallium/targets/pipe-loader/Makefile.am 
b/src/gallium/targets/pipe-loader/Makefile.am
index 5f629a2..c991533 100644
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -131,7 +131,7 @@ pipe_r600_la_LIBADD = \
$(LIBDRM_LIBS) \
$(RADEON_LIBS)
 
-if HAVE_GALLIUM_LLVM
+if HAVE_AMD_DRIVERS
 pipe_r600_la_LIBADD += \
$(top_builddir)/src/amd/common/libamd_common.la
 endif
-- 
2.9.4

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[Mesa-dev] [PATCH 1/2] i965: Add and initialize l3_banks field for gen7+

[Anuj Phogat]

This new field helps simplify l3 way size computations
in next patch.

Suggested-by: Francisco Jerez 
Signed-off-by: Anuj Phogat 
Cc: Francisco Jerez 
---
 src/intel/common/gen_device_info.c | 23 ++-
 src/intel/common/gen_device_info.h |  1 +
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/src/intel/common/gen_device_info.c 
b/src/intel/common/gen_device_info.c
index 209b293..7c1f9b4 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -132,6 +132,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 
= {
 static const struct gen_device_info gen_device_info_ivb_gt1 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 36,
.max_tcs_threads = 36,
.max_tes_threads = 36,
@@ -156,6 +157,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 
= {
 static const struct gen_device_info gen_device_info_ivb_gt2 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_vs_threads = 128,
.max_tcs_threads = 128,
.max_tes_threads = 128,
@@ -180,6 +182,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 
= {
 static const struct gen_device_info gen_device_info_byt = {
GEN7_FEATURES, .is_baytrail = true, .gt = 1,
.num_slices = 1,
+   .l3_banks = 1,
.has_llc = false,
.max_vs_threads = 36,
.max_tcs_threads = 36,
@@ -211,6 +214,7 @@ static const struct gen_device_info gen_device_info_byt = {
 static const struct gen_device_info gen_device_info_hsw_gt1 = {
HSW_FEATURES, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 70,
.max_tcs_threads = 70,
.max_tes_threads = 70,
@@ -235,6 +239,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 
= {
 static const struct gen_device_info gen_device_info_hsw_gt2 = {
HSW_FEATURES, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_vs_threads = 280,
.max_tcs_threads = 256,
.max_tes_threads = 280,
@@ -259,6 +264,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 
= {
 static const struct gen_device_info gen_device_info_hsw_gt3 = {
HSW_FEATURES, .gt = 3,
.num_slices = 2,
+   .l3_banks = 8,
.max_vs_threads = 280,
.max_tcs_threads = 256,
.max_tes_threads = 280,
@@ -299,6 +305,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 
= {
 static const struct gen_device_info gen_device_info_bdw_gt1 = {
GEN8_FEATURES, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.max_cs_threads = 42,
.urb = {
   .size = 192,
@@ -318,6 +325,7 @@ static const struct gen_device_info gen_device_info_bdw_gt1 
= {
 static const struct gen_device_info gen_device_info_bdw_gt2 = {
GEN8_FEATURES, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
.max_cs_threads = 56,
.urb = {
   .size = 384,
@@ -337,6 +345,7 @@ static const struct gen_device_info gen_device_info_bdw_gt2 
= {
 static const struct gen_device_info gen_device_info_bdw_gt3 = {
GEN8_FEATURES, .gt = 3,
.num_slices = 2,
+   .l3_banks = 8,
.max_cs_threads = 56,
.urb = {
   .size = 384,
@@ -357,6 +366,7 @@ static const struct gen_device_info gen_device_info_chv = {
GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
.has_llc = false,
.num_slices = 1,
+   .l3_banks = 2,
.max_vs_threads = 80,
.max_tcs_threads = 80,
.max_tes_threads = 80,
@@ -413,6 +423,7 @@ static const struct gen_device_info gen_device_info_chv = {
.gt = 1,\
.has_llc = false,   \
.num_slices = 1,\
+   .l3_banks = 2,  \
.max_vs_threads = 112,  \
.max_tcs_threads = 112, \
.max_tes_threads = 112, \
@@ -457,22 +468,26 @@ static const struct gen_device_info gen_device_info_chv = 
{
 static const struct gen_device_info gen_device_info_skl_gt1 = {
GEN9_FEATURES, .gt = 1,
.num_slices = 1,
+   .l3_banks = 2,
.urb.size = 192,
 };
 
 static const struct gen_device_info gen_device_info_skl_gt2 = {
GEN9_FEATURES, .gt = 2,
.num_slices = 1,
+   .l3_banks = 4,
 };
 
 static const struct gen_device_info gen_device_info_skl_gt3 = {
GEN9_FEATURES, .gt = 3,
.num_slices = 2,
+   .l3_banks = 8,
 };
 
 static const struct gen_device_info gen_device_info_skl_gt4 = {
GEN9_FEATURES, .gt = 4,
.num_slices = 3,
+   .l3_banks = 12,
/* From the "L3 Allocation and Programming" documentation:
 *
 * "URB is limited to 1008KB due to programming restrictions.  This is not a
@@ -489,7 +504,8 @@ static const struct gen_device_info gen_device_info_bxt = {
 };
 
 static const struct gen_device_info gen_device_info_bxt_2x6 = {
-   GEN9_LP_FEATURES_2X6
+   GEN9_LP_FEATURES_2X6,
+   

[Mesa-dev] [PATCH 2/2] i965: Simplify l3 way size computations

[Anuj Phogat]

By making use of l3_banks field in gen_device_info struct
l3_way_size for gen7+ = 2 * l3_banks.

Suggested-by: Francisco Jerez 
Signed-off-by: Anuj Phogat 
Cc: Francisco Jerez 
---
 src/intel/common/gen_l3_config.c | 21 ++---
 1 file changed, 2 insertions(+), 19 deletions(-)

diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index 0783217..f0da0f4 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -249,24 +249,6 @@ gen_get_l3_config(const struct gen_device_info *devinfo,
 }
 
 /**
- * Return the size of an L3 way in KB.
- */
-static unsigned
-get_l3_way_size(const struct gen_device_info *devinfo)
-{
-   if (devinfo->is_baytrail)
-  return 2;
-
-   else if (devinfo->gt == 1 ||
-devinfo->is_cherryview ||
-devinfo->is_broxton)
-  return 4;
-
-   else
-  return 8 * devinfo->num_slices;
-}
-
-/**
  * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
  * gen_device_info::urb::size.
  */
@@ -288,8 +270,9 @@ gen_get_l3_config_urb_size(const struct gen_device_info 
*devinfo,
 * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 * only 1008KB of this will be used."
 */
+   const unsigned l3_way_size = 2 * devinfo->l3_banks; /* KB */
const unsigned max = (devinfo->gen == 9 ? 1008 : ~0);
-   return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) /
+   return MIN2(max, cfg->n[GEN_L3P_URB] * l3_way_size) /
   get_urb_size_scale(devinfo);
 }
 
-- 
2.9.3

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[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100613

--- Comment #35 from intermedi...@hotmail.com  ---
just for information 
here my story about with Michel Danze reply
https://bugs.freedesktop.org/show_bug.cgi?id=99859#c19

But there are many post on many big Endian hardware,
was only curious if on s390 there was the same issue or not.

Thanks
Luigi

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[Mesa-dev] [PATCH] i965: Replace 0 with ISL_FORMAT_UNSUPPORTED in format table (v2)

[Chad Versace]

From: Chad Versace 

When given an *unsupported* mesa_format,
brw_isl_format_for_mesa_format() returned 0, a *valid* isl_format,
ISL_FORMAT_R32G32B32A32_FLOAT.  The problem is that
brw_isl_format_for_mesa_format's inner table used 0 instead of
ISL_FORMAT_UNSUPPORTED to indicate unsupported mesa formats.

Some callers of brw_isl_format_for_mesa_format() were aware of this
weirdness, and worked around it. This patch removes those workarounds.

Tested on Broadwell as below, no regressions:

> deqp-egl --deqp-case='dEQP-EGL.functional.image.modify.*'
Test run totals:
  Passed:24/37 (64.9%)
  Failed:0/37 (0.0%)
  Not supported: 13/37 (35.1%)
  Warnings:  0/37 (0.0%)

> deqp-gles3 --deqp-case='dEQP-GLES3.functional.texture.format.*'
Test run totals:
  Passed:530/530 (100.0%)
  Failed:0/530 (0.0%)
  Not supported: 0/530 (0.0%)
  Warnings:  0/530 (0.0%)


v2: Ensure that all array elements are initialized to
  ISL_FORMAT_UNSUPPORTED, even when new formats are added to enum
  mesa_format, by using an designated range initializer.
---

 src/mesa/drivers/dri/i965/brw_surface_formats.c  | 96 ++--
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  2 +-
 2 files changed, 6 insertions(+), 92 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 52d3acb..f878317 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -36,31 +36,19 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
 * staying in sync, so we initialize to 0 even though
 * ISL_FORMAT_R32G32B32A32_FLOAT happens to also be 0.
 */
-   static const uint32_t table[MESA_FORMAT_COUNT] =
-   {
-  [MESA_FORMAT_A8B8G8R8_UNORM] = 0,
+   static const enum isl_format table[MESA_FORMAT_COUNT] = {
+  [0 ... MESA_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED,
+
   [MESA_FORMAT_R8G8B8A8_UNORM] = ISL_FORMAT_R8G8B8A8_UNORM,
   [MESA_FORMAT_B8G8R8A8_UNORM] = ISL_FORMAT_B8G8R8A8_UNORM,
-  [MESA_FORMAT_A8R8G8B8_UNORM] = 0,
-  [MESA_FORMAT_X8B8G8R8_UNORM] = 0,
   [MESA_FORMAT_R8G8B8X8_UNORM] = ISL_FORMAT_R8G8B8X8_UNORM,
   [MESA_FORMAT_B8G8R8X8_UNORM] = ISL_FORMAT_B8G8R8X8_UNORM,
-  [MESA_FORMAT_X8R8G8B8_UNORM] = 0,
-  [MESA_FORMAT_BGR_UNORM8] = 0,
   [MESA_FORMAT_RGB_UNORM8] = ISL_FORMAT_R8G8B8_UNORM,
   [MESA_FORMAT_B5G6R5_UNORM] = ISL_FORMAT_B5G6R5_UNORM,
-  [MESA_FORMAT_R5G6B5_UNORM] = 0,
   [MESA_FORMAT_B4G4R4A4_UNORM] = ISL_FORMAT_B4G4R4A4_UNORM,
-  [MESA_FORMAT_A4R4G4B4_UNORM] = 0,
-  [MESA_FORMAT_A1B5G5R5_UNORM] = 0,
   [MESA_FORMAT_B5G5R5A1_UNORM] = ISL_FORMAT_B5G5R5A1_UNORM,
-  [MESA_FORMAT_A1R5G5B5_UNORM] = 0,
-  [MESA_FORMAT_L4A4_UNORM] = 0,
   [MESA_FORMAT_L8A8_UNORM] = ISL_FORMAT_L8A8_UNORM,
-  [MESA_FORMAT_A8L8_UNORM] = 0,
   [MESA_FORMAT_L16A16_UNORM] = ISL_FORMAT_L16A16_UNORM,
-  [MESA_FORMAT_A16L16_UNORM] = 0,
-  [MESA_FORMAT_B2G3R3_UNORM] = 0,
   [MESA_FORMAT_A_UNORM8] = ISL_FORMAT_A8_UNORM,
   [MESA_FORMAT_A_UNORM16] = ISL_FORMAT_A16_UNORM,
   [MESA_FORMAT_L_UNORM8] = ISL_FORMAT_L8_UNORM,
@@ -71,29 +59,16 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
   [MESA_FORMAT_YCBCR] = ISL_FORMAT_YCRCB_SWAPUVY,
   [MESA_FORMAT_R_UNORM8] = ISL_FORMAT_R8_UNORM,
   [MESA_FORMAT_R8G8_UNORM] = ISL_FORMAT_R8G8_UNORM,
-  [MESA_FORMAT_G8R8_UNORM] = 0,
   [MESA_FORMAT_R_UNORM16] = ISL_FORMAT_R16_UNORM,
   [MESA_FORMAT_R16G16_UNORM] = ISL_FORMAT_R16G16_UNORM,
-  [MESA_FORMAT_G16R16_UNORM] = 0,
   [MESA_FORMAT_B10G10R10A2_UNORM] = ISL_FORMAT_B10G10R10A2_UNORM,
-  [MESA_FORMAT_S8_UINT_Z24_UNORM] = 0,
-  [MESA_FORMAT_Z24_UNORM_S8_UINT] = 0,
-  [MESA_FORMAT_Z_UNORM16] = 0,
-  [MESA_FORMAT_Z24_UNORM_X8_UINT] = 0,
-  [MESA_FORMAT_X8_UINT_Z24_UNORM] = 0,
-  [MESA_FORMAT_Z_UNORM32] = 0,
   [MESA_FORMAT_S_UINT8] = ISL_FORMAT_R8_UINT,
 
-  [MESA_FORMAT_BGR_SRGB8] = 0,
-  [MESA_FORMAT_A8B8G8R8_SRGB] = 0,
   [MESA_FORMAT_B8G8R8A8_SRGB] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB,
-  [MESA_FORMAT_A8R8G8B8_SRGB] = 0,
   [MESA_FORMAT_R8G8B8A8_SRGB] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB,
-  [MESA_FORMAT_X8R8G8B8_SRGB] = 0,
   [MESA_FORMAT_B8G8R8X8_SRGB] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB,
   [MESA_FORMAT_L_SRGB8] = ISL_FORMAT_L8_UNORM_SRGB,
   [MESA_FORMAT_L8A8_SRGB] = ISL_FORMAT_L8A8_UNORM_SRGB,
-  [MESA_FORMAT_A8L8_SRGB] = 0,
   [MESA_FORMAT_SRGB_DXT1] = ISL_FORMAT_BC1_UNORM_SRGB,
   [MESA_FORMAT_SRGBA_DXT1] = ISL_FORMAT_BC1_UNORM_SRGB,
   [MESA_FORMAT_SRGBA_DXT3] = ISL_FORMAT_BC2_UNORM_SRGB,
@@ -109,7 +84,6 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
   [MESA_FORMAT_RGBA_FLOAT32] = ISL_FORMAT_R32G32B32A32_FLOAT,
   [MESA_FORMAT_RGBA_FLOAT16] = ISL_FORMAT_R16G16B16A16_FLOAT,
 

Re: [Mesa-dev] [PATCH 4/6] i965: Replace 0 with ISL_FORMAT_UNSUPPORTED in format table

[Chad Versace]

On Wed 31 May 2017, Jason Ekstrand wrote:
> On May 31, 2017 9:32:23 PM Ian Romanick  wrote:
> 
> > Having the unsupported format value not be zero isn't very safe.  The
> > C99 rules say that any field missing an initializer is implicitly
> > initialized to zero.  If a MESA_FORMAT_ value is added but is not added
> > to the array initializer, we'll have this same problem... but in a way
> > that is much harder to detect.
> 
> Good point.  Chad, how would you feel about leaving things zero and then
> having a loop that walks the array, knows about the one special case, and
> sets all unsupported things to ISL_FORMAT_UNSUPPORTED?  Then we get the best
> of both worlds.

My patch is garbage. We all agree.

I prefer Matt's approach that preserves the array's static constness. If
that doesn't work, then I'll write a loop. I'll reply back after testing
it.
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[Mesa-dev] [Bug 100988] glXGetCurrentDisplay() no longer works for FakeGLX contexts?

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100988

--- Comment #3 from Brian Paul  ---
(In reply to Tom Hudson from comment #2)
> Awesome, unless I'm missing something this fixes all our tests, and is a lot
> simpler than anything we'd tried.

Great.  I'll put Tested-by: Tom Hudson  on the patch
and push it soon.

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Re: [Mesa-dev] [PATCH V2] i965: Rename brw_format variable names to isl_format

[Anuj Phogat]

On Thu, Jun 1, 2017 at 12:00 PM, Chad Versace  wrote:
> On Thu 01 Jun 2017, Jason Ekstrand wrote:
>> On Thu, Jun 1, 2017 at 9:41 AM, Anuj Phogat  wrote:
>>
>> > On Tue, May 23, 2017 at 2:35 PM, Anuj Phogat 
>> > wrote:
>> > > This patch makes non functional changes. Renaming is just to
>> > > make the code more readable.
>> > >
>> > > V2: update the types to "enum isl_format"
>> > Jason, do you have any other questions ? r-b ?
>> >
>>
>> Patch 1/6 of the series Chad sent out yesterday also does this and a bit
>> more.  I don't think he saw yours.
>
> Right. I didn't see Anuj's patch.
>
> Anuj, your patch looks good to me, and it's
> Reviewed-by: Chad Versace 
>
> If your patch lands before mine, it's no trouble to rebase my patches.
Thanks Chad.
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Re: [Mesa-dev] [PATCH V2] i965: Rename brw_format variable names to isl_format

[Chad Versace]

On Thu 01 Jun 2017, Jason Ekstrand wrote:
> On Thu, Jun 1, 2017 at 9:41 AM, Anuj Phogat  wrote:
> 
> > On Tue, May 23, 2017 at 2:35 PM, Anuj Phogat 
> > wrote:
> > > This patch makes non functional changes. Renaming is just to
> > > make the code more readable.
> > >
> > > V2: update the types to "enum isl_format"
> > Jason, do you have any other questions ? r-b ?
> >
> 
> Patch 1/6 of the series Chad sent out yesterday also does this and a bit
> more.  I don't think he saw yours.

Right. I didn't see Anuj's patch.

Anuj, your patch looks good to me, and it's
Reviewed-by: Chad Versace 

If your patch lands before mine, it's no trouble to rebase my patches.
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Re: [Mesa-dev] [Mesa-stable] [PATCH 6/6] i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()

[Chad Versace]

On Wed 31 May 2017, Ian Romanick wrote:
> On 05/31/2017 04:43 PM, Chad Versace wrote:
> > This function never occurs in the callchain of a GL function. It occurs
> > only in the callchain of eglCreate*Surface and the analogous paths for
> > GLX.  Therefore, even if a  thread does have a bound GL context,
> > emitting a GL error here is wrong. A misplaced GL error, when no GL
> > call is made, can confuse clients.
> 
> This seems right.  What seems wrong, however, is that the callers ignore
> the potentially NULL return.  intelCreateBuffer (intel_screen.c) could
> easily return false when it gets NULL, but it merrily plugs along.

Yes, that seems to be a problem throughout the DRI layer. iirc, some DRI
vfunc signatures even lack return codes. I'll explore the
intelCreateBuffer callgraph and reply with some follow-up patches.

> This patch clearly makes things better, but I'd love to see a follow up
> that fixes the other pre-existing problems.
> 
> Reviewed-by: Ian Romanick 

Thanks.

> > 
> > Cc: mesa-sta...@lists.freedesktop.org
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Re: [Mesa-dev] [PATCH 11/12] i965/cnl: Properly handle l3 configuration

[Anuj Phogat]

On Thu, May 11, 2017 at 8:31 AM, Ben Widawsky  wrote:
> On 17-05-02 11:51:28, Francisco Jerez wrote:
>>
>> Anuj Phogat  writes:
>>
>>> On Mon, Apr 24, 2017 at 9:15 PM, Ben Widawsky  wrote:
>>>
 On 17-04-18 18:18:39, Francisco Jerez wrote:

 Most, if not all of the unrelated changes that snuck in were due to
 rebase.
 Anuj, would you mind fixing those? I tried my best to address the rest,
 but I'm
 admittedly stumbling my way through some of the l3 programming.

 Anuj Phogat  writes:
>
>
> From: Ben Widawsky 
>>
>>
>> V2: Squash the changes in one patch and rebased on master (Anuj).
>>
>> Signed-off-by: Ben Widawsky 
>> Signed-off-by: Anuj Phogat 
>> ---
>>  src/intel/common/gen_l3_config.c | 43 ++
>> --
>>  1 file changed, 37 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/intel/common/gen_l3_config.c
>> b/src/intel/common/gen_l3_config.c
>> index 4fe3503..f3e8793 100644
>> --- a/src/intel/common/gen_l3_config.c
>> +++ b/src/intel/common/gen_l3_config.c
>> @@ -102,6 +102,26 @@ static const struct gen_l3_config
>> chv_l3_configs[]
>> = {
>>  };
>>
>>  /**
>> + * On CNL, RO clients are merged and shared with read/write space. As
>> a
>> result
>> + * we have fewer allocation parameters.
>>
>
> The two sentences above make it sound like RO clients haven't been part
> of the same partition until CNL.  They have.  I'd drop this.
>
>
 So the difference I was trying to spell out is that the previous "IS"
 "C"
 and
 "T" fields do not exist in a programmable way.

 Also, programming does not require any
>>
>> + * back scaling. Programming simply works in 2k increments and is
>> scaled by the
>> + * hardware.
>>
>
> That's basically the case (up to the specific scale factor) on all
> hardware, I'd drop this too.
>
>
 I personally think the existing code isn't as self-documenting to me as
 it
 is to
 you, and so I was trying to spell it out. I was trying to document, not
 show
 differentiation. In either event, I don't care if we keep this or leave
 it.

 + */
>>
>> +static const struct gen_l3_config cnl_l3_configs[] = {
>> +   /* SLM URB Rest  DC  RO */
>>
>
> s/Rest/ALL/ (these are L3 partition enum labels), and align to the
> column boundaries below.
>
>
 Sure.


 +   {{  0, 64, 64,  0,  0 }},
>>
>> +   {{  0, 64,  0, 16, 48 }},
>> +   {{  0, 48,  0, 16, 64 }},
>> +   {{  0, 32,  0,  0, 96 }},
>> +   {{  0, 32, 96,  0,  0 }},
>> +   {{  0, 32,  0, 16, 80 }},
>> +   {{ 32, 16, 80,  0,  0 }},
>> +   {{ 32, 16,  0, 64, 16 }},
>> +   {{ 32,  0, 96,  0,  0 }},
>> +   {{ 0 }}
>> +};
>> +
>> +/**
>>   * Return a zero-terminated array of validated L3 configurations for
>> the
>>   * specified device.
>>   */
>> @@ -116,9 +136,11 @@ get_l3_configs(const struct gen_device_info
>> *devinfo)
>>return (devinfo->is_cherryview ? chv_l3_configs :
>> bdw_l3_configs);
>>
>> case 9:
>> -   case 10:
>>return chv_l3_configs;
>>
>> +   case 10:
>> +  return cnl_l3_configs;
>> +
>> default:
>>unreachable("Not implemented");
>> }
>> @@ -258,13 +280,19 @@ get_l3_way_size(const struct gen_device_info
>> *devinfo)
>> if (devinfo->is_baytrail)
>>return 2;
>>
>> -   else if (devinfo->gt == 1 ||
>> -devinfo->is_cherryview ||
>> -devinfo->is_broxton)
>>
>
> Unrelated change sneaked in.
>
>
 See above reply (not sure how this got in other than rebase).

 +   /* Way size is actually 6 * num_slices, because it's 2k per bank,
 and
>>
>> +* normally 3 banks per slice. However, on CNL+ this information
>> isn't
>> +* needed to setup the URB/l3 configuration. We fudge the answer
>> here
>> +* and then use the scaling to fix it up later.
>> +*/
>>
>
> The comment makes it sound like you're lying to the caller and
> returning
> a bogus way size you're going to fix up later.  That's not the case
> though, the value you're returning below is accurate for all CNL
> configs.  6 * num_slices OTOH *would* be inaccurate.  I'd drop the
> comment.
>
>
 Anuj, would you mind doing what Curro asks?

 +   if (devinfo->gen >= 10)
>>
>> +  return 2 * devinfo->l3_banks;
>> +
>>
>
> It would be nice if we could use the 'l3_banks' devinfo field you just
> added on 

[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100613

--- Comment #34 from Stefan Dirsch  ---
(In reply to intermedi...@hotmail.com from comment #33)
> Hi Stefan sorry for asking this small ot,
> how is the situation there on RadeonSi Mesa EGL?  
> here on Qoriq and on PowerMac G5  glamor crashes if invoche egl_radeonsi and
> made the Xorg not usable.
> There there is the same situation?

I haven't heard of such issues yet.

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[Mesa-dev] [Bug 101071] compiling glsl fails with undefined reference to `pthread_create'

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101071

--- Comment #11 from Emil Velikov  ---
(In reply to warpme from comment #10)
> Emil,
> Unfortunately minimizing build options doesn't help me with successful
> bisecting.
Minimising the build options was aimed to a) reduce the surface area and b)
speed up the build, hence the bisection.

> I'm always failing in the middle with following erorr:

> python  ./nir/nir_opcodes_c.py > nir/nir_opcodes.c || (rm -f
> nir/nir_opcodes.c; false)
> Traceback (most recent call last):
>   File "./nir/nir_builder_opcodes_h.py", line 46, in 
> from nir_opcodes import opcodes
These python errors seem new and unrelated. I would simply "git bisect skip"
them.

To isolate any other bugs you could do:
$ git bisect start .
$ build & test
$ git bisect good/bad
$ git clean -fxd // warning: it purge _all_ files that are not checked in git
$ rm -rf $builddir // if building out of tree
$ build & test
...

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[Mesa-dev] [PATCH 09/11] radeonsi/gfx9: fix LS scratch buffer support without TCS for GFX9

[Marek Olšák]

From: Marek Olšák 

LS is merged into TCS. If there is no TCS, LS is merged into fixed-func
TCS. The problem is the fixed-func TCS was ignored by scratch update
functions, so LS didn't have the scratch buffer set up.

Note that Mesa 17.1 doesn't have merged shaders.
---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 21 ++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 5cbb91b..631272e 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2704,58 +2704,73 @@ static int si_update_scratch_buffer(struct si_context 
*sctx,
 static unsigned si_get_current_scratch_buffer_size(struct si_context *sctx)
 {
return sctx->scratch_buffer ? sctx->scratch_buffer->b.b.width0 : 0;
 }
 
 static unsigned si_get_scratch_buffer_bytes_per_wave(struct si_shader *shader)
 {
return shader ? shader->config.scratch_bytes_per_wave : 0;
 }
 
+static struct si_shader *si_get_tcs_current(struct si_context *sctx)
+{
+   if (!sctx->tes_shader.cso)
+   return NULL; /* tessellation disabled */
+
+   return sctx->tcs_shader.cso ? sctx->tcs_shader.current :
+ sctx->fixed_func_tcs_shader.current;
+}
+
 static unsigned si_get_max_scratch_bytes_per_wave(struct si_context *sctx)
 {
unsigned bytes = 0;
 
bytes = MAX2(bytes, 
si_get_scratch_buffer_bytes_per_wave(sctx->ps_shader.current));
bytes = MAX2(bytes, 
si_get_scratch_buffer_bytes_per_wave(sctx->gs_shader.current));
bytes = MAX2(bytes, 
si_get_scratch_buffer_bytes_per_wave(sctx->vs_shader.current));
-   bytes = MAX2(bytes, 
si_get_scratch_buffer_bytes_per_wave(sctx->tcs_shader.current));
bytes = MAX2(bytes, 
si_get_scratch_buffer_bytes_per_wave(sctx->tes_shader.current));
+
+   if (sctx->tes_shader.cso) {
+   struct si_shader *tcs = si_get_tcs_current(sctx);
+
+   bytes = MAX2(bytes, si_get_scratch_buffer_bytes_per_wave(tcs));
+   }
return bytes;
 }
 
 static bool si_update_scratch_relocs(struct si_context *sctx)
 {
+   struct si_shader *tcs = si_get_tcs_current(sctx);
int r;
 
/* Update the shaders, so that they are using the latest scratch.
 * The scratch buffer may have been changed since these shaders were
 * last used, so we still need to try to update them, even if they
 * require scratch buffers smaller than the current size.
 */
r = si_update_scratch_buffer(sctx, sctx->ps_shader.current);
if (r < 0)
return false;
if (r == 1)
si_pm4_bind_state(sctx, ps, sctx->ps_shader.current->pm4);
 
r = si_update_scratch_buffer(sctx, sctx->gs_shader.current);
if (r < 0)
return false;
if (r == 1)
si_pm4_bind_state(sctx, gs, sctx->gs_shader.current->pm4);
 
-   r = si_update_scratch_buffer(sctx, sctx->tcs_shader.current);
+   r = si_update_scratch_buffer(sctx, tcs);
if (r < 0)
return false;
if (r == 1)
-   si_pm4_bind_state(sctx, hs, sctx->tcs_shader.current->pm4);
+   si_pm4_bind_state(sctx, hs, tcs->pm4);
 
/* VS can be bound as LS, ES, or VS. */
r = si_update_scratch_buffer(sctx, sctx->vs_shader.current);
if (r < 0)
return false;
if (r == 1) {
if (sctx->tes_shader.current)
si_pm4_bind_state(sctx, ls, 
sctx->vs_shader.current->pm4);
else if (sctx->gs_shader.current)
si_pm4_bind_state(sctx, es, 
sctx->vs_shader.current->pm4);
-- 
2.7.4

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[Mesa-dev] [PATCH 11/11] radeonsi/gfx9: prevent a race when the previous shader's main part is missing

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 727bf4b..08d647b 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1627,23 +1627,25 @@ again:
if (previous_stage_sel) {
struct si_shader_key shader1_key = zeroed;
 
if (sel->type == PIPE_SHADER_TESS_CTRL)
shader1_key.as_ls = 1;
else if (sel->type == PIPE_SHADER_GEOMETRY)
shader1_key.as_es = 1;
else
assert(0);
 
+   mtx_lock(_stage_sel->mutex);
ok = si_check_missing_main_part(sscreen,
previous_stage_sel,
compiler_state, 
_key);
+   mtx_unlock(_stage_sel->mutex);
} else {
ok = si_check_missing_main_part(sscreen, sel,
compiler_state, key);
}
if (!ok) {
FREE(shader);
mtx_unlock(>mutex);
return -ENOMEM; /* skip the draw call */
}
}
-- 
2.7.4

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[Mesa-dev] [PATCH 10/11] radeonsi/gfx9: wait for main part compilation of 1st shaders or merged shaders

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 631272e..727bf4b 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1595,20 +1595,24 @@ again:
shader->selector = sel;
shader->key = *key;
shader->compiler_ctx_state = *compiler_state;
 
/* If this is a merged shader, get the first shader's selector. */
if (sscreen->b.chip_class >= GFX9) {
if (sel->type == PIPE_SHADER_TESS_CTRL)
previous_stage_sel = key->part.tcs.ls;
else if (sel->type == PIPE_SHADER_GEOMETRY)
previous_stage_sel = key->part.gs.es;
+
+   /* We need to wait for the previous shader. */
+   if (previous_stage_sel && thread_index < 0)
+   util_queue_fence_wait(_stage_sel->ready);
}
 
/* Compile the main shader part if it doesn't exist. This can happen
 * if the initial guess was wrong. */
bool is_pure_monolithic =
sscreen->use_monolithic_shaders ||
memcmp(>mono, , sizeof(key->mono)) != 0;
 
if (!is_pure_monolithic) {
bool ok;
-- 
2.7.4

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[Mesa-dev] [PATCH 07/11] radeonsi: remove dead code in declare_input_fs

[Marek Olšák]

From: Marek Olšák 

Colors are interpolated in the PS prolog. This was never used.
---
 src/gallium/drivers/radeonsi/si_shader.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 3a86c0b..5c7deeb 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1360,25 +1360,20 @@ static void declare_input_fs(
}
 
interp_param_idx = lookup_interp_param_index(decl->Interp.Interpolate,
 decl->Interp.Location);
if (interp_param_idx == -1)
return;
else if (interp_param_idx) {
interp_param = LLVMGetParam(ctx->main_fn, interp_param_idx);
}
 
-   if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR &&
-   decl->Interp.Interpolate == TGSI_INTERPOLATE_COLOR &&
-   ctx->shader->key.part.ps.prolog.flatshade_colors)
-   interp_param = NULL; /* load the constant color */
-
interp_fs_input(ctx, input_index, decl->Semantic.Name,
decl->Semantic.Index, shader->selector->info.num_inputs,
shader->selector->info.colors_read, interp_param,
LLVMGetParam(main_fn, SI_PARAM_PRIM_MASK),
LLVMGetParam(main_fn, SI_PARAM_FRONT_FACE),
[0]);
 }
 
 static LLVMValueRef get_sample_id(struct si_shader_context *ctx)
 {
-- 
2.7.4

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[Mesa-dev] [PATCH 08/11] radeonsi: move streamout state update out of si_update_shaders

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_shader.h|  1 +
 src/gallium/drivers/radeonsi/si_state_shaders.c | 40 +++--
 2 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.h 
b/src/gallium/drivers/radeonsi/si_shader.h
index aab902b..7112621 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -329,20 +329,21 @@ struct si_shader_selector {
 
/* GS parameters. */
unsignedesgs_itemsize;
unsignedgs_input_verts_per_prim;
unsignedgs_output_prim;
unsignedgs_max_out_vertices;
unsignedgs_num_invocations;
unsignedmax_gs_stream; /* count - 1 */
unsignedgsvs_vertex_size;
unsignedmax_gsvs_emit_size;
+   unsignedenabled_streamout_buffer_mask;
 
/* PS parameters. */
unsignedcolor_attr_index[2];
unsigneddb_shader_control;
/* Set 0xf or 0x0 (4 bits) per each written output.
 * ANDed with spi_shader_col_format.
 */
unsignedcolors_written_4bit;
 
/* CS parameters */
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 55e881c..5cbb91b 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1949,20 +1949,27 @@ static void *si_create_shader_selector(struct 
pipe_context *ctx,
}
 
sel->so = state->stream_output;
tgsi_scan_shader(state->tokens, >info);
sel->type = sel->info.processor;
p_atomic_inc(>b.num_shaders_created);
si_get_active_slot_masks(>info,
 >active_const_and_shader_buffers,
 >active_samplers_and_images);
 
+   /* Record which streamout buffers are enabled. */
+   for (i = 0; i < sel->so.num_outputs; i++) {
+   sel->enabled_streamout_buffer_mask |=
+   (1 << sel->so.output[i].output_buffer) <<
+   (sel->so.output[i].stream * 4);
+   }
+
/* The prolog is a no-op if there are no inputs. */
sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
   sel->info.num_inputs;
 
/* Set which opcode uses which (i,j) pair. */
if (sel->info.uses_persp_opcode_interp_centroid)
sel->info.uses_persp_centroid = true;
 
if (sel->info.uses_linear_opcode_interp_centroid)
sel->info.uses_linear_centroid = true;
@@ -2130,34 +2137,49 @@ static void *si_create_shader_selector(struct 
pipe_context *ctx,
r600_can_dump_shader(>b, sel->info.processor))
si_init_shader_selector_async(sel, -1);
else
util_queue_add_job(>shader_compiler_queue, sel,
>ready, si_init_shader_selector_async,
NULL);
 
return sel;
 }
 
+static void si_update_streamout_state(struct si_context *sctx)
+{
+   struct si_shader_selector *shader_with_so =
+   sctx->gs_shader.cso ? sctx->gs_shader.cso :
+   sctx->tes_shader.cso ? sctx->tes_shader.cso :
+  sctx->vs_shader.cso;
+   if (!shader_with_so)
+   return;
+
+   sctx->b.streamout.enabled_stream_buffers_mask =
+   shader_with_so->enabled_streamout_buffer_mask;
+   sctx->b.streamout.stride_in_dw = shader_with_so->so.stride;
+}
+
 static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
 {
struct si_context *sctx = (struct si_context *)ctx;
struct si_shader_selector *sel = state;
 
if (sctx->vs_shader.cso == sel)
return;
 
sctx->vs_shader.cso = sel;
sctx->vs_shader.current = sel ? sel->first_variant : NULL;
sctx->do_update_shaders = true;
si_mark_atom_dirty(sctx, >clip_regs);
r600_update_vs_writes_viewport_index(>b, si_get_vs_info(sctx));
si_set_active_descriptors_for_shader(sctx, sel);
+   si_update_streamout_state(sctx);
 }
 
 static void si_update_tess_uses_prim_id(struct si_context *sctx)
 {
sctx->ia_multi_vgt_param_key.u.tess_uses_prim_id =
(sctx->tes_shader.cso &&
 sctx->tes_shader.cso->info.uses_primid) ||
(sctx->tcs_shader.cso &&
 sctx->tcs_shader.cso->info.uses_primid) ||
(sctx->gs_shader.cso &&
@@ -2182,20 +2204,21 @@ static void si_bind_gs_shader(struct pipe_context *ctx, 
void *state)
si_mark_atom_dirty(sctx, >clip_regs);
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
 
if (enable_changed) {
si_shader_change_notify(sctx);
if 

[Mesa-dev] [PATCH 02/11] radeonsi: drop unfinished shader compilations when destroying shaders

[Marek Olšák]

From: Marek Olšák 

If we enqueue too many jobs and destroy the GL context, it may take
several seconds before the jobs finish. Just drop them instead.
---
 src/gallium/drivers/radeonsi/si_compute.c   | 3 ++-
 src/gallium/drivers/radeonsi/si_state_shaders.c | 5 +++--
 src/util/u_queue.c  | 5 -
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
b/src/gallium/drivers/radeonsi/si_compute.c
index 4c98066..0338b8a 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -853,21 +853,22 @@ static void si_launch_grid(
 
 static void si_delete_compute_state(struct pipe_context *ctx, void* state){
struct si_compute *program = (struct si_compute *)state;
struct si_context *sctx = (struct si_context*)ctx;
 
if (!state) {
return;
}
 
if (program->ir_type == PIPE_SHADER_IR_TGSI) {
-   util_queue_fence_wait(>ready);
+   util_queue_drop_job(>screen->shader_compiler_queue,
+   >ready);
util_queue_fence_destroy(>ready);
}
 
if (program == sctx->cs_shader_state.program)
sctx->cs_shader_state.program = NULL;
 
if (program == sctx->cs_shader_state.emitted_program)
sctx->cs_shader_state.emitted_program = NULL;
 
si_shader_destroy(>shader);
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 8ac4309..62bb221 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2251,21 +2251,22 @@ static void si_bind_ps_shader(struct pipe_context *ctx, 
void *state)
sctx->do_update_shaders = true;
if (sel && sctx->ia_multi_vgt_param_key.u.uses_tess)
si_update_tess_uses_prim_id(sctx);
si_mark_atom_dirty(sctx, >cb_render_state);
si_set_active_descriptors_for_shader(sctx, sel);
 }
 
 static void si_delete_shader(struct si_context *sctx, struct si_shader *shader)
 {
if (shader->is_optimized) {
-   util_queue_fence_wait(>optimized_ready);
+   util_queue_drop_job(>screen->shader_compiler_queue,
+   >optimized_ready);
util_queue_fence_destroy(>optimized_ready);
}
 
if (shader->pm4) {
switch (shader->selector->type) {
case PIPE_SHADER_VERTEX:
if (shader->key.as_ls) {
assert(sctx->b.chip_class <= VI);
si_pm4_delete_state(sctx, ls, shader->pm4);
} else if (shader->key.as_es) {
@@ -2308,21 +2309,21 @@ static void si_destroy_shader_selector(struct 
si_context *sctx,
 {
struct si_shader *p = sel->first_variant, *c;
struct si_shader_ctx_state *current_shader[SI_NUM_SHADERS] = {
[PIPE_SHADER_VERTEX] = >vs_shader,
[PIPE_SHADER_TESS_CTRL] = >tcs_shader,
[PIPE_SHADER_TESS_EVAL] = >tes_shader,
[PIPE_SHADER_GEOMETRY] = >gs_shader,
[PIPE_SHADER_FRAGMENT] = >ps_shader,
};
 
-   util_queue_fence_wait(>ready);
+   util_queue_drop_job(>screen->shader_compiler_queue, >ready);
 
if (current_shader[sel->type]->cso == sel) {
current_shader[sel->type]->cso = NULL;
current_shader[sel->type]->current = NULL;
}
 
while (p) {
c = p->next_variant;
si_delete_shader(sctx, p);
p = c;
diff --git a/src/util/u_queue.c b/src/util/u_queue.c
index 3834b6f..99de34c 100644
--- a/src/util/u_queue.c
+++ b/src/util/u_queue.c
@@ -346,21 +346,24 @@ util_queue_drop_job(struct util_queue *queue, struct 
util_queue_fence *fence)
 {
bool removed = false;
 
if (util_queue_fence_is_signalled(fence))
   return;
 
mtx_lock(>lock);
for (unsigned i = queue->read_idx; i != queue->write_idx;
 i = (i + 1) % queue->max_jobs) {
   if (queue->jobs[i].fence == fence) {
- /* Just clear it. The threads will drop it. */
+ if (queue->jobs[i].cleanup)
+queue->jobs[i].cleanup(queue->jobs[i].job, -1);
+
+ /* Just clear it. The threads will treat as a no-op job. */
  memset(>jobs[i], 0, sizeof(queue->jobs[i]));
  removed = true;
  break;
   }
}
mtx_unlock(>lock);
 
if (removed)
   util_queue_fence_signal(fence);
else
-- 
2.7.4

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[Mesa-dev] [PATCH 06/11] radeonsi: move handling of DBG_NO_OPT_VARIANT into si_shader_selector_key

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 5a22add..55e881c 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1431,20 +1431,23 @@ static inline void si_shader_selector_key(struct 
pipe_context *ctx,
sel->info.uses_linear_sample > 1;
}
}
 
key->part.ps.epilog.alpha_func = si_get_alpha_test_func(sctx);
break;
}
default:
assert(0);
}
+
+   if (unlikely(sctx->screen->b.debug_flags & DBG_NO_OPT_VARIANT))
+   memset(>opt, 0, sizeof(key->opt));
 }
 
 static void si_build_shader_variant(void *job, int thread_index)
 {
struct si_shader *shader = (struct si_shader *)job;
struct si_shader_selector *sel = shader->selector;
struct si_screen *sscreen = sel->screen;
LLVMTargetMachineRef tm;
struct pipe_debug_callback *debug = >compiler_ctx_state.debug;
int r;
@@ -1526,24 +1529,20 @@ static int si_shader_select_with_key(struct si_screen 
*sscreen,
 struct si_shader_ctx_state *state,
 struct si_compiler_ctx_state 
*compiler_state,
 struct si_shader_key *key,
 int thread_index)
 {
struct si_shader_selector *sel = state->cso;
struct si_shader_selector *previous_stage_sel = NULL;
struct si_shader *current = state->current;
struct si_shader *iter, *shader = NULL;
 
-   if (unlikely(sscreen->b.debug_flags & DBG_NO_OPT_VARIANT)) {
-   memset(>opt, 0, sizeof(key->opt));
-   }
-
 again:
/* Check if we don't need to change anything.
 * This path is also used for most shaders that don't need multiple
 * variants, it will cost just a computation of the key and this
 * test. */
if (likely(current &&
   memcmp(>key, key, sizeof(*key)) == 0 &&
   (!current->is_optimized ||
util_queue_fence_is_signalled(>optimized_ready
return current->compilation_failed ? -1 : 0;
-- 
2.7.4

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[Mesa-dev] [PATCH 04/11] util/u_queue: add an option to set the minimum thread priority

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/auxiliary/util/u_threaded_context.c   |  2 +-
 src/gallium/drivers/freedreno/freedreno_batch.c   |  2 +-
 src/gallium/drivers/radeonsi/si_pipe.c|  2 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c |  2 +-
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c |  2 +-
 src/util/disk_cache.c |  2 +-
 src/util/u_queue.c| 19 ++-
 src/util/u_queue.h|  6 +-
 8 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index 71211e6..554cc88 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -2194,21 +2194,21 @@ threaded_context_create(struct pipe_context *pipe,
else
   tc->base.const_uploader = u_upload_clone(>base, 
pipe->const_uploader);
 
if (!tc->base.stream_uploader || !tc->base.const_uploader)
   goto fail;
 
/* The queue size is the number of batches "waiting". Batches are removed
 * from the queue before being executed, so keep one tc_batch slot for that
 * execution. Also, keep one unused slot for an unflushed batch.
 */
-   if (!util_queue_init(>queue, "gallium_drv", TC_MAX_BATCHES - 2, 1))
+   if (!util_queue_init(>queue, "gallium_drv", TC_MAX_BATCHES - 2, 1, 0))
   goto fail;
 
for (unsigned i = 0; i < TC_MAX_BATCHES; i++) {
   tc->batch_slots[i].sentinel = TC_SENTINEL;
   tc->batch_slots[i].pipe = pipe;
   util_queue_fence_init(>batch_slots[i].fence);
}
 
LIST_INITHEAD(>unflushed_queries);
 
diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c 
b/src/gallium/drivers/freedreno/freedreno_batch.c
index 5783ee8..33b6240 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch.c
@@ -265,21 +265,21 @@ batch_flush(struct fd_batch *batch)
fd_batch_set_stage(batch, FD_STAGE_NULL);
 
fd_context_all_dirty(batch->ctx);
batch_flush_reset_dependencies(batch, true);
 
if (batch->ctx->screen->reorder) {
struct fd_batch *tmp = NULL;
fd_batch_reference(, batch);
 
if (!util_queue_is_initialized(>ctx->flush_queue))
-   util_queue_init(>ctx->flush_queue, 
"flush_queue", 16, 1);
+   util_queue_init(>ctx->flush_queue, 
"flush_queue", 16, 1, 0);
 
util_queue_add_job(>ctx->flush_queue,
batch, >flush_fence,
batch_flush_func, batch_cleanup_func);
} else {
fd_gmem_render_tiles(batch);
batch_reset_resources(batch);
}
 
debug_assert(batch->reference.count > 0);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 4704304..8bf6fd9 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -882,21 +882,21 @@ struct pipe_screen *radeonsi_screen_create(struct 
radeon_winsys *ws)
}
 
/* Only enable as many threads as we have target machines, but at most
 * the number of CPUs - 1 if there is more than one.
 */
num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
num_cpus = MAX2(1, num_cpus - 1);
num_compiler_threads = MIN2(num_cpus, ARRAY_SIZE(sscreen->tm));
 
if (!util_queue_init(>shader_compiler_queue, "si_shader",
-32, num_compiler_threads)) {
+32, num_compiler_threads, 0)) {
si_destroy_shader_cache(sscreen);
FREE(sscreen);
return NULL;
}
 
si_handle_env_var_force_family(sscreen);
 
if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false))
si_init_perfcounters(sscreen);
 
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c 
b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index c8bd60e..43f2ed2 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -298,21 +298,21 @@ amdgpu_winsys_create(int fd, radeon_screen_create_t 
screen_create)
ws->base.read_registers = amdgpu_read_registers;
 
amdgpu_bo_init_functions(ws);
amdgpu_cs_init_functions(ws);
amdgpu_surface_init_functions(ws);
 
LIST_INITHEAD(>global_bo_list);
(void) mtx_init(>global_bo_list_lock, mtx_plain);
(void) mtx_init(>bo_fence_lock, mtx_plain);
 
-   if (!util_queue_init(>cs_queue, "amdgpu_cs", 8, 1)) {
+   if (!util_queue_init(>cs_queue, "amdgpu_cs", 8, 1, 0)) {
   amdgpu_winsys_destroy(>base);
   mtx_unlock(_tab_mutex);
   return NULL;
}
 
/* Create the screen at the end. The winsys must be initialized
 * completely.
 *
 * Alternatively, we 

[Mesa-dev] [PATCH 01/11] util/u_queue: add a way to remove a job when we just want to destroy it

[Marek Olšák]

From: Marek Olšák 

---
 src/util/u_queue.c | 50 --
 src/util/u_queue.h |  2 ++
 2 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/src/util/u_queue.c b/src/util/u_queue.c
index 8db09b0..3834b6f 100644
--- a/src/util/u_queue.c
+++ b/src/util/u_queue.c
@@ -173,27 +173,29 @@ util_queue_thread_func(void *input)
   if (job.job) {
  job.execute(job.job, thread_index);
  util_queue_fence_signal(job.fence);
  if (job.cleanup)
 job.cleanup(job.job, thread_index);
   }
}
 
/* signal remaining jobs before terminating */
mtx_lock(>lock);
-   while (queue->jobs[queue->read_idx].job) {
-  util_queue_fence_signal(queue->jobs[queue->read_idx].fence);
-
-  queue->jobs[queue->read_idx].job = NULL;
-  queue->read_idx = (queue->read_idx + 1) % queue->max_jobs;
+   for (unsigned i = queue->read_idx; i != queue->write_idx;
+i = (i + 1) % queue->max_jobs) {
+  if (queue->jobs[i].job) {
+ util_queue_fence_signal(queue->jobs[i].fence);
+ queue->jobs[i].job = NULL;
+  }
}
-   queue->num_queued = 0; /* reset this when exiting the thread */
+   queue->read_idx = (queue->read_idx + queue->num_queued) % queue->max_jobs;
+   queue->num_queued = 0;
mtx_unlock(>lock);
return 0;
 }
 
 bool
 util_queue_init(struct util_queue *queue,
 const char *name,
 unsigned max_jobs,
 unsigned num_threads)
 {
@@ -322,19 +324,55 @@ util_queue_add_job(struct util_queue *queue,
ptr->fence = fence;
ptr->execute = execute;
ptr->cleanup = cleanup;
queue->write_idx = (queue->write_idx + 1) % queue->max_jobs;
 
queue->num_queued++;
cnd_signal(>has_queued_cond);
mtx_unlock(>lock);
 }
 
+/**
+ * Remove a queued job. If the job hasn't started execution, it's removed from
+ * the queue. If the job has started execution, the function waits for it to
+ * complete.
+ *
+ * In all cases, the fence is signalled when the function returns.
+ *
+ * The function can be used when destroying an object associated with the job
+ * when you don't care about the job completion state.
+ */
+void
+util_queue_drop_job(struct util_queue *queue, struct util_queue_fence *fence)
+{
+   bool removed = false;
+
+   if (util_queue_fence_is_signalled(fence))
+  return;
+
+   mtx_lock(>lock);
+   for (unsigned i = queue->read_idx; i != queue->write_idx;
+i = (i + 1) % queue->max_jobs) {
+  if (queue->jobs[i].fence == fence) {
+ /* Just clear it. The threads will drop it. */
+ memset(>jobs[i], 0, sizeof(queue->jobs[i]));
+ removed = true;
+ break;
+  }
+   }
+   mtx_unlock(>lock);
+
+   if (removed)
+  util_queue_fence_signal(fence);
+   else
+  util_queue_fence_wait(fence);
+}
+
 int64_t
 util_queue_get_thread_time_nano(struct util_queue *queue, unsigned 
thread_index)
 {
/* Allow some flexibility by not raising an error. */
if (thread_index >= queue->num_threads)
   return 0;
 
return u_thread_get_time_nano(queue->threads[thread_index]);
 }
diff --git a/src/util/u_queue.h b/src/util/u_queue.h
index 4aec1f2..9876865 100644
--- a/src/util/u_queue.h
+++ b/src/util/u_queue.h
@@ -85,20 +85,22 @@ bool util_queue_init(struct util_queue *queue,
 void util_queue_destroy(struct util_queue *queue);
 void util_queue_fence_init(struct util_queue_fence *fence);
 void util_queue_fence_destroy(struct util_queue_fence *fence);
 
 /* optional cleanup callback is called after fence is signaled: */
 void util_queue_add_job(struct util_queue *queue,
 void *job,
 struct util_queue_fence *fence,
 util_queue_execute_func execute,
 util_queue_execute_func cleanup);
+void util_queue_drop_job(struct util_queue *queue,
+ struct util_queue_fence *fence);
 
 void util_queue_fence_wait(struct util_queue_fence *fence);
 int64_t util_queue_get_thread_time_nano(struct util_queue *queue,
 unsigned thread_index);
 
 /* util_queue needs to be cleared to zeroes for this to work */
 static inline bool
 util_queue_is_initialized(struct util_queue *queue)
 {
return queue->threads != NULL;
-- 
2.7.4

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[Mesa-dev] [PATCH 00/11] RadeonSI: Shader compiler queue improvements & GFX9 fixes

[Marek Olšák]

Hi,

The beginning of this series improves our shader compiler queues,
mainly the optimized compilations now run at the lowest thread
priority so as not to affect rendering performance.

It's followed by cleanups, and then fixes for GFX9.

Please review.

Thanks,
Marek
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[Mesa-dev] [PATCH 03/11] radeonsi: decrease the number of compiler threads to num CPUs - 1

[Marek Olšák]

From: Marek Olšák 

Reserve one core for other things (like draw calls).
---
 src/gallium/drivers/radeonsi/si_pipe.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index de4e5da..4704304 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -874,22 +874,25 @@ struct pipe_screen *radeonsi_screen_create(struct 
radeon_winsys *ws)
 
si_init_screen_state_functions(sscreen);
 
if (!r600_common_screen_init(>b, ws) ||
!si_init_gs_info(sscreen) ||
!si_init_shader_cache(sscreen)) {
FREE(sscreen);
return NULL;
}
 
-   /* Only enable as many threads as we have target machines and CPUs. */
+   /* Only enable as many threads as we have target machines, but at most
+* the number of CPUs - 1 if there is more than one.
+*/
num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
+   num_cpus = MAX2(1, num_cpus - 1);
num_compiler_threads = MIN2(num_cpus, ARRAY_SIZE(sscreen->tm));
 
if (!util_queue_init(>shader_compiler_queue, "si_shader",
 32, num_compiler_threads)) {
si_destroy_shader_cache(sscreen);
FREE(sscreen);
return NULL;
}
 
si_handle_env_var_force_family(sscreen);
-- 
2.7.4

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[Mesa-dev] [PATCH 05/11] radeonsi: use a compiler queue with a low priority for optimized shaders

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_pipe.c  | 31 +
 src/gallium/drivers/radeonsi/si_pipe.h  |  3 +++
 src/gallium/drivers/radeonsi/si_state_shaders.c |  8 +++
 3 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 8bf6fd9..082ba99 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -734,25 +734,30 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
sscreen->gs_prologs,
sscreen->ps_prologs,
sscreen->ps_epilogs
};
unsigned i;
 
if (!sscreen->b.ws->unref(sscreen->b.ws))
return;
 
util_queue_destroy(>shader_compiler_queue);
+   util_queue_destroy(>shader_compiler_queue_low_priority);
 
for (i = 0; i < ARRAY_SIZE(sscreen->tm); i++)
if (sscreen->tm[i])
LLVMDisposeTargetMachine(sscreen->tm[i]);
 
+   for (i = 0; i < ARRAY_SIZE(sscreen->tm_low_priority); i++)
+   if (sscreen->tm_low_priority[i])
+   LLVMDisposeTargetMachine(sscreen->tm_low_priority[i]);
+
/* Free shader parts. */
for (i = 0; i < ARRAY_SIZE(parts); i++) {
while (parts[i]) {
struct si_shader_part *part = parts[i];
 
parts[i] = part->next;
radeon_shader_binary_clean(>binary);
FREE(part);
}
}
@@ -852,21 +857,21 @@ static void si_test_vmfault(struct si_screen *sscreen)
if (sscreen->b.debug_flags & DBG_TEST_VMFAULT_SHADER) {
util_test_constant_buffer(ctx, buf);
puts("VM fault test: Shader - done.");
}
exit(0);
 }
 
 struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 {
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
-   unsigned num_cpus, num_compiler_threads, i;
+   unsigned num_threads, num_compiler_threads, 
num_compiler_threads_lowprio, i;
 
if (!sscreen) {
return NULL;
}
 
/* Set functions first. */
sscreen->b.b.context_create = si_pipe_create_context;
sscreen->b.b.destroy = si_destroy_screen;
sscreen->b.b.get_param = si_get_param;
sscreen->b.b.get_shader_param = si_get_shader_param;
@@ -877,31 +882,47 @@ struct pipe_screen *radeonsi_screen_create(struct 
radeon_winsys *ws)
if (!r600_common_screen_init(>b, ws) ||
!si_init_gs_info(sscreen) ||
!si_init_shader_cache(sscreen)) {
FREE(sscreen);
return NULL;
}
 
/* Only enable as many threads as we have target machines, but at most
 * the number of CPUs - 1 if there is more than one.
 */
-   num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
-   num_cpus = MAX2(1, num_cpus - 1);
-   num_compiler_threads = MIN2(num_cpus, ARRAY_SIZE(sscreen->tm));
+   num_threads = sysconf(_SC_NPROCESSORS_ONLN);
+   num_threads = MAX2(1, num_threads - 1);
+   num_compiler_threads = MIN2(num_threads, ARRAY_SIZE(sscreen->tm));
+   num_compiler_threads_lowprio =
+   MIN2(num_threads, ARRAY_SIZE(sscreen->tm_low_priority));
 
if (!util_queue_init(>shader_compiler_queue, "si_shader",
 32, num_compiler_threads, 0)) {
si_destroy_shader_cache(sscreen);
FREE(sscreen);
return NULL;
}
 
+   /* The queue must be large enough so that adding optimized shaders
+* doesn't stall draw calls when the queue is full. Especially varying
+* packing generates a very high volume of optimized shader compilation
+* jobs.
+*/
+   if (!util_queue_init(>shader_compiler_queue_low_priority,
+"si_shader_low",
+1024, num_compiler_threads,
+UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY)) {
+  si_destroy_shader_cache(sscreen);
+  FREE(sscreen);
+  return NULL;
+   }
+
si_handle_env_var_force_family(sscreen);
 
if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false))
si_init_perfcounters(sscreen);
 
/* Hawaii has a bug with offchip buffers > 256 that can be worked
 * around by setting 4K granularity.
 */
sscreen->tess_offchip_block_dw_size =
sscreen->b.family == CHIP_HAWAII ? 4096 : 8192;
@@ -951,20 +972,22 @@ struct pipe_screen *radeonsi_screen_create(struct 
radeon_winsys *ws)
sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 |
SI_CONTEXT_INV_VMEM_L1 |

[Mesa-dev] [PATCH 1/2] gallium/u_threaded: align batches and call slots to 16 bytes

[Marek Olšák]

From: Marek Olšák 

not sure if this helps
---
 src/gallium/auxiliary/util/u_threaded_context.c | 11 +--
 src/gallium/auxiliary/util/u_threaded_context.h |  9 -
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index 8ea7f8a..34206bf 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -2118,21 +2118,21 @@ tc_destroy(struct pipe_context *_pipe)
 
if (tc->base.const_uploader &&
tc->base.stream_uploader != tc->base.const_uploader)
   u_upload_destroy(tc->base.const_uploader);
 
if (tc->base.stream_uploader)
   u_upload_destroy(tc->base.stream_uploader);
 
slab_destroy_child(>pool_transfers);
pipe->destroy(pipe);
-   FREE(tc);
+   os_free_aligned(tc);
 }
 
 static const tc_execute execute_func[TC_NUM_CALLS] = {
 #define CALL(name) tc_call_##name,
 #include "u_threaded_context_calls.h"
 #undef CALL
 };
 
 /**
  * Wrap an existing pipe_context into a threaded_context.
@@ -2158,25 +2158,32 @@ threaded_context_create(struct pipe_context *pipe,
STATIC_ASSERT(sizeof(struct tc_call) <= 16);
 
if (!pipe)
   return NULL;
 
util_cpu_detect();
 
if (!debug_get_bool_option("GALLIUM_THREAD", util_cpu_caps.nr_cpus > 1))
   return pipe;
 
-   tc = CALLOC_STRUCT(threaded_context);
+   tc = os_malloc_aligned(sizeof(struct threaded_context), 16);
if (!tc) {
   pipe->destroy(pipe);
   return NULL;
}
+   memset(tc, 0, sizeof(*tc));
+
+   assert((uintptr_t)tc % 16 == 0);
+   STATIC_ASSERT(offsetof(struct threaded_context, batch_slots[0]) % 16 == 0);
+   STATIC_ASSERT(offsetof(struct threaded_context, batch_slots[0].call[0]) % 
16 == 0);
+   STATIC_ASSERT(offsetof(struct threaded_context, batch_slots[0].call[1]) % 
16 == 0);
+   STATIC_ASSERT(offsetof(struct threaded_context, batch_slots[1].call[0]) % 
16 == 0);
 
/* The driver context isn't wrapped, so set its "priv" to NULL. */
pipe->priv = NULL;
 
tc->pipe = pipe;
tc->replace_buffer_storage = replace_buffer;
tc->map_buffer_alignment =
   pipe->screen->get_param(pipe->screen, PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT);
tc->base.priv = pipe; /* priv points to the wrapped driver context */
tc->base.screen = pipe->screen;
diff --git a/src/gallium/auxiliary/util/u_threaded_context.h 
b/src/gallium/auxiliary/util/u_threaded_context.h
index f139230..5d2a10c 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.h
+++ b/src/gallium/auxiliary/util/u_threaded_context.h
@@ -266,21 +266,28 @@ struct threaded_query {
  * Most calls will typecast this to the type they need, typically larger
  * than 8 bytes.
  */
 union tc_payload {
struct pipe_query *query;
struct pipe_resource *resource;
struct pipe_transfer *transfer;
uint64_t __use_8_bytes;
 };
 
-struct tc_call {
+#ifdef _MSC_VER
+#define ALIGN16 __declspec(align(16))
+#else
+#define ALIGN16 __attribute__((aligned(16)))
+#endif
+
+/* Each call slot should be aligned to its own size for optimal cache usage. */
+struct ALIGN16 tc_call {
unsigned sentinel;
ushort num_call_slots;
ushort call_id;
union tc_payload payload;
 };
 
 struct tc_batch {
struct pipe_context *pipe;
unsigned sentinel;
unsigned num_total_call_slots;
-- 
2.7.4

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[Mesa-dev] [PATCH] tgsi/scan: fix scanning fragment shaders with PrimID and Position/Face

[Marek Olšák]

From: Marek Olšák 

Not relevant to radeonsi, because Position/Face are system values
with radeonsi, while this codepath is for drivers where Position and
Face are ordinary inputs.
---
 src/gallium/auxiliary/tgsi/tgsi_scan.c | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c 
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 847f4fc..018ca4b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -550,27 +550,30 @@ scan_declaration(struct tgsi_shader_info *info,
   case TGSI_FILE_INPUT:
  info->input_semantic_name[reg] = (ubyte) semName;
  info->input_semantic_index[reg] = (ubyte) semIndex;
  info->input_interpolate[reg] = (ubyte)fulldecl->Interp.Interpolate;
  info->input_interpolate_loc[reg] = (ubyte)fulldecl->Interp.Location;
  info->input_cylindrical_wrap[reg] = 
(ubyte)fulldecl->Interp.CylindricalWrap;
 
  /* Vertex shaders can have inputs with holes between them. */
  info->num_inputs = MAX2(info->num_inputs, reg + 1);
 
- if (semName == TGSI_SEMANTIC_PRIMID)
-info->uses_primid = TRUE;
- else if (procType == PIPE_SHADER_FRAGMENT) {
-if (semName == TGSI_SEMANTIC_POSITION)
-   info->reads_position = TRUE;
-else if (semName == TGSI_SEMANTIC_FACE)
-   info->uses_frontface = TRUE;
+ switch (semName) {
+ case TGSI_SEMANTIC_PRIMID:
+info->uses_primid = true;
+break;
+ case TGSI_SEMANTIC_POSITION:
+info->reads_position = true;
+break;
+ case TGSI_SEMANTIC_FACE:
+info->uses_frontface = true;
+break;
  }
  break;
 
   case TGSI_FILE_SYSTEM_VALUE:
  index = fulldecl->Range.First;
 
  info->system_value_semantic_name[index] = semName;
  info->num_system_values = MAX2(info->num_system_values, index + 1);
 
  switch (semName) {
-- 
2.7.4

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[Mesa-dev] [PATCH 2/2] gallium/u_threaded: remove 16 bytes from tc_batch

[Marek Olšák]

From: Marek Olšák 

All other sentinels occupy what is otherwise unused space.
---
 src/gallium/auxiliary/util/u_threaded_context.c | 2 --
 src/gallium/auxiliary/util/u_threaded_context.h | 1 -
 2 files changed, 3 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index 34206bf..71211e6 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -60,21 +60,20 @@ enum tc_call_id {
 };
 
 typedef void (*tc_execute)(struct pipe_context *pipe, union tc_payload 
*payload);
 
 static const tc_execute execute_func[TC_NUM_CALLS];
 
 static void
 tc_batch_check(struct tc_batch *batch)
 {
tc_assert(batch->sentinel == TC_SENTINEL);
-   tc_assert(batch->sentinel2 == TC_SENTINEL);
tc_assert(batch->num_total_call_slots <= TC_CALLS_PER_BATCH);
 }
 
 static void
 tc_debug_check(struct threaded_context *tc)
 {
for (unsigned i = 0; i < TC_MAX_BATCHES; i++) {
   tc_batch_check(>batch_slots[i]);
   tc_assert(tc->batch_slots[i].pipe == tc->pipe);
}
@@ -2200,21 +2199,20 @@ threaded_context_create(struct pipe_context *pipe,
 
/* The queue size is the number of batches "waiting". Batches are removed
 * from the queue before being executed, so keep one tc_batch slot for that
 * execution. Also, keep one unused slot for an unflushed batch.
 */
if (!util_queue_init(>queue, "gallium_drv", TC_MAX_BATCHES - 2, 1))
   goto fail;
 
for (unsigned i = 0; i < TC_MAX_BATCHES; i++) {
   tc->batch_slots[i].sentinel = TC_SENTINEL;
-  tc->batch_slots[i].sentinel2 = TC_SENTINEL;
   tc->batch_slots[i].pipe = pipe;
   util_queue_fence_init(>batch_slots[i].fence);
}
 
LIST_INITHEAD(>unflushed_queries);
 
slab_create_child(>pool_transfers, parent_transfer_pool);
 
 #define CTX_INIT(_member) \
tc->base._member = tc->pipe->_member ? tc_##_member : NULL
diff --git a/src/gallium/auxiliary/util/u_threaded_context.h 
b/src/gallium/auxiliary/util/u_threaded_context.h
index 5d2a10c..2e7e301 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.h
+++ b/src/gallium/auxiliary/util/u_threaded_context.h
@@ -286,21 +286,20 @@ struct ALIGN16 tc_call {
ushort call_id;
union tc_payload payload;
 };
 
 struct tc_batch {
struct pipe_context *pipe;
unsigned sentinel;
unsigned num_total_call_slots;
struct util_queue_fence fence;
struct tc_call call[TC_CALLS_PER_BATCH];
-   unsigned sentinel2;
 };
 
 struct threaded_context {
struct pipe_context base;
struct pipe_context *pipe;
struct slab_child_pool pool_transfers;
tc_replace_buffer_storage_func replace_buffer_storage;
unsigned map_buffer_alignment;
 
struct list_head unflushed_queries;
-- 
2.7.4

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[Mesa-dev] [PATCH] st/mesa: don't load cached TGSI shaders on demand

[Marek Olšák]

From: Marek Olšák 

This fixes a performance issue with the shader cache that delayed Gallium
shader create calls until draw calls.

I'd like this in stable, but it's not a showstopper.

Cc: 17.1 
---
 src/mesa/state_tracker/st_shader_cache.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mesa/state_tracker/st_shader_cache.c 
b/src/mesa/state_tracker/st_shader_cache.c
index 31c3430..305435f 100644
--- a/src/mesa/state_tracker/st_shader_cache.c
+++ b/src/mesa/state_tracker/st_shader_cache.c
@@ -15,21 +15,21 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
 
 #include 
-
+#include "st_debug.h"
 #include "st_program.h"
 #include "st_shader_cache.h"
 #include "compiler/glsl/program.h"
 #include "pipe/p_shader_tokens.h"
 #include "program/ir_to_mesa.h"
 #include "util/u_memory.h"
 
 static void
 write_stream_out_to_cache(struct blob *blob,
   struct pipe_shader_state *tgsi)
@@ -360,20 +360,25 @@ st_load_tgsi_from_disk_cache(struct gl_context *ctx,
  if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
 _mesa_sha1_format(sha1_buf, sha1);
 fprintf(stderr, "%s tgsi_tokens retrieved from cache: %s\n",
 _mesa_shader_stage_to_string(i), sha1_buf);
  }
 
  st_set_prog_affected_state_flags(glprog);
  _mesa_associate_uniform_storage(ctx, prog, glprog->Parameters,
  false);
 
+ /* Create Gallium shaders now instead of on demand. */
+ if (ST_DEBUG & DEBUG_PRECOMPILE ||
+ st->shader_has_one_variant[glprog->info.stage])
+st_precompile_shader_variant(st, glprog);
+
  free(buffer);
   } else {
  /* Failed to find a matching cached shader so fallback to recompile.
   */
  if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
 fprintf(stderr, "TGSI cache item not found.\n");
  }
 
  goto fallback_recompile;
   }
-- 
2.7.4

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Re: [Mesa-dev] [PATCH] automake: Link all libGL.so variants with -Bsymbolic.

[Emil Velikov]

On 1 June 2017 at 16:46, Jose Fonseca  wrote:
> We were linking src/glx with -Bsymbolic, but not the classic/gallium X11
> libGL.so.
>
> But it's always a good idea to build all libGL.so and all DRI drivers
> with -Bsymbolic, otherwise they might resolve symbols from the 3rd party
> application executable or shared libraries, which is _never_ what we
> want.
>
> In particular, this can happen when intercepting OpenGL calls with
> apitrace, before
> https://github.com/apitrace/apitrace/commit/63194b2573176ef34efce1a5c8b08e624b8dddf5
>
> Cc: mesa-sta...@lists.freedesktop.org
Yes please
Reviewed-by: Emil Velikov 

FWIW there was some concerns -Bsymbolic and --dynamic-list
interactions for gallium drivers.
But that's orthogonal to this particular patch.

-Emil
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Re: [Mesa-dev] [PATCH V2] i965: Rename brw_format variable names to isl_format

[Jason Ekstrand]

On Thu, Jun 1, 2017 at 9:41 AM, Anuj Phogat  wrote:

> On Tue, May 23, 2017 at 2:35 PM, Anuj Phogat 
> wrote:
> > This patch makes non functional changes. Renaming is just to
> > make the code more readable.
> >
> > V2: update the types to "enum isl_format"
> Jason, do you have any other questions ? r-b ?
>

Patch 1/6 of the series Chad sent out yesterday also does this and a bit
more.  I don't think he saw yours.


> >
> > Signed-off-by: Anuj Phogat 
> > Cc: Jason Ekstrand 
> > ---
> >  src/mesa/drivers/dri/i965/brw_context.c  | 5 +++--
> >  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 +++---
> >  src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 5 +++--
> >  3 files changed, 9 insertions(+), 7 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_context.c
> b/src/mesa/drivers/dri/i965/brw_context.c
> > index d3ed871..cb6a76a 100644
> > --- a/src/mesa/drivers/dri/i965/brw_context.c
> > +++ b/src/mesa/drivers/dri/i965/brw_context.c
> > @@ -205,9 +205,10 @@ intel_texture_view_requires_resolve(struct
> brw_context *brw,
> > !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
> >   return false;
> >
> > -   const uint32_t brw_format = brw_isl_format_for_mesa_
> format(intel_tex->_Format);
> > +   const enum isl_format isl_format =
> > +  brw_isl_format_for_mesa_format(intel_tex->_Format);
> >
> > -   if (isl_format_supports_ccs_e(>screen->devinfo, brw_format))
> > +   if (isl_format_supports_ccs_e(>screen->devinfo, isl_format))
> >return false;
> >
> > perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
> > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > index a0fed60..05e41dc 100644
> > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > @@ -686,7 +686,7 @@ brw_update_buffer_texture_surface(struct gl_context
> *ctx,
> > uint32_t size = tObj->BufferSize;
> > struct brw_bo *bo = NULL;
> > mesa_format format = tObj->_BufferObjectFormat;
> > -   uint32_t brw_format = brw_isl_format_for_mesa_format(format);
> > +   const enum isl_format isl_format = brw_isl_format_for_mesa_
> format(format);
> > int texel_size = _mesa_get_format_bytes(format);
> >
> > if (intel_obj) {
> > @@ -712,14 +712,14 @@ brw_update_buffer_texture_surface(struct
> gl_context *ctx,
> >  */
> > size = MIN2(size, ctx->Const.MaxTextureBufferSize * (unsigned)
> texel_size);
> >
> > -   if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
> > +   if (isl_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
> >_mesa_problem(NULL, "bad format %s for texture buffer\n",
> > _mesa_get_format_name(format));
> > }
> >
> > brw_emit_buffer_surface_state(brw, surf_offset, bo,
> >   tObj->BufferOffset,
> > - brw_format,
> > + isl_format,
> >   size,
> >   texel_size,
> >   false /* rw */);
> > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > index db0a397..a92e3cb 100644
> > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > @@ -209,8 +209,9 @@ intel_miptree_supports_non_msrt_fast_clear(struct
> brw_context *brw,
> >
> > if (brw->gen >= 9) {
> >mesa_format linear_format = _mesa_get_srgb_format_linear(
> mt->format);
> > -  const uint32_t brw_format = brw_isl_format_for_mesa_
> format(linear_format);
> > -  return isl_format_supports_ccs_e(>screen->devinfo,
> brw_format);
> > +  const enum isl_format isl_format =
> > + brw_isl_format_for_mesa_format(linear_format);
> > +  return isl_format_supports_ccs_e(>screen->devinfo,
> isl_format);
> > } else
> >return true;
> >  }
> > --
> > 2.9.3
> >
>
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Re: [Mesa-dev] [PATCH V2] i965: Rename brw_format variable names to isl_format

[Anuj Phogat]

On Tue, May 23, 2017 at 2:35 PM, Anuj Phogat  wrote:
> This patch makes non functional changes. Renaming is just to
> make the code more readable.
>
> V2: update the types to "enum isl_format"
Jason, do you have any other questions ? r-b ?
>
> Signed-off-by: Anuj Phogat 
> Cc: Jason Ekstrand 
> ---
>  src/mesa/drivers/dri/i965/brw_context.c  | 5 +++--
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 +++---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 5 +++--
>  3 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> b/src/mesa/drivers/dri/i965/brw_context.c
> index d3ed871..cb6a76a 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -205,9 +205,10 @@ intel_texture_view_requires_resolve(struct brw_context 
> *brw,
> !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
>   return false;
>
> -   const uint32_t brw_format = 
> brw_isl_format_for_mesa_format(intel_tex->_Format);
> +   const enum isl_format isl_format =
> +  brw_isl_format_for_mesa_format(intel_tex->_Format);
>
> -   if (isl_format_supports_ccs_e(>screen->devinfo, brw_format))
> +   if (isl_format_supports_ccs_e(>screen->devinfo, isl_format))
>return false;
>
> perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index a0fed60..05e41dc 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -686,7 +686,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
> uint32_t size = tObj->BufferSize;
> struct brw_bo *bo = NULL;
> mesa_format format = tObj->_BufferObjectFormat;
> -   uint32_t brw_format = brw_isl_format_for_mesa_format(format);
> +   const enum isl_format isl_format = brw_isl_format_for_mesa_format(format);
> int texel_size = _mesa_get_format_bytes(format);
>
> if (intel_obj) {
> @@ -712,14 +712,14 @@ brw_update_buffer_texture_surface(struct gl_context 
> *ctx,
>  */
> size = MIN2(size, ctx->Const.MaxTextureBufferSize * (unsigned) 
> texel_size);
>
> -   if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
> +   if (isl_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
>_mesa_problem(NULL, "bad format %s for texture buffer\n",
> _mesa_get_format_name(format));
> }
>
> brw_emit_buffer_surface_state(brw, surf_offset, bo,
>   tObj->BufferOffset,
> - brw_format,
> + isl_format,
>   size,
>   texel_size,
>   false /* rw */);
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index db0a397..a92e3cb 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -209,8 +209,9 @@ intel_miptree_supports_non_msrt_fast_clear(struct 
> brw_context *brw,
>
> if (brw->gen >= 9) {
>mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
> -  const uint32_t brw_format = 
> brw_isl_format_for_mesa_format(linear_format);
> -  return isl_format_supports_ccs_e(>screen->devinfo, brw_format);
> +  const enum isl_format isl_format =
> + brw_isl_format_for_mesa_format(linear_format);
> +  return isl_format_supports_ccs_e(>screen->devinfo, isl_format);
> } else
>return true;
>  }
> --
> 2.9.3
>
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[Mesa-dev] [Bug 101071] compiling glsl fails with undefined reference to `pthread_create'

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101071

--- Comment #10 from war...@o2.pl ---
Emil,
Unfortunately minimizing build options doesn't help me with successful
bisecting.
I'm always failing in the middle with following erorr:

//home/piotro/minimyth-dev/images/build/bin/bash ../../libtool  --tag=CC  
--mode=link x86_64-minimyth-linux-gnu-gcc -pthread -Werror=pointer-arith
-Werror=vla -fvisibility=hidden -ffat-lto-objects -pipe -flto -pipe
-march=x86-64 -mtune=generic -O3 -mfpmath=sse -flto -m64 -Wall -std=c99
-Werror=implicit-function-declaration -Werror=missing-prototypes
-fno-math-errno -fno-trapping-math  -no-undefined -Wl,--gc-sections
-Wl,--no-undefined -Wl,--as-needed -pipe -flto -pipe -march=x86-64
-mtune=generic -O3 -mfpmath=sse -flto -m64 -o shared-glapi/libglapi.la -rpath
/usr/lib shared_glapi_libglapi_la-entry.lo
shared_glapi_libglapi_la-mapi_glapi.lo shared_glapi_libglapi_la-stub.lo
shared_glapi_libglapi_la-table.lo shared_glapi_libglapi_la-u_current.lo
shared_glapi_libglapi_la-u_execmem.lo -lpthread
libtool: link: x86_64-minimyth-linux-gnu-gcc -shared  -fPIC -DPIC 
.libs/shared_glapi_libglapi_la-entry.o
.libs/shared_glapi_libglapi_la-mapi_glapi.o
.libs/shared_glapi_libglapi_la-stub.o .libs/shared_glapi_libglapi_la-table.o
.libs/shared_glapi_libglapi_la-u_current.o
.libs/shared_glapi_libglapi_la-u_execmem.o   -lpthread  -pthread -flto
-march=x86-64 -mtune=generic -O3 -mfpmath=sse -flto -m64 -Wl,--gc-sections
-Wl,--no-undefined -Wl,--as-needed -flto -march=x86-64 -mtune=generic -O3
-mfpmath=sse -flto -m64   -pthread -Wl,-soname -Wl,libglapi.so.0 -o
shared-glapi/.libs/libglapi.so.0.0.0
libtool: link: (cd "shared-glapi/.libs" && rm -f "libglapi.so.0" && ln -s
"libglapi.so.0.0.0" "libglapi.so.0")
libtool: link: (cd "shared-glapi/.libs" && rm -f "libglapi.so" && ln -s
"libglapi.so.0.0.0" "libglapi.so")
libtool: link: ( cd "shared-glapi/.libs" && rm -f "libglapi.la" && ln -s
"../libglapi.la" "libglapi.la" )
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p ../../lib; \
for f in shared-glapi/.libs/libglapi.so*; do \
if test -h .libs/$f; then   \
cp -d $f ../../lib; \
else\
ln -f $f ../../lib; \
fi; \
done && touch .install-mesa-links
make[6]: Leaving directory
`/home/piotro/minimyth-dev/script/xorg/Mesa/work/main.d/mesa-17.1.1/src/mapi'
make[5]: Leaving directory
`/home/piotro/minimyth-dev/script/xorg/Mesa/work/main.d/mesa-17.1.1/src/mapi'
make[4]: Leaving directory
`/home/piotro/minimyth-dev/script/xorg/Mesa/work/main.d/mesa-17.1.1/src/mapi'
Making all in compiler
make[4]: Entering directory
`/home/piotro/minimyth-dev/script/xorg/Mesa/work/main.d/mesa-17.1.1/src/compiler'
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl/glcpp
bison  -o glsl/glsl_parser.cpp -p "_mesa_glsl_" --defines=./glsl/glsl_parser.h
./glsl/glsl_parser.yy
flex  -o glsl/glsl_lexer.cpp ./glsl/glsl_lexer.ll
python  ./glsl/ir_expression_operation.py strings >
glsl/ir_expression_operation_strings.h || (rm -f
glsl/ir_expression_operation_strings.h; false)
python  ./glsl/ir_expression_operation.py enum > glsl/ir_expression_operation.h
|| (rm -f glsl/ir_expression_operation.h; false)
python  ./glsl/ir_expression_operation.py constant >
glsl/ir_expression_operation_constant.h || (rm -f
glsl/ir_expression_operation_constant.h; false)
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p glsl/glcpp
bison  -o glsl/glcpp/glcpp-parse.c -p "glcpp_parser_"
--defines=./glsl/glcpp/glcpp-parse.h ./glsl/glcpp/glcpp-parse.y
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p nir
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p nir
flex  -o glsl/glcpp/glcpp-lex.c ./glsl/glcpp/glcpp-lex.l
//home/piotro/minimyth-dev/images/build/usr/bin/mkdir -p nir
python  ./nir/nir_builder_opcodes_h.py > nir/nir_builder_opcodes.h || (rm -f
nir/nir_builder_opcodes.h; false)
python  ./nir/nir_constant_expressions.py > nir/nir_constant_expressions.c ||
(rm -f nir/nir_constant_expressions.c; false)
python  ./nir/nir_opcodes_c.py > nir/nir_opcodes.c || (rm -f nir/nir_opcodes.c;
false)
Traceback (most recent call last):
  File "./nir/nir_builder_opcodes_h.py", line 46, in 
from nir_opcodes import opcodes
  File
"/home/piotro/minimyth-dev/script/xorg/Mesa/work/main.d/mesa-17.1.1/src/compiler/nir/nir_opcodes.py",
line 178, in 
unop_convert("{}2{}{}".format(src_t[0], dst_t[0], bit_size),
ValueError: zero length field name in format
Traceback (most recent call last):
  File "./nir/nir_constant_expressions.py", line 405, in 
from nir_opcodes 

Re: [Mesa-dev] [PATCH 5/5] r100: Silence numerous unused this or that warnings

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák 

About your r100-r200 coding style question, I don't have a specific
answer. It's up to you what you wanna do with it.

Marek


On Wed, May 31, 2017 at 2:40 AM, Ian Romanick  wrote:
> From: Ian Romanick 
>
> radeon_fbo.c: In function ‘radeon_map_renderbuffer_s8z24’:
> radeon_fbo.c:147:50: warning: unused parameter ‘ctx’ [-Wunused-parameter]
>  radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
>   ^~~
> radeon_fbo.c: In function ‘radeon_map_renderbuffer_z16’:
> radeon_fbo.c:186:48: warning: unused parameter ‘ctx’ [-Wunused-parameter]
>  radeon_map_renderbuffer_z16(struct gl_context *ctx,
> ^~~
> radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_s8z24’:
> radeon_fbo.c:344:52: warning: unused parameter ‘ctx’ [-Wunused-parameter]
>  radeon_unmap_renderbuffer_s8z24(struct gl_context *ctx,
> ^~~
> radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_z16’:
> radeon_fbo.c:377:50: warning: unused parameter ‘ctx’ [-Wunused-parameter]
>  radeon_unmap_renderbuffer_z16(struct gl_context *ctx,
>   ^~~
> radeon_fbo.c: In function ‘radeon_nop_alloc_storage’:
> radeon_fbo.c:624:75: warning: unused parameter ‘rb’ [-Wunused-parameter]
>  radeon_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
>^~
> radeon_fbo.c:625:12: warning: unused parameter ‘internalFormat’ 
> [-Wunused-parameter]
>  GLenum internalFormat, GLuint width, GLuint height)
> ^~
> radeon_fbo.c:625:35: warning: unused parameter ‘width’ [-Wunused-parameter]
>  GLenum internalFormat, GLuint width, GLuint height)
>^
> radeon_fbo.c:625:49: warning: unused parameter ‘height’ [-Wunused-parameter]
>  GLenum internalFormat, GLuint width, GLuint height)
>  ^~
> radeon_fbo.c: In function ‘radeon_bind_framebuffer’:
> radeon_fbo.c:696:74: warning: unused parameter ‘fbread’ [-Wunused-parameter]
> struct gl_framebuffer *fb, struct gl_framebuffer 
> *fbread)
>   
> ^~
> radeon_fbo.c: In function ‘radeon_validate_framebuffer’:
> radeon_fbo.c:832:19: warning: unused variable ‘radeon’ [-Wunused-variable]
>   radeonContextPtr radeon = RADEON_CONTEXT(ctx);
>^~
>
> Signed-off-by: Ian Romanick 
> ---
>  src/mesa/drivers/dri/radeon/radeon_fbo.c | 17 +
>  1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c 
> b/src/mesa/drivers/dri/radeon/radeon_fbo.c
> index 89ea776..37c9c3f 100644
> --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
> +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
> @@ -144,8 +144,7 @@ static GLuint get_depth_z16(const struct 
> radeon_renderbuffer *rrb,
>  #endif
>
>  static void
> -radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
> -  struct gl_renderbuffer *rb,
> +radeon_map_renderbuffer_s8z24(struct gl_renderbuffer *rb,
>GLuint x, GLuint y, GLuint w, GLuint h,
>GLbitfield mode,
>GLubyte **out_map,
> @@ -183,8 +182,7 @@ radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
>  }
>
>  static void
> -radeon_map_renderbuffer_z16(struct gl_context *ctx,
> -   struct gl_renderbuffer *rb,
> +radeon_map_renderbuffer_z16(struct gl_renderbuffer *rb,
> GLuint x, GLuint y, GLuint w, GLuint h,
> GLbitfield mode,
> GLubyte **out_map,
> @@ -307,12 +305,12 @@ radeon_map_renderbuffer(struct gl_context *ctx,
>
> if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) 
> && !rrb->has_surface) {
> if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == 
> MESA_FORMAT_Z24_UNORM_X8_UINT) {
> -  radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h,
> +  radeon_map_renderbuffer_s8z24(rb, x, y, w, h,
>  mode, out_map, out_stride);
>return;
> }
> if (rb->Format == MESA_FORMAT_Z_UNORM16) {
> -  radeon_map_renderbuffer_z16(ctx, rb, x, y, w, h,
> +  radeon_map_renderbuffer_z16(rb, x, y, w, h,
>mode, out_map, out_stride);
>return;
> }
> @@ -621,8 +619,11 @@ radeon_alloc_window_storage(struct gl_context * ctx, 
> struct gl_renderbuffer *rb,
>
>  /** Dummy function for gl_renderbuffer::AllocStorage() */
>  static GLboolean
> -radeon_nop_alloc_storage(struct 

[Mesa-dev] [Bug 98604] [VDPAU, DRI3] Fullscreen flash video fails when hardware acceleration is enabled.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98604

--- Comment #19 from joeri.exelm...@gmail.com ---
Sorry, ignore the 'vdpau' attachment I just uploaded, this belongs to another
bug (wrong browser tab!)

-- 
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[Mesa-dev] [Bug 98604] [VDPAU, DRI3] Fullscreen flash video fails when hardware acceleration is enabled.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98604

--- Comment #18 from joeri.exelm...@gmail.com ---
Created attachment 131644
  --> https://bugs.freedesktop.org/attachment.cgi?id=131644=edit
vdpauinfo

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Re: [Mesa-dev] [PATCH] automake: Link all libGL.so variants with -Bsymbolic.

[Brian Paul]

On 06/01/2017 09:46 AM, Jose Fonseca wrote:

We were linking src/glx with -Bsymbolic, but not the classic/gallium X11
libGL.so.

But it's always a good idea to build all libGL.so and all DRI drivers
with -Bsymbolic, otherwise they might resolve symbols from the 3rd party
application executable or shared libraries, which is _never_ what we
want.

In particular, this can happen when intercepting OpenGL calls with
apitrace, before
https://github.com/apitrace/apitrace/commit/63194b2573176ef34efce1a5c8b08e624b8dddf5

Cc: mesa-sta...@lists.freedesktop.org
---
  src/gallium/targets/libgl-xlib/Makefile.am | 1 +
  src/mesa/drivers/x11/Makefile.am   | 1 +
  2 files changed, 2 insertions(+)

diff --git a/src/gallium/targets/libgl-xlib/Makefile.am 
b/src/gallium/targets/libgl-xlib/Makefile.am
index d3a781848e..a29199fe78 100644
--- a/src/gallium/targets/libgl-xlib/Makefile.am
+++ b/src/gallium/targets/libgl-xlib/Makefile.am
@@ -52,6 +52,7 @@ lib@GL_LIB@_la_SOURCES = xlib.c
  lib@GL_LIB@_la_LDFLAGS = \
-no-undefined \
-version-number $(GL_MAJOR):$(GL_MINOR):$(GL_TINY) \
+   $(BSYMBOLIC) \
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)

diff --git a/src/mesa/drivers/x11/Makefile.am b/src/mesa/drivers/x11/Makefile.am
index 8c6b67d6a8..6e123ba1b3 100644
--- a/src/mesa/drivers/x11/Makefile.am
+++ b/src/mesa/drivers/x11/Makefile.am
@@ -74,6 +74,7 @@ lib@GL_LIB@_la_LIBADD = \
  lib@GL_LIB@_la_LDFLAGS = \
-no-undefined \
-version-number $(GL_MAJOR):$(GL_MINOR):$(GL_PATCH) \
+   $(BSYMBOLIC) \
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)




LGTM.

Reviewed-by: Brian Paul 

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Re: [Mesa-dev] [PATCH 11/11] intel/blorp: Handle gen6 stencil/HiZ offsets in the back-end

[Jason Ekstrand]

On Thu, Jun 1, 2017 at 3:17 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:

> On Tue, May 30, 2017 at 05:55:20PM -0700, Jason Ekstrand wrote:
> > ---
> >  src/intel/blorp/blorp_genX_exec.h| 32 -
> >  src/intel/isl/isl_emit_depth_stencil.c   |  1 +
> >  src/mesa/drivers/dri/i965/brw_blorp.c| 61
> 
> >  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  3 +-
> >  src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 17 ---
> >  src/mesa/drivers/dri/i965/intel_mipmap_tree.h|  2 +-
> >  6 files changed, 42 insertions(+), 74 deletions(-)
> >
> > diff --git a/src/intel/blorp/blorp_genX_exec.h
> b/src/intel/blorp/blorp_genX_exec.h
> > index 8b9b8d2..59c1d36 100644
> > --- a/src/intel/blorp/blorp_genX_exec.h
> > +++ b/src/intel/blorp/blorp_genX_exec.h
> > @@ -1384,9 +1384,23 @@ blorp_emit_depth_stencil_config(struct
> blorp_batch *batch,
> >if (info.hiz_usage == ISL_AUX_USAGE_HIZ) {
> >   info.hiz_surf = >depth.aux_surf;
> >
> > + struct blorp_address hiz_address = params->depth.aux_addr;
> > +#if GEN_GEN == 6
> > + /* Sandy bridge hardware does not technically support
> mipmapped HiZ.
> > +  * However, we have a special layout that allows us to make it
> work
> > +  * anyway by manually offsetting to the specified miplevel.
> > +  */
> > + assert(info.hiz_surf->dim_layout ==
> ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ);
> > + uint32_t offset_B;
> > + isl_surf_get_image_offset_B_tile_sa(info.hiz_surf,
> > + info.view->base_level, 0,
> 0,
> > + _B, NULL, NULL);
> > + hiz_address.offset += offset_B;
> > +#endif
> > +
> >   info.hiz_address =
> >  blorp_emit_reloc(batch, dw + isl_dev->ds.hiz_offset / 4,
> > - params->depth.aux_addr, 0);
> > + hiz_address, 0);
> >
> >   info.depth_clear_value = params->depth.clear_color.u32[0];
> >}
> > @@ -1395,9 +1409,23 @@ blorp_emit_depth_stencil_config(struct
> blorp_batch *batch,
> > if (params->stencil.enabled) {
> >info.stencil_surf = >stencil.surf;
> >
> > +  struct blorp_address stencil_address = params->stencil.addr;
> > +#if GEN_GEN == 6
> > +  /* Sandy bridge hardware does not technically support mipmapped
> stencil.
> > +   * However, we have a special layout that allows us to make it
> work
> > +   * anyway by manually offsetting to the specified miplevel.
> > +   */
> > +  assert(info.stencil_surf->dim_layout ==
> ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ);
> > +  uint32_t offset_B;
> > +  isl_surf_get_image_offset_B_tile_sa(info.stencil_surf,
> > +  info.view->base_level, 0, 0,
> > +  _B, NULL, NULL);
> > +  stencil_address.offset += offset_B;
> > +#endif
> > +
> >info.stencil_address =
> >   blorp_emit_reloc(batch, dw + isl_dev->ds.stencil_offset / 4,
> > -  params->stencil.addr, 0);
> > +  stencil_address, 0);
> > }
> >
> > isl_emit_depth_stencil_hiz_s(isl_dev, dw, );
> > diff --git a/src/intel/isl/isl_emit_depth_stencil.c
> b/src/intel/isl/isl_emit_depth_stencil.c
> > index 41a01be..04bed07 100644
> > --- a/src/intel/isl/isl_emit_depth_stencil.c
> > +++ b/src/intel/isl/isl_emit_depth_stencil.c
> > @@ -158,6 +158,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct
> isl_device *dev, void *batch,
> >hiz.SurfaceBaseAddress = info->hiz_address;
> >hiz.HierarchicalDepthBufferMOCS = info->mocs;
> >hiz.SurfacePitch = info->hiz_surf->row_pitch - 1;
> > +
>
> Leftover?
>

Yup.  Fixed.


> >  #if GEN_GEN >= 8
> >/* From the SKL PRM Vol2a:
> > *
> > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> > index 61c6bda..28be620 100644
> > --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> > +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> > @@ -118,36 +118,6 @@ brw_blorp_init(struct brw_context *brw)
> >  }
> >
> >  static void
> > -apply_gen6_stencil_hiz_offset(struct isl_surf *surf,
> > -  struct intel_mipmap_tree *mt,
> > -  uint32_t lod,
> > -  uint32_t *offset)
> > -{
> > -   assert(mt->array_layout == GEN6_HIZ_STENCIL);
> > -
> > -   if (mt->format == MESA_FORMAT_S_UINT8) {
> > -  /* Note: we can't compute the stencil offset using
> > -   * intel_miptree_get_aligned_offset(), because the miptree
> > -   * claims that the region is untiled even though it's W tiled.
> > -   */
> > -  *offset = mt->level[lod].level_y * mt->pitch +
> > -mt->level[lod].level_x * 64;
> > -   } else {
> > -  *offset = intel_miptree_get_aligned_offset(mt,
> > - 

[Mesa-dev] [PATCH] automake: Link all libGL.so variants with -Bsymbolic.

[Jose Fonseca]

We were linking src/glx with -Bsymbolic, but not the classic/gallium X11
libGL.so.

But it's always a good idea to build all libGL.so and all DRI drivers
with -Bsymbolic, otherwise they might resolve symbols from the 3rd party
application executable or shared libraries, which is _never_ what we
want.

In particular, this can happen when intercepting OpenGL calls with
apitrace, before
https://github.com/apitrace/apitrace/commit/63194b2573176ef34efce1a5c8b08e624b8dddf5

Cc: mesa-sta...@lists.freedesktop.org
---
 src/gallium/targets/libgl-xlib/Makefile.am | 1 +
 src/mesa/drivers/x11/Makefile.am   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/gallium/targets/libgl-xlib/Makefile.am 
b/src/gallium/targets/libgl-xlib/Makefile.am
index d3a781848e..a29199fe78 100644
--- a/src/gallium/targets/libgl-xlib/Makefile.am
+++ b/src/gallium/targets/libgl-xlib/Makefile.am
@@ -52,6 +52,7 @@ lib@GL_LIB@_la_SOURCES = xlib.c
 lib@GL_LIB@_la_LDFLAGS = \
-no-undefined \
-version-number $(GL_MAJOR):$(GL_MINOR):$(GL_TINY) \
+   $(BSYMBOLIC) \
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)
 
diff --git a/src/mesa/drivers/x11/Makefile.am b/src/mesa/drivers/x11/Makefile.am
index 8c6b67d6a8..6e123ba1b3 100644
--- a/src/mesa/drivers/x11/Makefile.am
+++ b/src/mesa/drivers/x11/Makefile.am
@@ -74,6 +74,7 @@ lib@GL_LIB@_la_LIBADD = \
 lib@GL_LIB@_la_LDFLAGS = \
-no-undefined \
-version-number $(GL_MAJOR):$(GL_MINOR):$(GL_PATCH) \
+   $(BSYMBOLIC) \
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)
 
-- 
2.11.0

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Re: [Mesa-dev] [PATCH 08/11] intel/isl: Add a new layout for HiZ and stencil on Sandy Bridge

[Jason Ekstrand]

On Thu, Jun 1, 2017 at 2:40 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:

> On Tue, May 30, 2017 at 05:55:17PM -0700, Jason Ekstrand wrote:
> > ---
> >  src/intel/isl/isl.c | 162 ++
> --
> >  src/intel/isl/isl.h |  40 +
> >  2 files changed, 197 insertions(+), 5 deletions(-)
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index 77b8a40..e4d7901 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -479,6 +479,12 @@ isl_choose_array_pitch_span(const struct
> isl_device *dev,
> > * compact QPitch possible in order to conserve memory.
> > */
> >return ISL_ARRAY_PITCH_SPAN_COMPACT;
> > +
> > +   case ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ:
> > +  /* Each array image in the gen6 stencil of HiZ surface is compact
> in the
> > +   * sense that every LOD is a compact array of the same size as
> LOD0.
> > +   */
> > +  return ISL_ARRAY_PITCH_SPAN_COMPACT;
> > }
> >
> > unreachable("bad isl_dim_layout");
> > @@ -510,10 +516,15 @@ isl_choose_image_alignment_el(const struct
> isl_device *dev,
> >return;
> > } else if (info->format == ISL_FORMAT_HIZ) {
> >assert(ISL_DEV_GEN(dev) >= 6);
> > -  /* HiZ surfaces are always aligned to 16x8 pixels in the primary
> surface
> > -   * which works out to 2x2 HiZ elments.
> > -   */
> > -  *image_align_el = isl_extent3d(2, 2, 1);
> > +  if (ISL_DEV_GEN(dev) == 6) {
> > + /* HiZ surfaces on Sandy Bridge are packed tightly. */
> > + *image_align_el = isl_extent3d(1, 1, 1);
> > +  } else {
> > + /* On gen7+, HiZ surfaces are always aligned to 16x8 pixels in
> the
> > +  * primary surface which works out to 2x2 HiZ elments.
> > +  */
> > + *image_align_el = isl_extent3d(2, 2, 1);
> > +  }
> >return;
> > }
> >
> > @@ -540,6 +551,11 @@ isl_surf_choose_dim_layout(const struct isl_device
> *dev,
> > enum isl_surf_dim logical_dim,
> > enum isl_tiling tiling)
> >  {
> > +   /* Sandy bridge needs a special layout for HiZ and stencil. */
> > +   if (ISL_DEV_GEN(dev) == 6 &&
> > +   (tiling == ISL_TILING_W || tiling == ISL_TILING_HIZ))
> > +  return ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ;
> > +
> > if (ISL_DEV_GEN(dev) >= 9) {
> >switch (logical_dim) {
> >case ISL_SURF_DIM_1D:
> > @@ -608,6 +624,7 @@ isl_calc_phys_level0_extent_sa(const struct
> isl_device *dev,
> >
> >case ISL_DIM_LAYOUT_GEN9_1D:
> >case ISL_DIM_LAYOUT_GEN4_2D:
> > +  case ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ:
> >   *phys_level0_sa = (struct isl_extent4d) {
> >  .w = isl_align_npot(info->width, fmtl->bw),
> >  .h = fmtl->bh,
> > @@ -619,7 +636,8 @@ isl_calc_phys_level0_extent_sa(const struct
> isl_device *dev,
> >break;
> >
> > case ISL_SURF_DIM_2D:
> > -  assert(dim_layout == ISL_DIM_LAYOUT_GEN4_2D);
> > +  assert(dim_layout == ISL_DIM_LAYOUT_GEN4_2D ||
> > + dim_layout == ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ);
> >
> >if (tiling == ISL_TILING_Ys && info->samples > 1)
> >   isl_finishme("%s:%s: multisample TileYs layout", __FILE__,
> __func__);
> > @@ -684,6 +702,7 @@ isl_calc_phys_level0_extent_sa(const struct
> isl_device *dev,
> >
> >switch (dim_layout) {
> >case ISL_DIM_LAYOUT_GEN9_1D:
> > +  case ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ:
> >   unreachable("bad isl_dim_layout");
> >
> >case ISL_DIM_LAYOUT_GEN4_2D:
> > @@ -969,6 +988,67 @@ isl_calc_phys_total_extent_el_gen4_3d(
> >
> >  /**
> >   * A variant of isl_calc_phys_slice0_extent_sa() specific to
> > + * ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ.
> > + */
> > +static void
> > +isl_calc_phys_total_extent_el_gen6_stencil_hiz(
> > +  const struct isl_device *dev,
> > +  const struct isl_surf_init_info *restrict info,
> > +  const struct isl_tile_info *tile_info,
> > +  const struct isl_extent3d *image_align_sa,
> > +  const struct isl_extent4d *phys_level0_sa,
> > +  uint32_t *array_pitch_el_rows,
> > +  struct isl_extent2d *phys_total_el)
> > +{
> > +   const struct isl_format_layout *fmtl = isl_format_get_layout(info->
> format);
> > +
> > +   const struct isl_extent2d tile_extent_sa = {
> > +  .w = tile_info->logical_extent_el.w * fmtl->bw,
> > +  .h = tile_info->logical_extent_el.h * fmtl->bh,
> > +   };
> > +   /* Tile size is a multiple of image alignment */
> > +   assert(tile_extent_sa.w % image_align_sa->w == 0);
> > +   assert(tile_extent_sa.h % image_align_sa->h == 0);
> > +
> > +   const uint32_t W0 = phys_level0_sa->w;
> > +   const uint32_t H0 = phys_level0_sa->h;
> > +
> > +   /* Each image has the same height as LOD0 because the hardware thinks
> > +* everything is LOD0
> > +*/
> > +   const uint32_t H = isl_align(H0, image_align_sa->h) *
> phys_level0_sa->a;
> > +
> > 

Re: [Mesa-dev] [PATCH] util/rand_xor: add missing include statements

[Eric Engestrom]

On Thursday, 2017-06-01 16:15:41 +0200, Nicolas Dechesne wrote:
> On Thu, Jun 1, 2017 at 3:27 PM, Eric Engestrom
>  wrote:
> > On Thursday, 2017-06-01 12:13:18 +0200, Nicolas Dechesne wrote:
> >> Fixes for:
> >>
> >> src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' 
> >> [-Werror=implicit-function-declaration]
> >> int fd = open("/dev/urandom", O_RDONLY);
> >>  ^~~~
> >> src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this 
> >> function)
> >> int fd = open("/dev/urandom", O_RDONLY);
> >>   ^~~~
> >>
> >> Signed-off-by: Nicolas Dechesne 
> >
> > Thanks, r-b and pushed, and welcome to Mesa :)
> 
> thanks , starting small ;)
> 
> I would like this patch on the 17.1 branch as well. Is that possible?
> I actually found the issue on 17.1.1 release.

Actually, since this is a fix, I made a mistake: I should have marked
the commit that broke it with the `Fixes:` tag, before pushing it.

In this case:
Fixes: dd00a3c923ba94986efb ("util/rand_xor: add function to seed rand")

This would have automatically nominated the patch for any branch that
includes the offending commit (and is still maintained).

That said, even after the patch has been pushed, it is still possible to
nominate it for a stable branch; see:
https://www.mesa3d.org/submittingpatches.html#nominations

I've Bcc'ed this email to mesa-stable@, so this should be taken care of
now. (Bcc to avoid replies cluttering that ML.)

For reference, the commit on master is:
adadadc151fa8232ecd7 ("util/rand_xor: add missing include statements")

Cheers,
  Eric
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Re: [Mesa-dev] [PATCH] util/rand_xor: add missing include statements

[Emil Velikov]

On 1 June 2017 at 15:15, Nicolas Dechesne  wrote:
> On Thu, Jun 1, 2017 at 3:27 PM, Eric Engestrom
>  wrote:
>> On Thursday, 2017-06-01 12:13:18 +0200, Nicolas Dechesne wrote:
>>> Fixes for:
>>>
>>> src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' 
>>> [-Werror=implicit-function-declaration]
>>> int fd = open("/dev/urandom", O_RDONLY);
>>>  ^~~~
>>> src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this 
>>> function)
>>> int fd = open("/dev/urandom", O_RDONLY);
>>>   ^~~~
>>>
>>> Signed-off-by: Nicolas Dechesne 
>>
>> Thanks, r-b and pushed, and welcome to Mesa :)
>
> thanks , starting small ;)
>
> I would like this patch on the 17.1 branch as well. Is that possible?
> I actually found the issue on 17.1.1 release.

Should be handled now. See the documentation for future stable nominations [1].

-Emil
[1] https://www.mesa3d.org/submittingpatches.html#nominations
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Re: [Mesa-dev] [PATCH mesa 2/2] egl/display: make platform detection thread-safe

[Grazvydas Ignotas]

On Thu, Jun 1, 2017 at 4:23 PM, Emil Velikov  wrote:
> Hi guys,
>
> On 1 June 2017 at 12:56, Grazvydas Ignotas  wrote:
>> On Thu, Jun 1, 2017 at 2:15 PM, Eric Engestrom
>>  wrote:
>>> If the detections methods ever become able to return different results
>>> for different threads, the if chain might make threads go back and forth
>>> between invalid and valid platforms.
>>> Solve this by doing the detection in a local var and only overwriting
>>> the global one at the end, if no other thread has updated it since.
>>>
>>> This means the platform detected in the thread might not be the platform
>>> returned by the function, but this is a different issue that will need
>>> to be discussed when this becomes possible.
>>>
>>> Reported-by: Grazvydas Ignotas 
>>
>> Not really, see https://bugs.freedesktop.org/show_bug.cgi?id=101252
>>
>>> Signed-off-by: Eric Engestrom 
>>> ---
>>>
>>> This is unnecessary in my opinion, but doesn't hurt :)
>>
>> It is necessary, without it things will work most of the time but
>> there will be rare failures.
>> Imagine there are 2 threads that both call _eglGetNativePlatform()
>> simultaneously:
>> - thread 1 completes the first "if (native_platform ==
>> _EGL_INVALID_PLATFORM)" check and is preemted to do something else
>> - thread 2 executes the whole function, does "native_platform =
>> _EGL_NATIVE_PLATFORM" and just before returning it's preemted
>> - thread 1 wakes up and calls _eglGetNativePlatformFromEnv() which
>> returns _EGL_INVALID_PLATFORM because no env vars are set, updates
>> native_platform and then gets preemted again
>> - thread 2 wakes up and returns wrong _EGL_INVALID_PLATFORM
>>
> Afaict this/similar fix is necessary, yet let me put an alternative
> idea - add locking via _eglGlobal.Mutex.
> May be an bit of overkill, but it's what we consistently use
> throughout the code base.

It looks like that mutex is meant to protect _eglGlobal and not some
random variables, so I'd prefer the atomic version.

> Reverting the patch (as suggested by Grazvydas) does not fully address
> the problem, but only makes it less likely to hit.

Yeah I meant reverting instead of taking 1/2 and then applying this
fix on top. OTOH I'm also ok with this series as-is.

Gražvydas
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Re: [Mesa-dev] [PATCH mesa] configure.ac: simplify --enable-libunwind=auto check

[Emil Velikov]

On 1 June 2017 at 15:10, Eric Engestrom  wrote:
> Signed-off-by: Eric Engestrom 
> ---
>  configure.ac | 8 ++--
>  1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index b57be07e24..5caf316089 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1066,16 +1066,12 @@ AC_SUBST([LLVM_INCLUDEDIR])
>  dnl
>  dnl libunwind
>  dnl
> +PKG_CHECK_EXISTS(libunwind, [HAVE_LIBUNWIND=yes], [HAVE_LIBUNWIND=no])
>  AC_ARG_ENABLE([libunwind],
>  [AS_HELP_STRING([--enable-libunwind],
>  [Use libunwind for backtracing (default: auto)])],
>  [LIBUNWIND="$enableval"],
> -[LIBUNWIND="auto"])
> -
> -PKG_CHECK_EXISTS(libunwind, [HAVE_LIBUNWIND=yes], [HAVE_LIBUNWIND=no])
> -if test "x$LIBUNWIND" = "xauto"; then
> -LIBUNWIND="$HAVE_LIBUNWIND"
> -fi
> +[LIBUNWIND="$HAVE_LIBUNWIND"])
>
Hmm we could have kept PKG_CHECK_EXISTS only as needed by moving it down a line.

Either way - the patch as-is or implementing the above idea is
Reviewed-by: Emil Velikov 

-Emil
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Re: [Mesa-dev] [PATCH v2] egl/android: support for EGL_KHR_partial_update

[Emil Velikov]

Hi Harish

On 1 June 2017 at 11:27, Harish Krupo  wrote:
> This patch adds support for the EGL_KHR_partial_update extension for
> android platform. It passes 36/37 tests in dEQP for EGL_KHR_partial_update.
> 1 test not supported.
>
> v2: add fallback for eglSetDamageRegionKHR (Tapani)
>
AFAICT the native_window_set_surface_damage API was introduced in 2015
[1]. Is it available all the way back to Android L - earliest
supported version in Mesa?
Alternatively can you please reintroduce the ANDROID_VERSION define
[2] and guard the new code accordingly.

As a follow-up you can use
native_window_set_surface_damage()/droid_set_damage_region to provide
a proper .swap_buffers_with_damage implementation and enable the
EXT/KHR extensions.

Thanks
Emil

[1] 
https://android.googlesource.com/platform/system/core/+/04274a29ff534000ca38cdb627daab98cfa2878d%5E1..04274a29ff534000ca38cdb627daab98cfa2878d/
[2] 
https://cgit.freedesktop.org/mesa/mesa/commit/?id=0e1ff22d55816c9a3710257c2e705a98ad3282bc
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Re: [Mesa-dev] [PATCH 01/21] mesa: add vertex_array_vertex_buffers_err() helper

[Erik Faye-Lund]

On Jun 1, 2017 15:06, "Samuel Pitoiset"  wrote:

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/varray.c | 108 --
---
 1 file changed, 61 insertions(+), 47 deletions(-)

diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 47528ba2a7..c2c771c173 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -2117,29 +2117,14 @@ _mesa_VertexArrayVertexBuffer(GLuint vaobj, GLuint
bindingIndex, GLuint buffer,
 }


-static void
+static ALWAYS_INLINE void


This seems unrelated to the rest of the patch... It probably needs a
motivation also.

 vertex_array_vertex_buffers(struct gl_context *ctx,
 struct gl_vertex_array_object *vao,
 GLuint first, GLsizei count, const GLuint
*buffers,
 const GLintptr *offsets, const GLsizei
*strides,
-const char *func)
+bool no_error, const char *func)
 {
-   GLuint i;
-
-   ASSERT_OUTSIDE_BEGIN_END(ctx);
-
-   /* The ARB_multi_bind spec says:
-*
-*"An INVALID_OPERATION error is generated if  + 
-* is greater than the value of MAX_VERTEX_ATTRIB_BINDINGS."
-*/
-   if (first + count > ctx->Const.MaxVertexAttribBindings) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "%s(first=%u + count=%d > the value of "
-  "GL_MAX_VERTEX_ATTRIB_BINDINGS=%u)",
-  func, first, count, ctx->Const.MaxVertexAttribBindings);
-  return;
-   }
+   GLint i;

if (!buffers) {
   /**
@@ -2184,31 +2169,33 @@ vertex_array_vertex_buffers(struct gl_context *ctx,
for (i = 0; i < count; i++) {
   struct gl_buffer_object *vbo;

-  /* The ARB_multi_bind spec says:
-   *
-   *"An INVALID_VALUE error is generated if any value in
-   *  or  is negative (per binding)."
-   */
-  if (offsets[i] < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(offsets[%u]=%" PRId64 " < 0)",
- func, i, (int64_t) offsets[i]);
- continue;
-  }
+  if (!no_error) {
+ /* The ARB_multi_bind spec says:
+  *
+  *"An INVALID_VALUE error is generated if any value in
+  *  or  is negative (per binding)."
+  */
+ if (offsets[i] < 0) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(offsets[%u]=%" PRId64 " < 0)",
+func, i, (int64_t) offsets[i]);
+continue;
+ }

-  if (strides[i] < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(strides[%u]=%d < 0)",
- func, i, strides[i]);
- continue;
-  }
+ if (strides[i] < 0) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(strides[%u]=%d < 0)",
+func, i, strides[i]);
+continue;
+ }

-  if (ctx->API == API_OPENGL_CORE && ctx->Version >= 44 &&
-  strides[i] > ctx->Const.MaxVertexAttribStride) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(strides[%u]=%d > "
- "GL_MAX_VERTEX_ATTRIB_STRIDE)", func, i, strides[i]);
- continue;
+ if (ctx->API == API_OPENGL_CORE && ctx->Version >= 44 &&
+ strides[i] > ctx->Const.MaxVertexAttribStride) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(strides[%u]=%d > "
+"GL_MAX_VERTEX_ATTRIB_STRIDE)", func, i,
strides[i]);
+continue;
+ }
   }

   if (buffers[i]) {
@@ -2234,6 +2221,33 @@ vertex_array_vertex_buffers(struct gl_context *ctx,
 }


+static void
+vertex_array_vertex_buffers_err(struct gl_context *ctx,
+struct gl_vertex_array_object *vao,
+GLuint first, GLsizei count,
+const GLuint *buffers, const GLintptr
*offsets,
+const GLsizei *strides, const char *func)
+{
+   ASSERT_OUTSIDE_BEGIN_END(ctx);
+
+   /* The ARB_multi_bind spec says:
+*
+*"An INVALID_OPERATION error is generated if  + 
+* is greater than the value of MAX_VERTEX_ATTRIB_BINDINGS."
+*/
+   if (first + count > ctx->Const.MaxVertexAttribBindings) {
+  _mesa_error(ctx, GL_INVALID_OPERATION,
+  "%s(first=%u + count=%d > the value of "
+  "GL_MAX_VERTEX_ATTRIB_BINDINGS=%u)",
+  func, first, count, ctx->Const.MaxVertexAttribBindings);
+  return;
+   }
+
+   vertex_array_vertex_buffers(ctx, vao, first, count, buffers, offsets,
+   strides, false, func);
+}
+
+
 void GLAPIENTRY
 _mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const 

Re: [Mesa-dev] Status of Clover (AMDGPU)

[Luke A. Guest]

> I'd suggest that you check out the recently-open-sourced OpenCL
> conformance test suite [0] or my slightly-more-linux-build-friendly
> fork [1] and give it a run on top of mesa/clover. It'll give you a
> good list of things to work on.
Thanks, I took a quick look. Yeah, shame they didn't put in a proper
build system or provide a doc stating what the tests are or a main app
that runs them all in a correct order and outputs a report.

>
> I ran the integer_ops sub-tests last night, and besides the missing CL
> 1.2 popcount() function, that entire sub-suite succeeds. Feel free to
> attempt to implement that built-in function in the libclc[2] library
> to get your feet wet.
>
> There are also issues with buffer copies (using host-pointers,
> copySubRect), and there are a subset of the floating-point math
> built-ins which are either missing or fail some test scenarios. Some
> atomic operations seem to be incorrect, and that's about as far as
> I've managed to get so far in looking at the results. I'm sure plenty
> of other things need work/polish. Note that many of these things are
> gpu-independent and can be implemented either in the clover
> state-tracker, or in the generic (non-GPU-specific) portion of libclc.
>
> I've been looking into implementing the
> clCreateCommandQueueWithProperties API function as well, since there
> seem to be a bunch of CL programs that just blindly assume the API
> function exists for all platforms when using the ocl-icd loader, and
> segfault as a result.
>
> One big missing piece is image support. It's an optional feature of
> OpenCL, but there are a good number of programs used by a certain
> benchmarking site that depend on it.
>
Phoronix?

Yeah, it's on the todo list to see if I can get anywhere with it. My
immediate aim is to get Blender cycles with opensubdiv working, so
that's gonna need a lot of work with images.

Thanks,
Luke.

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Re: [Mesa-dev] [PATCH] util/rand_xor: add missing include statements

[Nicolas Dechesne]

On Thu, Jun 1, 2017 at 3:27 PM, Eric Engestrom
 wrote:
> On Thursday, 2017-06-01 12:13:18 +0200, Nicolas Dechesne wrote:
>> Fixes for:
>>
>> src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' 
>> [-Werror=implicit-function-declaration]
>> int fd = open("/dev/urandom", O_RDONLY);
>>  ^~~~
>> src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this 
>> function)
>> int fd = open("/dev/urandom", O_RDONLY);
>>   ^~~~
>>
>> Signed-off-by: Nicolas Dechesne 
>
> Thanks, r-b and pushed, and welcome to Mesa :)

thanks , starting small ;)

I would like this patch on the 17.1 branch as well. Is that possible?
I actually found the issue on 17.1.1 release.
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[Mesa-dev] [PATCH mesa] configure.ac: simplify --enable-libunwind=auto check

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/configure.ac b/configure.ac
index b57be07e24..5caf316089 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1066,16 +1066,12 @@ AC_SUBST([LLVM_INCLUDEDIR])
 dnl
 dnl libunwind
 dnl
+PKG_CHECK_EXISTS(libunwind, [HAVE_LIBUNWIND=yes], [HAVE_LIBUNWIND=no])
 AC_ARG_ENABLE([libunwind],
 [AS_HELP_STRING([--enable-libunwind],
 [Use libunwind for backtracing (default: auto)])],
 [LIBUNWIND="$enableval"],
-[LIBUNWIND="auto"])
-
-PKG_CHECK_EXISTS(libunwind, [HAVE_LIBUNWIND=yes], [HAVE_LIBUNWIND=no])
-if test "x$LIBUNWIND" = "xauto"; then
-LIBUNWIND="$HAVE_LIBUNWIND"
-fi
+[LIBUNWIND="$HAVE_LIBUNWIND"])
 
 if test "x$LIBUNWIND" = "xyes"; then
 PKG_CHECK_MODULES(LIBUNWIND, libunwind)
-- 
Cheers,
  Eric

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Re: [Mesa-dev] [PATCH] glsl: fix bounds check in blob_overwrite_bytes

[Iago Toral]

Reviewed-by: Iago Toral Quiroga 

On Wed, 2017-05-31 at 19:14 -0500, Rob Herring wrote:
> clang gives a warning in blob_overwrite_bytes because offset type is
> size_t which is unsigned:
> 
> src/compiler/glsl/blob.c:110:15: warning: comparison of unsigned
> expression < 0 is always false [-Wtautological-compare]
>    if (offset < 0 || blob->size - offset < to_write)
>    ~~ ^ ~
> 
> Remove the less than 0 check to fix this.
> 
> Additionally, if offset is greater than blob->size, the 2nd check
> would
> be false due to unsigned math. Rewrite the check to avoid
> subtraction.
> 
> Signed-off-by: Rob Herring 
> ---
>  src/compiler/glsl/blob.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/compiler/glsl/blob.c b/src/compiler/glsl/blob.c
> index 769ebf1a0232..db3625206508 100644
> --- a/src/compiler/glsl/blob.c
> +++ b/src/compiler/glsl/blob.c
> @@ -107,7 +107,7 @@ blob_overwrite_bytes(struct blob *blob,
>   size_t to_write)
>  {
> /* Detect an attempt to overwrite data out of bounds. */
> -   if (offset < 0 || blob->size - offset < to_write)
> +   if (blob->size < offset + to_write)
>    return false;
>  
> memcpy(blob->data + offset, bytes, to_write);
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[Mesa-dev] [PATCH mesa] tree-wide: remove trailing backslash

[Eric Engestrom]

Simple search for a backslash followed by two newlines.
If one of the newlines were to be removed, this would cause issues, so
let's just remove these trailing backslashes.

Signed-off-by: Eric Engestrom 
---

I can split the patch by module if you want, but this seems trivial
enough?
A simple ack from a couple people would be enough IMO.
---
 src/amd/common/amd_kernel_code_t.h  | 2 +-
 src/compiler/nir/nir_builder.h  | 2 +-
 src/gallium/auxiliary/draw/draw_gs_tmp.h| 2 +-
 src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h| 2 +-
 src/gallium/auxiliary/draw/draw_so_emit_tmp.h   | 2 +-
 src/gallium/drivers/r600/sb/sb_bc.h | 2 +-
 src/gallium/drivers/svga/svga_winsys.h  | 2 +-
 src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp | 4 ++--
 src/intel/compiler/brw_inst.h   | 2 +-
 src/mesa/drivers/dri/r200/r200_vertprog.c   | 2 +-
 src/mesa/drivers/x11/xmesaP.h   | 2 +-
 src/mesa/math/m_debug_util.h| 2 +-
 src/mesa/sparc/sparc_matrix.h   | 2 +-
 src/mesa/x86/mmx_blend.S| 2 +-
 src/mesa/x86/read_rgba_span_x86.S   | 2 +-
 15 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/amd/common/amd_kernel_code_t.h 
b/src/amd/common/amd_kernel_code_t.h
index d0d7809da1..f8e9508518 100644
--- a/src/amd/common/amd_kernel_code_t.h
+++ b/src/amd/common/amd_kernel_code_t.h
@@ -36,7 +36,7 @@
 
 // Gets bits for specified mask from specified src packed instance.
 #define AMD_HSA_BITS_GET(src, mask)
\
-  ((src & mask) >> mask ## _SHIFT) 
\
+  ((src & mask) >> mask ## _SHIFT)
 
 /* Every amd_*_code_t has the following properties, which are composed of
  * a number of bit fields. Every bit field has a mask (AMD_CODE_PROPERTY_*),
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index 7dbf8efbb3..7c65886356 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -621,7 +621,7 @@ nir_load_system_value(nir_builder *build, nir_intrinsic_op 
op, int index)
nir_load_##name(nir_builder *build)   \
{ \
   return nir_load_system_value(build, nir_intrinsic_load_##name, 0); \
-   } \
+   }
 
 #include "nir_intrinsics.h"
 
diff --git a/src/gallium/auxiliary/draw/draw_gs_tmp.h 
b/src/gallium/auxiliary/draw/draw_gs_tmp.h
index b10bbc413d..bf276d3822 100644
--- a/src/gallium/auxiliary/draw/draw_gs_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_gs_tmp.h
@@ -22,7 +22,7 @@
   default:\
  break;   \
   }   \
-   } while (0)\
+   } while (0)
 
 #define POINT(i0) gs_point(gs,i0)
 #define LINE(flags,i0,i1) gs_line(gs,i0,i1)
diff --git a/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h 
b/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h
index bff6d556ed..145a8ca74e 100644
--- a/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h
@@ -19,7 +19,7 @@
   return;   \
default: \
   break;\
-   }\
+   }
 
 
 #define POINT(i0) prim_point(asmblr, i0)
diff --git a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h 
b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
index 282a52d1c0..c3a4695c1f 100644
--- a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
@@ -22,7 +22,7 @@
   default:\
  break;   \
   }   \
-   } while (0)\
+   } while (0)
 
 #define POINT(i0)so_point(so,i0)
 #define LINE(flags,i0,i1)so_line(so,i0,i1)
diff --git a/src/gallium/drivers/r600/sb/sb_bc.h 
b/src/gallium/drivers/r600/sb/sb_bc.h
index 2c662acf91..fed041cf50 100644
--- a/src/gallium/drivers/r600/sb/sb_bc.h
+++ b/src/gallium/drivers/r600/sb/sb_bc.h
@@ -787,7 +787,7 @@ public: \
} \
unsigned get_##name() const { \
return 

Re: [Mesa-dev] [PATCH 10/21] mesa: add validate_depth_buffer() helper

[Gustaw Smolarczyk]

Same problem as in the previous patch.

Regards,
Gustaw


1 cze 2017 15:07 "Samuel Pitoiset"  napisał(a):

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 105 +++---
-
 1 file changed, 56 insertions(+), 49 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 207ce7d501..455a9a647f 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -233,6 +233,60 @@ validate_stencil_buffer(struct gl_context *ctx, struct
gl_framebuffer *readFb,
}
 }

+
+static void
+validate_depth_buffer(struct gl_context *ctx, struct gl_framebuffer
*readFb,
+  struct gl_framebuffer *drawFb, GLbitfield *mask,
+  bool no_error, const char *func)
+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_DEPTH].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_DEPTH].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_DEPTH_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_s_bit, draw_s_bit;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination depth buffer cannot be the
"
+ "same)", func);
+ return;
+  }
+
+  if ((_mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS) !=
+   _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS)) ||
+  (_mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(depth attachment format mismatch)", func);
+ return;
+  }
+
+  read_s_bit = _mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS);
+  draw_s_bit = _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS);
+
+  /* If both buffers also have stencil data, the stencil formats must
+   * match as well.  If one doesn't have stencil, it's not blitted, so
+   * we should ignore the stencil format check.
+   */
+  if (read_s_bit > 0 && draw_s_bit > 0 && read_s_bit != draw_s_bit) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(depth attachment stencil bits mismatch)", func);
+ return;
+  }
+   }
+}
+
+
 static void
 blit_framebuffer(struct gl_context *ctx,
  struct gl_framebuffer *readFb, struct gl_framebuffer
*drawFb,
@@ -376,55 +430,8 @@ blit_framebuffer(struct gl_context *ctx,
if (mask & GL_STENCIL_BUFFER_BIT)
   validate_stencil_buffer(ctx, readFb, drawFb, , false, func);

-   if (mask & GL_DEPTH_BUFFER_BIT) {
-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_DEPTH].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_DEPTH].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is
silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_DEPTH_BUFFER_BIT;
-  }
-  else {
- int read_s_bit, draw_s_bit;
-
- if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(source and destination depth "
-"buffer cannot be the same)", func);
-return;
- }
-
- if ((_mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS) !=
-  _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS)) ||
- (_mesa_get_format_datatype(readRb->Format) !=
-  _mesa_get_format_datatype(drawRb->Format))) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(depth attachment format mismatch)", func);
-return;
- }
-
- read_s_bit = _mesa_get_format_bits(readRb->Format,
GL_STENCIL_BITS);
- draw_s_bit = _mesa_get_format_bits(drawRb->Format,
GL_STENCIL_BITS);
-
- /* If both buffers also have stencil data, the stencil formats
must
-  * match as well.  If one doesn't have stencil, it's not blitted,
so
-  * we should ignore the stencil format check.
-  */
- if (read_s_bit > 0 && draw_s_bit > 0 && read_s_bit != draw_s_bit)
{
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(depth attachment stencil bits mismatch)",
func);
-return;
- }
-  }
-   }
-
+   if (mask & GL_DEPTH_BUFFER_BIT)
+  validate_depth_buffer(ctx, readFb, drawFb, , false, func);

Re: [Mesa-dev] [PATCH 09/21] mesa: add validate_stencil_buffer() helper

[Samuel Pitoiset]

Yeah, will fix locally, thanks!

On 06/01/2017 03:47 PM, Gustaw Smolarczyk wrote:

This time, send it to the list too.
Gustaw


1 cze 2017 15:45 "Gustaw Smolarczyk" > napisał(a):


1 cze 2017 15:07 "Samuel Pitoiset" > napisał(a):

Signed-off-by: Samuel Pitoiset >
---
  src/mesa/main/blit.c | 111
+++
  1 file changed, 58 insertions(+), 53 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 2c0300eab3..207ce7d501 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -178,6 +178,62 @@ is_valid_blit_filter(const struct
gl_context *ctx, GLenum filter)


  static void


Shouldn't it return a bool so that the caller will know whether the
validation passed or not?

+validate_stencil_buffer(struct gl_context *ctx, struct
gl_framebuffer *readFb,
+struct gl_framebuffer *drawFb,
GLbitfield *mask,
+bool no_error, const char *func)
+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not
exist in both
+* the read and draw framebuffers, the corresponding bit
is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_STENCIL_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_z_bits, draw_z_bits;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination stencil buffer
cannot be the "
+ "same)", func);
+ return;
+  }
+
+  if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
+  _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
+ /* There is no need to check the stencil datatype
here, because
+  * there is only one: GL_UNSIGNED_INT.
+  */
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment format mismatch)",
func);
+ return;
+  }
+
+  read_z_bits = _mesa_get_format_bits(readRb->Format,
GL_DEPTH_BITS);
+  draw_z_bits = _mesa_get_format_bits(drawRb->Format,
GL_DEPTH_BITS);
+
+  /* If both buffers also have depth data, the depth
formats must match
+   * as well.  If one doesn't have depth, it's not blitted,
so we should
+   * ignore the depth format check.
+   */
+  if (read_z_bits > 0 && draw_z_bits > 0 &&
+  (read_z_bits != draw_z_bits ||
+   _mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment depth format
mismatch)", func);
+ return;
+  }
+   }
+}
+
+static void
  blit_framebuffer(struct gl_context *ctx,
   struct gl_framebuffer *readFb, struct
gl_framebuffer *drawFb,
   GLint srcX0, GLint srcY0, GLint srcX1, GLint
srcY1,
@@ -317,59 +373,8 @@ blit_framebuffer(struct gl_context *ctx,
}
 }

-   if (mask & GL_STENCIL_BUFFER_BIT) {
-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not
exist in both
-   * the read and draw framebuffers, the corresponding
bit is silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_STENCIL_BUFFER_BIT;
-  }
-  else {
- int read_z_bits, draw_z_bits;
-
- if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
 

Re: [Mesa-dev] [PATCH 09/21] mesa: add validate_stencil_buffer() helper

[Gustaw Smolarczyk]

This time, send it to the list too.
Gustaw


1 cze 2017 15:45 "Gustaw Smolarczyk"  napisał(a):

1 cze 2017 15:07 "Samuel Pitoiset"  napisał(a):

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 111 +++---
-
 1 file changed, 58 insertions(+), 53 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 2c0300eab3..207ce7d501 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -178,6 +178,62 @@ is_valid_blit_filter(const struct gl_context *ctx,
GLenum filter)


 static void


Shouldn't it return a bool so that the caller will know whether the
validation passed or not?

+validate_stencil_buffer(struct gl_context *ctx, struct gl_framebuffer
*readFb,
+struct gl_framebuffer *drawFb, GLbitfield *mask,
+bool no_error, const char *func)
+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_STENCIL_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_z_bits, draw_z_bits;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination stencil buffer cannot be
the "
+ "same)", func);
+ return;
+  }
+
+  if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
+  _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
+ /* There is no need to check the stencil datatype here, because
+  * there is only one: GL_UNSIGNED_INT.
+  */
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment format mismatch)", func);
+ return;
+  }
+
+  read_z_bits = _mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS);
+  draw_z_bits = _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS);
+
+  /* If both buffers also have depth data, the depth formats must match
+   * as well.  If one doesn't have depth, it's not blitted, so we
should
+   * ignore the depth format check.
+   */
+  if (read_z_bits > 0 && draw_z_bits > 0 &&
+  (read_z_bits != draw_z_bits ||
+   _mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment depth format mismatch)", func);
+ return;
+  }
+   }
+}
+
+static void
 blit_framebuffer(struct gl_context *ctx,
  struct gl_framebuffer *readFb, struct gl_framebuffer
*drawFb,
  GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
@@ -317,59 +373,8 @@ blit_framebuffer(struct gl_context *ctx,
   }
}

-   if (mask & GL_STENCIL_BUFFER_BIT) {
-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is
silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_STENCIL_BUFFER_BIT;
-  }
-  else {
- int read_z_bits, draw_z_bits;
-
- if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(source and destination stencil "
-"buffer cannot be the same)", func);
-return;
- }
-
- if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
- _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
-/* There is no need to check the stencil datatype here, because
- * there is only one: GL_UNSIGNED_INT.
- */
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(stencil attachment format mismatch)", func);
-return;
- }
-
- read_z_bits = _mesa_get_format_bits(readRb->Format,
GL_DEPTH_BITS);
- draw_z_bits = _mesa_get_format_bits(drawRb->Format,
GL_DEPTH_BITS);
-
- /* If both buffers also have depth data, the depth formats must
match
-  * as well.  If one doesn't have depth, it's not blitted, so we
should
-  * ignore the depth format check.
-  */
- if (read_z_bits > 0 && draw_z_bits > 0 &&
-  

Re: [Mesa-dev] [PATCH 4/4] st_glsl_to_tgsi: replace variables tracking list with a hash table

[Samuel Pitoiset]

On 05/30/2017 07:52 AM, Dave Airlie wrote:

From: Dave Airlie 

This removes the linear search which is fail when number of variables
goes up to 3 or so.
---
  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 44 +-
  1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0e59aca..87c4b10 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -56,6 +56,7 @@
  #include "st_nir.h"
  #include "st_shader_cache.h"
  
+#include "util/hash_table.h"

  #include 
  
  #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) |\

@@ -310,7 +311,9 @@ public:
 const struct tgsi_opcode_info *info;
  };
  
-class variable_storage : public exec_node {

+class variable_storage {
+   DECLARE_RZALLOC_CXX_OPERATORS(variable_storage)
+
  public:
 variable_storage(ir_variable *var, gl_register_file file, int index,
  unsigned array_id = 0)
@@ -488,7 +491,7 @@ public:
 st_src_reg result;
  
 /** List of variable_storage */

-   exec_list variables;
+   struct hash_table *variables;
  
 /** List of immediate_storage */

 exec_list immediates;
@@ -1306,13 +1309,15 @@ glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
  variable_storage *
  glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
  {
+   struct hash_entry *entry = _mesa_hash_table_search(this->variables,
+  var);
+   variable_storage *storage;
+   if (!entry)
+  return NULL;
  
-   foreach_in_list(variable_storage, entry, >variables) {

-  if (entry->var == var)
- return entry;
-   }
+   storage = (variable_storage *)entry->data;
  
-   return NULL;

+   return storage;
  }


I would suggest to write to:

{
  struct hash_entry *entry;

  entry = _mesa_hash_table_search(this->variables, var);
  if (!entry)
return NULL;
  return (variable_storage *)entry->data;
}

I'm just wondering if this might affect very small shaders. I think a 
full shaderdb run can answer the question. :)


  
  void

@@ -1345,7 +1350,8 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir)
if (i == ir->get_num_state_slots()) {
   /* We'll set the index later. */
   storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
- this->variables.push_tail(storage);
+
+ _mesa_hash_table_insert(this->variables, ir, storage);
  
   dst = undef_dst;

} else {
@@ -1360,7 +1366,7 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir)
   storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index,
   dst.array_id);
  
- this->variables.push_tail(storage);

+ _mesa_hash_table_insert(this->variables, ir, storage);
}
  
  
@@ -2595,7 +2601,7 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)

case ir_var_uniform:
   entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
 var->data.param_index);
- this->variables.push_tail(entry);
+ _mesa_hash_table_insert(this->variables, var, entry);
   break;
case ir_var_shader_in: {
   /* The linker assigns locations for varyings and attributes,
@@ -2642,7 +2648,7 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
 decl->array_id);
   entry->component = component;
  
- this->variables.push_tail(entry);

+ _mesa_hash_table_insert(this->variables, var, entry);
   break;
}
case ir_var_shader_out: {
@@ -2700,7 +2706,8 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
   }
   entry->component = component;
  
- this->variables.push_tail(entry);

+ _mesa_hash_table_insert(this->variables, var, entry);
+
   break;
}
case ir_var_system_value:
@@ -2714,7 +2721,7 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
  
   entry = new(mem_ctx) variable_storage(var, src.file, src.index,

 src.array_id);
- this->variables.push_tail(entry);
+ _mesa_hash_table_insert(this->variables, var, entry);
  
   break;

}
@@ -4569,10 +4576,19 @@ glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
 have_fma = false;
 use_shared_memory = false;
 has_tex_txf_lz = false;
+   variables = NULL;
+}
+
+static void var_destroy(struct hash_entry *entry)
+{
+   variable_storage *storage = (variable_storage *)entry->data;
+
+   delete storage;
  }
  
  glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()

  {
+   _mesa_hash_table_destroy(variables, var_destroy);
 free(array_sizes);
 ralloc_free(mem_ctx);
  }
@@ -6772,6 +6788,8 @@ get_mesa_program_tgsi(struct gl_context 

Re: [Mesa-dev] [PATCH 1/4] st_glsl_to_tgsi: bump index back up to 32-bit

[Samuel Pitoiset]

Reviewed-by: Samuel Pitoiset 

On 05/30/2017 07:52 AM, Dave Airlie wrote:

From: Dave Airlie 

with some of the fp64 emulation, we are seeing shaders coming in with

32K temps, they go out with 40 or so used, but while doing register

renumber we need to store a lot of them.

So bump this fields back up to 32-bit.
---
  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 1eacbb1..e87c241 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -165,7 +165,7 @@ public:
  
 explicit st_src_reg(st_dst_reg reg);
  
-   int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */

+   int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
 int16_t index2D;
 uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
 int negate:4; /**< NEGATE_XYZW mask from mesa */
@@ -239,7 +239,7 @@ public:
  
 explicit st_dst_reg(st_src_reg reg);
  
-   int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */

+   int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
 int16_t index2D;
 gl_register_file file:5; /**< PROGRAM_* from Mesa */
 unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */


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Re: [Mesa-dev] [RFC] some glsl->tgsi optimisations

[Samuel Pitoiset]

Hi Dave,

Can you rebase your series on top of master because it doesn't apply.

I'm fine with the general idea. Note that I have a shader which spends 
5s in copy_propagate()... That's huge! Looks like this series might 
improve the situation here, but needs more testing.


Thanks!

On 05/30/2017 07:52 AM, Dave Airlie wrote:

While looking at the fp64 emulation code, we were spending minutes
in the glsl->tgsi passes as some tests were producing shaders with

32000 temporaries. Now it might be possible to reduce these earlier

with some GLSL passes, but this code is pretty bad as-is.

This reduces one test execution time from 4m30 -> 5s.

I've not regression tested these much, but someone interested
might want to throw them at some slow compile situations to see
if they help any.

I'll give them a lot more testing before I consider them non RFC.

Dave.

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Re: [Mesa-dev] [PATCH] util/rand_xor: add missing include statements

[Eric Engestrom]

On Thursday, 2017-06-01 12:13:18 +0200, Nicolas Dechesne wrote:
> Fixes for:
> 
> src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' 
> [-Werror=implicit-function-declaration]
> int fd = open("/dev/urandom", O_RDONLY);
>  ^~~~
> src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this 
> function)
> int fd = open("/dev/urandom", O_RDONLY);
>   ^~~~
> 
> Signed-off-by: Nicolas Dechesne 

Thanks, r-b and pushed, and welcome to Mesa :)

> ---
>  src/util/rand_xor.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/src/util/rand_xor.c b/src/util/rand_xor.c
> index de05fa64b3..de04bbc284 100644
> --- a/src/util/rand_xor.c
> +++ b/src/util/rand_xor.c
> @@ -25,6 +25,7 @@
>  #if defined(__linux__)
>  #include 
>  #include 
> +#include 
>  #else
>  #include 
>  #endif
> -- 
> 2.13.0
> 
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Re: [Mesa-dev] [PATCH mesa 2/2] egl/display: make platform detection thread-safe

[Emil Velikov]

Hi guys,

On 1 June 2017 at 12:56, Grazvydas Ignotas  wrote:
> On Thu, Jun 1, 2017 at 2:15 PM, Eric Engestrom
>  wrote:
>> If the detections methods ever become able to return different results
>> for different threads, the if chain might make threads go back and forth
>> between invalid and valid platforms.
>> Solve this by doing the detection in a local var and only overwriting
>> the global one at the end, if no other thread has updated it since.
>>
>> This means the platform detected in the thread might not be the platform
>> returned by the function, but this is a different issue that will need
>> to be discussed when this becomes possible.
>>
>> Reported-by: Grazvydas Ignotas 
>
> Not really, see https://bugs.freedesktop.org/show_bug.cgi?id=101252
>
>> Signed-off-by: Eric Engestrom 
>> ---
>>
>> This is unnecessary in my opinion, but doesn't hurt :)
>
> It is necessary, without it things will work most of the time but
> there will be rare failures.
> Imagine there are 2 threads that both call _eglGetNativePlatform()
> simultaneously:
> - thread 1 completes the first "if (native_platform ==
> _EGL_INVALID_PLATFORM)" check and is preemted to do something else
> - thread 2 executes the whole function, does "native_platform =
> _EGL_NATIVE_PLATFORM" and just before returning it's preemted
> - thread 1 wakes up and calls _eglGetNativePlatformFromEnv() which
> returns _EGL_INVALID_PLATFORM because no env vars are set, updates
> native_platform and then gets preemted again
> - thread 2 wakes up and returns wrong _EGL_INVALID_PLATFORM
>
Afaict this/similar fix is necessary, yet let me put an alternative
idea - add locking via _eglGlobal.Mutex.
May be an bit of overkill, but it's what we consistently use
throughout the code base.

Reverting the patch (as suggested by Grazvydas) does not fully address
the problem, but only makes it less likely to hit.

-Emil
P.S. Even with this resolved we're likely to hit another issue as
mentioned here https://bugs.freedesktop.org/show_bug.cgi?id=54971
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[Mesa-dev] [PATCH 21/21] mesa: add KHR_no_error support for glTexSubImage*D()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/gl_API.xml |  6 +++---
 src/mesa/main/teximage.c  | 43 +++
 src/mesa/main/teximage.h  | 18 ++
 3 files changed, 64 insertions(+), 3 deletions(-)

diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 5814d2ad92..d7c6ef8ca7 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -3299,7 +3299,7 @@
 
 
 
-
+
 
 
 
@@ -3311,7 +3311,7 @@
 
 
 
-
+
 
 
 
@@ -4025,7 +4025,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index ca8090f653..613bc13a5f 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -3414,6 +3414,20 @@ texturesubimage(struct gl_context *ctx, GLuint dims,
 
 
 void GLAPIENTRY
+_mesa_TexSubImage1D_no_error(GLenum target, GLint level,
+ GLint xoffset, GLsizei width,
+ GLenum format, GLenum type,
+ const GLvoid *pixels)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   texsubimage(ctx, 1, target, level,
+   xoffset, 0, 0,
+   width, 1, 1,
+   format, type, pixels);
+}
+
+
+void GLAPIENTRY
 _mesa_TexSubImage1D( GLenum target, GLint level,
  GLint xoffset, GLsizei width,
  GLenum format, GLenum type,
@@ -3428,6 +3442,21 @@ _mesa_TexSubImage1D( GLenum target, GLint level,
 
 
 void GLAPIENTRY
+_mesa_TexSubImage2D_no_error(GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLsizei width, GLsizei height,
+ GLenum format, GLenum type,
+ const GLvoid *pixels)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   texsubimage(ctx, 2, target, level,
+   xoffset, yoffset, 0,
+   width, height, 1,
+   format, type, pixels);
+}
+
+
+void GLAPIENTRY
 _mesa_TexSubImage2D( GLenum target, GLint level,
  GLint xoffset, GLint yoffset,
  GLsizei width, GLsizei height,
@@ -3442,6 +3471,20 @@ _mesa_TexSubImage2D( GLenum target, GLint level,
 }
 
 
+void GLAPIENTRY
+_mesa_TexSubImage3D_no_error(GLenum target, GLint level,
+ GLint xoffset, GLint yoffset, GLint zoffset,
+ GLsizei width, GLsizei height, GLsizei depth,
+ GLenum format, GLenum type,
+ const GLvoid *pixels)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   texsubimage(ctx, 3, target, level,
+   xoffset, yoffset, zoffset,
+   width, height, depth,
+   format, type, pixels);
+}
+
 
 void GLAPIENTRY
 _mesa_TexSubImage3D( GLenum target, GLint level,
diff --git a/src/mesa/main/teximage.h b/src/mesa/main/teximage.h
index bc4e235d38..295e35abb1 100644
--- a/src/mesa/main/teximage.h
+++ b/src/mesa/main/teximage.h
@@ -271,12 +271,24 @@ _mesa_TexImage3DEXT( GLenum target, GLint level, GLenum 
internalformat,
 extern void GLAPIENTRY
 _mesa_EGLImageTargetTexture2DOES( GLenum target, GLeglImageOES image );
 
+void GLAPIENTRY
+_mesa_TexSubImage1D_no_error(GLenum target, GLint level, GLint xoffset,
+ GLsizei width,
+ GLenum format, GLenum type,
+ const GLvoid *pixels);
+
 extern void GLAPIENTRY
 _mesa_TexSubImage1D( GLenum target, GLint level, GLint xoffset,
  GLsizei width,
  GLenum format, GLenum type,
  const GLvoid *pixels );
 
+void GLAPIENTRY
+_mesa_TexSubImage2D_no_error(GLenum target, GLint level,
+ GLint xoffset, GLint yoffset,
+ GLsizei width, GLsizei height,
+ GLenum format, GLenum type,
+ const GLvoid *pixels);
 
 extern void GLAPIENTRY
 _mesa_TexSubImage2D( GLenum target, GLint level,
@@ -285,6 +297,12 @@ _mesa_TexSubImage2D( GLenum target, GLint level,
  GLenum format, GLenum type,
  const GLvoid *pixels );
 
+void GLAPIENTRY
+_mesa_TexSubImage3D_no_error(GLenum target, GLint level,
+ GLint xoffset, GLint yoffset, GLint zoffset,
+ GLsizei width, GLsizei height, GLsizei depth,
+ GLenum format, GLenum type,
+ const GLvoid *pixels);
 
 extern void GLAPIENTRY
 _mesa_TexSubImage3D( GLenum target, GLint level,
-- 
2.13.0

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[Mesa-dev] [PATCH 20/21] mesa: add texsubimage() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/teximage.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 9285a96b68..ca8090f653 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -3282,6 +3282,24 @@ texsubimage_err(struct gl_context *ctx, GLuint dims, 
GLenum target, GLint level,
 }
 
 
+static void
+texsubimage(struct gl_context *ctx, GLuint dims, GLenum target, GLint level,
+GLint xoffset, GLint yoffset, GLint zoffset,
+GLsizei width, GLsizei height, GLsizei depth,
+ GLenum format, GLenum type, const GLvoid *pixels)
+{
+   struct gl_texture_object *texObj;
+   struct gl_texture_image *texImage;
+
+   texObj = _mesa_get_current_tex_object(ctx, target);
+   texImage = _mesa_select_tex_image(texObj, target, level);
+
+   _mesa_texture_sub_image(ctx, dims, texObj, texImage, target, level,
+   xoffset, yoffset, zoffset, width, height, depth,
+   format, type, pixels, false);
+}
+
+
 /**
  * Implement all the glTextureSubImage1/2/3D() functions.
  * Must split this out this way because of GL_TEXTURE_CUBE_MAP.
-- 
2.13.0

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[Mesa-dev] [PATCH 19/21] mesa: rename texsubimage() to texsubimage_err()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/teximage.c | 34 +-
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index fed1dad262..9285a96b68 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -3238,11 +3238,11 @@ _mesa_texture_sub_image(struct gl_context *ctx, GLuint 
dims,
  * Must split this out this way because of GL_TEXTURE_CUBE_MAP.
  */
 static void
-texsubimage(struct gl_context *ctx, GLuint dims, GLenum target, GLint level,
-GLint xoffset, GLint yoffset, GLint zoffset,
-GLsizei width, GLsizei height, GLsizei depth,
-GLenum format, GLenum type, const GLvoid *pixels,
-const char *callerName)
+texsubimage_err(struct gl_context *ctx, GLuint dims, GLenum target, GLint 
level,
+GLint xoffset, GLint yoffset, GLint zoffset,
+GLsizei width, GLsizei height, GLsizei depth,
+GLenum format, GLenum type, const GLvoid *pixels,
+const char *callerName)
 {
struct gl_texture_object *texObj;
struct gl_texture_image *texImage;
@@ -3402,10 +3402,10 @@ _mesa_TexSubImage1D( GLenum target, GLint level,
  const GLvoid *pixels )
 {
GET_CURRENT_CONTEXT(ctx);
-   texsubimage(ctx, 1, target, level,
-   xoffset, 0, 0,
-   width, 1, 1,
-   format, type, pixels, "glTexSubImage1D");
+   texsubimage_err(ctx, 1, target, level,
+   xoffset, 0, 0,
+   width, 1, 1,
+   format, type, pixels, "glTexSubImage1D");
 }
 
 
@@ -3417,10 +3417,10 @@ _mesa_TexSubImage2D( GLenum target, GLint level,
  const GLvoid *pixels )
 {
GET_CURRENT_CONTEXT(ctx);
-   texsubimage(ctx, 2, target, level,
-   xoffset, yoffset, 0,
-   width, height, 1,
-   format, type, pixels, "glTexSubImage2D");
+   texsubimage_err(ctx, 2, target, level,
+   xoffset, yoffset, 0,
+   width, height, 1,
+   format, type, pixels, "glTexSubImage2D");
 }
 
 
@@ -3433,10 +3433,10 @@ _mesa_TexSubImage3D( GLenum target, GLint level,
  const GLvoid *pixels )
 {
GET_CURRENT_CONTEXT(ctx);
-   texsubimage(ctx, 3, target, level,
-   xoffset, yoffset, zoffset,
-   width, height, depth,
-   format, type, pixels, "glTexSubImage3D");
+   texsubimage_err(ctx, 3, target, level,
+   xoffset, yoffset, zoffset,
+   width, height, depth,
+   format, type, pixels, "glTexSubImage3D");
 }
 
 void GLAPIENTRY
-- 
2.13.0

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[Mesa-dev] [PATCH 18/21] mesa: add KHR_no_error support for glCopyImageSubData()

[Samuel Pitoiset]

---
 src/mapi/glapi/gen/ARB_copy_image.xml |  2 +-
 src/mesa/main/copyimage.c | 23 +++
 src/mesa/main/copyimage.h |  7 +++
 3 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_copy_image.xml 
b/src/mapi/glapi/gen/ARB_copy_image.xml
index 9ee2ba304f..fb4c9b1c24 100644
--- a/src/mapi/glapi/gen/ARB_copy_image.xml
+++ b/src/mapi/glapi/gen/ARB_copy_image.xml
@@ -5,7 +5,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/mesa/main/copyimage.c b/src/mesa/main/copyimage.c
index 16a8132544..4a67f420de 100644
--- a/src/mesa/main/copyimage.c
+++ b/src/mesa/main/copyimage.c
@@ -519,6 +519,29 @@ copy_image_subdata(struct gl_context *ctx,
 }
 
 void GLAPIENTRY
+_mesa_CopyImageSubData_no_error(GLuint srcName, GLenum srcTarget, GLint 
srcLevel,
+GLint srcX, GLint srcY, GLint srcZ,
+GLuint dstName, GLenum dstTarget, GLint 
dstLevel,
+GLint dstX, GLint dstY, GLint dstZ,
+GLsizei srcWidth, GLsizei srcHeight, GLsizei 
srcDepth)
+{
+   struct gl_texture_image *srcTexImage, *dstTexImage;
+   struct gl_renderbuffer *srcRenderbuffer, *dstRenderbuffer;
+
+   GET_CURRENT_CONTEXT(ctx);
+
+   prepare_target(ctx, srcName, srcTarget, srcLevel, srcZ, ,
+  );
+
+   prepare_target(ctx, dstName, dstTarget, dstLevel, dstZ, ,
+  );
+
+   copy_image_subdata(ctx, srcTexImage, srcRenderbuffer, srcX, srcY, srcZ,
+  srcLevel, dstTexImage, dstRenderbuffer, dstX, dstY, dstZ,
+  dstLevel, srcWidth, srcHeight, srcDepth);
+}
+
+void GLAPIENTRY
 _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, GLint srcLevel,
GLint srcX, GLint srcY, GLint srcZ,
GLuint dstName, GLenum dstTarget, GLint dstLevel,
diff --git a/src/mesa/main/copyimage.h b/src/mesa/main/copyimage.h
index 40e95b6631..ea2f15b435 100644
--- a/src/mesa/main/copyimage.h
+++ b/src/mesa/main/copyimage.h
@@ -35,6 +35,13 @@
 extern "C" {
 #endif
 
+void GLAPIENTRY
+_mesa_CopyImageSubData_no_error(GLuint srcName, GLenum srcTarget, GLint 
srcLevel,
+GLint srcX, GLint srcY, GLint srcZ,
+GLuint destName, GLenum destTarget, GLint 
destLevel,
+GLint destX, GLint destY, GLint destZ,
+GLsizei srcWidth, GLsizei srcHeight, GLsizei 
srcDepth);
+
 extern void GLAPIENTRY
 _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, GLint srcLevel,
GLint srcX, GLint srcY, GLint srcZ,
-- 
2.13.0

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[Mesa-dev] [PATCH 17/21] mesa: add copy_image_subdata() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/copyimage.c | 78 ---
 1 file changed, 47 insertions(+), 31 deletions(-)

diff --git a/src/mesa/main/copyimage.c b/src/mesa/main/copyimage.c
index 6a74f7a1a8..16a8132544 100644
--- a/src/mesa/main/copyimage.c
+++ b/src/mesa/main/copyimage.c
@@ -474,6 +474,50 @@ copy_format_compatible(const struct gl_context *ctx,
return false;
 }
 
+static void
+copy_image_subdata(struct gl_context *ctx,
+   struct gl_texture_image *srcTexImage,
+   struct gl_renderbuffer *srcRenderbuffer,
+   int srcX, int srcY, int srcZ, int srcLevel,
+   struct gl_texture_image *dstTexImage,
+   struct gl_renderbuffer *dstRenderbuffer,
+   int dstX, int dstY, int dstZ, int dstLevel,
+   int srcWidth, int srcHeight, int srcDepth)
+{
+   int i;
+
+   /* loop over 2D slices/faces/layers */
+   for (i = 0; i < srcDepth; ++i) {
+  int newSrcZ = srcZ + i;
+  int newDstZ = dstZ + i;
+
+  if (srcTexImage &&
+  srcTexImage->TexObject->Target == GL_TEXTURE_CUBE_MAP) {
+ /* need to update srcTexImage pointer for the cube face */
+ assert(srcZ + i < MAX_FACES);
+ srcTexImage = srcTexImage->TexObject->Image[srcZ + i][srcLevel];
+ assert(srcTexImage);
+ newSrcZ = 0;
+  }
+
+  if (dstTexImage &&
+  dstTexImage->TexObject->Target == GL_TEXTURE_CUBE_MAP) {
+ /* need to update dstTexImage pointer for the cube face */
+ assert(dstZ + i < MAX_FACES);
+ dstTexImage = dstTexImage->TexObject->Image[dstZ + i][dstLevel];
+ assert(dstTexImage);
+ newDstZ = 0;
+  }
+
+  ctx->Driver.CopyImageSubData(ctx,
+   srcTexImage, srcRenderbuffer,
+   srcX, srcY, newSrcZ,
+   dstTexImage, dstRenderbuffer,
+   dstX, dstY, newDstZ,
+   srcWidth, srcHeight);
+   }
+}
+
 void GLAPIENTRY
 _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, GLint srcLevel,
GLint srcX, GLint srcY, GLint srcZ,
@@ -490,7 +534,6 @@ _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, 
GLint srcLevel,
GLuint src_bw, src_bh, dst_bw, dst_bh;
GLuint src_num_samples, dst_num_samples;
int dstWidth, dstHeight, dstDepth;
-   int i;
 
if (MESA_VERBOSE & VERBOSE_API)
   _mesa_debug(ctx, "glCopyImageSubData(%u, %s, %d, %d, %d, %d, "
@@ -606,34 +649,7 @@ _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, 
GLint srcLevel,
   return;
}
 
-   /* loop over 2D slices/faces/layers */
-   for (i = 0; i < srcDepth; ++i) {
-  int newSrcZ = srcZ + i;
-  int newDstZ = dstZ + i;
-
-  if (srcTexImage &&
-  srcTexImage->TexObject->Target == GL_TEXTURE_CUBE_MAP) {
- /* need to update srcTexImage pointer for the cube face */
- assert(srcZ + i < MAX_FACES);
- srcTexImage = srcTexImage->TexObject->Image[srcZ + i][srcLevel];
- assert(srcTexImage);
- newSrcZ = 0;
-  }
-
-  if (dstTexImage &&
-  dstTexImage->TexObject->Target == GL_TEXTURE_CUBE_MAP) {
- /* need to update dstTexImage pointer for the cube face */
- assert(dstZ + i < MAX_FACES);
- dstTexImage = dstTexImage->TexObject->Image[dstZ + i][dstLevel];
- assert(dstTexImage);
- newDstZ = 0;
-  }
-
-  ctx->Driver.CopyImageSubData(ctx,
-   srcTexImage, srcRenderbuffer,
-   srcX, srcY, newSrcZ,
-   dstTexImage, dstRenderbuffer,
-   dstX, dstY, newDstZ,
-   srcWidth, srcHeight);
-   }
+   copy_image_subdata(ctx, srcTexImage, srcRenderbuffer, srcX, srcY, srcZ,
+  srcLevel, dstTexImage, dstRenderbuffer, dstX, dstY, dstZ,
+  dstLevel, srcWidth, srcHeight, srcDepth);
 }
-- 
2.13.0

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[Mesa-dev] [PATCH 15/21] mesa: rename prepare_target() to prepare_target_err()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/copyimage.c | 34 ++
 1 file changed, 18 insertions(+), 16 deletions(-)

diff --git a/src/mesa/main/copyimage.c b/src/mesa/main/copyimage.c
index cf25159e88..07c2359dda 100644
--- a/src/mesa/main/copyimage.c
+++ b/src/mesa/main/copyimage.c
@@ -57,16 +57,16 @@ enum mesa_block_class {
  * \return true if success, false if error
  */
 static bool
-prepare_target(struct gl_context *ctx, GLuint name, GLenum target,
-   int level, int z, int depth,
-   struct gl_texture_image **tex_image,
-   struct gl_renderbuffer **renderbuffer,
-   mesa_format *format,
-   GLenum *internalFormat,
-   GLuint *width,
-   GLuint *height,
-   GLuint *num_samples,
-   const char *dbg_prefix)
+prepare_target_err(struct gl_context *ctx, GLuint name, GLenum target,
+   int level, int z, int depth,
+   struct gl_texture_image **tex_image,
+   struct gl_renderbuffer **renderbuffer,
+   mesa_format *format,
+   GLenum *internalFormat,
+   GLuint *width,
+   GLuint *height,
+   GLuint *num_samples,
+   const char *dbg_prefix)
 {
if (name == 0) {
   _mesa_error(ctx, GL_INVALID_VALUE,
@@ -484,14 +484,16 @@ _mesa_CopyImageSubData(GLuint srcName, GLenum srcTarget, 
GLint srcLevel,
   return;
}
 
-   if (!prepare_target(ctx, srcName, srcTarget, srcLevel, srcZ, srcDepth,
-   , , ,
-   , _w, _h, _num_samples, "src"))
+   if (!prepare_target_err(ctx, srcName, srcTarget, srcLevel, srcZ, srcDepth,
+   , , ,
+   , _w, _h, _num_samples,
+   "src"))
   return;
 
-   if (!prepare_target(ctx, dstName, dstTarget, dstLevel, dstZ, srcDepth,
-   , , ,
-   , _w, _h, _num_samples, "dst"))
+   if (!prepare_target_err(ctx, dstName, dstTarget, dstLevel, dstZ, srcDepth,
+   , , ,
+   , _w, _h, _num_samples,
+   "dst"))
   return;
 
_mesa_get_format_block_size(srcFormat, _bw, _bh);
-- 
2.13.0

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[Mesa-dev] [PATCH 14/21] mesa: add KHR_no_error support for glBlitNamedFramebuffer()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_direct_state_access.xml |  2 +-
 src/mesa/main/blit.c   | 30 ++
 src/mesa/main/blit.h   |  9 
 3 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_direct_state_access.xml 
b/src/mapi/glapi/gen/ARB_direct_state_access.xml
index cb24d7981c..54992e5304 100644
--- a/src/mapi/glapi/gen/ARB_direct_state_access.xml
+++ b/src/mapi/glapi/gen/ARB_direct_state_access.xml
@@ -247,7 +247,7 @@
   

 
-   
+   
   
   
   
diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 4e5f7b27bf..95a71fca60 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -606,6 +606,36 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint 
srcX1, GLint srcY1,
 
 
 void GLAPIENTRY
+_mesa_BlitNamedFramebuffer_no_error(GLuint readFramebuffer,
+GLuint drawFramebuffer,
+GLint srcX0, GLint srcY0,
+GLint srcX1, GLint srcY1,
+GLint dstX0, GLint dstY0,
+GLint dstX1, GLint dstY1,
+GLbitfield mask, GLenum filter)
+{
+   struct gl_framebuffer *readFb, *drawFb;
+
+   GET_CURRENT_CONTEXT(ctx);
+
+   if (readFramebuffer)
+  readFb = _mesa_lookup_framebuffer(ctx, readFramebuffer);
+   else
+  readFb = ctx->WinSysReadBuffer;
+
+   if (drawFramebuffer)
+  drawFb = _mesa_lookup_framebuffer(ctx, drawFramebuffer);
+   else
+  drawFb = ctx->WinSysDrawBuffer;
+
+   blit_framebuffer(ctx, readFb, drawFb,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, true, "glBlitNamedFramebuffer");
+}
+
+
+void GLAPIENTRY
 _mesa_BlitNamedFramebuffer(GLuint readFramebuffer, GLuint drawFramebuffer,
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
diff --git a/src/mesa/main/blit.h b/src/mesa/main/blit.h
index 6397518dbd..39021e7be6 100644
--- a/src/mesa/main/blit.h
+++ b/src/mesa/main/blit.h
@@ -45,6 +45,15 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, 
GLint srcY1,
  GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
  GLbitfield mask, GLenum filter);
 
+void GLAPIENTRY
+_mesa_BlitNamedFramebuffer_no_error(GLuint readFramebuffer,
+GLuint drawFramebuffer,
+GLint srcX0, GLint srcY0,
+GLint srcX1, GLint srcY1,
+GLint dstX0, GLint dstY0,
+GLint dstX1, GLint dstY1,
+GLbitfield mask, GLenum filter);
+
 extern void GLAPIENTRY
 _mesa_BlitNamedFramebuffer(GLuint readFramebuffer, GLuint drawFramebuffer,
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
-- 
2.13.0

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[Mesa-dev] [PATCH 16/21] mesa: add prepare_target() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/copyimage.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/src/mesa/main/copyimage.c b/src/mesa/main/copyimage.c
index 07c2359dda..6a74f7a1a8 100644
--- a/src/mesa/main/copyimage.c
+++ b/src/mesa/main/copyimage.c
@@ -214,6 +214,30 @@ prepare_target_err(struct gl_context *ctx, GLuint name, 
GLenum target,
return true;
 }
 
+static void
+prepare_target(struct gl_context *ctx, GLuint name, GLenum target,
+   int level, int z,
+   struct gl_texture_image **texImage,
+   struct gl_renderbuffer **renderbuffer)
+{
+   if (target == GL_RENDERBUFFER) {
+  struct gl_renderbuffer *rb = _mesa_lookup_renderbuffer(ctx, name);
+
+  *renderbuffer = rb;
+  *texImage = NULL;
+   } else {
+  struct gl_texture_object *texObj = _mesa_lookup_texture(ctx, name);
+
+  if (target == GL_TEXTURE_CUBE_MAP) {
+ *texImage = texObj->Image[z][level];
+  }
+  else {
+ *texImage = _mesa_select_tex_image(texObj, target, level);
+  }
+
+  *renderbuffer = NULL;
+   }
+}
 
 /**
  * Check that the x,y,z,width,height,region is within the texture image
-- 
2.13.0

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[Mesa-dev] [PATCH 10/21] mesa: add validate_depth_buffer() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 105 +++
 1 file changed, 56 insertions(+), 49 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 207ce7d501..455a9a647f 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -233,6 +233,60 @@ validate_stencil_buffer(struct gl_context *ctx, struct 
gl_framebuffer *readFb,
}
 }
 
+
+static void
+validate_depth_buffer(struct gl_context *ctx, struct gl_framebuffer *readFb,
+  struct gl_framebuffer *drawFb, GLbitfield *mask,
+  bool no_error, const char *func)
+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_DEPTH].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_DEPTH].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_DEPTH_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_s_bit, draw_s_bit;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination depth buffer cannot be the "
+ "same)", func);
+ return;
+  }
+
+  if ((_mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS) !=
+   _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS)) ||
+  (_mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(depth attachment format mismatch)", func);
+ return;
+  }
+
+  read_s_bit = _mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS);
+  draw_s_bit = _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS);
+
+  /* If both buffers also have stencil data, the stencil formats must
+   * match as well.  If one doesn't have stencil, it's not blitted, so
+   * we should ignore the stencil format check.
+   */
+  if (read_s_bit > 0 && draw_s_bit > 0 && read_s_bit != draw_s_bit) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(depth attachment stencil bits mismatch)", func);
+ return;
+  }
+   }
+}
+
+
 static void
 blit_framebuffer(struct gl_context *ctx,
  struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
@@ -376,55 +430,8 @@ blit_framebuffer(struct gl_context *ctx,
if (mask & GL_STENCIL_BUFFER_BIT)
   validate_stencil_buffer(ctx, readFb, drawFb, , false, func);
 
-   if (mask & GL_DEPTH_BUFFER_BIT) {
-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_DEPTH].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_DEPTH].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_DEPTH_BUFFER_BIT;
-  }
-  else {
- int read_s_bit, draw_s_bit;
-
- if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(source and destination depth "
-"buffer cannot be the same)", func);
-return;
- }
-
- if ((_mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS) !=
-  _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS)) ||
- (_mesa_get_format_datatype(readRb->Format) !=
-  _mesa_get_format_datatype(drawRb->Format))) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(depth attachment format mismatch)", func);
-return;
- }
-
- read_s_bit = _mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS);
- draw_s_bit = _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS);
-
- /* If both buffers also have stencil data, the stencil formats must
-  * match as well.  If one doesn't have stencil, it's not blitted, so
-  * we should ignore the stencil format check.
-  */
- if (read_s_bit > 0 && draw_s_bit > 0 && read_s_bit != draw_s_bit) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(depth attachment stencil bits mismatch)", func);
-return;
- }
-  }
-   }
-
+   if (mask & GL_DEPTH_BUFFER_BIT)
+  validate_depth_buffer(ctx, readFb, drawFb, , false, func);
 
if (_mesa_is_gles3(ctx)) {
   /* Page 194 (page 206 of the PDF) in section 4.3.2 of the OpenGL ES
-- 
2.13.0

[Mesa-dev] [PATCH 13/21] mesa: add KHR_no_error support for glBlitFramebuffer()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_framebuffer_object.xml |  2 +-
 src/mesa/main/blit.c  | 15 +++
 src/mesa/main/blit.h  |  6 ++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_framebuffer_object.xml 
b/src/mapi/glapi/gen/ARB_framebuffer_object.xml
index 76114eb32a..26f495f8bb 100644
--- a/src/mapi/glapi/gen/ARB_framebuffer_object.xml
+++ b/src/mapi/glapi/gen/ARB_framebuffer_object.xml
@@ -271,7 +271,7 @@

 
 
-
+
 
 
 
diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index aa95e9c96c..4e5f7b27bf 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -569,6 +569,21 @@ blit_framebuffer(struct gl_context *ctx,
  * when the samples must be resolved to a single color.
  */
 void GLAPIENTRY
+_mesa_BlitFramebuffer_no_error(GLint srcX0, GLint srcY0, GLint srcX1,
+   GLint srcY1, GLint dstX0, GLint dstY0,
+   GLint dstX1, GLint dstY1,
+   GLbitfield mask, GLenum filter)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   blit_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, true, "glBlitFramebuffer");
+}
+
+
+void GLAPIENTRY
 _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
   GLbitfield mask, GLenum filter)
diff --git a/src/mesa/main/blit.h b/src/mesa/main/blit.h
index 1ca4f83028..6397518dbd 100644
--- a/src/mesa/main/blit.h
+++ b/src/mesa/main/blit.h
@@ -34,6 +34,12 @@ _mesa_regions_overlap(int srcX0, int srcY0,
   int dstX0, int dstY0,
   int dstX1, int dstY1);
 
+void GLAPIENTRY
+_mesa_BlitFramebuffer_no_error(GLint srcX0, GLint srcY0, GLint srcX1,
+   GLint srcY1, GLint dstX0, GLint dstY0,
+   GLint dstX1, GLint dstY1,
+   GLbitfield mask, GLenum filter);
+
 extern void GLAPIENTRY
 _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
  GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-- 
2.13.0

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[Mesa-dev] [PATCH 09/21] mesa: add validate_stencil_buffer() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 111 +++
 1 file changed, 58 insertions(+), 53 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 2c0300eab3..207ce7d501 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -178,6 +178,62 @@ is_valid_blit_filter(const struct gl_context *ctx, GLenum 
filter)
 
 
 static void
+validate_stencil_buffer(struct gl_context *ctx, struct gl_framebuffer *readFb,
+struct gl_framebuffer *drawFb, GLbitfield *mask,
+bool no_error, const char *func)
+{
+   struct gl_renderbuffer *readRb =
+  readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+   struct gl_renderbuffer *drawRb =
+  drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (readRb == NULL || drawRb == NULL) {
+  *mask &= ~GL_STENCIL_BUFFER_BIT;
+   } else if (!no_error) {
+  int read_z_bits, draw_z_bits;
+
+  if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(source and destination stencil buffer cannot be the "
+ "same)", func);
+ return;
+  }
+
+  if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
+  _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
+ /* There is no need to check the stencil datatype here, because
+  * there is only one: GL_UNSIGNED_INT.
+  */
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment format mismatch)", func);
+ return;
+  }
+
+  read_z_bits = _mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS);
+  draw_z_bits = _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS);
+
+  /* If both buffers also have depth data, the depth formats must match
+   * as well.  If one doesn't have depth, it's not blitted, so we should
+   * ignore the depth format check.
+   */
+  if (read_z_bits > 0 && draw_z_bits > 0 &&
+  (read_z_bits != draw_z_bits ||
+   _mesa_get_format_datatype(readRb->Format) !=
+   _mesa_get_format_datatype(drawRb->Format))) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(stencil attachment depth format mismatch)", func);
+ return;
+  }
+   }
+}
+
+static void
 blit_framebuffer(struct gl_context *ctx,
  struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
  GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
@@ -317,59 +373,8 @@ blit_framebuffer(struct gl_context *ctx,
   }
}
 
-   if (mask & GL_STENCIL_BUFFER_BIT) {
-  struct gl_renderbuffer *readRb =
- readFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-  struct gl_renderbuffer *drawRb =
- drawFb->Attachment[BUFFER_STENCIL].Renderbuffer;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is silently
-   * ignored."
-   */
-  if ((readRb == NULL) || (drawRb == NULL)) {
- mask &= ~GL_STENCIL_BUFFER_BIT;
-  }
-  else {
- int read_z_bits, draw_z_bits;
-
- if (_mesa_is_gles3(ctx) && (drawRb == readRb)) {
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(source and destination stencil "
-"buffer cannot be the same)", func);
-return;
- }
-
- if (_mesa_get_format_bits(readRb->Format, GL_STENCIL_BITS) !=
- _mesa_get_format_bits(drawRb->Format, GL_STENCIL_BITS)) {
-/* There is no need to check the stencil datatype here, because
- * there is only one: GL_UNSIGNED_INT.
- */
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(stencil attachment format mismatch)", func);
-return;
- }
-
- read_z_bits = _mesa_get_format_bits(readRb->Format, GL_DEPTH_BITS);
- draw_z_bits = _mesa_get_format_bits(drawRb->Format, GL_DEPTH_BITS);
-
- /* If both buffers also have depth data, the depth formats must match
-  * as well.  If one doesn't have depth, it's not blitted, so we should
-  * ignore the depth format check.
-  */
- if (read_z_bits > 0 && draw_z_bits > 0 &&
- (read_z_bits != draw_z_bits ||
-  _mesa_get_format_datatype(readRb->Format) !=
-  _mesa_get_format_datatype(drawRb->Format))) {
-
-_mesa_error(ctx, GL_INVALID_OPERATION,
-"%s(stencil attachment depth format 

[Mesa-dev] [PATCH 12/21] mesa: add 'no_error' parameter to blit_framebuffer()

[Samuel Pitoiset]

The whole GLES3 block has been moved before the buffer validation
checks.

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 177 ++-
 1 file changed, 90 insertions(+), 87 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 95f97ed559..aa95e9c96c 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -376,12 +376,9 @@ blit_framebuffer(struct gl_context *ctx,
  struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
  GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
  GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
- GLbitfield mask, GLenum filter, const char *func)
+ GLbitfield mask, GLenum filter, bool no_error,
+ const char *func)
 {
-   const GLbitfield legalMaskBits = (GL_COLOR_BUFFER_BIT |
- GL_DEPTH_BUFFER_BIT |
- GL_STENCIL_BUFFER_BIT);
-
FLUSH_VERTICES(ctx, 0);
 
/* Update completeness status of readFb and drawFb. */
@@ -397,104 +394,110 @@ blit_framebuffer(struct gl_context *ctx,
   return;
}
 
-   /* check for complete framebuffers */
-   if (drawFb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT ||
-   readFb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
-  _mesa_error(ctx, GL_INVALID_FRAMEBUFFER_OPERATION_EXT,
-  "%s(incomplete draw/read buffers)", func);
-  return;
-   }
-
-   if (!is_valid_blit_filter(ctx, filter)) {
-  _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid filter %s)", func,
-  _mesa_enum_to_string(filter));
-  return;
-   }
-
-   if ((filter == GL_SCALED_RESOLVE_FASTEST_EXT ||
-filter == GL_SCALED_RESOLVE_NICEST_EXT) &&
-(readFb->Visual.samples == 0 || drawFb->Visual.samples > 0)) {
-  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(%s: invalid samples)", func,
-  _mesa_enum_to_string(filter));
-  return;
-   }
-
-   if (mask & ~legalMaskBits) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(invalid mask bits set)", func);
-  return;
-   }
-
-   /* depth/stencil must be blitted with nearest filtering */
-   if ((mask & (GL_DEPTH_BUFFER_BIT | GL_STENCIL_BUFFER_BIT))
-&& filter != GL_NEAREST) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
- "%s(depth/stencil requires GL_NEAREST filter)", func);
-  return;
-   }
+   if (!no_error) {
+  const GLbitfield legalMaskBits = (GL_COLOR_BUFFER_BIT |
+GL_DEPTH_BUFFER_BIT |
+GL_STENCIL_BUFFER_BIT);
 
-   if (mask & GL_COLOR_BUFFER_BIT)
-  validate_color_buffer(ctx, readFb, drawFb, , filter, false, func);
+  /* check for complete framebuffers */
+  if (drawFb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT ||
+  readFb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
+ _mesa_error(ctx, GL_INVALID_FRAMEBUFFER_OPERATION_EXT,
+ "%s(incomplete draw/read buffers)", func);
+ return;
+  }
 
-   if (mask & GL_STENCIL_BUFFER_BIT)
-  validate_stencil_buffer(ctx, readFb, drawFb, , false, func);
+  if (!is_valid_blit_filter(ctx, filter)) {
+ _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid filter %s)", func,
+ _mesa_enum_to_string(filter));
+ return;
+  }
 
-   if (mask & GL_DEPTH_BUFFER_BIT)
-  validate_depth_buffer(ctx, readFb, drawFb, , false, func);
-
-   if (_mesa_is_gles3(ctx)) {
-  /* Page 194 (page 206 of the PDF) in section 4.3.2 of the OpenGL ES
-   * 3.0.1 spec says:
-   *
-   * "If SAMPLE_BUFFERS for the draw framebuffer is greater than zero,
-   * an INVALID_OPERATION error is generated."
-   */
-  if (drawFb->Visual.samples > 0) {
- _mesa_error(ctx, GL_INVALID_OPERATION,
- "%s(destination samples must be 0)", func);
+  if ((filter == GL_SCALED_RESOLVE_FASTEST_EXT ||
+   filter == GL_SCALED_RESOLVE_NICEST_EXT) &&
+   (readFb->Visual.samples == 0 || drawFb->Visual.samples > 0)) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, "%s(%s: invalid samples)", 
func,
+ _mesa_enum_to_string(filter));
  return;
   }
 
-  /* Page 194 (page 206 of the PDF) in section 4.3.2 of the OpenGL ES
-   * 3.0.1 spec says:
-   *
-   * "If SAMPLE_BUFFERS for the read framebuffer is greater than zero,
-   * no copy is performed and an INVALID_OPERATION error is generated
-   * if the formats of the read and draw framebuffers are not
-   * identical or if the source and destination rectangles are not
-   * defined with the same (X0, Y0) and (X1, Y1) bounds."
-   *
-   * The format check was made above because desktop OpenGL has the same
-   * requirement.
-   */
-  if (readFb->Visual.samples > 0
-   

[Mesa-dev] [PATCH 11/21] mesa: add validate_color_buffer() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 164 +++
 1 file changed, 86 insertions(+), 78 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index 455a9a647f..95f97ed559 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -178,6 +178,90 @@ is_valid_blit_filter(const struct gl_context *ctx, GLenum 
filter)
 
 
 static void
+validate_color_buffer(struct gl_context *ctx, struct gl_framebuffer *readFb,
+  struct gl_framebuffer *drawFb, GLbitfield *mask,
+  GLenum filter, bool no_error, const char *func)
+{
+   const GLuint numColorDrawBuffers = drawFb->_NumColorDrawBuffers;
+   const struct gl_renderbuffer *colorReadRb = readFb->_ColorReadBuffer;
+   const struct gl_renderbuffer *colorDrawRb = NULL;
+   GLuint i;
+
+   /* From the EXT_framebuffer_object spec:
+*
+* "If a buffer is specified in  and does not exist in both
+* the read and draw framebuffers, the corresponding bit is silently
+* ignored."
+*/
+   if (!colorReadRb || numColorDrawBuffers == 0) {
+  *mask &= ~GL_COLOR_BUFFER_BIT;
+   } else if (!no_error) {
+  for (i = 0; i < numColorDrawBuffers; i++) {
+ colorDrawRb = drawFb->_ColorDrawBuffers[i];
+ if (!colorDrawRb)
+continue;
+
+ /* Page 193 (page 205 of the PDF) in section 4.3.2 of the OpenGL
+  * ES 3.0.1 spec says:
+  *
+  * "If the source and destination buffers are identical, an
+  * INVALID_OPERATION error is generated. Different mipmap levels
+  * of a texture, different layers of a three- dimensional texture
+  * or two-dimensional array texture, and different faces of a cube
+  * map texture do not constitute identical buffers."
+  */
+ if (_mesa_is_gles3(ctx) && (colorDrawRb == colorReadRb)) {
+_mesa_error(ctx, GL_INVALID_OPERATION,
+"%s(source and destination color buffer cannot be the "
+"same)", func);
+return;
+ }
+
+ if (!compatible_color_datatypes(colorReadRb->Format,
+ colorDrawRb->Format)) {
+_mesa_error(ctx, GL_INVALID_OPERATION,
+"%s(color buffer datatypes mismatch)", func);
+return;
+ }
+
+ /* extra checks for multisample copies... */
+ if (readFb->Visual.samples > 0 || drawFb->Visual.samples > 0) {
+/* color formats must match on GLES. This isn't checked on desktop
+ * GL because the GL 4.4 spec was changed to allow it.  In the
+ * section entitled “Changes in the released Specification of July
+ * 22, 2013” it says:
+ *
+ * “Relax BlitFramebuffer in section 18.3.1 so that format
+ * conversion can take place during multisample blits, since
+ * drivers already allow this and some apps depend on it.”
+ */
+if (_mesa_is_gles(ctx) &&
+!compatible_resolve_formats(colorReadRb, colorDrawRb)) {
+   _mesa_error(ctx, GL_INVALID_OPERATION,
+   "%s(bad src/dst multisample pixel formats)", func);
+   return;
+}
+ }
+  }
+
+  if (filter != GL_NEAREST) {
+ /* From EXT_framebuffer_multisample_blit_scaled specification:
+  * "Calling BlitFramebuffer will result in an INVALID_OPERATION error
+  * if filter is not NEAREST and read buffer contains integer data."
+  */
+ GLenum type = _mesa_get_format_datatype(colorReadRb->Format);
+
+ if (type == GL_INT || type == GL_UNSIGNED_INT) {
+ _mesa_error(ctx, GL_INVALID_OPERATION,
+ "%s(integer color type)", func);
+return;
+ }
+  }
+   }
+}
+
+
+static void
 validate_stencil_buffer(struct gl_context *ctx, struct gl_framebuffer *readFb,
 struct gl_framebuffer *drawFb, GLbitfield *mask,
 bool no_error, const char *func)
@@ -348,84 +432,8 @@ blit_framebuffer(struct gl_context *ctx,
   return;
}
 
-   /* get color read/draw renderbuffers */
-   if (mask & GL_COLOR_BUFFER_BIT) {
-  const GLuint numColorDrawBuffers = drawFb->_NumColorDrawBuffers;
-  const struct gl_renderbuffer *colorReadRb = readFb->_ColorReadBuffer;
-  const struct gl_renderbuffer *colorDrawRb = NULL;
-  GLuint i;
-
-  /* From the EXT_framebuffer_object spec:
-   *
-   * "If a buffer is specified in  and does not exist in both
-   * the read and draw framebuffers, the corresponding bit is silently
-   * ignored."
-   */
-  if (!colorReadRb || numColorDrawBuffers == 0) {
- mask &= ~GL_COLOR_BUFFER_BIT;
-  }
-  else {
- 

[Mesa-dev] [PATCH 08/21] mesa: make _mesa_blit_framebuffer() static

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/blit.c | 29 ++---
 src/mesa/main/blit.h |  8 
 2 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/src/mesa/main/blit.c b/src/mesa/main/blit.c
index e739130f98..2c0300eab3 100644
--- a/src/mesa/main/blit.c
+++ b/src/mesa/main/blit.c
@@ -177,13 +177,12 @@ is_valid_blit_filter(const struct gl_context *ctx, GLenum 
filter)
 }
 
 
-void
-_mesa_blit_framebuffer(struct gl_context *ctx,
-   struct gl_framebuffer *readFb,
-   struct gl_framebuffer *drawFb,
-   GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
-   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-   GLbitfield mask, GLenum filter, const char *func)
+static void
+blit_framebuffer(struct gl_context *ctx,
+ struct gl_framebuffer *readFb, struct gl_framebuffer *drawFb,
+ GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
+ GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
+ GLbitfield mask, GLenum filter, const char *func)
 {
const GLbitfield legalMaskBits = (GL_COLOR_BUFFER_BIT |
  GL_DEPTH_BUFFER_BIT |
@@ -561,10 +560,10 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint 
srcX1, GLint srcY1,
   dstX0, dstY0, dstX1, dstY1,
   mask, _mesa_enum_to_string(filter));
 
-   _mesa_blit_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
-  srcX0, srcY0, srcX1, srcY1,
-  dstX0, dstY0, dstX1, dstY1,
-  mask, filter, "glBlitFramebuffer");
+   blit_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, "glBlitFramebuffer");
 }
 
 
@@ -612,8 +611,8 @@ _mesa_BlitNamedFramebuffer(GLuint readFramebuffer, GLuint 
drawFramebuffer,
else
   drawFb = ctx->WinSysDrawBuffer;
 
-   _mesa_blit_framebuffer(ctx, readFb, drawFb,
-  srcX0, srcY0, srcX1, srcY1,
-  dstX0, dstY0, dstX1, dstY1,
-  mask, filter, "glBlitNamedFramebuffer");
+   blit_framebuffer(ctx, readFb, drawFb,
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1,
+mask, filter, "glBlitNamedFramebuffer");
 }
diff --git a/src/mesa/main/blit.h b/src/mesa/main/blit.h
index 88dd4a9ec8..1ca4f83028 100644
--- a/src/mesa/main/blit.h
+++ b/src/mesa/main/blit.h
@@ -34,14 +34,6 @@ _mesa_regions_overlap(int srcX0, int srcY0,
   int dstX0, int dstY0,
   int dstX1, int dstY1);
 
-extern void
-_mesa_blit_framebuffer(struct gl_context *ctx,
-   struct gl_framebuffer *readFb,
-   struct gl_framebuffer *drawFb,
-   GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
-   GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-   GLbitfield mask, GLenum filter, const char *func);
-
 extern void GLAPIENTRY
 _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
  GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
-- 
2.13.0

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[Mesa-dev] [PATCH 07/21] mesa: add KHR_no_error support for glBindBuffer()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/gl_API.xml |  2 +-
 src/mesa/main/bufferobj.c | 10 ++
 src/mesa/main/bufferobj.h |  3 +++
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 8f93318b95..5814d2ad92 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -5037,7 +5037,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 9323e8d9a9..e79d22ca86 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -1229,6 +1229,16 @@ _mesa_buffer_unmap_all_mappings(struct gl_context *ctx,
 /**/
 
 void GLAPIENTRY
+_mesa_BindBuffer_no_error(GLenum target, GLuint buffer)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct gl_buffer_object **bindTarget = get_buffer_target(ctx, target);
+   bind_buffer_object(ctx, bindTarget, buffer);
+}
+
+
+void GLAPIENTRY
 _mesa_BindBuffer(GLenum target, GLuint buffer)
 {
GET_CURRENT_CONTEXT(ctx);
diff --git a/src/mesa/main/bufferobj.h b/src/mesa/main/bufferobj.h
index a8e174dc6b..44342840a8 100644
--- a/src/mesa/main/bufferobj.h
+++ b/src/mesa/main/bufferobj.h
@@ -156,6 +156,9 @@ _mesa_ClearBufferSubData_sw(struct gl_context *ctx,
  * API functions
  */
 void GLAPIENTRY
+_mesa_BindBuffer_no_error(GLenum target, GLuint buffer);
+
+void GLAPIENTRY
 _mesa_BindBuffer(GLenum target, GLuint buffer);
 
 void GLAPIENTRY
-- 
2.13.0

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[Mesa-dev] [PATCH 05/21] mesa: add KHR_no_error support for glInvalidateBufferSubData()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_invalidate_subdata.xml |  2 +-
 src/mesa/main/bufferobj.c | 10 ++
 src/mesa/main/bufferobj.h |  5 +
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_invalidate_subdata.xml 
b/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
index 052816ad7e..79e8a917f5 100644
--- a/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
+++ b/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
@@ -19,7 +19,7 @@
 
   
 
-  
+  
 
 
 
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 08f5a9e59b..171750e0c3 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -4247,6 +4247,16 @@ invalidate_buffer_subdata(struct gl_context *ctx,
 }
 
 void GLAPIENTRY
+_mesa_InvalidateBufferSubData_no_error(GLuint buffer, GLintptr offset,
+   GLsizeiptr length)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct gl_buffer_object *bufObj = _mesa_lookup_bufferobj(ctx, buffer);
+   invalidate_buffer_subdata(ctx, bufObj, offset, length);
+}
+
+void GLAPIENTRY
 _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr offset,
   GLsizeiptr length)
 {
diff --git a/src/mesa/main/bufferobj.h b/src/mesa/main/bufferobj.h
index ff44fed0b8..2e49d33b8d 100644
--- a/src/mesa/main/bufferobj.h
+++ b/src/mesa/main/bufferobj.h
@@ -338,6 +338,11 @@ _mesa_BindBuffersRange(GLenum target, GLuint first, 
GLsizei count,
 void GLAPIENTRY
 _mesa_BindBuffersBase(GLenum target, GLuint first, GLsizei count,
   const GLuint *buffers);
+
+void GLAPIENTRY
+_mesa_InvalidateBufferSubData_no_error(GLuint buffer, GLintptr offset,
+   GLsizeiptr length);
+
 void GLAPIENTRY
 _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr offset,
   GLsizeiptr length);
-- 
2.13.0

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[Mesa-dev] [PATCH 06/21] mesa: add KHR_no_error support for glInvalidateBufferData()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_invalidate_subdata.xml | 2 +-
 src/mesa/main/bufferobj.c | 9 +
 src/mesa/main/bufferobj.h | 3 +++
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_invalidate_subdata.xml 
b/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
index 79e8a917f5..2cbc4f63be 100644
--- a/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
+++ b/src/mapi/glapi/gen/ARB_invalidate_subdata.xml
@@ -25,7 +25,7 @@
 
   
 
-  
+  
 
   
 
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 171750e0c3..9323e8d9a9 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -4309,6 +4309,15 @@ _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr 
offset,
 }
 
 void GLAPIENTRY
+_mesa_InvalidateBufferData_no_error(GLuint buffer)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct gl_buffer_object *bufObj =_mesa_lookup_bufferobj(ctx, buffer);
+   invalidate_buffer_subdata(ctx, bufObj, 0, bufObj->Size);
+}
+
+void GLAPIENTRY
 _mesa_InvalidateBufferData(GLuint buffer)
 {
GET_CURRENT_CONTEXT(ctx);
diff --git a/src/mesa/main/bufferobj.h b/src/mesa/main/bufferobj.h
index 2e49d33b8d..a8e174dc6b 100644
--- a/src/mesa/main/bufferobj.h
+++ b/src/mesa/main/bufferobj.h
@@ -348,6 +348,9 @@ _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr 
offset,
   GLsizeiptr length);
 
 void GLAPIENTRY
+_mesa_InvalidateBufferData_no_error(GLuint buffer);
+
+void GLAPIENTRY
 _mesa_InvalidateBufferData(GLuint buffer);
 
 void GLAPIENTRY
-- 
2.13.0

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[Mesa-dev] [PATCH 00/21] mesa: Some more KHR_no_error support patches

[Samuel Pitoiset]

Hi,

Found after profiling "Dawn Of War 3" with Sysprof. This series should
save few CPU cycles for this not yet released game.

Please review,
Thanks!

Samuel Pitoiset (21):
  mesa: add vertex_array_vertex_buffers_err() helper
  mesa: add KHR_no_error support for glVertexArrayVertexBuffers()
  mesa: add KHR_no_error support for glBindVertexBuffers()
  mesa: add invalidate_buffer_subdata() helper
  mesa: add KHR_no_error support for glInvalidateBufferSubData()
  mesa: add KHR_no_error support for glInvalidateBufferData()
  mesa: add KHR_no_error support for glBindBuffer()
  mesa: make _mesa_blit_framebuffer() static
  mesa: add validate_stencil_buffer() helper
  mesa: add validate_depth_buffer() helper
  mesa: add validate_color_buffer() helper
  mesa: add 'no_error' parameter to blit_framebuffer()
  mesa: add KHR_no_error support for glBlitFramebuffer()
  mesa: add KHR_no_error support for glBlitNamedFramebuffer()
  mesa: rename prepare_target() to prepare_target_err()
  mesa: add prepare_target() helper
  mesa: add copy_image_subdata() helper
  mesa: add KHR_no_error support for glCopyImageSubData()
  mesa: rename texsubimage() to texsubimage_err()
  mesa: add texsubimage() helper
  mesa: add KHR_no_error support for glTexSubImage*D()

 src/mapi/glapi/gen/ARB_copy_image.xml  |   2 +-
 src/mapi/glapi/gen/ARB_direct_state_access.xml |   4 +-
 src/mapi/glapi/gen/ARB_framebuffer_object.xml  |   2 +-
 src/mapi/glapi/gen/ARB_invalidate_subdata.xml  |   4 +-
 src/mapi/glapi/gen/ARB_multi_bind.xml  |   2 +-
 src/mapi/glapi/gen/gl_API.xml  |   8 +-
 src/mesa/main/blit.c   | 585 ++---
 src/mesa/main/blit.h   |  21 +-
 src/mesa/main/bufferobj.c  |  44 +-
 src/mesa/main/bufferobj.h  |  11 +
 src/mesa/main/copyimage.c  | 159 +--
 src/mesa/main/copyimage.h  |   7 +
 src/mesa/main/teximage.c   |  95 +++-
 src/mesa/main/teximage.h   |  18 +
 src/mesa/main/varray.c | 136 --
 src/mesa/main/varray.h |  11 +
 16 files changed, 717 insertions(+), 392 deletions(-)

-- 
2.13.0

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[Mesa-dev] [PATCH 04/21] mesa: add invalidate_buffer_subdata() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/bufferobj.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 9e656a4c98..08f5a9e59b 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -4237,6 +4237,15 @@ _mesa_BindBuffersBase(GLenum target, GLuint first, 
GLsizei count,
}
 }
 
+static inline void
+invalidate_buffer_subdata(struct gl_context *ctx,
+  struct gl_buffer_object *bufObj, GLintptr offset,
+  GLsizeiptr length)
+{
+   if (ctx->Driver.InvalidateBufferSubData)
+  ctx->Driver.InvalidateBufferSubData(ctx, bufObj, offset, length);
+}
+
 void GLAPIENTRY
 _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr offset,
   GLsizeiptr length)
@@ -4286,8 +4295,7 @@ _mesa_InvalidateBufferSubData(GLuint buffer, GLintptr 
offset,
   return;
}
 
-   if (ctx->Driver.InvalidateBufferSubData)
-  ctx->Driver.InvalidateBufferSubData(ctx, bufObj, offset, length);
+   invalidate_buffer_subdata(ctx, bufObj, offset, length);
 }
 
 void GLAPIENTRY
@@ -4324,8 +4332,7 @@ _mesa_InvalidateBufferData(GLuint buffer)
   return;
}
 
-   if (ctx->Driver.InvalidateBufferSubData)
-  ctx->Driver.InvalidateBufferSubData(ctx, bufObj, 0, bufObj->Size);
+   invalidate_buffer_subdata(ctx, bufObj, 0, bufObj->Size);
 }
 
 static void
-- 
2.13.0

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[Mesa-dev] [PATCH 01/21] mesa: add vertex_array_vertex_buffers_err() helper

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mesa/main/varray.c | 108 -
 1 file changed, 61 insertions(+), 47 deletions(-)

diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 47528ba2a7..c2c771c173 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -2117,29 +2117,14 @@ _mesa_VertexArrayVertexBuffer(GLuint vaobj, GLuint 
bindingIndex, GLuint buffer,
 }
 
 
-static void
+static ALWAYS_INLINE void
 vertex_array_vertex_buffers(struct gl_context *ctx,
 struct gl_vertex_array_object *vao,
 GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const GLsizei *strides,
-const char *func)
+bool no_error, const char *func)
 {
-   GLuint i;
-
-   ASSERT_OUTSIDE_BEGIN_END(ctx);
-
-   /* The ARB_multi_bind spec says:
-*
-*"An INVALID_OPERATION error is generated if  + 
-* is greater than the value of MAX_VERTEX_ATTRIB_BINDINGS."
-*/
-   if (first + count > ctx->Const.MaxVertexAttribBindings) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "%s(first=%u + count=%d > the value of "
-  "GL_MAX_VERTEX_ATTRIB_BINDINGS=%u)",
-  func, first, count, ctx->Const.MaxVertexAttribBindings);
-  return;
-   }
+   GLint i;
 
if (!buffers) {
   /**
@@ -2184,31 +2169,33 @@ vertex_array_vertex_buffers(struct gl_context *ctx,
for (i = 0; i < count; i++) {
   struct gl_buffer_object *vbo;
 
-  /* The ARB_multi_bind spec says:
-   *
-   *"An INVALID_VALUE error is generated if any value in
-   *  or  is negative (per binding)."
-   */
-  if (offsets[i] < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(offsets[%u]=%" PRId64 " < 0)",
- func, i, (int64_t) offsets[i]);
- continue;
-  }
+  if (!no_error) {
+ /* The ARB_multi_bind spec says:
+  *
+  *"An INVALID_VALUE error is generated if any value in
+  *  or  is negative (per binding)."
+  */
+ if (offsets[i] < 0) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(offsets[%u]=%" PRId64 " < 0)",
+func, i, (int64_t) offsets[i]);
+continue;
+ }
 
-  if (strides[i] < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(strides[%u]=%d < 0)",
- func, i, strides[i]);
- continue;
-  }
+ if (strides[i] < 0) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(strides[%u]=%d < 0)",
+func, i, strides[i]);
+continue;
+ }
 
-  if (ctx->API == API_OPENGL_CORE && ctx->Version >= 44 &&
-  strides[i] > ctx->Const.MaxVertexAttribStride) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "%s(strides[%u]=%d > "
- "GL_MAX_VERTEX_ATTRIB_STRIDE)", func, i, strides[i]);
- continue;
+ if (ctx->API == API_OPENGL_CORE && ctx->Version >= 44 &&
+ strides[i] > ctx->Const.MaxVertexAttribStride) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+"%s(strides[%u]=%d > "
+"GL_MAX_VERTEX_ATTRIB_STRIDE)", func, i, strides[i]);
+continue;
+ }
   }
 
   if (buffers[i]) {
@@ -2234,6 +2221,33 @@ vertex_array_vertex_buffers(struct gl_context *ctx,
 }
 
 
+static void
+vertex_array_vertex_buffers_err(struct gl_context *ctx,
+struct gl_vertex_array_object *vao,
+GLuint first, GLsizei count,
+const GLuint *buffers, const GLintptr *offsets,
+const GLsizei *strides, const char *func)
+{
+   ASSERT_OUTSIDE_BEGIN_END(ctx);
+
+   /* The ARB_multi_bind spec says:
+*
+*"An INVALID_OPERATION error is generated if  + 
+* is greater than the value of MAX_VERTEX_ATTRIB_BINDINGS."
+*/
+   if (first + count > ctx->Const.MaxVertexAttribBindings) {
+  _mesa_error(ctx, GL_INVALID_OPERATION,
+  "%s(first=%u + count=%d > the value of "
+  "GL_MAX_VERTEX_ATTRIB_BINDINGS=%u)",
+  func, first, count, ctx->Const.MaxVertexAttribBindings);
+  return;
+   }
+
+   vertex_array_vertex_buffers(ctx, vao, first, count, buffers, offsets,
+   strides, false, func);
+}
+
+
 void GLAPIENTRY
 _mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const GLsizei *strides)
@@ -2252,9 +2266,9 @@ _mesa_BindVertexBuffers(GLuint first, GLsizei count, 
const GLuint *buffers,
   return;
}
 
-   

[Mesa-dev] [PATCH 03/21] mesa: add KHR_no_error support for glBindVertexBuffers()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_multi_bind.xml |  2 +-
 src/mesa/main/varray.c| 13 +
 src/mesa/main/varray.h|  5 +
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_multi_bind.xml 
b/src/mapi/glapi/gen/ARB_multi_bind.xml
index d58c2708cb..601680f30b 100644
--- a/src/mapi/glapi/gen/ARB_multi_bind.xml
+++ b/src/mapi/glapi/gen/ARB_multi_bind.xml
@@ -41,7 +41,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 0cc8b56c64..a08b11fcf8 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -2249,6 +2249,19 @@ vertex_array_vertex_buffers_err(struct gl_context *ctx,
 
 
 void GLAPIENTRY
+_mesa_BindVertexBuffers_no_error(GLuint first, GLsizei count,
+ const GLuint *buffers, const GLintptr 
*offsets,
+ const GLsizei *strides)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   vertex_array_vertex_buffers(ctx, ctx->Array.VAO, first, count,
+   buffers, offsets, strides, true,
+   "glBindVertexBuffers");
+}
+
+
+void GLAPIENTRY
 _mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const GLsizei *strides)
 {
diff --git a/src/mesa/main/varray.h b/src/mesa/main/varray.h
index 90ca8483ca..43b9fe905e 100644
--- a/src/mesa/main/varray.h
+++ b/src/mesa/main/varray.h
@@ -375,6 +375,11 @@ extern void GLAPIENTRY
 _mesa_VertexArrayVertexBuffer(GLuint vaobj, GLuint bindingIndex, GLuint buffer,
   GLintptr offset, GLsizei stride);
 
+void GLAPIENTRY
+_mesa_BindVertexBuffers_no_error(GLuint first, GLsizei count,
+ const GLuint *buffers, const GLintptr 
*offsets,
+ const GLsizei *strides);
+
 extern void GLAPIENTRY
 _mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const GLsizei *strides);
-- 
2.13.0

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[Mesa-dev] [PATCH 02/21] mesa: add KHR_no_error support for glVertexArrayVertexBuffers()

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/mapi/glapi/gen/ARB_direct_state_access.xml |  2 +-
 src/mesa/main/varray.c | 15 +++
 src/mesa/main/varray.h |  6 ++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_direct_state_access.xml 
b/src/mapi/glapi/gen/ARB_direct_state_access.xml
index f13a1444a9..cb24d7981c 100644
--- a/src/mapi/glapi/gen/ARB_direct_state_access.xml
+++ b/src/mapi/glapi/gen/ARB_direct_state_access.xml
@@ -607,7 +607,7 @@
   

 
-   
+   
   
   
   
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index c2c771c173..0cc8b56c64 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -2273,6 +2273,21 @@ _mesa_BindVertexBuffers(GLuint first, GLsizei count, 
const GLuint *buffers,
 
 
 void GLAPIENTRY
+_mesa_VertexArrayVertexBuffers_no_error(GLuint vaobj, GLuint first,
+GLsizei count, const GLuint *buffers,
+const GLintptr *offsets,
+const GLsizei *strides)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct gl_vertex_array_object *vao = _mesa_lookup_vao(ctx, vaobj);
+   vertex_array_vertex_buffers(ctx, vao, first, count,
+   buffers, offsets, strides, true,
+   "glVertexArrayVertexBuffers");
+}
+
+
+void GLAPIENTRY
 _mesa_VertexArrayVertexBuffers(GLuint vaobj, GLuint first, GLsizei count,
const GLuint *buffers,
const GLintptr *offsets, const GLsizei *strides)
diff --git a/src/mesa/main/varray.h b/src/mesa/main/varray.h
index 24e37a9bf7..90ca8483ca 100644
--- a/src/mesa/main/varray.h
+++ b/src/mesa/main/varray.h
@@ -379,6 +379,12 @@ extern void GLAPIENTRY
 _mesa_BindVertexBuffers(GLuint first, GLsizei count, const GLuint *buffers,
 const GLintptr *offsets, const GLsizei *strides);
 
+void GLAPIENTRY
+_mesa_VertexArrayVertexBuffers_no_error(GLuint vaobj, GLuint first,
+GLsizei count, const GLuint *buffers,
+const GLintptr *offsets,
+const GLsizei *strides);
+
 extern void GLAPIENTRY
 _mesa_VertexArrayVertexBuffers(GLuint vaobj, GLuint first, GLsizei count,
const GLuint *buffers,
-- 
2.13.0

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