[Mesa-dev] [PATCH] radv/gfx9: add 3d sampler image->buffer copy shader. (v2)

2017-12-18 Thread Dave Airlie
From: Dave Airlie 

On GFX9 we must access 3D textures with 3D samplers AFAICS.

This fixes:
dEQP-VK.api.image_clearing.core.clear_color_image.3d.single_layer

on GFX9 for me.

v2: fixes a bunch of other tests as well.

v1.1: fix tex->sampler_dim to dim
v2: send layer in from outside

Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_bufimage.c | 87 ++---
 src/amd/vulkan/radv_private.h   |  1 +
 2 files changed, 72 insertions(+), 16 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index dfd99aa75f..4a61beef18 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -29,11 +29,15 @@
  * Compute queue: implementation also of buffer->image, image->image, and 
image clear.
  */
 
+/* GFX9 needs to use a 3D sampler to access 3D resources, so the shader has 
the options
+ * for that.
+ */
 static nir_shader *
-build_nir_itob_compute_shader(struct radv_device *dev)
+build_nir_itob_compute_shader(struct radv_device *dev, bool is_3d)
 {
nir_builder b;
-   const struct glsl_type *sampler_type = 
glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
+   enum glsl_sampler_dim dim = is_3d ? GLSL_SAMPLER_DIM_3D : 
GLSL_SAMPLER_DIM_2D;
+   const struct glsl_type *sampler_type = glsl_sampler_type(dim,
 false,
 false,
 
GLSL_TYPE_FLOAT);
@@ -42,7 +46,7 @@ build_nir_itob_compute_shader(struct radv_device *dev)
 false,
 GLSL_TYPE_FLOAT);
nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
-   b.shader->info.name = ralloc_strdup(b.shader, "meta_itob_cs");
+   b.shader->info.name = ralloc_strdup(b.shader, is_3d ? "meta_itob_cs_3d" 
: "meta_itob_cs");
b.shader->info.cs.local_size[0] = 16;
b.shader->info.cs.local_size[1] = 16;
b.shader->info.cs.local_size[2] = 1;
@@ -69,32 +73,46 @@ build_nir_itob_compute_shader(struct radv_device *dev)
 
nir_intrinsic_instr *offset = nir_intrinsic_instr_create(b.shader, 
nir_intrinsic_load_push_constant);
nir_intrinsic_set_base(offset, 0);
-   nir_intrinsic_set_range(offset, 12);
+   nir_intrinsic_set_range(offset, 16);
offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
-   offset->num_components = 2;
-   nir_ssa_dest_init(&offset->instr, &offset->dest, 2, 32, "offset");
+   offset->num_components = 3;
+   nir_ssa_dest_init(&offset->instr, &offset->dest, 3, 32, "offset");
nir_builder_instr_insert(&b, &offset->instr);
 
nir_intrinsic_instr *stride = nir_intrinsic_instr_create(b.shader, 
nir_intrinsic_load_push_constant);
nir_intrinsic_set_base(stride, 0);
-   nir_intrinsic_set_range(stride, 12);
-   stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
+   nir_intrinsic_set_range(stride, 16);
+   stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 12));
stride->num_components = 1;
nir_ssa_dest_init(&stride->instr, &stride->dest, 1, 32, "stride");
nir_builder_instr_insert(&b, &stride->instr);
 
nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa);
 
+   nir_ssa_def *img_coord_3d = NULL;
+
+   if (is_3d) {
+   nir_ssa_def *chans[3];
+
+   chans[0] = nir_channel(&b, img_coord, 0);
+   chans[1] = nir_channel(&b, img_coord, 1);
+   chans[2] = nir_channel(&b, img_coord, 2);
+   img_coord_3d = nir_vec(&b, chans, 3);
+   }
+
nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
-   tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
+   tex->sampler_dim = dim;
tex->op = nir_texop_txf;
tex->src[0].src_type = nir_tex_src_coord;
-   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 0x3));
+   if (is_3d)
+   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, 
img_coord_3d, 0x7));
+   else
+   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 
0x3));
tex->src[1].src_type = nir_tex_src_lod;
tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
tex->dest_type = nir_type_float;
tex->is_array = false;
-   tex->coord_components = 2;
+   tex->coord_components = is_3d ? 3 : 2;
tex->texture = nir_deref_var_create(tex, input_img);
tex->sampler = NULL;
 
@@ -126,8 +144,11 @@ radv_device_init_meta_itob_state(struct radv_device 
*device)
 {
VkResult result;
struct radv_shader_module cs = { .nir = NULL };
+   struct radv_shader_module cs_3d = { .nir = NULL };
 
-   cs.nir = build_nir_itob_co

[Mesa-dev] [PATCH] glsl: minor simplification in assign_varying_locations()

2017-12-18 Thread Brian Paul
---
 src/compiler/glsl/link_varyings.cpp | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 9039c3b..6d74f9a 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -2514,11 +2514,9 @@ assign_varying_locations(struct gl_context *ctx,
*/
   foreach_in_list(ir_instruction, node, consumer->ir) {
  ir_variable *const input_var = node->as_variable();
-
- if (input_var == NULL || input_var->data.mode != ir_var_shader_in)
-continue;
-
- matches.record(NULL, input_var);
+ if (input_var && input_var->data.mode == ir_var_shader_in) {
+matches.record(NULL, input_var);
+ }
   }
}
 
-- 
1.9.1

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[Mesa-dev] [PATCH] glsl: use bitwise operators in varying_matches::compute_packing_class()

2017-12-18 Thread Brian Paul
The mix of bitwise operators with * and + to compute the packing_class
values was a little weird.  Just use bitwise ops instead.

v2: add assertion to make sure interpolation bits fit without collision,
per Timothy.  Basically, rewrite function to be simpler.
---
 src/compiler/glsl/link_varyings.cpp | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 7821b1e..5d39889 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1982,12 +1982,17 @@ varying_matches::compute_packing_class(const 
ir_variable *var)
 *
 * Therefore, the packing class depends only on the interpolation type.
 */
-   unsigned packing_class = var->data.centroid | (var->data.sample << 1) |
-(var->data.patch << 2) |
-(var->data.must_be_shader_input << 3);
-   packing_class *= 8;
-   packing_class += var->is_interpolation_flat()
+   const unsigned interp = var->is_interpolation_flat()
   ? unsigned(INTERP_MODE_FLAT) : var->data.interpolation;
+
+   assert(interp < (1 << 3));
+
+   const unsigned packing_class = (interp << 0) |
+  (var->data.centroid << 3) |
+  (var->data.sample << 4) |
+  (var->data.patch << 5) |
+  (var->data.must_be_shader_input << 6);
+
return packing_class;
 }
 
-- 
1.9.1

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[Mesa-dev] [PATCH] radv/gfx9: add 3d sampler image->buffer copy shader.

2017-12-18 Thread Dave Airlie
From: Dave Airlie 

On GFX9 we must access 3D textures with 3D samplers AFAICS.

This fixes:
dEQP-VK.api.image_clearing.core.clear_color_image.3d.single_layer

on GFX9 for me.

Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_bufimage.c | 68 +
 src/amd/vulkan/radv_private.h   |  1 +
 2 files changed, 62 insertions(+), 7 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index dfd99aa75f..e821898c75 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -29,11 +29,15 @@
  * Compute queue: implementation also of buffer->image, image->image, and 
image clear.
  */
 
+/* GFX9 needs to use a 3D sampler to access 3D resources, so the shader has 
the options
+ * for that.
+ */
 static nir_shader *
-build_nir_itob_compute_shader(struct radv_device *dev)
+build_nir_itob_compute_shader(struct radv_device *dev, bool is_3d)
 {
nir_builder b;
-   const struct glsl_type *sampler_type = 
glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
+   enum glsl_sampler_dim dim = is_3d ? GLSL_SAMPLER_DIM_3D : 
GLSL_SAMPLER_DIM_2D;
+   const struct glsl_type *sampler_type = glsl_sampler_type(dim,
 false,
 false,
 
GLSL_TYPE_FLOAT);
@@ -42,7 +46,7 @@ build_nir_itob_compute_shader(struct radv_device *dev)
 false,
 GLSL_TYPE_FLOAT);
nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
-   b.shader->info.name = ralloc_strdup(b.shader, "meta_itob_cs");
+   b.shader->info.name = ralloc_strdup(b.shader, is_3d ? "meta_itob_cs_3d" 
: "meta_itob_cs");
b.shader->info.cs.local_size[0] = 16;
b.shader->info.cs.local_size[1] = 16;
b.shader->info.cs.local_size[2] = 1;
@@ -85,16 +89,30 @@ build_nir_itob_compute_shader(struct radv_device *dev)
 
nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa);
 
+   nir_ssa_def *img_coord_3d = NULL;
+
+   if (is_3d) {
+   nir_ssa_def *chans[3];
+
+   chans[0] = nir_channel(&b, img_coord, 0);
+   chans[1] = nir_channel(&b, img_coord, 1);
+   chans[2] = nir_imm_int(&b, 0);
+   img_coord_3d = nir_vec(&b, chans, 3);
+   }
+
nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
tex->op = nir_texop_txf;
tex->src[0].src_type = nir_tex_src_coord;
-   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 0x3));
+   if (is_3d)
+   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, 
img_coord_3d, 0x7));
+   else
+   tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 
0x3));
tex->src[1].src_type = nir_tex_src_lod;
tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
tex->dest_type = nir_type_float;
tex->is_array = false;
-   tex->coord_components = 2;
+   tex->coord_components = is_3d ? 3 : 2;
tex->texture = nir_deref_var_create(tex, input_img);
tex->sampler = NULL;
 
@@ -126,8 +144,11 @@ radv_device_init_meta_itob_state(struct radv_device 
*device)
 {
VkResult result;
struct radv_shader_module cs = { .nir = NULL };
+   struct radv_shader_module cs_3d = { .nir = NULL };
 
-   cs.nir = build_nir_itob_compute_shader(device);
+   cs.nir = build_nir_itob_compute_shader(device, false);
+   if (device->physical_device->rad_info.chip_class >= GFX9)
+   cs_3d.nir = build_nir_itob_compute_shader(device, true);
 
/*
 * two descriptors one for the image being sampled
@@ -202,10 +223,36 @@ radv_device_init_meta_itob_state(struct radv_device 
*device)
if (result != VK_SUCCESS)
goto fail;
 
+   if (device->physical_device->rad_info.chip_class >= GFX9) {
+   VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = {
+   .sType = 
VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+   .stage = VK_SHADER_STAGE_COMPUTE_BIT,
+   .module = radv_shader_module_to_handle(&cs_3d),
+   .pName = "main",
+   .pSpecializationInfo = NULL,
+   };
+
+   VkComputePipelineCreateInfo vk_pipeline_info_3d = {
+   .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
+   .stage = pipeline_shader_stage_3d,
+   .flags = 0,
+   .layout = device->meta_state.itob.img_p_layout,
+   };
+
+   

Re: [Mesa-dev] [PATCH 5/9] glsl: use bitwise operators in varying_matches::compute_packing_class()

2017-12-18 Thread Brian Paul

On 12/18/2017 06:49 PM, Timothy Arceri wrote:

On 19/12/17 07:47, Brian Paul wrote:

The mix of bitwise operators with * and + to compute the packing_class
values was a little weird.  Just use bitwise ops instead.
---
  src/compiler/glsl/link_varyings.cpp | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 7821b1e..17d8653 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1982,11 +1982,12 @@ varying_matches::compute_packing_class(const
ir_variable *var)
  *
  * Therefore, the packing class depends only on the interpolation
type.
  */
-   unsigned packing_class = var->data.centroid | (var->data.sample <<
1) |
+   unsigned packing_class = (var->data.centroid << 0) |
+(var->data.sample << 1) |
  (var->data.patch << 2) |
  (var->data.must_be_shader_input << 3);
-   packing_class *= 8;
-   packing_class += var->is_interpolation_flat()
+   packing_class <<= 3;
+   packing_class |= var->is_interpolation_flat()
? unsigned(INTERP_MODE_FLAT) : var->data.interpolation;


Should we add assert(var->data.interpolation < 7); here somewhere?


Yeah, and looking at the code again, the whole thing could be expressed 
better.  v2 coming.




Either way series:

Reviewed-by: Timothy Arceri 


Thanks.






 return packing_class;
  }



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Re: [Mesa-dev] [PATCH] Android: gallium_dri: add include to get "xmlpool/options.h"

2017-12-18 Thread Yu, Qiang
I met this problem when upgrade mesa 17.2 to 17.3, and build without
a make clean. A clean build won't have this problem.

Regards,
Qiang


From: Mauro Rossi 
Sent: Tuesday, December 19, 2017 6:19:44 AM
To: Emil Velikov
Cc: ML mesa-dev; Haehnle, Nicolai; Yu, Qiang; 17.3
Subject: Re: [PATCH] Android: gallium_dri: add include to get 
"xmlpool/options.h"



Il 18/dic/2017 17:27, "Emil Velikov" 
mailto:emil.l.veli...@gmail.com>> ha scritto:
On 17 December 2017 at 23:34, Mauro Rossi 
mailto:issor.or...@gmail.com>> wrote:
> target.c requires "xmlpool/options.h" generated header
> or the following tricky Android building error may appear:
>
> In file included from external/mesa/src/gallium/targets/dri/target.c:1:
> In file included from 
> external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:185:
> out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_radeonsi_intermediates/radeonsi/si_driinfo.h:19:7:
>  error: expected '}'
>   DRI_CONF_RADEONSI_ENABLE_SISCHED("false")
>   ^
> external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:182:55: note: 
> to match this '{'
>static const struct drm_conf_ret xml_options_ret = {
>   ^
> 1 error generated.
>
> Fixes: 0f8c5de869 ("radeonsi: prepare for driver-specific driconf options")
>
> Cc: "17.3" 
> mailto:mesa-sta...@lists.freedesktop.org>>
> ---
>  src/gallium/targets/dri/Android.mk | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/targets/dri/Android.mk 
> b/src/gallium/targets/dri/Android.mk
> index d9923043af..a5b5f92ea0 100644
> --- a/src/gallium/targets/dri/Android.mk
> +++ b/src/gallium/targets/dri/Android.mk
> @@ -26,10 +26,10 @@ LOCAL_PATH := $(call my-dir)
>  include $(CLEAR_VARS)
>
>  LOCAL_MODULE := gallium_dri
> -
> +LOCAL_MODULE_CLASS := SHARED_LIBRARIES
>  LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
>  LOCAL_SRC_FILES := target.c
> -
> +LOCAL_C_INCLUDES := $(call 
> generated-sources-dir-for,STATIC_LIBRARIES,libmesa_util,,)
>  LOCAL_CFLAGS :=
>
This is slightly confusing, quick grep shows:
./src/util/Android.mk
...
LOCAL_MODULE := libmesa_util
...
LOCAL_EXPORT_C_INCLUDE_DIRS := $(intermediates)
...

src/gallium/targets/dri/Android.mk
LOCAL_WHOLE_STATIC_LIBRARIES := \
...
libmesa_util \
...

src/gallium/targets/dri/Android.mk- libmesa_loader

- libmesa_util already exports

AKA
 - static lib exports the includes
 - foo_dri.so already pulls the static lib

All confirmed and it's strange to us too, but when checking out Mesa 17.3 and 
17.4 branches we, i.e. me and Quiang Yu, get the error.

Maybe Qiang could explain, I just added the only possibile dependency.


+ misc: if LOCAL_MODULE_CLASS is omitted we default to SHARED_LIBRARIES

LOCAL_MODULE_CLASS is required to be able to use generated-sources-dir-for macro


Can you confirm the above are present in the tree you're using? Did it
work with older Android - aka, something in their system broke?

Same issue happening with Nougat, when checking out 17.3 or 17.4
Cheers



Thanks
Emil

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Re: [Mesa-dev] [PATCH 5/9] glsl: use bitwise operators in varying_matches::compute_packing_class()

2017-12-18 Thread Timothy Arceri

On 19/12/17 07:47, Brian Paul wrote:

The mix of bitwise operators with * and + to compute the packing_class
values was a little weird.  Just use bitwise ops instead.
---
  src/compiler/glsl/link_varyings.cpp | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 7821b1e..17d8653 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1982,11 +1982,12 @@ varying_matches::compute_packing_class(const 
ir_variable *var)
  *
  * Therefore, the packing class depends only on the interpolation type.
  */
-   unsigned packing_class = var->data.centroid | (var->data.sample << 1) |
+   unsigned packing_class = (var->data.centroid << 0) |
+(var->data.sample << 1) |
  (var->data.patch << 2) |
  (var->data.must_be_shader_input << 3);
-   packing_class *= 8;
-   packing_class += var->is_interpolation_flat()
+   packing_class <<= 3;
+   packing_class |= var->is_interpolation_flat()
? unsigned(INTERP_MODE_FLAT) : var->data.interpolation;


Should we add assert(var->data.interpolation < 7); here somewhere?

Either way series:

Reviewed-by: Timothy Arceri 


 return packing_class;
  }


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[Mesa-dev] [PATCH 11/16] meta/blit: Use _mesa_bind_texture instead of _mesa_BindTexture

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta_blit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index ee48582..ea0bd3f 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -937,7 +937,7 @@ _mesa_meta_setup_sampler(struct gl_context *ctx,
   samp_obj->WrapR);
 
/* Prepare src texture state */
-   _mesa_BindTexture(target, texObj->Name);
+   _mesa_bind_texture(ctx, target, texObj);
if (target != GL_TEXTURE_RECTANGLE_ARB) {
   _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_BASE_LEVEL,
 (GLint *) &srcLevel, false);
-- 
2.9.5

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[Mesa-dev] [PATCH 12/16] meta/blit: Track temporary texture using gl_texture_object instead of GL API object handle

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  |  2 +-
 src/mesa/drivers/common/meta_blit.c | 12 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 863997e..252b236 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -313,8 +313,8 @@ struct fb_tex_blit_state
struct gl_sampler_object *samp_obj;
struct gl_sampler_object *samp_obj_save;
struct gl_texture_object *tex_obj;
+   struct gl_texture_object *temp_tex_obj;
GLuint stencilSamplingSave;
-   GLuint tempTex;
 };
 
 
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index ea0bd3f..0c08109 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -644,7 +644,7 @@ blitframebuffer_texture(struct gl_context *ctx,
   if (texObj == NULL)
  return false;
 
-  fb_tex_blit.tempTex = texObj->Name;
+  fb_tex_blit.temp_tex_obj = texObj;
 
   srcLevel = 0;
   if (_mesa_is_winsys_fbo(readFb)) {
@@ -834,7 +834,7 @@ _mesa_meta_fb_tex_blit_begin(struct gl_context *ctx,
blit->samp_obj_save = NULL;
_mesa_reference_sampler_object(ctx, &blit->samp_obj_save,
   
ctx->Texture.Unit[ctx->Texture.CurrentUnit].Sampler);
-   blit->tempTex = 0;
+   blit->temp_tex_obj = NULL;
 }
 
 void
@@ -845,13 +845,13 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
   _mesa_get_current_tex_object(ctx, target);
 
/* Either there is no temporary texture or the temporary texture is bound. 
*/
-   assert(blit->tempTex == 0 || texObj->Name == blit->tempTex);
+   assert(blit->temp_tex_obj == NULL || blit->temp_tex_obj == texObj);
 
/* Restore texture object state, the texture binding will be restored by
 * _mesa_meta_end().  If the texture is the temporary texture that is about
 * to be destroyed, don't bother restoring its state.
 */
-   if (blit->tempTex == 0) {
+   if (blit->temp_tex_obj == NULL) {
   /* If the target restricts values for base level or max level, we assume
* that the original values were valid.
*/
@@ -880,8 +880,8 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
_mesa_reference_sampler_object(ctx, &blit->samp_obj_save, NULL);
_mesa_reference_sampler_object(ctx, &blit->samp_obj, NULL);
 
-   if (blit->tempTex)
-  _mesa_DeleteTextures(1, &blit->tempTex);
+   if (blit->temp_tex_obj)
+  _mesa_DeleteTextures(1, &blit->temp_tex_obj->Name);
 }
 
 struct gl_texture_object *
-- 
2.9.5

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[Mesa-dev] [PATCH 05/16] meta/blit: Don't restore state of the temporary texture

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

It's about to be destroyed, so there's no point.

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta_blit.c | 48 +
 1 file changed, 27 insertions(+), 21 deletions(-)

diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 6322b64..66714b1 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -841,30 +841,36 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
struct gl_texture_object *const texObj =
   _mesa_get_current_tex_object(ctx, target);
 
-   /* Restore texture object state, the texture binding will
-* be restored by _mesa_meta_end().
-*
-* If the target restricts values for base level or max level, we assume
-* that the original values were valid.
-*/
-   if (blit->baseLevelSave != texObj->BaseLevel)
-  _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_BASE_LEVEL,
-&blit->baseLevelSave, false);
-
-   if (blit->maxLevelSave != texObj->MaxLevel)
-  _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_MAX_LEVEL,
-&blit->maxLevelSave, false);
+   /* Either there is no temporary texture or the temporary texture is bound. 
*/
+   assert(blit->tempTex == 0 || texObj->Name == blit->tempTex);
 
-   /* If ARB_stencil_texturing is not supported, the mode won't have changed. 
*/
-   if (texObj->StencilSampling != blit->stencilSamplingSave) {
-  /* GLint so the compiler won't complain about type signedness mismatch
-   * in the call to _mesa_texture_parameteriv below.
+   /* Restore texture object state, the texture binding will be restored by
+* _mesa_meta_end().  If the texture is the temporary texture that is about
+* to be destroyed, don't bother restoring its state.
+*/
+   if (blit->tempTex == 0) {
+  /* If the target restricts values for base level or max level, we assume
+   * that the original values were valid.
*/
-  const GLint param = blit->stencilSamplingSave ?
- GL_STENCIL_INDEX : GL_DEPTH_COMPONENT;
+  if (blit->baseLevelSave != texObj->BaseLevel)
+ _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_BASE_LEVEL,
+   &blit->baseLevelSave, false);
+
+  if (blit->maxLevelSave != texObj->MaxLevel)
+ _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_MAX_LEVEL,
+   &blit->maxLevelSave, false);
+
+  /* If ARB_stencil_texturing is not supported, the mode won't have 
changed. */
+  if (texObj->StencilSampling != blit->stencilSamplingSave) {
+ /* GLint so the compiler won't complain about type signedness mismatch
+  * in the call to _mesa_texture_parameteriv below.
+  */
+ const GLint param = blit->stencilSamplingSave ?
+GL_STENCIL_INDEX : GL_DEPTH_COMPONENT;
 
-  _mesa_texture_parameteriv(ctx, texObj, GL_DEPTH_STENCIL_TEXTURE_MODE,
-¶m, false);
+ _mesa_texture_parameteriv(ctx, texObj, GL_DEPTH_STENCIL_TEXTURE_MODE,
+   ¶m, false);
+  }
}
 
_mesa_bind_sampler(ctx, ctx->Texture.CurrentUnit, blit->samp_obj_save);
-- 
2.9.5

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[Mesa-dev] [PATCH 16/16] meta: Don't pollute the texture namespace

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

tl;dr: For many types of GL object, we can *NEVER* use the Gen function.

In OpenGL ES (all versions!) and OpenGL compatibility profile,
applications don't have to call Gen functions.  The GL spec is very
clear about how you can mix-and-match generated names and non-generated
names: you can use any name you want for a particular object type until
you call the Gen function for that object type.

Here's the problem scenario:

 - Application calls a meta function that generates a name.  The first
   Gen will probably return 1.

 - Application decides to use the same name for an object of the same
   type without calling Gen.  Many demo programs use names 1, 2, 3,
   etc. without calling Gen.

 - Application calls the meta function again, and the meta function
   replaces the data.  The application's data is lost, and the app
   fails.  Have fun debugging that.

Signed-off-by: Ian Romanick 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
---
 src/mesa/drivers/common/meta.c  | 21 ++---
 src/mesa/drivers/common/meta_blit.c | 18 --
 2 files changed, 10 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 55d803f..f4830ec 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -98,7 +98,8 @@ meta_clear(struct gl_context *ctx, GLbitfield buffers, bool 
glsl);
 static struct blit_shader *
 choose_blit_shader(GLenum target, struct blit_shader_table *table);
 
-static void cleanup_temp_texture(struct temp_texture *tex);
+static void cleanup_temp_texture(struct gl_context *ctx,
+ struct temp_texture *tex);
 static void meta_glsl_clear_cleanup(struct gl_context *ctx,
 struct clear_state *clear);
 static void meta_decompress_cleanup(struct gl_context *ctx,
@@ -418,7 +419,7 @@ _mesa_meta_free(struct gl_context *ctx)
_mesa_meta_glsl_blit_cleanup(ctx, &ctx->Meta->Blit);
meta_glsl_clear_cleanup(ctx, &ctx->Meta->Clear);
_mesa_meta_glsl_generate_mipmap_cleanup(ctx, &ctx->Meta->Mipmap);
-   cleanup_temp_texture(&ctx->Meta->TempTex);
+   cleanup_temp_texture(ctx, &ctx->Meta->TempTex);
meta_decompress_cleanup(ctx, &ctx->Meta->Decompress);
meta_drawpix_cleanup(ctx, &ctx->Meta->DrawPix);
if (old_context)
@@ -1228,8 +1229,6 @@ invert_z(GLfloat normZ)
 static void
 init_temp_texture(struct gl_context *ctx, struct temp_texture *tex)
 {
-   GLuint texObj;
-
/* prefer texture rectangle */
if (_mesa_is_desktop_gl(ctx) && ctx->Extensions.NV_texture_rectangle) {
   tex->Target = GL_TEXTURE_RECTANGLE;
@@ -1245,21 +1244,13 @@ init_temp_texture(struct gl_context *ctx, struct 
temp_texture *tex)
tex->MinSize = 16;  /* 16 x 16 at least */
assert(tex->MaxSize > 0);
 
-   _mesa_CreateTextures(tex->Target, 1, &texObj);
-   tex->tex_obj = NULL;
-
-   if (texObj == 0)
-  return;
-
-   tex->tex_obj = _mesa_lookup_texture(ctx, texObj);
+   tex->tex_obj = ctx->Driver.NewTextureObject(ctx, 0xDEADBEEF, tex->Target);
 }
 
 static void
-cleanup_temp_texture(struct temp_texture *tex)
+cleanup_temp_texture(struct gl_context *ctx, struct temp_texture *tex)
 {
-   if (tex->tex_obj == NULL)
- return;
-   _mesa_DeleteTextures(1, &tex->tex_obj->Name);
+   _mesa_delete_nameless_texture(ctx, tex->tex_obj);
tex->tex_obj = NULL;
 }
 
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 95dfa64..496ef28 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -879,9 +879,7 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
_mesa_bind_sampler(ctx, ctx->Texture.CurrentUnit, blit->samp_obj_save);
_mesa_reference_sampler_object(ctx, &blit->samp_obj_save, NULL);
_mesa_reference_sampler_object(ctx, &blit->samp_obj, NULL);
-
-   if (blit->temp_tex_obj)
-  _mesa_DeleteTextures(1, &blit->temp_tex_obj->Name);
+   _mesa_delete_nameless_texture(ctx, blit->temp_tex_obj);
 }
 
 struct gl_texture_object *
@@ -890,20 +888,14 @@ _mesa_meta_texture_object_from_renderbuffer(struct 
gl_context *ctx,
 {
struct gl_texture_image *texImage;
struct gl_texture_object *texObj;
-   GLuint tempTex;
const GLenum target = rb->NumSamples > 1
   ? GL_TEXTURE_2D_MULTISAMPLE : GL_TEXTURE_2D;
 
-   tempTex = 0;
-   _mesa_CreateTextures(target, 1, &tempTex);
-   if (tempTex == 0)
-  return NULL;
-
-   texObj = _mesa_lookup_texture(ctx, tempTex);
+   texObj = ctx->Driver.NewTextureObject(ctx, 0xDEADBEEF, target);
texImage = _mesa_get_tex_image(ctx, texObj, target, 0);
 
if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
-  _mesa_DeleteTextures(1, &tempTex);
+  _mesa_delete_nameless_texture(ctx, texObj);
   return NULL;
}
 
@@ -912,8 +904,6 @@ _mesa_meta_texture_object_from_renderbuffer(struct 
gl_context *ctx,
   ctx->Driver.FinishRenderTexture(ctx, rb);
 

[Mesa-dev] [PATCH 10/16] meta/blit: Don't bind texture in _mesa_meta_bind_rb_as_tex_image

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

All of the callers of _mesa_meta_bind_rb_as_tex_image call
_mesa_meta_setup_sampler shortly after.  _mesa_meta_setup_sampler also
binds the texture.  This is necessary because not all paths that lead to
_mesa_meta_setup_sampler some through _mesa_meta_bind_rb_as_tex_image.

Rename the function _mesa_meta_texture_object_from_renderbuffer to
reflect its true purpose.

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  | 4 ++--
 src/mesa/drivers/common/meta_blit.c | 9 -
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 1b1672e..863997e 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -464,8 +464,8 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
struct fb_tex_blit_state *blit);
 
 extern struct gl_texture_object *
-_mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
-struct gl_renderbuffer *rb);
+_mesa_meta_texture_object_from_renderbuffer(struct gl_context *ctx,
+struct gl_renderbuffer *rb);
 
 struct gl_sampler_object *
 _mesa_meta_setup_sampler(struct gl_context *ctx,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 27996f9..ee48582 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -640,7 +640,7 @@ blitframebuffer_texture(struct gl_context *ctx,
   srcLevel = readAtt->TextureLevel;
   texObj = readAtt->Texture;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
-  texObj = _mesa_meta_bind_rb_as_tex_image(ctx, rb);
+  texObj = _mesa_meta_texture_object_from_renderbuffer(ctx, rb);
   if (texObj == NULL)
  return false;
 
@@ -885,8 +885,8 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
 }
 
 struct gl_texture_object *
-_mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
-struct gl_renderbuffer *rb)
+_mesa_meta_texture_object_from_renderbuffer(struct gl_context *ctx,
+struct gl_renderbuffer *rb)
 {
struct gl_texture_image *texImage;
struct gl_texture_object *texObj;
@@ -895,11 +895,10 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
   ? GL_TEXTURE_2D_MULTISAMPLE : GL_TEXTURE_2D;
 
tempTex = 0;
-   _mesa_GenTextures(1, &tempTex);
+   _mesa_CreateTextures(target, 1, &tempTex);
if (tempTex == 0)
   return NULL;
 
-   _mesa_BindTexture(target, tempTex);
texObj = _mesa_lookup_texture(ctx, tempTex);
texImage = _mesa_get_tex_image(ctx, texObj, target, 0);
 
-- 
2.9.5

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[Mesa-dev] [PATCH 06/16] meta/blit: Don't return the target from _mesa_meta_bind_rb_as_tex_image

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

It's always the same as *texObj->Target.

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  |  3 +--
 src/mesa/drivers/common/meta_blit.c | 21 +
 2 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index af23996..16dd8e2 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -466,8 +466,7 @@ extern GLboolean
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_renderbuffer *rb,
 GLuint *tex,
-struct gl_texture_object **texObj,
-GLenum *target);
+struct gl_texture_object **texObj);
 
 struct gl_sampler_object *
 _mesa_meta_setup_sampler(struct gl_context *ctx,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 66714b1..f7e29bc 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -639,10 +639,9 @@ blitframebuffer_texture(struct gl_context *ctx,
*/
   srcLevel = readAtt->TextureLevel;
   texObj = readAtt->Texture;
-  target = texObj->Target;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
   if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb, &fb_tex_blit.tempTex,
-   &texObj, &target))
+   &texObj))
  return false;
 
   srcLevel = 0;
@@ -673,7 +672,6 @@ blitframebuffer_texture(struct gl_context *ctx,
   }
 
   srcLevel = 0;
-  target = meta_temp_texture->Target;
   texObj = _mesa_lookup_texture(ctx, meta_temp_texture->TexObj);
   if (texObj == NULL) {
  return false;
@@ -685,6 +683,7 @@ blitframebuffer_texture(struct gl_context *ctx,
tex_base_format,
filter);
 
+  assert(texObj->Target == meta_temp_texture->Target);
 
   srcX0 = 0;
   srcY0 = 0;
@@ -692,6 +691,7 @@ blitframebuffer_texture(struct gl_context *ctx,
   srcY1 = srcH;
}
 
+   target = texObj->Target;
fb_tex_blit.baseLevelSave = texObj->BaseLevel;
fb_tex_blit.maxLevelSave = texObj->MaxLevel;
fb_tex_blit.stencilSamplingSave = texObj->StencilSampling;
@@ -885,16 +885,12 @@ GLboolean
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_renderbuffer *rb,
 GLuint *tex,
-struct gl_texture_object **texObj,
-GLenum *target)
+struct gl_texture_object **texObj)
 {
struct gl_texture_image *texImage;
GLuint tempTex;
-
-   if (rb->NumSamples > 1)
-  *target = GL_TEXTURE_2D_MULTISAMPLE;
-   else
-  *target = GL_TEXTURE_2D;
+   const GLenum target = rb->NumSamples > 1
+  ? GL_TEXTURE_2D_MULTISAMPLE : GL_TEXTURE_2D;
 
tempTex = 0;
_mesa_GenTextures(1, &tempTex);
@@ -903,9 +899,9 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 
*tex = tempTex;
 
-   _mesa_BindTexture(*target, *tex);
+   _mesa_BindTexture(target, *tex);
*texObj = _mesa_lookup_texture(ctx, *tex);
-   texImage = _mesa_get_tex_image(ctx, *texObj, *target, 0);
+   texImage = _mesa_get_tex_image(ctx, *texObj, target, 0);
 
if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
   _mesa_DeleteTextures(1, tex);
@@ -917,6 +913,7 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
   ctx->Driver.FinishRenderTexture(ctx, rb);
}
 
+   assert(target == (*texObj)->Target);
return true;
 }
 
-- 
2.9.5

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[Mesa-dev] [PATCH 02/16] Revert "mesa: remove unused _mesa_delete_nameless_texture()"

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Changes in this series use this function.

This reverts commit 048de9e34a2214371481143cddcaa53f52468c6b.

Signed-off-by: Ian Romanick 
Cc: Samuel Pitoiset 
Cc: Timothy Arceri 
---
 src/mesa/main/texobj.c | 41 +
 src/mesa/main/texobj.h |  5 +
 2 files changed, 46 insertions(+)

diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index 02c4767..db40598 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1511,6 +1511,47 @@ delete_textures(struct gl_context *ctx, GLsizei n, const 
GLuint *textures)
}
 }
 
+/**
+ * This deletes a texObj without altering the hash table.
+ */
+void
+_mesa_delete_nameless_texture(struct gl_context *ctx,
+  struct gl_texture_object *texObj)
+{
+   if (!texObj)
+  return;
+
+   FLUSH_VERTICES(ctx, 0);
+
+   _mesa_lock_texture(ctx, texObj);
+   {
+  /* Check if texture is bound to any framebuffer objects.
+   * If so, unbind.
+   * See section 4.4.2.3 of GL_EXT_framebuffer_object.
+   */
+  unbind_texobj_from_fbo(ctx, texObj);
+
+  /* Check if this texture is currently bound to any texture units.
+   * If so, unbind it.
+   */
+  unbind_texobj_from_texunits(ctx, texObj);
+
+  /* Check if this texture is currently bound to any shader
+   * image unit.  If so, unbind it.
+   * See section 3.9.X of GL_ARB_shader_image_load_store.
+   */
+  unbind_texobj_from_image_units(ctx, texObj);
+   }
+   _mesa_unlock_texture(ctx, texObj);
+
+   ctx->NewState |= _NEW_TEXTURE_OBJECT;
+
+   /* Unreference the texobj.  If refcount hits zero, the texture
+* will be deleted.
+*/
+   _mesa_reference_texobj(&texObj, NULL);
+}
+
 
 void GLAPIENTRY
 _mesa_DeleteTextures_no_error(GLsizei n, const GLuint *textures)
diff --git a/src/mesa/main/texobj.h b/src/mesa/main/texobj.h
index e67ce3f..8dea853 100644
--- a/src/mesa/main/texobj.h
+++ b/src/mesa/main/texobj.h
@@ -171,6 +171,11 @@ _mesa_unlock_context_textures( struct gl_context *ctx );
 extern void
 _mesa_lock_context_textures( struct gl_context *ctx );
 
+extern void
+_mesa_delete_nameless_texture(struct gl_context *ctx,
+  struct gl_texture_object *texObj);
+
+
 /*@}*/
 
 /**
-- 
2.9.5

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[Mesa-dev] [PATCH 03/16] mesa: Add _mesa_bind_texture method

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Light-weight glBindTexture for internal use.

Signed-off-by: Ian Romanick 
---
 src/mesa/main/texobj.c | 17 -
 src/mesa/main/texobj.h |  4 +++-
 2 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index db40598..cd9f43c 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1692,6 +1692,22 @@ bind_texture_object(struct gl_context *ctx, unsigned 
unit,
}
 }
 
+void
+_mesa_bind_texture(struct gl_context *ctx, GLenum target,
+   struct gl_texture_object *tex_obj)
+{
+   const GLint targetIndex = _mesa_tex_target_to_index(ctx, target);
+
+   assert(targetIndex >= 0 && targetIndex < NUM_TEXTURE_TARGETS);
+
+   if (tex_obj->Target == 0)
+  finish_texture_init(ctx, target, tex_obj, targetIndex);
+
+   assert(tex_obj->Target == target);
+   assert(tex_obj->TargetIndex == targetIndex);
+
+   bind_texture_object(ctx, ctx->Texture.CurrentUnit, tex_obj);
+}
 
 /**
  * Implement glBindTexture().  Do error checking, look-up or create a new
@@ -1764,7 +1780,6 @@ bind_texture(struct gl_context *ctx, GLenum target, 
GLuint texName,
bind_texture_object(ctx, ctx->Texture.CurrentUnit, newTexObj);
 }
 
-
 void GLAPIENTRY
 _mesa_BindTexture_no_error(GLenum target, GLuint texName)
 {
diff --git a/src/mesa/main/texobj.h b/src/mesa/main/texobj.h
index 8dea853..f2d78ac 100644
--- a/src/mesa/main/texobj.h
+++ b/src/mesa/main/texobj.h
@@ -175,7 +175,9 @@ extern void
 _mesa_delete_nameless_texture(struct gl_context *ctx,
   struct gl_texture_object *texObj);
 
-
+extern void
+_mesa_bind_texture(struct gl_context *ctx, GLenum target,
+   struct gl_texture_object *tex_obj);
 /*@}*/
 
 /**
-- 
2.9.5

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[Mesa-dev] [PATCH 13/16] meta: Track temporary textures using gl_texture_object instead of GL API object handle

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.c  | 43 ++---
 src/mesa/drivers/common/meta.h  |  2 +-
 src/mesa/drivers/common/meta_blit.c |  8 ---
 3 files changed, 36 insertions(+), 17 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 52d959a..be490d5 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1228,6 +1228,8 @@ invert_z(GLfloat normZ)
 static void
 init_temp_texture(struct gl_context *ctx, struct temp_texture *tex)
 {
+   GLuint texObj;
+
/* prefer texture rectangle */
if (_mesa_is_desktop_gl(ctx) && ctx->Extensions.NV_texture_rectangle) {
   tex->Target = GL_TEXTURE_RECTANGLE;
@@ -1243,16 +1245,22 @@ init_temp_texture(struct gl_context *ctx, struct 
temp_texture *tex)
tex->MinSize = 16;  /* 16 x 16 at least */
assert(tex->MaxSize > 0);
 
-   _mesa_GenTextures(1, &tex->TexObj);
+   _mesa_GenTextures(1, &texObj);
+   tex->tex_obj = NULL;
+
+   if (texObj == 0)
+  return;
+
+   tex->tex_obj = _mesa_lookup_texture(ctx, texObj);
 }
 
 static void
 cleanup_temp_texture(struct temp_texture *tex)
 {
-   if (!tex->TexObj)
+   if (tex->tex_obj == NULL)
  return;
-   _mesa_DeleteTextures(1, &tex->TexObj);
-   tex->TexObj = 0;
+   _mesa_DeleteTextures(1, &tex->tex_obj->Name);
+   tex->tex_obj = NULL;
 }
 
 
@@ -1265,7 +1273,7 @@ _mesa_meta_get_temp_texture(struct gl_context *ctx)
 {
struct temp_texture *tex = &ctx->Meta->TempTex;
 
-   if (!tex->TexObj) {
+   if (tex->tex_obj == NULL) {
   init_temp_texture(ctx, tex);
}
 
@@ -1283,7 +1291,7 @@ get_bitmap_temp_texture(struct gl_context *ctx)
 {
struct temp_texture *tex = &ctx->Meta->Bitmap.Tex;
 
-   if (!tex->TexObj) {
+   if (tex->tex_obj == NULL) {
   init_temp_texture(ctx, tex);
}
 
@@ -1299,7 +1307,7 @@ _mesa_meta_get_temp_depth_texture(struct gl_context *ctx)
 {
struct temp_texture *tex = &ctx->Meta->Blit.depthTex;
 
-   if (!tex->TexObj) {
+   if (tex->tex_obj == NULL) {
   init_temp_texture(ctx, tex);
}
 
@@ -1378,9 +1386,11 @@ _mesa_meta_setup_copypix_texture(struct gl_context *ctx,
 {
bool newTex;
 
-   _mesa_BindTexture(tex->Target, tex->TexObj);
-   _mesa_TexParameteri(tex->Target, GL_TEXTURE_MIN_FILTER, filter);
-   _mesa_TexParameteri(tex->Target, GL_TEXTURE_MAG_FILTER, filter);
+   _mesa_BindTexture(tex->Target, tex->tex_obj->Name);
+   _mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MIN_FILTER,
+ (GLint *) &filter, false);
+   _mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MAG_FILTER,
+ (GLint *) &filter, false);
_mesa_TexEnvi(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
 
newTex = _mesa_meta_alloc_texture(tex, width, height, intFormat);
@@ -1422,9 +1432,16 @@ _mesa_meta_setup_drawpix_texture(struct gl_context *ctx,
  GLenum format, GLenum type,
  const GLvoid *pixels)
 {
-   _mesa_BindTexture(tex->Target, tex->TexObj);
-   _mesa_TexParameteri(tex->Target, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
-   _mesa_TexParameteri(tex->Target, GL_TEXTURE_MAG_FILTER, GL_NEAREST);
+   /* GLint so the compiler won't complain about type signedness mismatch in
+* the call to _mesa_texture_parameteriv below.
+*/
+   static const GLint filter = GL_NEAREST;
+
+   _mesa_BindTexture(tex->Target, tex->tex_obj->Name);
+   _mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MIN_FILTER, &filter,
+ false);
+   _mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MAG_FILTER, &filter,
+ false);
_mesa_TexEnvi(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
 
/* copy pixel data to texture */
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 252b236..6d51854 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -200,7 +200,7 @@ struct save_state
  */
 struct temp_texture
 {
-   GLuint TexObj;
+   struct gl_texture_object *tex_obj;
GLenum Target; /**< GL_TEXTURE_2D or GL_TEXTURE_RECTANGLE */
GLsizei MinSize;   /**< Min texture size to allocate */
GLsizei MaxSize;   /**< Max possible texture size */
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 0c08109..95dfa64 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -674,7 +674,7 @@ blitframebuffer_texture(struct gl_context *ctx,
   }
 
   srcLevel = 0;
-  texObj = _mesa_lookup_texture(ctx, meta_temp_texture->TexObj);
+  texObj = meta_temp_texture->tex_obj;
   if (texObj == NULL) {
  return false;
   }
@@ -1056,8 +1056,10 @@ _mesa_meta_glsl_blit_cleanup(struct gl_context *ctx, 
struct blit_state *blit)
_mesa_meta_blit_shader_table_cleanup(ctx, &blit->shaders_with_depth

[Mesa-dev] [PATCH 00/16] Texutre object namespace pollution and misc

2017-12-18 Thread Ian Romanick
This series is mostly from almost two years ago when I was working on GL
object namespace pollution in meta.  At the time, I abandonded it
because we were going to replace all of meta with blorp.  That work too
stalled.  I picked this up again when I was working on
https://bugs.freedesktop.org/show_bug.cgi?id=104154.  That failure
smelled like namespace pollution, but it turned out to be a weird,
subtle bug in the test.

Since I already did the work to rebase the series, I'm sending it out
rather than letting it sit for another two years.  This does fix a bunch
of the namespace pollution tests in piglit.

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[Mesa-dev] [PATCH 01/16] mesa: Fold _mesa_record_error into its only caller

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Also, the comment on _mesa_record_error was wrong.
dd_function_table::Error was not called because that function does not
exist.

Signed-off-by: Ian Romanick 
---
 src/mesa/main/context.c | 25 -
 src/mesa/main/context.h |  4 
 src/mesa/main/errors.c  |  3 ++-
 3 files changed, 2 insertions(+), 30 deletions(-)

diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 3fa9f69..53261fe 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -1829,31 +1829,6 @@ _mesa_get_dispatch(struct gl_context *ctx)
 /** \name Miscellaneous functions */
 /**/
 /*@{*/
-
-/**
- * Record an error.
- *
- * \param ctx GL context.
- * \param error error code.
- *
- * Records the given error code and call the driver's dd_function_table::Error
- * function if defined.
- *
- * \sa
- * This is called via _mesa_error().
- */
-void
-_mesa_record_error(struct gl_context *ctx, GLenum error)
-{
-   if (!ctx)
-  return;
-
-   if (ctx->ErrorValue == GL_NO_ERROR) {
-  ctx->ErrorValue = error;
-   }
-}
-
-
 /**
  * Flush commands.
  */
diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h
index 309d25c..17fb86c 100644
--- a/src/mesa/main/context.h
+++ b/src/mesa/main/context.h
@@ -154,10 +154,6 @@ _mesa_set_context_lost_dispatch(struct gl_context *ctx);
 /*@{*/
 
 extern void
-_mesa_record_error( struct gl_context *ctx, GLenum error );
-
-
-extern void
 _mesa_flush(struct gl_context *ctx);
 
 extern void GLAPIENTRY
diff --git a/src/mesa/main/errors.c b/src/mesa/main/errors.c
index 35a2f66..a968791 100644
--- a/src/mesa/main/errors.c
+++ b/src/mesa/main/errors.c
@@ -327,7 +327,8 @@ _mesa_error( struct gl_context *ctx, GLenum error, const 
char *fmtString, ... )
}
 
/* Set the GL context error state for glGetError. */
-   _mesa_record_error(ctx, error);
+   if (ctx->ErrorValue == GL_NO_ERROR)
+  ctx->ErrorValue = error;
 }
 
 void
-- 
2.9.5

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[Mesa-dev] [PATCH 09/16] meta/blit: Track source texture using gl_texture_object instead of GL API object handle

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  | 1 +
 src/mesa/drivers/common/meta_blit.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index a41de8b..1b1672e 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -312,6 +312,7 @@ struct fb_tex_blit_state
GLint baseLevelSave, maxLevelSave;
struct gl_sampler_object *samp_obj;
struct gl_sampler_object *samp_obj_save;
+   struct gl_texture_object *tex_obj;
GLuint stencilSamplingSave;
GLuint tempTex;
 };
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index d33624d..27996f9 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -694,6 +694,7 @@ blitframebuffer_texture(struct gl_context *ctx,
}
 
target = texObj->Target;
+   fb_tex_blit.tex_obj = texObj;
fb_tex_blit.baseLevelSave = texObj->BaseLevel;
fb_tex_blit.maxLevelSave = texObj->MaxLevel;
fb_tex_blit.stencilSamplingSave = texObj->StencilSampling;
-- 
2.9.5

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[Mesa-dev] [PATCH 15/16] meta: Use _mesa_bind_texture instead of _mesa_BindTexture

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.c | 6 +++---
 src/mesa/drivers/common/meta_generate_mipmap.c | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 5bad17d..55d803f 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1386,7 +1386,7 @@ _mesa_meta_setup_copypix_texture(struct gl_context *ctx,
 {
bool newTex;
 
-   _mesa_BindTexture(tex->Target, tex->tex_obj->Name);
+   _mesa_bind_texture(ctx, tex->Target, tex->tex_obj);
_mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MIN_FILTER,
  (GLint *) &filter, false);
_mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MAG_FILTER,
@@ -1437,7 +1437,7 @@ _mesa_meta_setup_drawpix_texture(struct gl_context *ctx,
 */
static const GLint filter = GL_NEAREST;
 
-   _mesa_BindTexture(tex->Target, tex->tex_obj->Name);
+   _mesa_bind_texture(ctx, tex->Target, tex->tex_obj);
_mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MIN_FILTER, &filter,
  false);
_mesa_texture_parameteriv(ctx, tex->tex_obj, GL_TEXTURE_MAG_FILTER, &filter,
@@ -3176,7 +3176,7 @@ decompress_texture_image(struct gl_context *ctx,
_mesa_buffer_sub_data(ctx, decompress->buf_obj, 0, sizeof(verts), verts);
 
/* setup texture state */
-   _mesa_BindTexture(target, texObj->Name);
+   _mesa_bind_texture(ctx, target, texObj);
 
if (!use_glsl_version)
   _mesa_set_enable(ctx, target, GL_TRUE);
diff --git a/src/mesa/drivers/common/meta_generate_mipmap.c 
b/src/mesa/drivers/common/meta_generate_mipmap.c
index 55093e9..99d0931 100644
--- a/src/mesa/drivers/common/meta_generate_mipmap.c
+++ b/src/mesa/drivers/common/meta_generate_mipmap.c
@@ -201,10 +201,10 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum 
target,
 
/* We may have been called from glGenerateTextureMipmap with CurrentUnit
 * still set to 0, so we don't know when we can skip binding the texture.
-* Assume that _mesa_BindTexture will be fast if we're rebinding the same
+* Assume that _mesa_bind_texture will be fast if we're rebinding the same
 * texture.
 */
-   _mesa_BindTexture(target, texObj->Name);
+   _mesa_bind_texture(ctx, target, texObj);
 
if (mipmap->samp_obj == NULL) {
   mipmap->samp_obj =  ctx->Driver.NewSamplerObject(ctx, 0xDEADBEEF);
-- 
2.9.5

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[Mesa-dev] [PATCH 04/16] meta/blit: Check the values instead of the target before restoring

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta_blit.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 7adad46..6322b64 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -843,13 +843,17 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
 
/* Restore texture object state, the texture binding will
 * be restored by _mesa_meta_end().
+*
+* If the target restricts values for base level or max level, we assume
+* that the original values were valid.
 */
-   if (target != GL_TEXTURE_RECTANGLE_ARB) {
+   if (blit->baseLevelSave != texObj->BaseLevel)
   _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_BASE_LEVEL,
 &blit->baseLevelSave, false);
+
+   if (blit->maxLevelSave != texObj->MaxLevel)
   _mesa_texture_parameteriv(ctx, texObj, GL_TEXTURE_MAX_LEVEL,
 &blit->maxLevelSave, false);
-   }
 
/* If ARB_stencil_texturing is not supported, the mode won't have changed. 
*/
if (texObj->StencilSampling != blit->stencilSamplingSave) {
-- 
2.9.5

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[Mesa-dev] [PATCH 14/16] meta: Use _mesa_CreateTextures instead of _mesa_GenTextures

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index be490d5..5bad17d 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1245,7 +1245,7 @@ init_temp_texture(struct gl_context *ctx, struct 
temp_texture *tex)
tex->MinSize = 16;  /* 16 x 16 at least */
assert(tex->MaxSize > 0);
 
-   _mesa_GenTextures(1, &texObj);
+   _mesa_CreateTextures(tex->Target, 1, &texObj);
tex->tex_obj = NULL;
 
if (texObj == 0)
-- 
2.9.5

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[Mesa-dev] [PATCH 07/16] meta/blit: Don't return the texture handle from _mesa_meta_bind_rb_as_tex_image

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

It's always the same as *texObj->Name.

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  |  1 -
 src/mesa/drivers/common/meta_blit.c | 15 +++
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 16dd8e2..128c342 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -465,7 +465,6 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
 extern GLboolean
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_renderbuffer *rb,
-GLuint *tex,
 struct gl_texture_object **texObj);
 
 struct gl_sampler_object *
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index f7e29bc..4e660d2 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -640,10 +640,11 @@ blitframebuffer_texture(struct gl_context *ctx,
   srcLevel = readAtt->TextureLevel;
   texObj = readAtt->Texture;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
-  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb, &fb_tex_blit.tempTex,
-   &texObj))
+  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb, &texObj))
  return false;
 
+  fb_tex_blit.tempTex = texObj->Name;
+
   srcLevel = 0;
   if (_mesa_is_winsys_fbo(readFb)) {
  GLint temp = srcY0;
@@ -884,7 +885,6 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
 GLboolean
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_renderbuffer *rb,
-GLuint *tex,
 struct gl_texture_object **texObj)
 {
struct gl_texture_image *texImage;
@@ -897,14 +897,12 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
if (tempTex == 0)
   return false;
 
-   *tex = tempTex;
-
-   _mesa_BindTexture(target, *tex);
-   *texObj = _mesa_lookup_texture(ctx, *tex);
+   _mesa_BindTexture(target, tempTex);
+   *texObj = _mesa_lookup_texture(ctx, tempTex);
texImage = _mesa_get_tex_image(ctx, *texObj, target, 0);
 
if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
-  _mesa_DeleteTextures(1, tex);
+  _mesa_DeleteTextures(1, &tempTex);
   return false;
}
 
@@ -914,6 +912,7 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
}
 
assert(target == (*texObj)->Target);
+   assert(tempTex == (*texObj)->Name);
return true;
 }
 
-- 
2.9.5

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[Mesa-dev] [PATCH 08/16] meta/blit: Since _mesa_meta_bind_rb_as_tex_image has only one output, return it

2017-12-18 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/common/meta.h  |  5 ++---
 src/mesa/drivers/common/meta_blit.c | 23 ---
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 128c342..a41de8b 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -462,10 +462,9 @@ extern void
 _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum target,
struct fb_tex_blit_state *blit);
 
-extern GLboolean
+extern struct gl_texture_object *
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
-struct gl_renderbuffer *rb,
-struct gl_texture_object **texObj);
+struct gl_renderbuffer *rb);
 
 struct gl_sampler_object *
 _mesa_meta_setup_sampler(struct gl_context *ctx,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 4e660d2..d33624d 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -640,7 +640,8 @@ blitframebuffer_texture(struct gl_context *ctx,
   srcLevel = readAtt->TextureLevel;
   texObj = readAtt->Texture;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
-  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb, &texObj))
+  texObj = _mesa_meta_bind_rb_as_tex_image(ctx, rb);
+  if (texObj == NULL)
  return false;
 
   fb_tex_blit.tempTex = texObj->Name;
@@ -882,12 +883,12 @@ _mesa_meta_fb_tex_blit_end(struct gl_context *ctx, GLenum 
target,
   _mesa_DeleteTextures(1, &blit->tempTex);
 }
 
-GLboolean
+struct gl_texture_object *
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
-struct gl_renderbuffer *rb,
-struct gl_texture_object **texObj)
+struct gl_renderbuffer *rb)
 {
struct gl_texture_image *texImage;
+   struct gl_texture_object *texObj;
GLuint tempTex;
const GLenum target = rb->NumSamples > 1
   ? GL_TEXTURE_2D_MULTISAMPLE : GL_TEXTURE_2D;
@@ -895,15 +896,15 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
tempTex = 0;
_mesa_GenTextures(1, &tempTex);
if (tempTex == 0)
-  return false;
+  return NULL;
 
_mesa_BindTexture(target, tempTex);
-   *texObj = _mesa_lookup_texture(ctx, tempTex);
-   texImage = _mesa_get_tex_image(ctx, *texObj, target, 0);
+   texObj = _mesa_lookup_texture(ctx, tempTex);
+   texImage = _mesa_get_tex_image(ctx, texObj, target, 0);
 
if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
   _mesa_DeleteTextures(1, &tempTex);
-  return false;
+  return NULL;
}
 
if (ctx->Driver.FinishRenderTexture && !rb->NeedsFinishRenderTexture) {
@@ -911,9 +912,9 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
   ctx->Driver.FinishRenderTexture(ctx, rb);
}
 
-   assert(target == (*texObj)->Target);
-   assert(tempTex == (*texObj)->Name);
-   return true;
+   assert(target == texObj->Target);
+   assert(tempTex == texObj->Name);
+   return texObj;
 }
 
 struct gl_sampler_object *
-- 
2.9.5

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[Mesa-dev] [Bug 103955] Using array in structure results in wrong GLSL compilation output

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=103955

Ilia Mirkin  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED

--- Comment #11 from Ilia Mirkin  ---
(In reply to Younghun Jang from comment #10)
> No one seems to care about this easily avoidable bug. Alright. Just waiting
> for someone to rediscover this and make a duplicate.

No, I care. And I pushed out a fix... just forgot to update the tracker.

https://cgit.freedesktop.org/mesa/mesa/commit/?id=0332c7484b712e56ce1a6648c5fa04c90e286c37

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[Mesa-dev] [Bug 103955] Using array in structure results in wrong GLSL compilation output

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=103955

--- Comment #10 from Younghun Jang  ---
No one seems to care about this easily avoidable bug. Alright. Just waiting for
someone to rediscover this and make a duplicate.

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[Mesa-dev] [PATCH 1/2] intel/fs/bank_conflicts: Use posix_memalign() instead of overaligned new to obtain vector storage.

2017-12-18 Thread Francisco Jerez
The weight_vector_type constructor was inadvertently assuming C++17
semantics of the new operator applied on a type with alignment
requirement greater than the largest fundamental alignment.
Unfortunately on earlier C++ dialects the implementation was allowed
to raise an allocation failure when the alignment requirement of the
allocated type was unsupported, in an implementation-defined fashion.
It's expected that a C++ implementation recent enough to implement
P0035R4 would have honored allocation requests for such over-aligned
types even if the C++17 dialect wasn't active, which is likely the
reason why this problem wasn't caught by our CI system.

A more elegant fix would involve wrapping the __SSE2__ block in a
'__cpp_aligned_new >= 201606' preprocessor conditional and continue
taking advantage of the language feature, but that would yield lower
compile-time performance on old compilers not implementing it
(e.g. GCC versions older than 7.0).

Fixes: af2c320190f3c731 "intel/fs: Implement GRF bank conflict mitigation pass."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104226
Reported-by: Józef Kucia 
---
 src/intel/compiler/brw_fs_bank_conflicts.cpp | 22 --
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/intel/compiler/brw_fs_bank_conflicts.cpp 
b/src/intel/compiler/brw_fs_bank_conflicts.cpp
index 0cd880d44f2..e87fcbfc5eb 100644
--- a/src/intel/compiler/brw_fs_bank_conflicts.cpp
+++ b/src/intel/compiler/brw_fs_bank_conflicts.cpp
@@ -277,13 +277,10 @@ namespace {
struct weight_vector_type {
   weight_vector_type() : v(NULL), size(0) {}
 
-  weight_vector_type(unsigned n) :
- v(new vector_type[DIV_ROUND_UP(n, vector_width)]()),
- size(n) {}
+  weight_vector_type(unsigned n) : v(alloc(n)), size(n) {}
 
   weight_vector_type(const weight_vector_type &u) :
- v(new vector_type[DIV_ROUND_UP(u.size, vector_width)]()),
- size(u.size)
+ v(alloc(u.size)), size(u.size)
   {
  memcpy(v, u.v,
 DIV_ROUND_UP(u.size, vector_width) * sizeof(vector_type));
@@ -291,7 +288,7 @@ namespace {
 
   ~weight_vector_type()
   {
- delete[] v;
+ free(v);
   }
 
   weight_vector_type &
@@ -304,6 +301,19 @@ namespace {
 
   vector_type *v;
   unsigned size;
+
+   private:
+  static vector_type *
+  alloc(unsigned n)
+  {
+ const unsigned align = MAX2(sizeof(void *), __alignof__(vector_type));
+ const unsigned size = DIV_ROUND_UP(n, vector_width) * 
sizeof(vector_type);
+ void *p;
+ if (posix_memalign(&p, align, size))
+return NULL;
+ memset(p, 0, size);
+ return reinterpret_cast(p);
+  }
};
 
/**
-- 
2.14.2

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[Mesa-dev] [PATCH 2/2] intel/fs: Initialize fs_visitor::grf_used on construction.

2017-12-18 Thread Francisco Jerez
This should shut up some Valgrind errors during pre-regalloc
scheduling.  The errors were harmless since they could only have led
to the estimation of the bank conflict penalty of an instruction
pre-regalloc, which is inaccurate at that point of the program
compilation, but no less accurate than the intended "return 0"
fall-back path.  The scheduling pass is normally re-run after regalloc
with a well-defined grf_used value and accurate bank conflict
information.

Fixes: acf98ff933d "intel/fs: Teach instruction scheduler about GRF bank 
conflict cycles."
Reported-by: Eero Tamminen 
---
 src/intel/compiler/brw_fs_visitor.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intel/compiler/brw_fs_visitor.cpp 
b/src/intel/compiler/brw_fs_visitor.cpp
index 481d9c51e7a..7a5f6451f2b 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -898,6 +898,7 @@ fs_visitor::init()
 
this->promoted_constants = 0,
 
+   this->grf_used = 0;
this->spilled_any_registers = false;
 }
 
-- 
2.14.2

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Re: [Mesa-dev] [PATCH] intel/compiler/gen10: Disable push constants.

2017-12-18 Thread Ben Widawsky

On 17-12-18 15:23:11, Antognolli, Rafael wrote:

We still have gpu hangs on Cannonlake when using push constants, so
disable them for now until we have a proper fix for these hangs.

v2: Add warning message when creating context too.

Signed-off-by: Rafael Antognolli 
Cc: Ben Widawsky 
Cc: Kenneth Graunke 


Since this improves the current situation by enabling more workloads to be run
by folks with these platforms, and we don't regress any of the conformance
suites, this is:

Reviewed-by: Ben Widawsky 

I'd go as far as to suggest this for stable, but I know there's a lot of
heartburn around that.


---
src/intel/compiler/brw_fs.cpp   | 9 +
src/mesa/drivers/dri/i965/brw_context.c | 7 +++
2 files changed, 16 insertions(+)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 3717c50e32a..6d9f0eccb29 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2096,6 +2096,15 @@ fs_visitor::assign_constant_locations()
   if (subgroup_id_index >= 0)
  max_push_components--; /* Save a slot for the thread ID */

+   /* FIXME: We currently have some GPU hangs that happen apparently when using
+* push constants. Since we have no solution for such hangs yet, just
+* go ahead and use pull constants for now.
+*/
+   if (devinfo->gen == 10 && compiler->supports_pull_constants) {
+  compiler->shader_perf_log(log_data, "Disabling push constants.");
+  max_push_components = 0;
+   }
+
   /* We push small arrays, but no bigger than 16 floats.  This is big enough
* for a vec4 but hopefully not large enough to push out other stuff.  We
* should probably use a better heuristic at some point.
diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index 126c187f629..b555f7bfdf1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1022,6 +1022,13 @@ brwCreateContext(gl_api api,
  return false;
   }

+   if (devinfo->gen == 10) {
+  fprintf(stderr,
+  "WARNING: i965 does not fully support Gen10 yet.\n"
+  "Instability or lower performance might occur.\n");
+
+   }
+
   brw_init_state(brw);

   intelInitExtensions(ctx);
--
2.14.3


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[Mesa-dev] [PATCH] intel/compiler/gen10: Disable push constants.

2017-12-18 Thread Rafael Antognolli
We still have gpu hangs on Cannonlake when using push constants, so
disable them for now until we have a proper fix for these hangs.

v2: Add warning message when creating context too.

Signed-off-by: Rafael Antognolli 
Cc: Ben Widawsky 
Cc: Kenneth Graunke 
---
 src/intel/compiler/brw_fs.cpp   | 9 +
 src/mesa/drivers/dri/i965/brw_context.c | 7 +++
 2 files changed, 16 insertions(+)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 3717c50e32a..6d9f0eccb29 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2096,6 +2096,15 @@ fs_visitor::assign_constant_locations()
if (subgroup_id_index >= 0)
   max_push_components--; /* Save a slot for the thread ID */
 
+   /* FIXME: We currently have some GPU hangs that happen apparently when using
+* push constants. Since we have no solution for such hangs yet, just
+* go ahead and use pull constants for now.
+*/
+   if (devinfo->gen == 10 && compiler->supports_pull_constants) {
+  compiler->shader_perf_log(log_data, "Disabling push constants.");
+  max_push_components = 0;
+   }
+
/* We push small arrays, but no bigger than 16 floats.  This is big enough
 * for a vec4 but hopefully not large enough to push out other stuff.  We
 * should probably use a better heuristic at some point.
diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index 126c187f629..b555f7bfdf1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1022,6 +1022,13 @@ brwCreateContext(gl_api api,
   return false;
}
 
+   if (devinfo->gen == 10) {
+  fprintf(stderr,
+  "WARNING: i965 does not fully support Gen10 yet.\n"
+  "Instability or lower performance might occur.\n");
+
+   }
+
brw_init_state(brw);
 
intelInitExtensions(ctx);
-- 
2.14.3

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[Mesa-dev] [Bug 104329] Vulkan app crashes GPU

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=104329

--- Comment #1 from Samuel Pitoiset  ---
Hi,

Can you reproduce the VM faults after reverting
ff0f17da1446e7aa965e06c04a6ad5a55d95463d ?

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Re: [Mesa-dev] [PATCH] Android: gallium_dri: add include to get "xmlpool/options.h"

2017-12-18 Thread Mauro Rossi
Il 18/dic/2017 17:27, "Emil Velikov"  ha scritto:

On 17 December 2017 at 23:34, Mauro Rossi  wrote:
> target.c requires "xmlpool/options.h" generated header
> or the following tricky Android building error may appear:
>
> In file included from external/mesa/src/gallium/targets/dri/target.c:1:
> In file included from external/mesa/src/gallium/
auxiliary/target-helpers/drm_helper.h:185:
> out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_
radeonsi_intermediates/radeonsi/si_driinfo.h:19:7: error: expected '}'
>   DRI_CONF_RADEONSI_ENABLE_SISCHED("false")
>   ^
> external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:182:55:
note: to match this '{'
>static const struct drm_conf_ret xml_options_ret = {
>   ^
> 1 error generated.
>
> Fixes: 0f8c5de869 ("radeonsi: prepare for driver-specific driconf
options")
>
> Cc: "17.3" 
> ---
>  src/gallium/targets/dri/Android.mk | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/
Android.mk
> index d9923043af..a5b5f92ea0 100644
> --- a/src/gallium/targets/dri/Android.mk
> +++ b/src/gallium/targets/dri/Android.mk
> @@ -26,10 +26,10 @@ LOCAL_PATH := $(call my-dir)
>  include $(CLEAR_VARS)
>
>  LOCAL_MODULE := gallium_dri
> -
> +LOCAL_MODULE_CLASS := SHARED_LIBRARIES
>  LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
>  LOCAL_SRC_FILES := target.c
> -
> +LOCAL_C_INCLUDES := $(call generated-sources-dir-for,
STATIC_LIBRARIES,libmesa_util,,)
>  LOCAL_CFLAGS :=
>
This is slightly confusing, quick grep shows:
./src/util/Android.mk
...
LOCAL_MODULE := libmesa_util
...
LOCAL_EXPORT_C_INCLUDE_DIRS := $(intermediates)
...

src/gallium/targets/dri/Android.mk
LOCAL_WHOLE_STATIC_LIBRARIES := \
...
libmesa_util \
...

src/gallium/targets/dri/Android.mk- libmesa_loader

- libmesa_util already exports


AKA

 - static lib exports the includes
 - foo_dri.so already pulls the static lib


All confirmed and it's strange to us too, but when checking out Mesa 17.3
and 17.4 branches we, i.e. me and Quiang Yu, get the error.

Maybe Qiang could explain, I just added the only possibile dependency.


+ misc: if LOCAL_MODULE_CLASS is omitted we default to SHARED_LIBRARIES


LOCAL_MODULE_CLASS is required to be able to use generated-sources-dir-for
macro


Can you confirm the above are present in the tree you're using? Did it
work with older Android - aka, something in their system broke?


Same issue happening with Nougat, when checking out 17.3 or 17.4
Cheers



Thanks
Emil
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[Mesa-dev] [Bug 104329] Vulkan app crashes GPU

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=104329

Bug ID: 104329
   Summary: Vulkan app crashes GPU
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Vulkan/radeon
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: pete.marchingcu...@gmail.com
QA Contact: mesa-dev@lists.freedesktop.org

Running RX560, Fedora 26, 4.14.5 kernel, mesa git from
https://copr.fedorainfracloud.org/coprs/che/mesa/

Running my Vulkan VR application (developed with NVidia, no validation errors)
crashes radv resulting in completely frozen display after partially rendering a
single frame with the following dmesg output:

[ 1352.348283] amdgpu :02:00.0: GPU fault detected: 146 0x079a1014
[ 1352.348289] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000F3
[ 1352.348292] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D010014
[ 1352.348296] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048819,
write from 'CB3' (0x43423300) (16)
[ 1352.348362] amdgpu :02:00.0: GPU fault detected: 146 0x07ba1014
[ 1352.348363] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x
[ 1352.348364] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D050014
[ 1352.348366] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 0, write
from 'CB1' (0x43423100) (80)
[ 1352.348399] amdgpu :02:00.0: GPU fault detected: 146 0x07ba2014
[ 1352.348401] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x
[ 1352.348402] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D050014
[ 1352.348404] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 0, write
from 'CB1' (0x43423100) (80)
[ 1352.348463] amdgpu :02:00.0: GPU fault detected: 146 0x07fa2014
[ 1352.348464] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x
[ 1352.348465] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D010014
[ 1352.348467] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 0, write
from 'CB3' (0x43423300) (16)
[ 1352.348473] amdgpu :02:00.0: GPU fault detected: 146 0x07da2014
[ 1352.348474] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000ED
[ 1352.348476] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D050014
[ 1352.348477] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048813,
write from 'CB1' (0x43423100) (80)
[ 1352.348489] amdgpu :02:00.0: GPU fault detected: 146 0x07da1014
[ 1352.348490] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000F3
[ 1352.348491] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D050014
[ 1352.348493] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048819,
write from 'CB1' (0x43423100) (80)
[ 1352.348519] amdgpu :02:00.0: GPU fault detected: 146 0x079a2014
[ 1352.348520] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000F3
[ 1352.348521] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D010014
[ 1352.348523] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048819,
write from 'CB3' (0x43423300) (16)
[ 1352.348548] amdgpu :02:00.0: GPU fault detected: 146 0x079a1014
[ 1352.348550] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000DF
[ 1352.348551] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D010014
[ 1352.348553] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048799,
write from 'CB3' (0x43423300) (16)
[ 1352.348576] amdgpu :02:00.0: GPU fault detected: 146 0x07ba2014
[ 1352.348577] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000D0
[ 1352.348579] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D020014
[ 1352.348581] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048784,
write from 'CB2' (0x43423200) (32)
[ 1352.348607] amdgpu :02:00.0: GPU fault detected: 146 0x07ba1014
[ 1352.348609] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_ADDR  
0x001000BD
[ 1352.348610] amdgpu :02:00.0:   VM_CONTEXT1_PROTECTION_FAULT_STATUS
0x0D020014
[ 1352.348612] amdgpu :02:00.0: VM fault (0x14, vmid 6) at page 1048765,
write from 'CB2' (0x43423200) (32)

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[Mesa-dev] [PATCH] radv: properly load unused gl_LocalInvocationID/gl_WorkGroupID components

2017-12-18 Thread Samuel Pitoiset
F1 2017 looks good now.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/ac_nir_to_llvm.c | 21 ++---
 src/amd/vulkan/radv_shader.c|  7 +--
 2 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f18edf40a6..d11d328a5a 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -94,7 +94,7 @@ struct nir_to_llvm_context {
LLVMValueRef push_constants;
LLVMValueRef view_index;
LLVMValueRef num_work_groups;
-   LLVMValueRef workgroup_ids;
+   LLVMValueRef workgroup_ids[3];
LLVMValueRef local_invocation_ids;
LLVMValueRef tg_size;
 
@@ -747,7 +747,15 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
add_user_sgpr_argument(&args, ctx->ac.v3i32,
   &ctx->num_work_groups);
}
-   add_sgpr_argument(&args, ctx->ac.v3i32, &ctx->workgroup_ids);
+
+   for (int i = 0; i < 3; i++) {
+   ctx->workgroup_ids[i] = NULL;
+   if (ctx->shader_info->info.cs.uses_block_id[i]) {
+   add_sgpr_argument(&args, ctx->ac.i32,
+ &ctx->workgroup_ids[i]);
+   }
+   }
+
if (ctx->shader_info->info.cs.uses_local_invocation_idx)
add_sgpr_argument(&args, ctx->ac.i32, &ctx->tg_size);
add_vgpr_argument(&args, ctx->ac.v3i32, 
&ctx->local_invocation_ids);
@@ -4046,7 +4054,14 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
 
switch (instr->intrinsic) {
case nir_intrinsic_load_work_group_id: {
-   result = ctx->nctx->workgroup_ids;
+   LLVMValueRef values[3];
+
+   for (int i = 0; i < 3; i++) {
+   values[i] = ctx->nctx->workgroup_ids[i] ?
+   ctx->nctx->workgroup_ids[i] : ctx->ac.i32_0;
+   }
+
+   result = ac_build_gather_values(&ctx->ac, values, 3);
break;
}
case nir_intrinsic_load_base_vertex: {
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index f96b0c07f1..ab8ba42511 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -395,8 +395,11 @@ radv_fill_shader_variant(struct radv_device *device,
case MESA_SHADER_COMPUTE: {
struct ac_shader_info *info = &variant->info.info;
variant->rsrc2 |=
-   S_00B84C_TGID_X_EN(1) | S_00B84C_TGID_Y_EN(1) |
-   S_00B84C_TGID_Z_EN(1) | S_00B84C_TIDIG_COMP_CNT(2) |
+   S_00B84C_TGID_X_EN(info->cs.uses_block_id[0]) |
+   S_00B84C_TGID_Y_EN(info->cs.uses_block_id[1]) |
+   S_00B84C_TGID_Z_EN(info->cs.uses_block_id[2]) |
+   S_00B84C_TIDIG_COMP_CNT(info->cs.uses_thread_id[2] ? 2 :
+   info->cs.uses_thread_id[1] ? 1 
: 0) |
S_00B84C_TG_SIZE_EN(info->cs.uses_local_invocation_idx) 
|
S_00B84C_LDS_SIZE(variant->config.lds_size);
break;
-- 
2.15.1

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[Mesa-dev] [PATCH 9/9] glsl: disable vec3 packing/splitting in tfb separate mode

2017-12-18 Thread Brian Paul
This fixes a varying packing issue when using transform feedback in
GL_SEPARATE_ATTRIBS mode.  By time we get to linking, we already
know that the number of feedback attributes is under the
GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS limit so packing isn't
as critical.  In fact, packing/splitting vec3 attributes can cause
trouble because splitting effectively creates another TFB output
which can exceed device limits.  So, disable vec3 packing when it's
not needed to avoid that issue.

Fixes the Piglit ext_transform_feedback-separate test on VMware
driver.
---
 src/compiler/glsl/link_varyings.cpp | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index e8088de..bd0d322 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1777,6 +1777,16 @@ varying_matches::assign_locations(struct 
gl_shader_program *prog,
bool previous_var_xfb_only = false;
unsigned previous_packing_class = ~0u;
 
+   /* For tranform feedback separate mode, we know the number of attributes
+* is <= the number of buffers.  So packing isn't critical.  In fact,
+* packing vec3 attributes can cause trouble because splitting a vec3
+* effectively creates an additional transform feedback output.  The
+* extra TFB output may exceed device driver limits.
+*/
+   const bool dont_pack_vec3 =
+  (prog->TransformFeedback.BufferMode == GL_SEPARATE_ATTRIBS &&
+   prog->TransformFeedback.NumVarying > 0);
+
for (unsigned i = 0; i < this->num_matches; i++) {
   unsigned *location = &generic_location;
   const ir_variable *var;
@@ -1810,7 +1820,9 @@ varying_matches::assign_locations(struct 
gl_shader_program *prog,
   if (var->data.must_be_shader_input ||
   (this->disable_varying_packing &&
!(previous_var_xfb_only && var->data.is_xfb_only)) ||
-  (previous_packing_class != this->matches[i].packing_class )) {
+  (previous_packing_class != this->matches[i].packing_class) ||
+  (this->matches[i].packing_order == PACKING_ORDER_VEC3 &&
+   dont_pack_vec3)) {
  *location = ALIGN(*location, 4);
   }
 
-- 
1.9.1

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Re: [Mesa-dev] [PATCH] swr: Account for VBO index_bias in offsets

2017-12-18 Thread Cherniak, Bruce
This change only affects the client buffer case (swr_user_vbuf_range), not VBOs.

Reviewed with the caveat that the patch description be changed to remove "VBO"
Reviewed-by: Bruce Cherniak 

> On Dec 15, 2017, at 10:22 AM, George Kyriazis  
> wrote:
> 
> Account for info.index_bias when calculating buffers offsets.
> 
> Fixes the follow piglit tests:
> arb_draw_elements_base_vertex-drawelements-user_varrays
> arb_draw_elements_base_vertex-negative-index-user_varrays
> ---
> src/gallium/drivers/swr/swr_state.cpp | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/src/gallium/drivers/swr/swr_state.cpp 
> b/src/gallium/drivers/swr/swr_state.cpp
> index 4530d37..d320c90 100644
> --- a/src/gallium/drivers/swr/swr_state.cpp
> +++ b/src/gallium/drivers/swr/swr_state.cpp
> @@ -1012,8 +1012,8 @@ swr_user_vbuf_range(const struct pipe_draw_info *info,
>   *size = elems * vb->stride;
>} else if (vb->stride) {
>   elems = info->max_index - info->min_index + 1;
> -  *totelems = info->max_index + 1;
> -  *base = info->min_index * vb->stride;
> +  *totelems = (info->max_index + info->index_bias) + 1;
> +  *base = (info->min_index + info->index_bias) * vb->stride;
>   *size = elems * vb->stride;
>} else {
>   *totelems = 1;
> @@ -1304,7 +1304,7 @@ swr_update_derived(struct pipe_context *pipe,
> uint32_t base;
> swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, 
> &size);
> partial_inbounds = 0;
> -min_vertex_index = info.min_index;
> +min_vertex_index = info.min_index + info.index_bias;
> 
> size = AlignUp(size, 4);
> /* If size of client memory copy is too large, don't copy. The
> -- 
> 2.7.4
> 
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[Mesa-dev] [PATCH 3/9] glsl: minor simplification in assign_varying_locations()

2017-12-18 Thread Brian Paul
---
 src/compiler/glsl/link_varyings.cpp | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 9039c3b..6d74f9a 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -2514,11 +2514,9 @@ assign_varying_locations(struct gl_context *ctx,
*/
   foreach_in_list(ir_instruction, node, consumer->ir) {
  ir_variable *const input_var = node->as_variable();
-
- if (input_var == NULL || input_var->data.mode != ir_var_shader_in)
-continue;
-
- matches.record(NULL, input_var);
+ if (input_var && input_var->data.mode == ir_var_shader_in) {
+matches.record(NULL, input_var);
+ }
   }
}
 
-- 
1.9.1

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[Mesa-dev] [PATCH 8/9] glsl: simply packing class comparison

2017-12-18 Thread Brian Paul
Handle comparing the packing class using the same method as we do
for var->data.is_xfb_only
---
 src/compiler/glsl/link_varyings.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 95306fa..e8088de 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1775,6 +1775,7 @@ varying_matches::assign_locations(struct 
gl_shader_program *prog,
unsigned generic_location = 0;
unsigned generic_patch_location = MAX_VARYING*4;
bool previous_var_xfb_only = false;
+   unsigned previous_packing_class = ~0u;
 
for (unsigned i = 0; i < this->num_matches; i++) {
   unsigned *location = &generic_location;
@@ -1809,12 +1810,12 @@ varying_matches::assign_locations(struct 
gl_shader_program *prog,
   if (var->data.must_be_shader_input ||
   (this->disable_varying_packing &&
!(previous_var_xfb_only && var->data.is_xfb_only)) ||
-  (i > 0 && this->matches[i - 1].packing_class
-  != this->matches[i].packing_class )) {
+  (previous_packing_class != this->matches[i].packing_class )) {
  *location = ALIGN(*location, 4);
   }
 
   previous_var_xfb_only = var->data.is_xfb_only;
+  previous_packing_class = this->matches[i].packing_class;
 
   /* The number of components taken up by this variable. For vertex shader
* inputs, we use the number of slots * 4, as they have different
-- 
1.9.1

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[Mesa-dev] [PATCH 5/9] glsl: use bitwise operators in varying_matches::compute_packing_class()

2017-12-18 Thread Brian Paul
The mix of bitwise operators with * and + to compute the packing_class
values was a little weird.  Just use bitwise ops instead.
---
 src/compiler/glsl/link_varyings.cpp | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 7821b1e..17d8653 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1982,11 +1982,12 @@ varying_matches::compute_packing_class(const 
ir_variable *var)
 *
 * Therefore, the packing class depends only on the interpolation type.
 */
-   unsigned packing_class = var->data.centroid | (var->data.sample << 1) |
+   unsigned packing_class = (var->data.centroid << 0) |
+(var->data.sample << 1) |
 (var->data.patch << 2) |
 (var->data.must_be_shader_input << 3);
-   packing_class *= 8;
-   packing_class += var->is_interpolation_flat()
+   packing_class <<= 3;
+   packing_class |= var->is_interpolation_flat()
   ? unsigned(INTERP_MODE_FLAT) : var->data.interpolation;
return packing_class;
 }
-- 
1.9.1

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[Mesa-dev] [PATCH 4/9] glsl: simplify loop in varying_matches::assign_locations()

2017-12-18 Thread Brian Paul
The use of break/continue was kind of weird/confusing.
---
 src/compiler/glsl/link_varyings.cpp | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 6d74f9a..7821b1e 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1834,13 +1834,13 @@ varying_matches::assign_locations(struct 
gl_shader_program *prog,
  const uint64_t slot_mask = ((1ull << slots) - 1) << (*location / 4u);
 
  assert(slots > 0);
- if (reserved_slots & slot_mask) {
-*location = ALIGN(*location + 1, 4);
-slot_end = *location + num_components - 1;
-continue;
+
+ if ((reserved_slots & slot_mask) == 0) {
+break;
  }
 
- break;
+ *location = ALIGN(*location + 1, 4);
+ slot_end = *location + num_components - 1;
   }
 
   if (!var->data.patch && slot_end >= MAX_VARYING * 4u) {
-- 
1.9.1

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Re: [Mesa-dev] [PATCH] drirc: add option to disable ARB_draw_indirect

2017-12-18 Thread Rob Clark
On Fri, Dec 15, 2017 at 1:08 PM, Nicolai Hähnle  wrote:
> On 15.12.2017 12:37, Rob Clark wrote:
>>
>> On Fri, Dec 15, 2017 at 4:41 AM, Nicolai Hähnle 
>> wrote:
>>>
>>> On 15.12.2017 00:56, Rob Clark wrote:


 On Wed, Dec 6, 2017 at 3:31 PM, Ian Romanick 
 wrote:
>
>
> On 12/05/2017 08:25 AM, Ilia Mirkin wrote:
>>
>>
>> On Tue, Dec 5, 2017 at 8:18 AM, Emil Velikov
>> 
>> wrote:
>>>
>>>
>>> Hi Rob,
>>>
>>> On 5 December 2017 at 12:54, Rob Clark  wrote:


 This is a bit sad/annoying.  But with current GPU firmware (at least
 on
 a5xx) we can support both draw-indirect and base-instance.  But we
 can't
 support draw-indirect with a non-zero base-instance specified.  So
 add
 a
 driconf option to hide the extension from games that are known to
 use
 both.

 Signed-off-by: Rob Clark 
 ---
 Tbh, I'm also not really sure what to do when/if we got updated
 firmware
 which handled draw-indirect with base-instance, since we'd need to
 make
 this option conditional on fw version.  For STK that probably isn't
 a
 big deal since it doesn't use draw-indirect in a particularly useful
 way
 (the indirect buffer is generated on CPU).

>>> Couldn't freedreno just return 0 for PIPE_CAP_DRAW_INDIRECT (aka
>>> disable the extension) as it detects buggy FW?
>>> This is what radeons have been doing as they encounter iffy firmware
>>> or
>>> LLVM.
>>>
>>> AFAICT freedreno doesn't do GL 4.0 or GLES 3.1 so one should be safe.
>>
>>
>>
>> Rob is this -><- close to ES 3.1, so that's not a great option.
>
>
>
> And I don't suppose there's a way to get updated firmware?  i965 has
> similar sorts of cases where higher versions are disabled due to
> missing
> kernel features.
>

 so after r/e the instruction set for the CP microcontrollers and
 writing a disassembler and assembler[1], and figuring out how the fw
 handles CP_DRAW_INDIRECT and CP_DRAW_INDX_INDIRECT packets, I've come
 to the conclusion that the issue isn't actually with draw-indirect vs
 base-instance (at least not w/ the fw from my pixel2 which md5sum
 claims is the same as what is in linux-firmware.. it is possible that
 I was using an earlier version of the fw before when I came to this
 conclusion).  On the plus side, the PFP/ME microcontrollers that parse
 the cmdstream are pretty neat and I learned some useful stuff along
 the way.

 But thinking a bit about how stk is using GL_MAP_PERSISTENT_BIT to map
 and update the draw-indirect buffers, it seems to me there are plenty
 of ways this can go wrong w/ tilers (and even more when you throw
 re-ordering into the mix).  Possibly I should disable reordering when
 the indirect buffer is mapped w/ PERSISTENT bit, although for games
 like stk this is probably counter-productive vs just hiding the
 draw-indirect extension.. for games that actually use the GPU to write
 the draw-indirect buffer it shouldn't be a problem.  So I think a
 driconf patch like this probably still ends up being useful in the
 end.
>>>
>>>
>>>
>>> Can you detail a bit what you think could go wrong? I believe that the
>>> intention of the GL spec is that reordering in tilers should be possible
>>> at
>>> least for buffers that are mapped PERSISTENT but not COHERENT.
>>>
>>> You may only have to block reordering if the buffer is mapped both
>>> PERSISTENT *and* COHERENT -- and even then, reordering is probably
>>> possible.
>>>
>>> Granted, the spec is unclear as usual when it comes to these memory
>>> synchronization issues -- the description of the MAP_COHERENT_BIT in
>>> section
>>> 6.2 does not mention WAR hazards (in particular, Write by client after
>>> Read
>>> by server) -- but perhaps that can be fixed.
>>>
>>> To go into a bit more detail, what I suspect you're worried about is
>>> applications doing stuff like:
>>>
>>> 1. Write to indirect buffer (persistently & coherently mapped)
>>> 2. Draw*Indirect
>>> 3. Write to the same location in the indirect buffer
>>> 4. Draw*Indirect
>>>
>>> ... but this is bound to fail with "normal" GPUs (like ours) as well.
>>> Perhaps you have a different scenario in mind?
>>
>>
>> yeah, this was basically the scenario I had in mind.. although I'm
>> perhaps more aggressive in deferring rendering, to the point of
>> re-ordering draws if unnecessary fbo switches are made.  Normally I
>> track which buffers are read and written in a given batch (draw pass)
>> in order to preserve correctness (and in some cases shadowing or doing
>> a staging transfer to update buffers/textures to avoid splitting a
>> batch).  Perhaps it is only an issue w/ persistent+coherent, but w/
>> cpu updating buffe

[Mesa-dev] [PATCH 1/9] glsl: trivial comment fix in lower_packed_varyings.cpp

2017-12-18 Thread Brian Paul
---
 src/compiler/glsl/lower_packed_varyings.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/glsl/lower_packed_varyings.cpp 
b/src/compiler/glsl/lower_packed_varyings.cpp
index 1aec7ee..b840d26 100644
--- a/src/compiler/glsl/lower_packed_varyings.cpp
+++ b/src/compiler/glsl/lower_packed_varyings.cpp
@@ -766,7 +766,7 @@ lower_packed_varyings_visitor::needs_lowering(ir_variable 
*var)
/* Override disable_varying_packing if the var is only used by transform
 * feedback. Also override it if transform feedback is enabled and the
 * variable is an array, struct or matrix as the elements of these types
-* will always has the same interpolation and therefore asre safe to pack.
+* will always has the same interpolation and therefore are safe to pack.
 */
const glsl_type *type = var->type;
if (disable_varying_packing && !var->data.is_xfb_only &&
-- 
1.9.1

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[Mesa-dev] [PATCH 7/9] glsl: document varying_matches::assign_locations() params and return value

2017-12-18 Thread Brian Paul
And change *components to components[] as a reminder that it's an array.
---
 src/compiler/glsl/link_varyings.cpp | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 3de3f25..95306fa 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1468,7 +1468,7 @@ public:
~varying_matches();
void record(ir_variable *producer_var, ir_variable *consumer_var);
unsigned assign_locations(struct gl_shader_program *prog,
- uint8_t *components,
+ uint8_t components[],
  uint64_t reserved_slots);
void store_locations() const;
 
@@ -1742,10 +1742,15 @@ varying_matches::record(ir_variable *producer_var, 
ir_variable *consumer_var)
 /**
  * Choose locations for all of the variable matches that were previously
  * passed to varying_matches::record().
+ * \param components  returns array[slot] of number of components used
+ *per slot (1, 2, 3 or 4)
+ * \param reserved_slots  bitmask indicating which varying slots are already
+ *allocated
+ * \return number of slots (4-element vectors) allocated
  */
 unsigned
 varying_matches::assign_locations(struct gl_shader_program *prog,
-  uint8_t *components,
+  uint8_t components[],
   uint64_t reserved_slots)
 {
/* If packing has been disabled then we cannot safely sort the varyings by
-- 
1.9.1

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[Mesa-dev] [PATCH 2/9] glsl: make varying_matches::is_varying_packing_safe() const

2017-12-18 Thread Brian Paul
---
 src/compiler/glsl/link_varyings.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index cadffeb..9039c3b 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1475,7 +1475,7 @@ public:
 
 private:
bool is_varying_packing_safe(const glsl_type *type,
-const ir_variable *var);
+const ir_variable *var) const;
 
/**
 * If true, this driver disables varying packing, so all varyings need to
@@ -1608,7 +1608,7 @@ varying_matches::~varying_matches()
  */
 bool
 varying_matches::is_varying_packing_safe(const glsl_type *type,
- const ir_variable *var)
+ const ir_variable *var) const
 {
if (consumer_stage == MESA_SHADER_TESS_EVAL ||
consumer_stage == MESA_SHADER_TESS_CTRL ||
-- 
1.9.1

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[Mesa-dev] [PATCH 6/9] glsl: remove some continue statements

2017-12-18 Thread Brian Paul
In some cases, I think loop code is easier to read without continue
statements.
---
 src/compiler/glsl/link_varyings.cpp | 24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 17d8653..3de3f25 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -1277,13 +1277,12 @@ parse_tfeedback_decls(struct gl_context *ctx, struct 
gl_shader_program *prog,
* feedback of arrays would be useless otherwise.
*/
   for (unsigned j = 0; j < i; ++j) {
- if (!decls[j].is_varying())
-continue;
-
- if (tfeedback_decl::is_same(decls[i], decls[j])) {
-linker_error(prog, "Transform feedback varying %s specified "
- "more than once.", varying_names[i]);
-return false;
+ if (decls[j].is_varying()) {
+if (tfeedback_decl::is_same(decls[i], decls[j])) {
+   linker_error(prog, "Transform feedback varying %s specified "
+"more than once.", varying_names[i]);
+   return false;
+}
  }
   }
}
@@ -2567,12 +2566,11 @@ assign_varying_locations(struct gl_context *ctx,
matches.store_locations();
 
for (unsigned i = 0; i < num_tfeedback_decls; ++i) {
-  if (!tfeedback_decls[i].is_varying())
- continue;
-
-  if (!tfeedback_decls[i].assign_location(ctx, prog)) {
- _mesa_hash_table_destroy(tfeedback_candidates, NULL);
- return false;
+  if (tfeedback_decls[i].is_varying()) {
+ if (!tfeedback_decls[i].assign_location(ctx, prog)) {
+_mesa_hash_table_destroy(tfeedback_candidates, NULL);
+return false;
+ }
   }
}
_mesa_hash_table_destroy(tfeedback_candidates, NULL);
-- 
1.9.1

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[Mesa-dev] [PATCH 1/3] radv/amdgpu: wrap sync fd import/export.

2017-12-18 Thread Bas Nieuwenhuizen
---
 src/amd/vulkan/radv_radeon_winsys.h   |  5 +
 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 21 +
 2 files changed, 26 insertions(+)

diff --git a/src/amd/vulkan/radv_radeon_winsys.h 
b/src/amd/vulkan/radv_radeon_winsys.h
index e851c3edf86..45f58f063a4 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -281,6 +281,11 @@ struct radeon_winsys {
int (*export_syncobj)(struct radeon_winsys *ws, uint32_t syncobj, int 
*fd);
int (*import_syncobj)(struct radeon_winsys *ws, int fd, uint32_t 
*syncobj);
 
+   int (*export_syncobj_to_sync_file)(struct radeon_winsys *ws, uint32_t 
syncobj, int *fd);
+
+   /* Note that this, unlike the normal import, uses an existing syncobj. 
*/
+   int (*import_syncobj_from_sync_file)(struct radeon_winsys *ws, uint32_t 
syncobj, int fd);
+
 };
 
 static inline void radeon_emit(struct radeon_winsys_cs *cs, uint32_t value)
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c 
b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index e4d444b8524..4578a9b5484 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -1336,6 +1336,25 @@ static int radv_amdgpu_import_syncobj(struct 
radeon_winsys *_ws,
return amdgpu_cs_import_syncobj(ws->dev, fd, syncobj);
 }
 
+
+static int radv_amdgpu_export_syncobj_to_sync_file(struct radeon_winsys *_ws,
+   uint32_t syncobj,
+   int *fd)
+{
+   struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
+
+   return amdgpu_cs_syncobj_export_sync_file(ws->dev, syncobj, fd);
+}
+
+static int radv_amdgpu_import_syncobj_from_sync_file(struct radeon_winsys *_ws,
+ uint32_t syncobj,
+ int fd)
+{
+   struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
+
+   return amdgpu_cs_syncobj_import_sync_file(ws->dev, syncobj, fd);
+}
+
 void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
 {
ws->base.ctx_create = radv_amdgpu_ctx_create;
@@ -1361,5 +1380,7 @@ void radv_amdgpu_cs_init_functions(struct 
radv_amdgpu_winsys *ws)
ws->base.wait_syncobj = radv_amdgpu_wait_syncobj;
ws->base.export_syncobj = radv_amdgpu_export_syncobj;
ws->base.import_syncobj = radv_amdgpu_import_syncobj;
+   ws->base.export_syncobj_to_sync_file = 
radv_amdgpu_export_syncobj_to_sync_file;
+   ws->base.import_syncobj_from_sync_file = 
radv_amdgpu_import_syncobj_from_sync_file;
ws->base.fence_wait = radv_amdgpu_fence_wait;
 }
-- 
2.15.1

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[Mesa-dev] [PATCH 2/3] radv: Implement sync file import/export for fences & semaphores.

2017-12-18 Thread Bas Nieuwenhuizen
---
 src/amd/vulkan/radv_device.c | 115 ---
 1 file changed, 87 insertions(+), 28 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index a4ec912ff2c..0c31bfb9b44 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2825,7 +2825,6 @@ VkResult radv_CreateSemaphore(
/* create a syncobject if we are going to export this semaphore */
if (handleTypes) {
assert (device->physical_device->rad_info.has_syncobj);
-   assert (handleTypes == 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
int ret = device->ws->create_syncobj(device->ws, &sem->syncobj);
if (ret) {
vk_free2(&device->alloc, pAllocator, sem);
@@ -3683,18 +3682,59 @@ VkResult radv_GetMemoryFdPropertiesKHR(VkDevice _device,
}
 }
 
+static VkResult radv_import_opaque_fd(struct radv_device *device,
+  int fd,
+  uint32_t *syncobj)
+{
+   uint32_t syncobj_handle = 0;
+   int ret = device->ws->import_syncobj(device->ws, fd, &syncobj_handle);
+   if (ret != 0)
+   return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
+
+   if (*syncobj)
+   device->ws->destroy_syncobj(device->ws, *syncobj);
+
+   *syncobj = syncobj_handle;
+   close(fd);
+
+   return VK_SUCCESS;
+}
+
+static VkResult radv_import_sync_fd(struct radv_device *device,
+int fd,
+uint32_t *syncobj)
+{
+   /* If we create a syncobj we do it locally so that if we have an error, 
we don't
+* leave a syncobj in an undetermined state in the fence. */
+   uint32_t syncobj_handle =  *syncobj;
+   if (!syncobj_handle) {
+   int ret = device->ws->create_syncobj(device->ws, 
&syncobj_handle);
+   if (ret) {
+   return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
+   }
+   }
+
+   if (fd == -1) {
+   device->ws->signal_syncobj(device->ws, syncobj_handle);
+   } else {
+   int ret = device->ws->import_syncobj_from_sync_file(device->ws, 
syncobj_handle, fd);
+   if (ret != 0)
+   return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
+   }
+
+   *syncobj = syncobj_handle;
+   if (fd != -1)
+   close(fd);
+
+   return VK_SUCCESS;
+}
+
 VkResult radv_ImportSemaphoreFdKHR(VkDevice _device,
   const VkImportSemaphoreFdInfoKHR 
*pImportSemaphoreFdInfo)
 {
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_semaphore, sem, 
pImportSemaphoreFdInfo->semaphore);
-   uint32_t syncobj_handle = 0;
uint32_t *syncobj_dst = NULL;
-   assert(pImportSemaphoreFdInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
-
-   int ret = device->ws->import_syncobj(device->ws, 
pImportSemaphoreFdInfo->fd, &syncobj_handle);
-   if (ret != 0)
-   return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
 
if (pImportSemaphoreFdInfo->flags & 
VK_SEMAPHORE_IMPORT_TEMPORARY_BIT_KHR) {
syncobj_dst = &sem->temp_syncobj;
@@ -3702,12 +3742,14 @@ VkResult radv_ImportSemaphoreFdKHR(VkDevice _device,
syncobj_dst = &sem->syncobj;
}
 
-   if (*syncobj_dst)
-   device->ws->destroy_syncobj(device->ws, *syncobj_dst);
-
-   *syncobj_dst = syncobj_handle;
-   close(pImportSemaphoreFdInfo->fd);
-   return VK_SUCCESS;
+   switch(pImportSemaphoreFdInfo->handleType) {
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR:
+   return radv_import_opaque_fd(device, 
pImportSemaphoreFdInfo->fd, syncobj_dst);
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT_KHR:
+   return radv_import_sync_fd(device, 
pImportSemaphoreFdInfo->fd, syncobj_dst);
+   default:
+   unreachable("Unhandled semaphore handle type");
+   }
 }
 
 VkResult radv_GetSemaphoreFdKHR(VkDevice _device,
@@ -3719,12 +3761,22 @@ VkResult radv_GetSemaphoreFdKHR(VkDevice _device,
int ret;
uint32_t syncobj_handle;
 
-   assert(pGetFdInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
if (sem->temp_syncobj)
syncobj_handle = sem->temp_syncobj;
else
syncobj_handle = sem->syncobj;
-   ret = device->ws->export_syncobj(device->ws, syncobj_handle, pFd);
+
+   switch(pGetFdInfo->handleType) {
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR:
+   ret = device->ws->export_syncobj(device->ws, syncobj_handle, 
pFd);
+   break;
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT_KHR:
+   ret = device->w

[Mesa-dev] [PATCH 3/3] radv: Advertise sync fd import and export.

2017-12-18 Thread Bas Nieuwenhuizen
Passes dEQP-VK.*.sync_fd.*
---
 src/amd/vulkan/radv_device.c | 19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 0c31bfb9b44..51488285b09 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3787,7 +3787,17 @@ void 
radv_GetPhysicalDeviceExternalSemaphorePropertiesKHR(
const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo,
VkExternalSemaphorePropertiesKHR*   
pExternalSemaphoreProperties)
 {
-   if (pExternalSemaphoreInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR) {
+   RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
+
+   /* Require has_syncobj_wait for the syncobj signal ioctl introduced at 
virtually the same time */
+   if (pdevice->rad_info.has_syncobj_wait &&
+   (pExternalSemaphoreInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR || 
+pExternalSemaphoreInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT_KHR)) {
+   pExternalSemaphoreProperties->exportFromImportedHandleTypes = 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR | 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT_KHR;
+   pExternalSemaphoreProperties->compatibleHandleTypes = 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR | 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT_KHR;
+   pExternalSemaphoreProperties->externalSemaphoreFeatures = 
VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHR |
+   VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHR;
+   } else if (pExternalSemaphoreInfo->handleType == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR) {
pExternalSemaphoreProperties->exportFromImportedHandleTypes = 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
pExternalSemaphoreProperties->compatibleHandleTypes = 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
pExternalSemaphoreProperties->externalSemaphoreFeatures = 
VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHR |
@@ -3861,9 +3871,10 @@ void radv_GetPhysicalDeviceExternalFencePropertiesKHR(
RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
 
if (pdevice->rad_info.has_syncobj_wait &&
-   pExternalFenceInfo->handleType == 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR) {
-   pExternalFenceProperties->exportFromImportedHandleTypes = 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
-   pExternalFenceProperties->compatibleHandleTypes = 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
+   (pExternalFenceInfo->handleType == 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR || 
+pExternalFenceInfo->handleType == 
VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT_KHR)) {
+   pExternalFenceProperties->exportFromImportedHandleTypes = 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR | 
VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT_KHR;
+   pExternalFenceProperties->compatibleHandleTypes = 
VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR | 
VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT_KHR;
pExternalFenceProperties->externalFenceFeatures = 
VK_EXTERNAL_FENCE_FEATURE_EXPORTABLE_BIT_KHR |
VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHR;
} else {
-- 
2.15.1

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Re: [Mesa-dev] [PATCH 20/29] anv/cmd_buffer: Decide whether or not to HiZ clear up-front

2017-12-18 Thread Pohjolainen, Topi
On Mon, Nov 27, 2017 at 07:06:10PM -0800, Jason Ekstrand wrote:
> This moves the decision out of begin_subpass and into BeginRenderPass
> like the decision for color clears.  We use a similar name for the
> function for depth/stencil as for color even though no aux usage is
> really getting computed.
> ---
>  src/intel/vulkan/genX_cmd_buffer.c | 84 
> +++---
>  1 file changed, 50 insertions(+), 34 deletions(-)
> 
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
> b/src/intel/vulkan/genX_cmd_buffer.c
> index 57685bd..3f90c1a 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -346,6 +346,52 @@ color_attachment_compute_aux_usage(struct anv_device * 
> device,
> }
>  }
>  
> +static void
> +depth_stencil_attachment_compute_aux_usage(struct anv_device *device,
> +   struct anv_cmd_state *cmd_state,
> +   uint32_t att, VkRect2D 
> render_area)
> +{
> +   struct anv_attachment_state *att_state = &cmd_state->attachments[att];
> +   struct anv_image_view *iview = cmd_state->framebuffer->attachments[att];
> +
> +   /* These will be initialized after the first subpass transition. */
> +   att_state->aux_usage = ISL_AUX_USAGE_NONE;
> +   att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
> +
> +   if (att_state->aux_usage != ISL_AUX_USAGE_HIZ) {
> +  att_state->fast_clear = false;
> +  return;
> +   } else if (!(att_state->pending_clear_aspects & 
> VK_IMAGE_ASPECT_DEPTH_BIT)) {
> +  /* If we're just clearing stencil, we can always HiZ clear */
> +  att_state->fast_clear = true;

I need to check that I understood. This is possible because the clear doesn't
trigger for depth later on, right? If so, what does setting fast_clear
actually help?

> +  return;
> +   }
> +
> +   if (!blorp_can_hiz_clear_depth(GEN_GEN,
> +  iview->planes[0].isl.format,
> +  iview->image->samples,
> +  render_area.offset.x,
> +  render_area.offset.y,
> +  render_area.offset.x +
> +  render_area.extent.width,
> +  render_area.offset.y +
> +  render_area.extent.height)) {
> +  att_state->fast_clear = false;
> +   } else if (att_state->clear_value.depthStencil.depth != ANV_HZ_FC_VAL) {
> +  att_state->fast_clear = false;
> +   } else if (GEN_GEN == 8 &&
> +  anv_can_sample_with_hiz(&device->info, iview->image)) {
> +  /* Only gen9+ supports returning ANV_HZ_FC_VAL when sampling a
> +   * fast-cleared portion of a HiZ buffer. Testing has revealed that Gen8
> +   * only supports returning 0.0f. Gens prior to gen8 do not support this
> +   * feature at all.
> +   */
> +  att_state->fast_clear = false;
> +   } else {
> +  att_state->fast_clear = true;
> +   }
> +}
> +
>  static bool
>  need_input_attachment_state(const struct anv_render_pass_attachment *att)
>  {
> @@ -1052,12 +1098,9 @@ genX(cmd_buffer_setup_attachments)(struct 
> anv_cmd_buffer *cmd_buffer,
>  add_image_view_relocs(cmd_buffer, iview, 0,
>state->attachments[i].color);
>   } else {
> -/* This field will be initialized after the first subpass
> - * transition.
> - */
> -state->attachments[i].aux_usage = ISL_AUX_USAGE_NONE;
> -
> -state->attachments[i].input_aux_usage = ISL_AUX_USAGE_NONE;
> +depth_stencil_attachment_compute_aux_usage(cmd_buffer->device,
> +   state, i,
> +   begin->renderArea);
>   }
>  
>   if (need_input_attachment_state(&pass->attachments[i])) {
> @@ -3228,34 +3271,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer 
> *cmd_buffer,
> VK_IMAGE_ASPECT_STENCIL_BIT));
>  
>if (att_state->pending_clear_aspects) {
> - bool clear_with_hiz = att_state->aux_usage == ISL_AUX_USAGE_HIZ;
> - if (clear_with_hiz &&
> - (att_state->pending_clear_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) 
> {
> -if (!blorp_can_hiz_clear_depth(GEN_GEN,
> -   iview->planes[0].isl.format,
> -   iview->image->samples,
> -   render_area.offset.x,
> -   render_area.offset.y,
> -   render_area.offset.x +
> -   render_area.extent.width,
> -   render_area.offset.y +
> -   render_area.extent.height

[Mesa-dev] [PATCH] docs: update 17.3 and 18.0 cycles for the release calendar

2017-12-18 Thread Andres Gomez
Cc: Emil Velikov 
Cc: Juan A. Suarez Romero 
Signed-off-by: Andres Gomez 
---
 docs/release-calendar.html | 63 +-
 1 file changed, 62 insertions(+), 1 deletion(-)

diff --git a/docs/release-calendar.html b/docs/release-calendar.html
index 2542bf6a7c2..137ab12b08f 100644
--- a/docs/release-calendar.html
+++ b/docs/release-calendar.html
@@ -46,7 +46,7 @@ if you'd like to nominate a patch in the next stable release.
 Final planned release for the 17.2 series
 
 
-17.3
+17.3
 2017-12-15
 17.3.1
 Emil Velikov
@@ -63,6 +63,67 @@ if you'd like to nominate a patch in the next stable release.
 Juan A. Suarez Romero
 
 
+
+2018-01-26
+17.3.4
+Emil Velikov
+
+
+
+2018-02-09
+17.3.5
+Juan A. Suarez Romero
+
+
+
+2018-02-23
+17.3.6
+Juan A. Suarez Romero
+Final planned release for the 17.3 series
+
+
+18.0
+2018-01-19
+18.0.0-rc1
+Emil Velikov
+
+
+
+2018-01-26
+18.0.0-rc2
+Emil Velikov
+
+
+
+2018-02-02
+18.0.0-rc3
+Emil Velikov
+
+
+
+2018-02-09
+18.0.0-rc4
+Emil Velikov
+May be promoted to 18.0.0 final
+
+
+2018-02-23
+18.0.1
+Andres Gomez
+
+
+
+2018-03-09
+18.0.2
+Andres Gomez
+
+
+
+2018-03-23
+18.0.3
+Andres Gomez
+
+
 
 
 
-- 
2.14.2

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Re: [Mesa-dev] [PATCH 19/29] anv/cmd_buffer: Move the rest of clear_subpass into begin_subpass

2017-12-18 Thread Pohjolainen, Topi
On Mon, Nov 27, 2017 at 07:06:09PM -0800, Jason Ekstrand wrote:
> ---
>  src/intel/vulkan/anv_blorp.c   | 243 
> -
>  src/intel/vulkan/anv_private.h |  17 ++-
>  src/intel/vulkan/genX_cmd_buffer.c |  68 ++-
>  3 files changed, 188 insertions(+), 140 deletions(-)
> 
> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> index 7401234..45d7b12 100644
> --- a/src/intel/vulkan/anv_blorp.c
> +++ b/src/intel/vulkan/anv_blorp.c
> @@ -1132,143 +1132,6 @@ enum subpass_stage {
> SUBPASS_STAGE_RESOLVE,
>  };
>  
> -static bool
> -subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
> -{
> -   const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
> -   uint32_t ds = cmd_state->subpass->depth_stencil_attachment.attachment;
> -
> -   if (ds != VK_ATTACHMENT_UNUSED) {
> -  assert(ds < cmd_state->pass->attachment_count);
> -  if (cmd_state->attachments[ds].pending_clear_aspects)
> - return true;
> -   }
> -
> -   return false;
> -}
> -
> -void
> -anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
> -{
> -   const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
> -   const VkRect2D render_area = cmd_buffer->state.render_area;
> -
> -
> -   if (!subpass_needs_clear(cmd_buffer))
> -  return;
> -
> -   /* Because this gets called within a render pass, we tell blorp not to
> -* trash our depth and stencil buffers.
> -*/
> -   struct blorp_batch batch;
> -   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer,
> -BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
> -
> -   VkClearRect clear_rect = {
> -  .rect = cmd_buffer->state.render_area,
> -  .baseArrayLayer = 0,
> -  .layerCount = cmd_buffer->state.framebuffer->layers,
> -   };
> -
> -   struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
> -
> -   const uint32_t ds = 
> cmd_state->subpass->depth_stencil_attachment.attachment;
> -   assert(ds == VK_ATTACHMENT_UNUSED || ds < 
> cmd_state->pass->attachment_count);
> -
> -   if (ds != VK_ATTACHMENT_UNUSED &&
> -   cmd_state->attachments[ds].pending_clear_aspects) {
> -
> -  VkClearAttachment clear_att = {
> - .aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
> - .clearValue = cmd_state->attachments[ds].clear_value,
> -  };
> -
> -
> -  const uint8_t gen = cmd_buffer->device->info.gen;
> -  bool clear_with_hiz = gen >= 8 && cmd_state->attachments[ds].aux_usage 
> ==
> -ISL_AUX_USAGE_HIZ;
> -  const struct anv_image_view *iview = fb->attachments[ds];
> -
> -  if (clear_with_hiz) {
> - const bool clear_depth = clear_att.aspectMask &
> -  VK_IMAGE_ASPECT_DEPTH_BIT;
> - const bool clear_stencil = clear_att.aspectMask &
> -VK_IMAGE_ASPECT_STENCIL_BIT;
> -
> - /* Check against restrictions for depth buffer clearing. A great GPU
> -  * performance benefit isn't expected when using the HZ sequence for
> -  * stencil-only clears. Therefore, we don't emit a HZ op sequence 
> for
> -  * a stencil clear in addition to using the BLORP-fallback for 
> depth.
> -  */
> - if (clear_depth) {
> -if (!blorp_can_hiz_clear_depth(gen, iview->planes[0].isl.format,
> -   iview->image->samples,
> -   render_area.offset.x,
> -   render_area.offset.y,
> -   render_area.offset.x +
> -   render_area.extent.width,
> -   render_area.offset.y +
> -   render_area.extent.height)) {
> -   clear_with_hiz = false;
> -} else if (clear_att.clearValue.depthStencil.depth !=
> -   ANV_HZ_FC_VAL) {
> -   /* Don't enable fast depth clears for any color not equal to
> -* ANV_HZ_FC_VAL.
> -*/
> -   clear_with_hiz = false;
> -} else if (gen == 8 &&
> -   anv_can_sample_with_hiz(&cmd_buffer->device->info,
> -   iview->image)) {
> -   /* Only gen9+ supports returning ANV_HZ_FC_VAL when sampling a
> -* fast-cleared portion of a HiZ buffer. Testing has revealed
> -* that Gen8 only supports returning 0.0f. Gens prior to gen8 
> do
> -* not support this feature at all.
> -*/
> -   clear_with_hiz = false;
> -}
> - }
> -
> - if (clear_with_hiz) {
> -blorp_gen8_hiz_clear_attachments(&batch, iview->image->samples,
> - render_area.offset.x,
> - 

Re: [Mesa-dev] [PATCH] egl: link libEGL against the dynamic version of libglapi

2017-12-18 Thread Dylan Baker
Quoting Eric Engestrom (2017-12-18 08:33:18)
> From: Brendan King 
> 
> DRI modules store the address of the dispatch table in a TLS variable,
> _glapi_tls_Dispatch.
> 
> Changes to the way libEGL is built in d884d8d0077c16d459b1 resulted in
> it being statically linked against libglapi, and thus containing its own
> copy of _glapi_tls_Dispatch. The result was that some applications would
> fail to work (e.g. deqp-egl, which dynamically loads libEGL), due to the
> DRI module storing the dispatch table address in one copy of
> _glapi_tls_Dispatch, and libEGL obtaining the address from another copy
> of the variable.
> 
> This applies to autotools builds with --enable-glx-tls (on by default),
> and Meson builds (unconditional).

Does this actually apply to the meson build? We don't have an intermediate
convenience library in meson.

> 
> Fixes: d884d8d0077c16d459b1 "egl/dri: link directly to libglapi.so"
> Signed-off-by: Brendan King 
> Signed-off-by: Eric Engestrom 
> ---
> This issue was noticed in the PowerVR driver. It's unclear whether other
> DRI drivers are affected as well.
> ---
>  src/egl/Makefile.am | 9 ++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/src/egl/Makefile.am b/src/egl/Makefile.am
> index 66ba455..58db2c3 100644
> --- a/src/egl/Makefile.am
> +++ b/src/egl/Makefile.am
> @@ -46,7 +46,6 @@ libEGL_common_la_SOURCES = \
> $(LIBEGL_C_FILES)
>  
>  libEGL_common_la_LIBADD = \
> -   $(top_builddir)/src/mapi/shared-glapi/libglapi.la \
> $(top_builddir)/src/util/libmesautil.la \
> $(EGL_LIB_DEPS)
>  
> @@ -171,7 +170,9 @@ libEGL_mesa_la_SOURCES = \
> main/egldispatchstubs.c \
> g_egldispatchstubs.c \
> g_egldispatchstubs.h
> -libEGL_mesa_la_LIBADD = libEGL_common.la
> +libEGL_mesa_la_LIBADD = \
> +   libEGL_common.la \
> +   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
>  libEGL_mesa_la_LDFLAGS = \
> -no-undefined \
> -version-number 0 \
> @@ -183,7 +184,9 @@ else # USE_LIBGLVND
>  
>  lib_LTLIBRARIES = libEGL.la
>  libEGL_la_SOURCES =
> -libEGL_la_LIBADD = libEGL_common.la
> +libEGL_la_LIBADD = \
> +   libEGL_common.la \
> +   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
>  libEGL_la_LDFLAGS = \
> -no-undefined \
> -version-number 1:0 \
> -- 
> 2.7.4
> 
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[Mesa-dev] [PATCH 7/7] radv: do not add extra SGPR when push constants are not used

2017-12-18 Thread Samuel Pitoiset
This is not because the vertex stage needs some push constants
that other stages need them too. This should reduce the number
of loaded SGPRs in some situations.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/ac_shader_info.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 6aadb5032e..ab5388fb53 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -149,7 +149,8 @@ ac_nir_shader_info_pass(struct nir_shader *nir,
struct nir_function *func = (struct nir_function 
*)exec_list_get_head(&nir->functions);
 
info->needs_push_constants = false;
-   if (options->layout->push_constant_size ||
+   if ((options->layout->push_constant_size &&
+options->layout->push_constant_stages & (1 << nir->info.stage)) ||
options->layout->dynamic_offset_count)
info->needs_push_constants = true;
 
-- 
2.15.1

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[Mesa-dev] [PATCH 6/7] radv: change the needs_push_constants logic

2017-12-18 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/ac_shader_info.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 4df428ae81..6aadb5032e 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -148,10 +148,10 @@ ac_nir_shader_info_pass(struct nir_shader *nir,
 {
struct nir_function *func = (struct nir_function 
*)exec_list_get_head(&nir->functions);
 
-   info->needs_push_constants = true;
-   if (!options->layout->push_constant_size &&
-   !options->layout->dynamic_offset_count)
-   info->needs_push_constants = false;
+   info->needs_push_constants = false;
+   if (options->layout->push_constant_size ||
+   options->layout->dynamic_offset_count)
+   info->needs_push_constants = true;
 
nir_foreach_variable(variable, &nir->inputs)
gather_info_input_decl(nir, options, variable, info);
-- 
2.15.1

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[Mesa-dev] [PATCH 5/7] radv: store pipeline stages that need push constants

2017-12-18 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_descriptor_set.c | 3 +++
 src/amd/vulkan/radv_descriptor_set.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/src/amd/vulkan/radv_descriptor_set.c 
b/src/amd/vulkan/radv_descriptor_set.c
index 382fc9330a..e815939a67 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -228,10 +228,13 @@ VkResult radv_CreatePipelineLayout(
 
layout->dynamic_offset_count = dynamic_offset_count;
layout->push_constant_size = 0;
+   layout->push_constant_stages = 0;
+
for (unsigned i = 0; i < pCreateInfo->pushConstantRangeCount; ++i) {
const VkPushConstantRange *range = 
pCreateInfo->pPushConstantRanges + i;
layout->push_constant_size = MAX2(layout->push_constant_size,
  range->offset + range->size);
+   layout->push_constant_stages |= range->stageFlags;
}
 
layout->push_constant_size = align(layout->push_constant_size, 16);
diff --git a/src/amd/vulkan/radv_descriptor_set.h 
b/src/amd/vulkan/radv_descriptor_set.h
index 7fa79186a1..083a61fd99 100644
--- a/src/amd/vulkan/radv_descriptor_set.h
+++ b/src/amd/vulkan/radv_descriptor_set.h
@@ -83,6 +83,7 @@ struct radv_pipeline_layout {
 
uint32_t num_sets;
uint32_t push_constant_size;
+   VkShaderStageFlags push_constant_stages;
uint32_t dynamic_offset_count;
 
unsigned char sha1[20];
-- 
2.15.1

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[Mesa-dev] [PATCH 2/7] radv: add assertions to make sure pipeline layout objects are valid

2017-12-18 Thread Samuel Pitoiset
The spec requires it.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_pipeline.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index fedabcd73f..3fc21bb501 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2023,6 +2023,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 
pipeline->device = device;
pipeline->layout = 
radv_pipeline_layout_from_handle(pCreateInfo->layout);
+   assert(pipeline->layout);
 
radv_pipeline_init_dynamic_state(pipeline, pCreateInfo);
radv_pipeline_init_blend_state(pipeline, pCreateInfo, extra);
@@ -2370,6 +2371,7 @@ static VkResult radv_compute_pipeline_create(
 
pipeline->device = device;
pipeline->layout = 
radv_pipeline_layout_from_handle(pCreateInfo->layout);
+   assert(pipeline->layout);
 
pStages[MESA_SHADER_COMPUTE] = &pCreateInfo->stage;
radv_create_shaders(pipeline, device, cache, (struct radv_pipeline_key) 
{0}, pStages);
-- 
2.15.1

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[Mesa-dev] [PATCH 4/7] radv: remove one useless check in ac_nir_shader_info_pass()

2017-12-18 Thread Samuel Pitoiset
pipeline->layout can't be NULL now.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/ac_shader_info.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 3299b47e6b..4df428ae81 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -149,10 +149,8 @@ ac_nir_shader_info_pass(struct nir_shader *nir,
struct nir_function *func = (struct nir_function 
*)exec_list_get_head(&nir->functions);
 
info->needs_push_constants = true;
-   if (!options->layout)
-   info->needs_push_constants = false;
-   else if (!options->layout->push_constant_size &&
-!options->layout->dynamic_offset_count)
+   if (!options->layout->push_constant_size &&
+   !options->layout->dynamic_offset_count)
info->needs_push_constants = false;
 
nir_foreach_variable(variable, &nir->inputs)
-- 
2.15.1

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[Mesa-dev] [PATCH 3/7] radv: remove one useless check in radv_flush_constants()

2017-12-18 Thread Samuel Pitoiset
pipeline->layout can't be NULL now.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_cmd_buffer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4a048485c8..a366facd63 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1753,7 +1753,8 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
uint64_t va;
 
stages &= cmd_buffer->push_constant_stages;
-   if (!stages || !layout || (!layout->push_constant_size && 
!layout->dynamic_offset_count))
+   if (!stages ||
+   (!layout->push_constant_size && !layout->dynamic_offset_count))
return;
 
if (!radv_cmd_buffer_upload_alloc(cmd_buffer, 
layout->push_constant_size +
-- 
2.15.1

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[Mesa-dev] [PATCH 1/7] radv: create pipeline layout objects for all meta operations

2017-12-18 Thread Samuel Pitoiset
They are dummy objects but the spec requires layout to not be
NULL, this just makes sure we are creating valid pipeline layout
objects. This will allow us to remove some useless checks.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_decompress.c | 28 
 src/amd/vulkan/radv_meta_fast_clear.c | 33 +++--
 src/amd/vulkan/radv_meta_resolve.c| 18 ++
 src/amd/vulkan/radv_private.h |  3 +++
 4 files changed, 80 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_decompress.c 
b/src/amd/vulkan/radv_meta_decompress.c
index b86f3925cf..7a5681414f 100644
--- a/src/amd/vulkan/radv_meta_decompress.c
+++ b/src/amd/vulkan/radv_meta_decompress.c
@@ -75,11 +75,29 @@ create_pass(struct radv_device *device,
return result;
 }
 
+static VkResult
+create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
+{
+   VkPipelineLayoutCreateInfo pl_create_info = {
+   .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+   .setLayoutCount = 0,
+   .pSetLayouts = NULL,
+   .pushConstantRangeCount = 0,
+   .pPushConstantRanges = NULL,
+   };
+
+   return radv_CreatePipelineLayout(radv_device_to_handle(device),
+&pl_create_info,
+&device->meta_state.alloc,
+layout);
+}
+
 static VkResult
 create_pipeline(struct radv_device *device,
 VkShaderModule vs_module_h,
uint32_t samples,
VkRenderPass pass,
+   VkPipelineLayout layout,
VkPipeline *decompress_pipeline,
VkPipeline *resummarize_pipeline)
 {
@@ -165,6 +183,7 @@ create_pipeline(struct radv_device *device,
VK_DYNAMIC_STATE_SCISSOR,
},
},
+   .layout = layout,
.renderPass = pass,
.subpass = 0,
};
@@ -212,6 +231,9 @@ radv_device_finish_meta_depth_decomp_state(struct 
radv_device *device)
radv_DestroyRenderPass(radv_device_to_handle(device),
   state->depth_decomp[i].pass,
   &state->alloc);
+   radv_DestroyPipelineLayout(radv_device_to_handle(device),
+  state->depth_decomp[i].p_layout,
+  &state->alloc);
radv_DestroyPipeline(radv_device_to_handle(device),
 state->depth_decomp[i].decompress_pipeline,
 &state->alloc);
@@ -243,8 +265,14 @@ radv_device_init_meta_depth_decomp_state(struct 
radv_device *device)
if (res != VK_SUCCESS)
goto fail;
 
+   res = create_pipeline_layout(device,
+&state->depth_decomp[i].p_layout);
+   if (res != VK_SUCCESS)
+   goto fail;
+
res = create_pipeline(device, vs_module_h, samples,
  state->depth_decomp[i].pass,
+ state->depth_decomp[i].p_layout,
  
&state->depth_decomp[i].decompress_pipeline,
  
&state->depth_decomp[i].resummarize_pipeline);
if (res != VK_SUCCESS)
diff --git a/src/amd/vulkan/radv_meta_fast_clear.c 
b/src/amd/vulkan/radv_meta_fast_clear.c
index 38da63246a..1acf510359 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -74,9 +74,27 @@ create_pass(struct radv_device *device)
return result;
 }
 
+static VkResult
+create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
+{
+   VkPipelineLayoutCreateInfo pl_create_info = {
+   .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+   .setLayoutCount = 0,
+   .pSetLayouts = NULL,
+   .pushConstantRangeCount = 0,
+   .pPushConstantRanges = NULL,
+   };
+
+   return radv_CreatePipelineLayout(radv_device_to_handle(device),
+&pl_create_info,
+&device->meta_state.alloc,
+layout);
+}
+
 static VkResult
 create_pipeline(struct radv_device *device,
-VkShaderModule vs_module_h)
+   VkShaderModule vs_module_h,
+   VkPipelineLayout layout)
 {
VkResult result;
VkDevice device_h = radv_device_to_handle(device);
@@ -173,6 +191,7 @@ create_pipeline(struct radv_device *device,

VK_DYNAMIC_STATE_SCISSOR,

Re: [Mesa-dev] [PATCH 18/29] intel/blorp: Add a blorp_hiz_clear_depth_stencil helper

2017-12-18 Thread Pohjolainen, Topi
On Mon, Nov 27, 2017 at 07:06:08PM -0800, Jason Ekstrand wrote:
> This is similar to blorp_gen8_hiz_clear_attachments except that it takes
> actual images instead of trusting in the already set depth state.
> ---
>  src/intel/blorp/blorp.h   | 11 ++
>  src/intel/blorp/blorp_clear.c | 50 
> +++
>  2 files changed, 61 insertions(+)
> 
> diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
> index a1dd571..208b2db 100644
> --- a/src/intel/blorp/blorp.h
> +++ b/src/intel/blorp/blorp.h
> @@ -170,6 +170,17 @@ blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format 
> format,
>uint32_t num_samples,
>uint32_t x0, uint32_t y0,
>uint32_t x1, uint32_t y1);
> +void
> +blorp_hiz_clear_depth_stencil(struct blorp_batch *batch,
> +  const struct blorp_surf *depth,
> +  const struct blorp_surf *stencil,
> +  uint32_t level,
> +  uint32_t start_layer, uint32_t num_layers,
> +  uint32_t x0, uint32_t y0,
> +  uint32_t x1, uint32_t y1,
> +  bool clear_depth, float depth_value,
> +  bool clear_stencil, uint8_t stencil_value);
> +
>  
>  void
>  blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch,
> diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
> index 8e7bc9f..ec859c2 100644
> --- a/src/intel/blorp/blorp_clear.c
> +++ b/src/intel/blorp/blorp_clear.c
> @@ -612,6 +612,56 @@ blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format 
> format,
> return true;
>  }
>  
> +void
> +blorp_hiz_clear_depth_stencil(struct blorp_batch *batch,
> +  const struct blorp_surf *depth,
> +  const struct blorp_surf *stencil,
> +  uint32_t level,
> +  uint32_t start_layer, uint32_t num_layers,
> +  uint32_t x0, uint32_t y0,
> +  uint32_t x1, uint32_t y1,
> +  bool clear_depth, float depth_value,
> +  bool clear_stencil, uint8_t stencil_value)
> +{
> +   struct blorp_params params;
> +   blorp_params_init(¶ms);
> +
> +   /* This requires WM_HZ_OP which only exists on gen8+ */
> +   assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8);
> +
> +   params.hiz_op = BLORP_HIZ_OP_DEPTH_CLEAR;
> +   params.num_layers = 1;
> +
> +   params.x0 = x0;
> +   params.y0 = y0;
> +   params.x1 = x1;
> +   params.y1 = y1;
> +
> +   for (uint32_t l = 0; l < num_layers; l++) {
> +  const uint32_t layer = start_layer + l;
> +  if (clear_stencil) {
> + brw_blorp_surface_info_init(batch->blorp, ¶ms.stencil, stencil,
> + level, layer,
> + ISL_FORMAT_UNSUPPORTED, true);
> + params.stencil_mask = 0xff;

In blorp_gen8_hiz_clear_attachments() this isn't actually set. Did we possibly
have a bug there?

Reviewed-by: Topi Pohjolainen 

> + params.stencil_ref = stencil_value;
> + params.num_samples = params.stencil.surf.samples;
> +  }
> +
> +  if (clear_depth) {
> + brw_blorp_surface_info_init(batch->blorp, ¶ms.depth, depth,
> + level, layer,
> + ISL_FORMAT_UNSUPPORTED, true);
> + params.depth.clear_color.f32[0] = depth_value;
> + params.depth_format =
> +isl_format_get_depth_format(depth->surf->format, false);
> + params.num_samples = params.depth.surf.samples;
> +  }
> +
> +  batch->blorp->exec(batch, ¶ms);
> +   }
> +}
> +
>  /* Given a depth stencil attachment, this function performs a fast depth 
> clear
>   * on a depth portion and a regular clear on the stencil portion. When
>   * performing a fast depth clear on the depth portion, the HiZ buffer is 
> simply
> -- 
> 2.5.0.400.gff86faf
> 
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Re: [Mesa-dev] [PATCH] drirc: add option to disable ARB_draw_indirect

2017-12-18 Thread Eric Anholt
Nicolai Hähnle  writes:

> On 15.12.2017 12:37, Rob Clark wrote:
>> On Fri, Dec 15, 2017 at 4:41 AM, Nicolai Hähnle  
>> wrote:
>>> On 15.12.2017 00:56, Rob Clark wrote:

 On Wed, Dec 6, 2017 at 3:31 PM, Ian Romanick  wrote:
>
> On 12/05/2017 08:25 AM, Ilia Mirkin wrote:
>>
>> On Tue, Dec 5, 2017 at 8:18 AM, Emil Velikov 
>> wrote:
>>>
>>> Hi Rob,
>>>
>>> On 5 December 2017 at 12:54, Rob Clark  wrote:

 This is a bit sad/annoying.  But with current GPU firmware (at least
 on
 a5xx) we can support both draw-indirect and base-instance.  But we
 can't
 support draw-indirect with a non-zero base-instance specified.  So add
 a
 driconf option to hide the extension from games that are known to use
 both.

 Signed-off-by: Rob Clark 
 ---
 Tbh, I'm also not really sure what to do when/if we got updated
 firmware
 which handled draw-indirect with base-instance, since we'd need to
 make
 this option conditional on fw version.  For STK that probably isn't a
 big deal since it doesn't use draw-indirect in a particularly useful
 way
 (the indirect buffer is generated on CPU).

>>> Couldn't freedreno just return 0 for PIPE_CAP_DRAW_INDIRECT (aka
>>> disable the extension) as it detects buggy FW?
>>> This is what radeons have been doing as they encounter iffy firmware or
>>> LLVM.
>>>
>>> AFAICT freedreno doesn't do GL 4.0 or GLES 3.1 so one should be safe.
>>
>>
>> Rob is this -><- close to ES 3.1, so that's not a great option.
>
>
> And I don't suppose there's a way to get updated firmware?  i965 has
> similar sorts of cases where higher versions are disabled due to missing
> kernel features.
>

 so after r/e the instruction set for the CP microcontrollers and
 writing a disassembler and assembler[1], and figuring out how the fw
 handles CP_DRAW_INDIRECT and CP_DRAW_INDX_INDIRECT packets, I've come
 to the conclusion that the issue isn't actually with draw-indirect vs
 base-instance (at least not w/ the fw from my pixel2 which md5sum
 claims is the same as what is in linux-firmware.. it is possible that
 I was using an earlier version of the fw before when I came to this
 conclusion).  On the plus side, the PFP/ME microcontrollers that parse
 the cmdstream are pretty neat and I learned some useful stuff along
 the way.

 But thinking a bit about how stk is using GL_MAP_PERSISTENT_BIT to map
 and update the draw-indirect buffers, it seems to me there are plenty
 of ways this can go wrong w/ tilers (and even more when you throw
 re-ordering into the mix).  Possibly I should disable reordering when
 the indirect buffer is mapped w/ PERSISTENT bit, although for games
 like stk this is probably counter-productive vs just hiding the
 draw-indirect extension.. for games that actually use the GPU to write
 the draw-indirect buffer it shouldn't be a problem.  So I think a
 driconf patch like this probably still ends up being useful in the
 end.
>>>
>>>
>>> Can you detail a bit what you think could go wrong? I believe that the
>>> intention of the GL spec is that reordering in tilers should be possible at
>>> least for buffers that are mapped PERSISTENT but not COHERENT.
>>>
>>> You may only have to block reordering if the buffer is mapped both
>>> PERSISTENT *and* COHERENT -- and even then, reordering is probably possible.
>>>
>>> Granted, the spec is unclear as usual when it comes to these memory
>>> synchronization issues -- the description of the MAP_COHERENT_BIT in section
>>> 6.2 does not mention WAR hazards (in particular, Write by client after Read
>>> by server) -- but perhaps that can be fixed.
>>>
>>> To go into a bit more detail, what I suspect you're worried about is
>>> applications doing stuff like:
>>>
>>> 1. Write to indirect buffer (persistently & coherently mapped)
>>> 2. Draw*Indirect
>>> 3. Write to the same location in the indirect buffer
>>> 4. Draw*Indirect
>>>
>>> ... but this is bound to fail with "normal" GPUs (like ours) as well.
>>> Perhaps you have a different scenario in mind?
>> 
>> yeah, this was basically the scenario I had in mind.. although I'm
>> perhaps more aggressive in deferring rendering, to the point of
>> re-ordering draws if unnecessary fbo switches are made.  Normally I
>> track which buffers are read and written in a given batch (draw pass)
>> in order to preserve correctness (and in some cases shadowing or doing
>> a staging transfer to update buffers/textures to avoid splitting a
>> batch).  Perhaps it is only an issue w/ persistent+coherent, but w/
>> cpu updating buffer without driver knowing when is kind of
>> sub-optimal.
>> 
>> I'm thinking I do need to keep track when there are outstanding
>> coherent+persistent transfers

Re: [Mesa-dev] [PATCH] spirv: Relax the validation conditions of OpSelect

2017-12-18 Thread Lionel Landwerlin

Thanks for point me to the code actually doing this (nir_build_alu).

Reviewed-by: Lionel Landwerlin 

On 15/12/17 03:56, Jason Ekstrand wrote:

The Talos Principle contains shaders with an OpSelect between two
vectors where the condition is a scalar boolean.  This is technically
against the spec bout nir_builder gracefully handles it by splatting

s/bout/but/

out the condition to all the channels.  So long as the condition is a
boolean, just emit a warning instead of failing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104246
---
  src/compiler/spirv/spirv_to_nir.c | 18 ++
  1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 0493dd3..f0476b2 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3511,10 +3511,20 @@ vtn_handle_body_instruction(struct vtn_builder *b, 
SpvOp opcode,
   vtn_fail("Result type of OpSelect must be a scalar, vector, or 
pointer");
}
  
-  vtn_fail_if(sel_val->type->type != sel_type,

-  "Condition type of OpSelect must be a scalar or vector of "
-  "Boolean type. It must have the same number of components "
-  "as Result Type");
+  if (unlikely(sel_val->type->type != sel_type)) {
+ if (sel_val->type->type == glsl_bool_type()) {
+/* This case is illegal but some versions of GLSLang produce it.
+ * That's fine, nir_builder will just splat the condition out
+ * which is most likely what the client wanted anyway.
+ */
+vtn_warn("Condition type of OpSelect must have the same number "
+ "of components as Result Type");
+ } else {
+vtn_fail("Condition type of OpSelect must be a scalar or vector "
+ "of Boolean type. It must have the same number of "
+ "components as Result Type");
+ }
+  }
  
vtn_fail_if(obj1_val->type != res_val->type ||

obj2_val->type != res_val->type,



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Re: [Mesa-dev] [PATCH 3/3] Revert "i965: Disable regular fast-clears (CCS_D) on gen9+"

2017-12-18 Thread Nanley Chery
On Sun, Dec 17, 2017 at 07:34:47PM -0800, Jason Ekstrand wrote:
> On Sat, Dec 16, 2017 at 3:07 PM, Jason Ekstrand 
> wrote:
> 
> > On December 16, 2017 14:35:29 Nanley Chery  wrote:
> >
> > On Wed, Dec 13, 2017 at 05:52:03PM -0800, Jason Ekstrand wrote:
> >>
> >>> This reverts commit ee57b15ec764736e2d5360beaef9fb2045ed0f68.
> >>>
> >>> Cc: "17.3" 
> >>> ---
> >>>  src/mesa/drivers/dri/i965/brw_meta_util.c | 10 -
> >>>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 57
> >>> ---
> >>>  2 files changed, 25 insertions(+), 42 deletions(-)
> >>>
> >>> diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c
> >>> b/src/mesa/drivers/dri/i965/brw_meta_util.c
> >>> index 54dc6a5..b311815 100644
> >>> --- a/src/mesa/drivers/dri/i965/brw_meta_util.c
> >>> +++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
> >>> @@ -293,17 +293,7 @@ brw_is_color_fast_clear_compatible(struct
> >>> brw_context *brw,
> >>> brw->mesa_to_isl_render_format[mt->format])
> >>>return false;
> >>>
> >>> -   /* Gen9 doesn't support fast clear on single-sampled SRGB buffers.
> >>> When
> >>> -* GL_FRAMEBUFFER_SRGB is enabled any color renderbuffers will be
> >>> -* resolved in intel_update_state. In that case it's pointless to do
> >>> a
> >>> -* fast clear because it's very likely to be immediately resolved.
> >>> -*/
> >>> const bool srgb_rb = _mesa_get_srgb_format_linear(mt->format) !=
> >>> mt->format;
> >>> -   if (devinfo->gen >= 9 &&
> >>> -   mt->surf.samples == 1 &&
> >>> -   ctx->Color.sRGBEnabled && srgb_rb)
> >>> -  return false;
> >>> -
> >>>/* Gen10 doesn't automatically decode the clear color of sRGB
> >>> buffers. Since
> >>> * we currently don't perform this decode in software, avoid a
> >>> fast-clear
> >>> * altogether. TODO: Do this in software.
> >>> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> >>> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> >>> index c1a4ce1..b87d356 100644
> >>> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> >>> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> >>> @@ -207,13 +207,7 @@ intel_miptree_supports_ccs(struct brw_context *brw,
> >>> if (!brw->mesa_format_supports_render[mt->format])
> >>>return false;
> >>>
> >>> -   if (devinfo->gen >= 9) {
> >>> -  mesa_format linear_format = _mesa_get_srgb_format_linear(m
> >>> t->format);
> >>> -  const enum isl_format isl_format =
> >>> - brw_isl_format_for_mesa_format(linear_format);
> >>> -  return isl_format_supports_ccs_e(&brw->screen->devinfo,
> >>> isl_format);
> >>> -   } else
> >>> -  return true;
> >>> +   return true;
> >>>  }
> >>>
> >>>  static bool
> >>> @@ -256,7 +250,7 @@ intel_miptree_supports_hiz(const struct brw_context
> >>> *brw,
> >>>   * our HW tends to support more linear formats than sRGB ones, we use
> >>> this
> >>>   * format variant for check for CCS_E compatibility.
> >>>   */
> >>> -MAYBE_UNUSED static bool
> >>> +static bool
> >>>  format_ccs_e_compat_with_miptree(const struct gen_device_info *devinfo,
> >>>   const struct intel_mipmap_tree *mt,
> >>>   enum isl_format access_format)
> >>> @@ -290,12 +284,13 @@ intel_miptree_supports_ccs_e(struct brw_context
> >>> *brw,
> >>> if (!intel_miptree_supports_ccs(brw, mt))
> >>>return false;
> >>>
> >>> -   /* Fast clear can be also used to clear srgb surfaces by using
> >>> equivalent
> >>> -* linear format. This trick, however, can't be extended to be used
> >>> with
> >>> -* lossless compression and therefore a check is needed to see if
> >>> the format
> >>> -* really is linear.
> >>> +   /* Many window system buffers are sRGB even if they are never
> >>> rendered as
> >>> +* sRGB.  For those, we want CCS_E for when sRGBEncode is false.
> >>> When the
> >>> +* surface is used as sRGB, we fall back to CCS_D.
> >>>  */
> >>> -   return _mesa_get_srgb_format_linear(mt->format) == mt->format;
> >>> +   mesa_format linear_format = _mesa_get_srgb_format_linear(m
> >>> t->format);
> >>> +   enum isl_format isl_format = brw_isl_format_for_mesa_format
> >>> (linear_format);
> >>> +   return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
> >>>  }
> >>>
> >>>  /**
> >>> @@ -2686,29 +2681,27 @@ intel_miptree_render_aux_usage(struct
> >>> brw_context *brw,
> >>>return ISL_AUX_USAGE_MCS;
> >>>
> >>> case ISL_AUX_USAGE_CCS_D:
> >>> -  /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve
> >>> any of
> >>> -   * the single-sampled color renderbuffers because the CCS buffer
> >>> isn't
> >>> -   * supported for SRGB formats. This only matters if
> >>> FRAMEBUFFER_SRGB is
> >>> -   * enabled because otherwise the surface state will be programmed
> >>> with
> >>> -   * the linear equivalent format anyway.
> >>> -   */
> >>> -  if (isl_format_is_srgb(render_format) &&
> >>> -  

Re: [Mesa-dev] [PATCH] egl: link libEGL against the dynamic version of libglapi

2017-12-18 Thread Emil Velikov
On 18 December 2017 at 16:33, Eric Engestrom  wrote:
> From: Brendan King 
>
> DRI modules store the address of the dispatch table in a TLS variable,
> _glapi_tls_Dispatch.
>
> Changes to the way libEGL is built in d884d8d0077c16d459b1 resulted in
> it being statically linked against libglapi, and thus containing its own
> copy of _glapi_tls_Dispatch. The result was that some applications would
> fail to work (e.g. deqp-egl, which dynamically loads libEGL), due to the
> DRI module storing the dispatch table address in one copy of
> _glapi_tls_Dispatch, and libEGL obtaining the address from another copy
> of the variable.
>
> This applies to autotools builds with --enable-glx-tls (on by default),
> and Meson builds (unconditional).
>
> Fixes: d884d8d0077c16d459b1 "egl/dri: link directly to libglapi.so"
> Signed-off-by: Brendan King 
> Signed-off-by: Eric Engestrom 
> ---
> This issue was noticed in the PowerVR driver. It's unclear whether other
> DRI drivers are affected as well.

Are you sure any of the extra patches isn't causing the issue?
Just checked the binary and the shared link is there.

> ---
>  src/egl/Makefile.am | 9 ++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/src/egl/Makefile.am b/src/egl/Makefile.am
> index 66ba455..58db2c3 100644
> --- a/src/egl/Makefile.am
> +++ b/src/egl/Makefile.am
> @@ -46,7 +46,6 @@ libEGL_common_la_SOURCES = \
> $(LIBEGL_C_FILES)
>
>  libEGL_common_la_LIBADD = \
> -   $(top_builddir)/src/mapi/shared-glapi/libglapi.la \
> $(top_builddir)/src/util/libmesautil.la \
> $(EGL_LIB_DEPS)
>
> @@ -171,7 +170,9 @@ libEGL_mesa_la_SOURCES = \
> main/egldispatchstubs.c \
> g_egldispatchstubs.c \
> g_egldispatchstubs.h
> -libEGL_mesa_la_LIBADD = libEGL_common.la
> +libEGL_mesa_la_LIBADD = \
> +   libEGL_common.la \
> +   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
>  libEGL_mesa_la_LDFLAGS = \
> -no-undefined \
> -version-number 0 \
> @@ -183,7 +184,9 @@ else # USE_LIBGLVND
>
>  lib_LTLIBRARIES = libEGL.la
>  libEGL_la_SOURCES =
> -libEGL_la_LIBADD = libEGL_common.la
> +libEGL_la_LIBADD = \
> +   libEGL_common.la \
> +   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
The exact same object is moved from libEGL_common.la to the parent
(final) shared library.
There is no (obvious) reorder, thus the patch in itself should be a noop.

-Emil
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Re: [Mesa-dev] [PATCH] i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usage

2017-12-18 Thread Nanley Chery
On Sun, Dec 17, 2017 at 08:03:45PM -0800, Jason Ekstrand wrote:
> This commit unifies the CCS_E and CCS_D cases.  This should fix a couple
> of subtle issues.  One is that when you use INTEL_DEBUG=norbc to disable
> CCS_E, we don't get the sRGB blending workaround.  By unifying the code,
> we give CCS_D that workaround as well.
> 
> The second issue fixed by this refactor is that the blending workaround
> was appears to be enabled on all gens but really only applies on gen9.
> Due to a happy accident in the way code was laid out, it was only
> getting enabled on gen9: gen8 and earlier don't support non-zero-one
> clear colors, and gen10 supports sRGB for CCS_E so it got caught in the
> format_ccs_e_compat_with_miptree case.  This refactor moves it above the
> format_ccs_e_compat_with_miptree case so it's an explicit early exit and
> makes it explicitly only on gen9.
> 
> Cc: "17.3" 
> Cc: Nanley Chery 
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 26 +-
>  1 file changed, 13 insertions(+), 13 deletions(-)
> 

Thanks for making the workaround gen9 specific. This patch is
Reviewed-by: Nanley Chery 

> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 47bfdf5..bbcc2a8 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -2684,28 +2684,28 @@ intel_miptree_render_aux_usage(struct brw_context 
> *brw,
>return ISL_AUX_USAGE_MCS;
>  
> case ISL_AUX_USAGE_CCS_D:
> -  return mt->mcs_buf ? ISL_AUX_USAGE_CCS_D : ISL_AUX_USAGE_NONE;
> -
> -   case ISL_AUX_USAGE_CCS_E: {
> -  /* If the format supports CCS_E and is compatible with the miptree,
> -   * then we can use it.
> -   */
> -  if (format_ccs_e_compat_with_miptree(&brw->screen->devinfo,
> -   mt, render_format))
> - return ISL_AUX_USAGE_CCS_E;
> -
> -  /* Otherwise, we have to fall back to CCS_D */
> +   case ISL_AUX_USAGE_CCS_E:
> +  if (!mt->mcs_buf) {
> + assert(mt->aux_usage == ISL_AUX_USAGE_CCS_D);
> + return ISL_AUX_USAGE_NONE;
> +  }
>  
>/* gen9 hardware technically supports non-0/1 clear colors with sRGB
> * formats.  However, there are issues with blending where it doesn't
> * properly apply the sRGB curve to the clear color when blending.
> */
> -  if (blend_enabled && isl_format_is_srgb(render_format) &&
> +  if (brw->devinfo->gen == 9 && blend_enabled &&
> +  isl_format_is_srgb(render_format) &&
>!isl_color_value_is_zero_one(mt->fast_clear_color, render_format))
>   return ISL_AUX_USAGE_NONE;
>  
> +  if (mt->aux_usage == ISL_AUX_USAGE_CCS_E &&
> +  format_ccs_e_compat_with_miptree(&brw->screen->devinfo,
> +   mt, render_format))
> + return ISL_AUX_USAGE_CCS_E;
> +
> +  /* Otherwise, we have to fall back to CCS_D */
>return ISL_AUX_USAGE_CCS_D;
> -   }
>  
> default:
>return ISL_AUX_USAGE_NONE;
> -- 
> 2.5.0.400.gff86faf
> 
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[Mesa-dev] [PATCH] egl: link libEGL against the dynamic version of libglapi

2017-12-18 Thread Eric Engestrom
From: Brendan King 

DRI modules store the address of the dispatch table in a TLS variable,
_glapi_tls_Dispatch.

Changes to the way libEGL is built in d884d8d0077c16d459b1 resulted in
it being statically linked against libglapi, and thus containing its own
copy of _glapi_tls_Dispatch. The result was that some applications would
fail to work (e.g. deqp-egl, which dynamically loads libEGL), due to the
DRI module storing the dispatch table address in one copy of
_glapi_tls_Dispatch, and libEGL obtaining the address from another copy
of the variable.

This applies to autotools builds with --enable-glx-tls (on by default),
and Meson builds (unconditional).

Fixes: d884d8d0077c16d459b1 "egl/dri: link directly to libglapi.so"
Signed-off-by: Brendan King 
Signed-off-by: Eric Engestrom 
---
This issue was noticed in the PowerVR driver. It's unclear whether other
DRI drivers are affected as well.
---
 src/egl/Makefile.am | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/egl/Makefile.am b/src/egl/Makefile.am
index 66ba455..58db2c3 100644
--- a/src/egl/Makefile.am
+++ b/src/egl/Makefile.am
@@ -46,7 +46,6 @@ libEGL_common_la_SOURCES = \
$(LIBEGL_C_FILES)
 
 libEGL_common_la_LIBADD = \
-   $(top_builddir)/src/mapi/shared-glapi/libglapi.la \
$(top_builddir)/src/util/libmesautil.la \
$(EGL_LIB_DEPS)
 
@@ -171,7 +170,9 @@ libEGL_mesa_la_SOURCES = \
main/egldispatchstubs.c \
g_egldispatchstubs.c \
g_egldispatchstubs.h
-libEGL_mesa_la_LIBADD = libEGL_common.la
+libEGL_mesa_la_LIBADD = \
+   libEGL_common.la \
+   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
 libEGL_mesa_la_LDFLAGS = \
-no-undefined \
-version-number 0 \
@@ -183,7 +184,9 @@ else # USE_LIBGLVND
 
 lib_LTLIBRARIES = libEGL.la
 libEGL_la_SOURCES =
-libEGL_la_LIBADD = libEGL_common.la
+libEGL_la_LIBADD = \
+   libEGL_common.la \
+   $(top_builddir)/src/mapi/shared-glapi/libglapi.la
 libEGL_la_LDFLAGS = \
-no-undefined \
-version-number 1:0 \
-- 
2.7.4

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Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround

2017-12-18 Thread Nanley Chery
On Mon, Dec 18, 2017 at 08:05:38AM +, Rogovin, Kevin wrote:
> Hi,
> 
>  I gave it a try by modifying isl_genX(surf_fill_state_s) in 
> src/intel/isl/isl_surface_state.c where I set SamplerL2BypassModeDisable 
> ALWAYS as true for GEN9; sadly car chase continued to hang.
> 
> -Kevin
> 

Hi,

Thanks for giving it a try.

Regards,
Nanley

> -Original Message-
> From: Nanley Chery [mailto:nanleych...@gmail.com] 
> Sent: Friday, December 15, 2017 8:34 PM
> To: Rogovin, Kevin 
> Cc: mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
> 
> On Thu, Dec 14, 2017 at 07:39:46PM +0200, kevin.rogo...@intel.com wrote:
> > From: Kevin Rogovin 
> > 
> > This patch series implements a needed workaround for Gen9 for ASTC5x5 
> > sampler reads. The crux of the work around is to make sure that the 
> > sampler does not read an ASTC5x5 texture and a surface with an 
> > auxilary buffer without having a texture cache invalidate and command 
> > streamer stall between such accesses.
> > 
> 
> This workaround sounds like it deals with the same types of surfaces dealt 
> with in the RENDER_SURFACE_STATE field, Sampler L2 Out of Order Mode Disable 
> (or SamplerL2BypassModeDisable in our driver).
> 
> Here's the programming note from the SKL PRM on this field:
> * This bit must be set for the following surface types:
>   BC2_UNORM BC3_UNORM BC5_UNORM BC5_SNORM BC7_UNORM
> * This bit must be set for surfaces which contain a HiZ auxilliary surface
>   if other surfaces using AUX_CCS_E or AUX_CCS_D auxiliary surface state
>   (lossless color compression) are being sampled at the same time.
> 
> Have we tried setting this bit for ASTC_5x5 textures?
> 
> -Nanley
> 
> > With this patch series applied to the (current) master branch of mesa, 
> > carchase works on my SKL GT4.
> > 
> > v2:
> >   Rename workaround functions from brw_ to gen9_
> >   (suggested/requested by Topi Pohjolainen).
> > 
> >   Place texture resolve to avoid using auxilary surface
> >   when ASTC5x5 is detected in brw_predraw_resolve_inputs()
> >   instead of another detected function; doing so allows
> >   one to avoid walking the textures again.
> >   (suggested/requested by Topi Pohjolainen).
> > 
> >   Emit command streamer stall in addition to texture
> >   invalidate.
> >   (original short-coming caught by Jason Ekstrand)
> > 
> >   Place workaround function in (new) dedicated file.
> > 
> >   Minor path re-ordering to accomodate changes.
> > 
> > Kevin Rogovin (5):
> >   i965: define astx5x5 workaround infrastructure
> >   i965: set ASTC5x5 workaround texture type tracking on texture validate
> >   i965: use ASTC5x5 workaround in brw_draw
> >   i965: use ASTC5x5 workaround in brw_compute
> >   i965: ASTC5x5 workaround logic for blorp
> > 
> >  src/mesa/drivers/dri/i965/Makefile.sources   |  1 +
> >  src/mesa/drivers/dri/i965/brw_compute.c  |  6 
> >  src/mesa/drivers/dri/i965/brw_context.c  |  6 
> >  src/mesa/drivers/dri/i965/brw_context.h  | 24 
> >  src/mesa/drivers/dri/i965/brw_draw.c | 16 +--
> >  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  5 
> >  src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c  | 36 
> > 
> >  src/mesa/drivers/dri/i965/genX_blorp_exec.c  |  5 
> >  src/mesa/drivers/dri/i965/intel_batchbuffer.c|  1 +
> >  src/mesa/drivers/dri/i965/intel_tex_image.c  | 16 ---
> >  src/mesa/drivers/dri/i965/intel_tex_validate.c   | 13 +
> >  src/mesa/drivers/dri/i965/meson.build|  1 +
> >  12 files changed, 124 insertions(+), 6 deletions(-)  create mode 
> > 100644 src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c
> > 
> > --
> > 2.7.4
> > 
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Re: [Mesa-dev] [PATCH] Android: gallium_dri: add include to get "xmlpool/options.h"

2017-12-18 Thread Emil Velikov
On 17 December 2017 at 23:34, Mauro Rossi  wrote:
> target.c requires "xmlpool/options.h" generated header
> or the following tricky Android building error may appear:
>
> In file included from external/mesa/src/gallium/targets/dri/target.c:1:
> In file included from 
> external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:185:
> out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_radeonsi_intermediates/radeonsi/si_driinfo.h:19:7:
>  error: expected '}'
>   DRI_CONF_RADEONSI_ENABLE_SISCHED("false")
>   ^
> external/mesa/src/gallium/auxiliary/target-helpers/drm_helper.h:182:55: note: 
> to match this '{'
>static const struct drm_conf_ret xml_options_ret = {
>   ^
> 1 error generated.
>
> Fixes: 0f8c5de869 ("radeonsi: prepare for driver-specific driconf options")
>
> Cc: "17.3" 
> ---
>  src/gallium/targets/dri/Android.mk | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/targets/dri/Android.mk 
> b/src/gallium/targets/dri/Android.mk
> index d9923043af..a5b5f92ea0 100644
> --- a/src/gallium/targets/dri/Android.mk
> +++ b/src/gallium/targets/dri/Android.mk
> @@ -26,10 +26,10 @@ LOCAL_PATH := $(call my-dir)
>  include $(CLEAR_VARS)
>
>  LOCAL_MODULE := gallium_dri
> -
> +LOCAL_MODULE_CLASS := SHARED_LIBRARIES
>  LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
>  LOCAL_SRC_FILES := target.c
> -
> +LOCAL_C_INCLUDES := $(call 
> generated-sources-dir-for,STATIC_LIBRARIES,libmesa_util,,)
>  LOCAL_CFLAGS :=
>
This is slightly confusing, quick grep shows:
./src/util/Android.mk
...
LOCAL_MODULE := libmesa_util
...
LOCAL_EXPORT_C_INCLUDE_DIRS := $(intermediates)
...

src/gallium/targets/dri/Android.mk
LOCAL_WHOLE_STATIC_LIBRARIES := \
...
libmesa_util \
...

src/gallium/targets/dri/Android.mk- libmesa_loader

- libmesa_util already exports

AKA
 - static lib exports the includes
 - foo_dri.so already pulls the static lib

+ misc: if LOCAL_MODULE_CLASS is omitted we default to SHARED_LIBRARIES

Can you confirm the above are present in the tree you're using? Did it
work with older Android - aka, something in their system broke?


Thanks
Emil
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[Mesa-dev] Mesa 17.3.1 release candidate

2017-12-18 Thread Emil Velikov
Hello list,

The candidate for the Mesa 17.3.1 is now available. Currently we have:
 - 35 queued
 - 1 nominated (outstanding)
 - and 2 rejected patches


The current queue consists of:

Nearly a multiple fixes, making the GLSL shader cache more robust. The
RADV driver does not advertise VK_EXT_debug_report - there is no support
for it.

The i965, radeonsi, nvc0 and freedreno have received a few small fixes
each.

A number of big endian fixes have been merged.

Take a look at section "Mesa stable queue" for more information.


Testing reports/general approval


Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

The plan is to have 17.3.1 this Wednesday (20th of December), around or
shortly after 17:00 GMT.

If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.


Trivial merge conflicts
---

commit d92f520e1fe1c945d76cbae429a686edd99774e6
Author: Marek Olšák 

radeonsi: allow DMABUF exports for local buffers

(cherry picked from commit 010214b403de1b5e25a549372ba6192b89e05d06)

commit 5878b98dbc874b79164ac0ac8beed1e99766140f
Author: Bas Nieuwenhuizen 

spirv: Fix loading an entire block at once.

(cherry picked from commit b926da241a4221376afe195c476f6a05621e5c75)

commit 3fbe230348d004d0c1315436ef30a74d9d601d4a
Author: Eric Engestrom 

compiler: use NDEBUG to guard asserts

(cherry picked from commit 7b85b9b8773b119360a31b66b321ae560a77cb6d)

commit 829490e5e5c45b2daa189fa7eae6ca1d2ed3b014
Author: Bas Nieuwenhuizen 

radv: Don't advertise VK_EXT_debug_report.

(cherry picked from commit 4eb0dca46bf481258443bb76fb542613c3a260d1)


commit a1f3f8efd9b4b1147846b39e3b69f774ac8b44b6
Author: Dave Airlie 

radv: port merge tess info from anv

(cherry picked from commit 1bdeac545f4ea9f7ca6947f5da7fcf4f5b3010dc)


Cheers,
Emil


Mesa stable queue
-

Nominated (1)
=

Jason Ekstrand (1):
  18fde36ced4 intel/fs: Use the original destination region for
int MUL lowering


Queued (35)
===

Alex Smith (1):
  radv: Add LLVM version to the device name string

Bas Nieuwenhuizen (3):
  spirv: Fix loading an entire block at once.
  radv: Don't advertise VK_EXT_debug_report.
  radv: Fix multi-layer blits.

Ben Crocker (1):
  docs/llvmpipe: document ppc64le as alternative architecture to x86.

Brian Paul (2):
  xlib: call _mesa_warning() instead of fprintf()
  gallium/aux: include nr_samples in util_resource_size() computation

Bruce Cherniak (1):
  swr: Fix KNOB_MAX_WORKER_THREADS thread creation override.

Dave Airlie (1):
  radv: port merge tess info from anv

Emil Velikov (4):
  docs: add sha256 checksums for 17.3.0
  util: scons: wire up the sha1 test
  cherry-ignore: meson: fix strtof locale support check
  cherry-ignore: util: add mesa-sha1 test to meson

Eric Anholt (1):
  broadcom/vc4: Fix handling of GFXH-515 workaround with a start
vertex count.

Eric Engestrom (1):
  compiler: use NDEBUG to guard asserts

Fabian Bieler (2):
  glsl: Match order of gl_LightSourceParameters elements.
  glsl: Fix gl_NormalScale.

Gert Wollny (1):
  r600/sb: do not convert if-blocks that contain indirect array access

James Legg (1):
  nir/opcodes: Fix constant-folding of bitfield_insert

Jason Ekstrand (1):
  i965: Switch over to fully external-or-not MOCS scheme

Juan A. Suarez Romero (1):
  travis: disable Meson build

Kenneth Graunke (2):
  meta: Initialize depth/clear values on declaration.
  meta: Fix ClearTexture with GL_DEPTH_COMPONENT.

Leo Liu (1):
  radeon/vce: move destroy command before feedback command

Marek Olšák (4):
  radeonsi: flush the context after resource_copy_region for buffer exports
  radeonsi: allow DMABUF exports for local buffers
  winsys/amdgpu: disable local BOs again due to worse performance
  radeonsi: don't call force_dcc_off for buffers

Matt Turner (2):
  util: Add a SHA1 unit test program
  util: Assume little endian in the absence of platform-specific handling
Squashed with:
  util: Use preprocessor correctly
Squashed with:
  util: Just give up and define PIPE_ARCH_LITTLE_ENDIAN on MSVC
Squashed with:
  util: Also include endian.h on cygwin


Nicolai Hähnle (1):
  radeonsi: fix the R600_RESOURCE_FLAG_UNMAPPABLE check

Pierre Moreau (1):
  nvc0/ir: Properly lower 64-bit shifts when the shift value is >32

Timothy Arceri (1):
  glsl: get correct member type when processing xfb ifc arrays

Vadym Shovkoplias (2):
  glx/dri3: Remove unused deviceName variable
  util/disk_cache: Remove unneeded free() on always null string


Rejected (2)


Eric Engestrom (2):
  ab0809e5529 meson: fix strtof locale support check
  44fbbd6fd07 util: add mesa-sha1 test to meson

Reason: Meson is explicitly disabled in branch.

Re: [Mesa-dev] [PATCH] anv: fix bug when VK_REMAINING_ARRAY_LAYERS is used in vkCmdClearAttachments()

2017-12-18 Thread Jason Ekstrand
On Mon, Dec 18, 2017 at 2:55 AM, Samuel Iglesias Gonsálvez <
sigles...@igalia.com> wrote:

>
>
> On 15/12/17 16:46, Jason Ekstrand wrote:
> > Ugh... The problem here is that we may not know the framebuffer in
> > CmdCearAttachments if it's in a secondary command buffer.  I'm not
> > actually sure what to do in that case.  I guess we could store the
> > number of later somewhere and teach blorp how to do an indirect draw.
> > Really, I think it makes more sense to just disallow VK_REMAINING_LAYERS
> > in that function.
> >
>
> Makes sense. How do you want to disallow it? assert(), print an error
> and return...? because this function doesn't return a VkResult.
>

Assert should be fine.  Looking at the spec, I don't think it allows it.
In particular, the struct passed into vkCmdClearAttachment is *not* a
VkImageSubresourceLayout.

--Jason


> Sam
>
> > --Jason
> >
> >
> > On December 15, 2017 03:36:07 Samuel Iglesias Gonsálvez
> >  wrote:
> >
> >> Blorp was not supporting the use of the constant
> >> VK_REMAINING_ARRAY_LAYERS
> >> (whose value is ~0) in the VkClearRect structure. If we receive it, we
> >> need
> >> to calculate the layer count as the image layers count minus the base
> >> array
> >> layer.
> >>
> >> Signed-off-by: Samuel Iglesias Gonsálvez 
> >> ---
> >>  src/intel/vulkan/anv_blorp.c | 14 --
> >>  1 file changed, 12 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> >> index e244468e03..4ab4458246 100644
> >> --- a/src/intel/vulkan/anv_blorp.c
> >> +++ b/src/intel/vulkan/anv_blorp.c
> >> @@ -989,10 +989,15 @@ clear_color_attachment(struct anv_cmd_buffer
> >> *cmd_buffer,
> >> for (uint32_t r = 0; r < rectCount; ++r) {
> >>const VkOffset2D offset = pRects[r].rect.offset;
> >>const VkExtent2D extent = pRects[r].rect.extent;
> >> +  unsigned layer_count =
> >> + anv_get_layerCount(
> >> +cmd_buffer->state.framebuffer-
> >attachments[att_idx]->image,
> >> +&pRects[r]);
> >> +
> >>blorp_clear_attachments(batch, binding_table,
> >>ISL_FORMAT_UNSUPPORTED,
> pass_att->samples,
> >>pRects[r].baseArrayLayer,
> >> -  pRects[r].layerCount,
> >> +  layer_count,
> >>offset.x, offset.y,
> >>offset.x + extent.width, offset.y +
> >> extent.height,
> >>true, clear_color, false, 0.0f, 0, 0);
> >> @@ -1059,11 +1064,16 @@ clear_depth_stencil_attachment(struct
> >> anv_cmd_buffer *cmd_buffer,
> >> for (uint32_t r = 0; r < rectCount; ++r) {
> >>const VkOffset2D offset = pRects[r].rect.offset;
> >>const VkExtent2D extent = pRects[r].rect.extent;
> >> +  unsigned layer_count =
> >> + anv_get_layerCount(
> >> +cmd_buffer->state.framebuffer-
> >attachments[att_idx]->image,
> >> +&pRects[r]);
> >> +
> >>VkClearDepthStencilValue value =
> >> attachment->clearValue.depthStencil;
> >>blorp_clear_attachments(batch, binding_table,
> >>depth_format, pass_att->samples,
> >>pRects[r].baseArrayLayer,
> >> -  pRects[r].layerCount,
> >> +  layer_count,
> >>offset.x, offset.y,
> >>offset.x + extent.width, offset.y +
> >> extent.height,
> >>false, color_value,
> >> --
> >> 2.14.1
> >>
> >> ___
> >> mesa-dev mailing list
> >> mesa-dev@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
> >
> >
>
>
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Re: [Mesa-dev] [PATCH 9/9] mesa: always compare optype with symbolic name in ATI_fs

2017-12-18 Thread Miklós Máté
Thanks for the review. I'll also need somebody to commit these, because 
I have no access.


MM

On 11/12/17 19:50, Marek Olšák wrote:

For the series:

Reviewed-by: Marek Olšák 

Marek

On Sat, Dec 2, 2017 at 11:35 PM, Miklós Máté  wrote:

Signed-off-by: Miklós Máté 
---
  src/mesa/main/atifragshader.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mesa/main/atifragshader.c b/src/mesa/main/atifragshader.c
index 8538e3a53e..6b636f1dc7 100644
--- a/src/mesa/main/atifragshader.c
+++ b/src/mesa/main/atifragshader.c
@@ -76,7 +76,7 @@ _mesa_delete_ati_fragment_shader(struct gl_context *ctx, 
struct ati_fragment_sha
  static void match_pair_inst(struct ati_fragment_shader *curProg, GLuint 
optype)
  {
 if (optype == curProg->last_optype) {
-  curProg->last_optype = 1;
+  curProg->last_optype = ATI_FRAGMENT_SHADER_ALPHA_OP;
 }
  }

@@ -125,7 +125,7 @@ static void debug_op(GLint optype, GLuint arg_count, GLenum 
op, GLuint dst,

fprintf(stderr, "%s(%s, %s", op_name, _mesa_enum_to_string(op),
   _mesa_enum_to_string(dst));
-  if (!optype)
+  if (optype == ATI_FRAGMENT_SHADER_COLOR_OP)
  fprintf(stderr, ", %d", dstMask);

fprintf(stderr, ", %s", create_dst_mod_str(dstMod));
@@ -631,7 +631,7 @@ _mesa_FragmentOpXATI(GLint optype, GLuint arg_count, GLenum 
op, GLuint dst,
_mesa_error(ctx, GL_INVALID_ENUM, "C/AFragmentOpATI(op)");
return;
 }
-   if (optype == 1) {
+   if (optype == ATI_FRAGMENT_SHADER_ALPHA_OP) {
if (((op == GL_DOT2_ADD_ATI) && (curI->Opcode[0] != GL_DOT2_ADD_ATI)) ||
  ((op == GL_DOT3_ATI) && (curI->Opcode[0] != GL_DOT3_ATI)) ||
  ((op == GL_DOT4_ATI) && (curI->Opcode[0] != GL_DOT4_ATI)) ||
--
2.15.0.rc0

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[Mesa-dev] [Bug 97250] Mesa/Clover: openCV library bugs on CL_MEM_USE_HOST_PTR

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=97250

mirh  changed:

   What|Removed |Added

 CC||m...@protonmail.ch

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Re: [Mesa-dev] [PATCH] travis: use LLVM 5.0 for Meson Vulkan

2017-12-18 Thread Juan A. Suarez Romero
On Fri, 2017-12-15 at 18:49 +0100, Gert Wollny wrote:
> Am Freitag, den 15.12.2017, 17:17 +0100 schrieb Juan A. Suarez Romero:
> > Travis CI has moved to LLVM 5.0, and meson is detecting automatically
> > the available version.
> 
> Considering that LLVM 5.0 is obviously not properly made available in
> the travis-ci environment, I've reported the problem with travis-
> upstream: 
> 
> https://github.com/travis-ci/travis-ci/issues/8925
> 
> Apart from that I think Eric is right, one should be able to specify
> the version instead of just taking the latest availabe version. The
> autotools based builds all force a version, which helps work around the
> other problem:  
> 

I agree too. Either if there's an issue in Travis with LLVM, I also
think it is a good idea to allow meson to specify LLVM version to use.

As Emil said, several distributions allow to have several versions, so
it would be good to allow to choose which one to use.


> The travis version of LLVM is in /usr/local, so it is definitely not a
> packaged version, since this would go into /usr, and because the PATH
> defines /usr/local/bin before /usr/bin, and the local (incomplete)
> version takes precedence, so adding llvm-5.0-dev like this is probably
> useless.
> 
> Gallium ST Clover with LLVM-5.0 passes because it uses the package
> version by specifically picking llvm-config-5.0 which, as Emil pointed
> out, is a Debian+derivatives feat.
> 
> Best, 
> Gert
> 
> > 
> > So just let's change to LLVM 5.0 for this case.
> > ---
> >  .travis.yml | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/.travis.yml b/.travis.yml
> > index 211df3ec1ef..20432361176 100644
> > --- a/.travis.yml
> > +++ b/.travis.yml
> > @@ -37,12 +37,12 @@ matrix:
> >addons:
> >  apt:
> >sources:
> > -- llvm-toolchain-trusty-3.9
> > +- llvm-toolchain-trusty-5.0
> >packages:
> >  # LLVM packaging is broken and misses these dependencies
> >  - libedit-dev
> >  # From sources above
> > -- llvm-3.9-dev
> > +- llvm-5.0-dev
> >  # Common
> >  - xz-utils
> >  - libexpat1-dev
> 
> 
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[Mesa-dev] [Bug 97250] Mesa/Clover: openCV library bugs on CL_MEM_USE_HOST_PTR

2017-12-18 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=97250

adnan  changed:

   What|Removed |Added

 CC||cheema6...@gmail.com

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Re: [Mesa-dev] [PATCH] anv: fix bug when VK_REMAINING_ARRAY_LAYERS is used in vkCmdClearAttachments()

2017-12-18 Thread Samuel Iglesias Gonsálvez


On 15/12/17 16:46, Jason Ekstrand wrote:
> Ugh... The problem here is that we may not know the framebuffer in
> CmdCearAttachments if it's in a secondary command buffer.  I'm not
> actually sure what to do in that case.  I guess we could store the
> number of later somewhere and teach blorp how to do an indirect draw. 
> Really, I think it makes more sense to just disallow VK_REMAINING_LAYERS
> in that function.
> 

Makes sense. How do you want to disallow it? assert(), print an error
and return...? because this function doesn't return a VkResult.

Sam

> --Jason
> 
> 
> On December 15, 2017 03:36:07 Samuel Iglesias Gonsálvez
>  wrote:
> 
>> Blorp was not supporting the use of the constant
>> VK_REMAINING_ARRAY_LAYERS
>> (whose value is ~0) in the VkClearRect structure. If we receive it, we
>> need
>> to calculate the layer count as the image layers count minus the base
>> array
>> layer.
>>
>> Signed-off-by: Samuel Iglesias Gonsálvez 
>> ---
>>  src/intel/vulkan/anv_blorp.c | 14 --
>>  1 file changed, 12 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
>> index e244468e03..4ab4458246 100644
>> --- a/src/intel/vulkan/anv_blorp.c
>> +++ b/src/intel/vulkan/anv_blorp.c
>> @@ -989,10 +989,15 @@ clear_color_attachment(struct anv_cmd_buffer
>> *cmd_buffer,
>>     for (uint32_t r = 0; r < rectCount; ++r) {
>>    const VkOffset2D offset = pRects[r].rect.offset;
>>    const VkExtent2D extent = pRects[r].rect.extent;
>> +  unsigned layer_count =
>> + anv_get_layerCount(
>> +    cmd_buffer->state.framebuffer->attachments[att_idx]->image,
>> +    &pRects[r]);
>> +
>>    blorp_clear_attachments(batch, binding_table,
>>    ISL_FORMAT_UNSUPPORTED, pass_att->samples,
>>    pRects[r].baseArrayLayer,
>> -  pRects[r].layerCount,
>> +  layer_count,
>>    offset.x, offset.y,
>>    offset.x + extent.width, offset.y +
>> extent.height,
>>    true, clear_color, false, 0.0f, 0, 0);
>> @@ -1059,11 +1064,16 @@ clear_depth_stencil_attachment(struct
>> anv_cmd_buffer *cmd_buffer,
>>     for (uint32_t r = 0; r < rectCount; ++r) {
>>    const VkOffset2D offset = pRects[r].rect.offset;
>>    const VkExtent2D extent = pRects[r].rect.extent;
>> +  unsigned layer_count =
>> + anv_get_layerCount(
>> +    cmd_buffer->state.framebuffer->attachments[att_idx]->image,
>> +    &pRects[r]);
>> +
>>    VkClearDepthStencilValue value =
>> attachment->clearValue.depthStencil;
>>    blorp_clear_attachments(batch, binding_table,
>>    depth_format, pass_att->samples,
>>    pRects[r].baseArrayLayer,
>> -  pRects[r].layerCount,
>> +  layer_count,
>>    offset.x, offset.y,
>>    offset.x + extent.width, offset.y +
>> extent.height,
>>    false, color_value,
>> -- 
>> 2.14.1
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 
> 
> 



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Re: [Mesa-dev] [PATCH 2/2] ac/nir: fix lds store for patch outputs.

2017-12-18 Thread Bas Nieuwenhuizen
Reviewed-by: Bas Nieuwenhuizen 

for the series.

On Mon, Dec 18, 2017 at 7:55 AM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> This wasn't calculating the correct value, this along with
> a nir patch fixes a regression in:
> dEQP-VK.tessellation.shader_input_output.barrier
>
> Fixes: 043d14db30a (ac/nir: don't write tcs outputs to LDS that aren't read 
> back.)
> Signed-off-by: Dave Airlie 
> ---
>  src/amd/common/ac_nir_to_llvm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 69d7bea..bd5748d 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -2803,7 +2803,7 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
> bool store_lds = true;
>
> if (instr->variables[0]->var->data.patch) {
> -   if (!(ctx->tcs_patch_outputs_read & (1U << 
> instr->variables[0]->var->data.location)))
> +   if (!(ctx->tcs_patch_outputs_read & (1U << 
> (instr->variables[0]->var->data.location - VARYING_SLOT_PATCH0
> store_lds = false;
> } else {
> if (!(ctx->tcs_outputs_read & (1ULL << 
> instr->variables[0]->var->data.location)))
> --
> 2.9.5
>
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[Mesa-dev] [PATCH 1/1] Use getprogname from stdlib.h on all BSDs and APPLE

2017-12-18 Thread Maya Rashish
Remove EOL NetBSD < 1.x (this didn't work, since we don't
include sys/param.h).
Remove EOL FreeBSD < 4.4

Functionally changes OpenBSD which now uses getprogname instead of
fallback.
---
 src/util/xmlconfig.c | 17 +++--
 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/src/util/xmlconfig.c b/src/util/xmlconfig.c
index 60a6331..dd97a31 100644
--- a/src/util/xmlconfig.c
+++ b/src/util/xmlconfig.c
@@ -48,19 +48,8 @@ extern char *program_invocation_name, 
*program_invocation_short_name;
 #define GET_PROGRAM_NAME() program_invocation_short_name
 #elif defined(__CYGWIN__)
 #define GET_PROGRAM_NAME() program_invocation_short_name
-#elif defined(__FreeBSD__) && (__FreeBSD__ >= 2)
-#include 
-#if (__FreeBSD_version >= 44)
-#include 
-#define GET_PROGRAM_NAME() getprogname()
-#endif
-#elif defined(__NetBSD__) && defined(__NetBSD_Version__) && 
(__NetBSD_Version__ >= 106000100)
-#include 
-#define GET_PROGRAM_NAME() getprogname()
-#elif defined(__DragonFly__)
-#include 
-#define GET_PROGRAM_NAME() getprogname()
-#elif defined(__APPLE__)
+#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || \
+  defined(__DragonFly__) || defined(__APPLE__)
 #include 
 #define GET_PROGRAM_NAME() getprogname()
 #elif defined(__sun)
@@ -92,7 +81,7 @@ __getProgramName()
 #endif
 
 #if !defined(GET_PROGRAM_NAME)
-#if defined(__OpenBSD__) || defined(NetBSD) || defined(__UCLIBC__) || 
defined(ANDROID)
+#if defined(__UCLIBC__) || defined(ANDROID)
 /* This is a hack. It's said to work on OpenBSD, NetBSD and GNU.
  * Rogelio M.Serrano Jr. reported it's also working with UCLIBC. It's
  * used as a last resort, if there is no documented facility available. */
-- 
2.15.1

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Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround

2017-12-18 Thread Rogovin, Kevin
Hi,

 I gave it a try by modifying isl_genX(surf_fill_state_s) in 
src/intel/isl/isl_surface_state.c where I set SamplerL2BypassModeDisable ALWAYS 
as true for GEN9; sadly car chase continued to hang.

-Kevin

-Original Message-
From: Nanley Chery [mailto:nanleych...@gmail.com] 
Sent: Friday, December 15, 2017 8:34 PM
To: Rogovin, Kevin 
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround

On Thu, Dec 14, 2017 at 07:39:46PM +0200, kevin.rogo...@intel.com wrote:
> From: Kevin Rogovin 
> 
> This patch series implements a needed workaround for Gen9 for ASTC5x5 
> sampler reads. The crux of the work around is to make sure that the 
> sampler does not read an ASTC5x5 texture and a surface with an 
> auxilary buffer without having a texture cache invalidate and command 
> streamer stall between such accesses.
> 

This workaround sounds like it deals with the same types of surfaces dealt with 
in the RENDER_SURFACE_STATE field, Sampler L2 Out of Order Mode Disable (or 
SamplerL2BypassModeDisable in our driver).

Here's the programming note from the SKL PRM on this field:
* This bit must be set for the following surface types:
  BC2_UNORM BC3_UNORM BC5_UNORM BC5_SNORM BC7_UNORM
* This bit must be set for surfaces which contain a HiZ auxilliary surface
  if other surfaces using AUX_CCS_E or AUX_CCS_D auxiliary surface state
  (lossless color compression) are being sampled at the same time.

Have we tried setting this bit for ASTC_5x5 textures?

-Nanley

> With this patch series applied to the (current) master branch of mesa, 
> carchase works on my SKL GT4.
> 
> v2:
>   Rename workaround functions from brw_ to gen9_
>   (suggested/requested by Topi Pohjolainen).
> 
>   Place texture resolve to avoid using auxilary surface
>   when ASTC5x5 is detected in brw_predraw_resolve_inputs()
>   instead of another detected function; doing so allows
>   one to avoid walking the textures again.
>   (suggested/requested by Topi Pohjolainen).
> 
>   Emit command streamer stall in addition to texture
>   invalidate.
>   (original short-coming caught by Jason Ekstrand)
> 
>   Place workaround function in (new) dedicated file.
> 
>   Minor path re-ordering to accomodate changes.
> 
> Kevin Rogovin (5):
>   i965: define astx5x5 workaround infrastructure
>   i965: set ASTC5x5 workaround texture type tracking on texture validate
>   i965: use ASTC5x5 workaround in brw_draw
>   i965: use ASTC5x5 workaround in brw_compute
>   i965: ASTC5x5 workaround logic for blorp
> 
>  src/mesa/drivers/dri/i965/Makefile.sources   |  1 +
>  src/mesa/drivers/dri/i965/brw_compute.c  |  6 
>  src/mesa/drivers/dri/i965/brw_context.c  |  6 
>  src/mesa/drivers/dri/i965/brw_context.h  | 24 
>  src/mesa/drivers/dri/i965/brw_draw.c | 16 +--
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  5 
>  src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c  | 36 
> 
>  src/mesa/drivers/dri/i965/genX_blorp_exec.c  |  5 
>  src/mesa/drivers/dri/i965/intel_batchbuffer.c|  1 +
>  src/mesa/drivers/dri/i965/intel_tex_image.c  | 16 ---
>  src/mesa/drivers/dri/i965/intel_tex_validate.c   | 13 +
>  src/mesa/drivers/dri/i965/meson.build|  1 +
>  12 files changed, 124 insertions(+), 6 deletions(-)  create mode 
> 100644 src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c
> 
> --
> 2.7.4
> 
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Re: [Mesa-dev] [PATCH 22/22] mesa: Add GL_UNSIGNED_INT_2_10_10_10_REV OES read type for BGRX1010102.

2017-12-18 Thread Tapani Pälli

Reviewed-by: Tapani Pälli 

On 12/16/2017 12:05 AM, Mario Kleiner wrote:

As Marek noted, the GL_RGBA + GL_UNSIGNED_INT_2_10_10_10_REV type
combo is also good for readback of BGRX1010102 framebuffers, not
only for BGRA1010102 framebuffers for use with glReadPixels()
under GLES, so add it for the GL_IMPLEMENTATION_COLOR_READ_TYPE_OES
query.

Successfully tested on gallium r600 driver with a (quickly hacked
for RGBA 10 10 10 0) dEQP testcase
dEQP-EGL.functional.wide_color.window_1010102_colorspace_default.

Suggested-by: Marek Olšák 
Signed-off-by: Mario Kleiner 
---
  src/mesa/main/framebuffer.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/main/framebuffer.c b/src/mesa/main/framebuffer.c
index a0de669..e103f31 100644
--- a/src/mesa/main/framebuffer.c
+++ b/src/mesa/main/framebuffer.c
@@ -889,7 +889,8 @@ _mesa_get_color_read_type(struct gl_context *ctx,
if (format == MESA_FORMAT_B5G6R5_UNORM)
   return GL_UNSIGNED_SHORT_5_6_5;
  
-  if (format == MESA_FORMAT_B10G10R10A2_UNORM)

+  if (format == MESA_FORMAT_B10G10R10A2_UNORM ||
+  format == MESA_FORMAT_B10G10R10X2_UNORM)
   return GL_UNSIGNED_INT_2_10_10_10_REV;
  
switch (data_type) {



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Re: [Mesa-dev] [Mesa-stable] [PATCH] swr: Fix KNOB_MAX_WORKER_THREADS thread creation override.

2017-12-18 Thread Andres Gomez
On Mon, 2017-12-18 at 00:28 +, Cherniak, Bruce wrote:
> > On Dec 17, 2017, at 10:23 AM, Andres Gomez 
> > wrote:
> > 
> > Bruce, this depends on ead0dfe31ec7 which didn't make it for the
> > 17.2
> > queue so I will be leaving out from there.
> 
> Hi Andres, it is fine to leave out for 17.2, that branch is fine.
> 
> We would like this in 17.3 stable, however.  17.3.0 contains the bug.
> 
> Apologies for any confusion.

No problem ☺

Thanks for the prompt reply!

-- 
Br,

Andres
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Re: [Mesa-dev] [PATCH] radv: port merge tess info from anv

2017-12-18 Thread Bas Nieuwenhuizen
Reviewed-by: Bas Nieuwenhuizen 

On Mon, Dec 18, 2017 at 6:08 AM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> anv merges the tess info correctly, but radv wasn't doing this.
>
> This fixes hangs in
> dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw
>
> Fixes: 60fc0544e0 (radv/pipeline: handle tessellation shader compilation)
> Signed-off-by: Dave Airlie 
> ---
>  src/amd/vulkan/radv_pipeline.c | 40 
>  1 file changed, 40 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index 1ada69d92f..903a2945e9 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -1769,6 +1769,45 @@ radv_fill_shader_keys(struct ac_shader_variant_key 
> *keys,
> keys[MESA_SHADER_FRAGMENT].fs.is_int10 = key->is_int10;
>  }
>
> +static void
> +merge_tess_info(struct shader_info *tes_info,
> +const struct shader_info *tcs_info)
> +{
> +   /* The Vulkan 1.0.38 spec, section 21.1 Tessellator says:
> +*
> +*"PointMode. Controls generation of points rather than triangles
> +* or lines. This functionality defaults to disabled, and is
> +* enabled if either shader stage includes the execution mode.
> +*
> +* and about Triangles, Quads, IsoLines, VertexOrderCw, 
> VertexOrderCcw,
> +* PointMode, SpacingEqual, SpacingFractionalEven, 
> SpacingFractionalOdd,
> +* and OutputVertices, it says:
> +*
> +*"One mode must be set in at least one of the tessellation
> +* shader stages."
> +*
> +* So, the fields can be set in either the TCS or TES, but they must
> +* agree if set in both.  Our backend looks at TES, so bitwise-or in
> +* the values from the TCS.
> +*/
> +   assert(tcs_info->tess.tcs_vertices_out == 0 ||
> +  tes_info->tess.tcs_vertices_out == 0 ||
> +  tcs_info->tess.tcs_vertices_out == 
> tes_info->tess.tcs_vertices_out);
> +   tes_info->tess.tcs_vertices_out |= tcs_info->tess.tcs_vertices_out;
> +
> +   assert(tcs_info->tess.spacing == TESS_SPACING_UNSPECIFIED ||
> +  tes_info->tess.spacing == TESS_SPACING_UNSPECIFIED ||
> +  tcs_info->tess.spacing == tes_info->tess.spacing);
> +   tes_info->tess.spacing |= tcs_info->tess.spacing;
> +
> +   assert(tcs_info->tess.primitive_mode == 0 ||
> +  tes_info->tess.primitive_mode == 0 ||
> +  tcs_info->tess.primitive_mode == 
> tes_info->tess.primitive_mode);
> +   tes_info->tess.primitive_mode |= tcs_info->tess.primitive_mode;
> +   tes_info->tess.ccw |= tcs_info->tess.ccw;
> +   tes_info->tess.point_mode |= tcs_info->tess.point_mode;
> +}
> +
>  static
>  void radv_create_shaders(struct radv_pipeline *pipeline,
>   struct radv_device *device,
> @@ -1872,6 +1911,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
>
> if (nir[MESA_SHADER_TESS_CTRL]) {
> nir_lower_tes_patch_vertices(nir[MESA_SHADER_TESS_EVAL], 
> nir[MESA_SHADER_TESS_CTRL]->info.tess.tcs_vertices_out);
> +   merge_tess_info(&nir[MESA_SHADER_TESS_EVAL]->info, 
> &nir[MESA_SHADER_TESS_CTRL]->info);
> }
>
> radv_link_shaders(pipeline, nir);
> --
> 2.14.3
>
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