Re: [Mesa-dev] [PATCH] loader_dri3/glx/egl: Reinstate the loader_dri3_vtable get_dri_screen callback

[Thomas Hellstrom]

Hi!

It would be good if somebody could review this so we can get the fix in.

Thanks,
Thomas


On 02/09/2018 09:37 AM, Thomas Hellstrom wrote:

Removing this callback caused rendering corruption in some multi-screen cases,
so it is reinstated but without the drawable argument which was never used
by implementations and was confusing since the drawable could have been
created with another screen.

Cc: "17.3" mesa-sta...@lists.freedesktop.org
Fixes: 5198e48a0d (loader_dri3/glx/egl: Remove the loader_dri3_vtable 
get_dri_screen callback)
Bugzilla: 
https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.freedesktop.org_show-5Fbug.cgi-3Fid-3D105013=DwIGaQ=uilaK90D4TOVoH58JNXRgQ=wnSlgOCqfpNS4d02vP68_E9q2BNMCwfD2OZ_6dCFVQQ=XWphEAw-49womV9tmv90qPaEgOeyVd98mULQPxCMsy0=EC7q92tLLJ_BOkb9bWoQEHpl07D4zKI-gaOq3y87TcE=
Reported-by: Daniel van Vugt 
Signed-off-by: Thomas Hellstrom 
---
  src/egl/drivers/dri2/platform_x11_dri3.c | 12 
  src/glx/dri3_glx.c   | 11 +++
  src/loader/loader_dri3_helper.c  | 12 +++-
  src/loader/loader_dri3_helper.h  |  1 +
  4 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/src/egl/drivers/dri2/platform_x11_dri3.c 
b/src/egl/drivers/dri2/platform_x11_dri3.c
index 6e40eaa596..060b5f83a3 100644
--- a/src/egl/drivers/dri2/platform_x11_dri3.c
+++ b/src/egl/drivers/dri2/platform_x11_dri3.c
@@ -75,6 +75,17 @@ egl_dri3_get_dri_context(struct loader_dri3_drawable *draw)
 return dri2_ctx->dri_context;
  }
  
+static __DRIscreen *

+egl_dri3_get_dri_screen(void)
+{
+   _EGLContext *ctx = _eglGetCurrentContext();
+   struct dri2_egl_context *dri2_ctx;
+   if (!ctx)
+  return NULL;
+   dri2_ctx = dri2_egl_context(ctx);
+   return dri2_egl_display(dri2_ctx->base.Resource.Display)->dri_screen;
+}
+
  static void
  egl_dri3_flush_drawable(struct loader_dri3_drawable *draw, unsigned flags)
  {
@@ -88,6 +99,7 @@ static const struct loader_dri3_vtable egl_dri3_vtable = {
 .set_drawable_size = egl_dri3_set_drawable_size,
 .in_current_context = egl_dri3_in_current_context,
 .get_dri_context = egl_dri3_get_dri_context,
+   .get_dri_screen = egl_dri3_get_dri_screen,
 .flush_drawable = egl_dri3_flush_drawable,
 .show_fps = NULL,
  };
diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index f280a8cef7..016f91b196 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -116,6 +116,16 @@ glx_dri3_get_dri_context(struct loader_dri3_drawable *draw)
 return (gc != ) ? dri3Ctx->driContext : NULL;
  }
  
+static __DRIscreen *

+glx_dri3_get_dri_screen(void)
+{
+   struct glx_context *gc = __glXGetCurrentContext();
+   struct dri3_context *pcp = (struct dri3_context *) gc;
+   struct dri3_screen *psc = (struct dri3_screen *) pcp->base.psc;
+
+   return (gc !=  && psc) ? psc->driScreen : NULL;
+}
+
  static void
  glx_dri3_flush_drawable(struct loader_dri3_drawable *draw, unsigned flags)
  {
@@ -150,6 +160,7 @@ static const struct loader_dri3_vtable glx_dri3_vtable = {
 .set_drawable_size = glx_dri3_set_drawable_size,
 .in_current_context = glx_dri3_in_current_context,
 .get_dri_context = glx_dri3_get_dri_context,
+   .get_dri_screen = glx_dri3_get_dri_screen,
 .flush_drawable = glx_dri3_flush_drawable,
 .show_fps = glx_dri3_show_fps,
  };
diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index fbda3d635c..2e3b6c619e 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -1311,6 +1311,7 @@ dri3_get_pixmap_buffer(__DRIdrawable *driDrawable, 
unsigned int format,
 xcb_sync_fence_t sync_fence;
 struct xshmfence *shm_fence;
 int  fence_fd;
+   __DRIscreen  *cur_screen;
  
 if (buffer)

return buffer;
@@ -1341,8 +1342,17 @@ dri3_get_pixmap_buffer(__DRIdrawable *driDrawable, 
unsigned int format,
 if (!bp_reply)
goto no_image;
  
+   /* Get the currently-bound screen or revert to using the drawable's screen if

+* no contexts are currently bound. The latter case is at least necessary 
for
+* obs-studio, when using Window Capture (Xcomposite) as a Source.
+*/
+   cur_screen = draw->vtable->get_dri_screen();
+   if (!cur_screen) {
+   cur_screen = draw->dri_screen;
+   }
+
 buffer->image = loader_dri3_create_image(draw->conn, bp_reply, format,
-draw->dri_screen, draw->ext->image,
+cur_screen, draw->ext->image,
  buffer);
 if (!buffer->image)
goto no_image;
diff --git a/src/loader/loader_dri3_helper.h b/src/loader/loader_dri3_helper.h
index 4ce98b8c59..839cba30df 100644
--- a/src/loader/loader_dri3_helper.h
+++ b/src/loader/loader_dri3_helper.h
@@ -99,6 +99,7 @@ struct loader_dri3_vtable {
 

[Mesa-dev] [Bug 105068] vulkaninfo gives an VK_ERROR_INITIALIZATION_FAILED

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105068

leigh scott  changed:

   What|Removed |Added

   See Also||https://github.com/KhronosG
   ||roup/Vulkan-LoaderAndValida
   ||tionLayers/issues/2152

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Re: [Mesa-dev] [PATCH shaderdb 1/3] intel_stub: override pci-id only if INTEL_DEVID_OVERRIDE is set

[Kenneth Graunke]

On Monday, February 12, 2018 5:26:14 PM PST Dongwon Kim wrote:
> To prevent a segfault, pci-id is set only if INTEL_DEVID_OVERRIDE exists.
> 
> Signed-off-by: Dongwon Kim 
> ---
>  intel_stub.c | 10 +-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/intel_stub.c b/intel_stub.c
> index ea88400..cf9ddff 100644
> --- a/intel_stub.c
> +++ b/intel_stub.c
> @@ -28,6 +28,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -174,6 +175,7 @@ ioctl(int fd, unsigned long request, ...)
>   va_list args;
>   void *argp;
>   struct stat buf;
> + char *pci_id;
>  
>   va_start(args, request);
>   argp = va_arg(args, void *);
> @@ -199,7 +201,13 @@ ioctl(int fd, unsigned long request, ...)
>  *getparam->value = 1;
>  break;
>  case I915_PARAM_CHIPSET_ID:
> -*getparam->value = 
> strtod(getenv("INTEL_DEVID_OVERRIDE"), NULL);
> +pci_id = getenv("INTEL_DEVID_OVERRIDE");
> +
> +if (pci_id)
> +*getparam->value = strtod(pci_id, NULL);
> +else
> +return -EINVAL;
> +
>  break;
>  case I915_PARAM_CMD_PARSER_VERSION:
>  *getparam->value = 9;
> 

This patch is:

Reviewed-by: Kenneth Graunke 


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[Mesa-dev] [PATCH] ac: implement nir_intrinsic_image_samples

[Timothy Arceri]

Fixes cts test:
KHR-GL45.shader_texture_image_samples_tests.image_functional_test
---
 src/amd/common/ac_nir_to_llvm.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3af3dbace2..8d1eed241f 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3785,6 +3785,26 @@ static LLVMValueRef visit_image_atomic(struct 
ac_nir_context *ctx,
return ac_build_intrinsic(>ac, intrinsic_name, ctx->ac.i32, 
params, param_count, 0);
 }
 
+static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
+   const nir_intrinsic_instr *instr)
+{
+   const nir_variable *var = instr->variables[0]->var;
+   const struct glsl_type *type = glsl_without_array(var->type);
+   bool da = glsl_sampler_type_is_array(type) ||
+ glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE ||
+ glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_3D;
+
+   struct ac_image_args args = { 0 };
+   args.da = da;
+   args.dmask = 0xf;
+   args.resource = get_sampler_desc(ctx, instr->variables[0],
+AC_DESC_IMAGE, NULL, true, false);
+   args.opcode = ac_image_get_resinfo;
+   args.addr = ctx->ac.i32_0;
+
+   return ac_build_image_opcode(>ac, );
+}
+
 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
 const nir_intrinsic_instr *instr)
 {
@@ -4483,6 +4503,9 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
case nir_intrinsic_store_shared:
visit_store_shared(ctx, instr);
break;
+   case nir_intrinsic_image_samples:
+   result = visit_image_samples(ctx, instr);
+   break;
case nir_intrinsic_image_load:
result = visit_image_load(ctx, instr);
break;
-- 
2.14.3

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Re: [Mesa-dev] [PATCH] tgsi: Recognize RET in main for tgsi_transform

[Brian Paul]

LGTM.

Reviewed-by: Brian Paul 


On 02/12/2018 09:10 PM, srol...@vmware.com wrote:

From: Roland Scheidegger 

Shaders coming from dx10 state trackers have a RET before the END.
And the epilog needs to be placed before the RET (otherwise it will
get ignored).
Hence figure out if a RET is in main, in this case we'll place
the epilog there rather than before the END.
(At a closer look, there actually seem to be problems with control
flow in general with output redirection, that would need another
look. It's enough however to fix draw's aa line emulation in some
internal bug - lines tend to be drawn with trivial shaders, moving
either a constant color or a vertex color directly to the output).
---
  src/gallium/auxiliary/tgsi/tgsi_transform.c | 50 ++---
  1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_transform.c 
b/src/gallium/auxiliary/tgsi/tgsi_transform.c
index ffdad13..94d872c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_transform.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_transform.c
@@ -110,6 +110,8 @@ tgsi_transform_shader(const struct tgsi_token *tokens_in,
  {
 uint procType;
 boolean first_instruction = TRUE;
+   boolean epilog_emitted = FALSE;
+   int stack_size = 0;
  
 /* input shader */

 struct tgsi_parse_context parse;
@@ -166,22 +168,60 @@ tgsi_transform_shader(const struct tgsi_token *tokens_in,
   {
  struct tgsi_full_instruction *fullinst
 = 
+unsigned opcode = fullinst->Instruction.Opcode;
  
  if (first_instruction && ctx->prolog) {

 ctx->prolog(ctx);
  }
  
-/* XXX Note: we may also want to look for a main/top-level

- * TGSI_OPCODE_RET instruction in the future.
+/*
+ * XXX Note: we handle the case of ret in main.
+ * However, the output redirections done by transform
+ * have their limits with control flow and will generally
+ * not work correctly. e.g.
+ * if (cond) {
+ *oColor = x;
+ *ret;
+ * }
+ * oColor = y;
+ * end;
+ * If the color output is redirected to a temp and modified
+ * by a transform, this will not work (the oColor assignment
+ * in the conditional will never make it to the actual output).
   */
-if (fullinst->Instruction.Opcode == TGSI_OPCODE_END
-&& ctx->epilog) {
+if ((opcode == TGSI_OPCODE_END ||
+ (opcode == TGSI_OPCODE_RET && stack_size == 0))
+&& ctx->epilog && !epilog_emitted) {
 /* Emit caller's epilog */
 ctx->epilog(ctx);
-   /* Emit END */
+   epilog_emitted = TRUE;
+   /* Emit END (or RET) */
+   if (opcode == TGSI_OPCODE_END) {
+  assert(stack_size == 0);
+   }
 ctx->emit_instruction(ctx, fullinst);
  }
  else {
+   switch (opcode) {
+   case TGSI_OPCODE_IF:
+   case TGSI_OPCODE_UIF:
+   case TGSI_OPCODE_SWITCH:
+   case TGSI_OPCODE_BGNLOOP:
+   case TGSI_OPCODE_CAL:
+  stack_size++;
+  break;
+   case TGSI_OPCODE_ENDIF:
+   case TGSI_OPCODE_ENDSWITCH:
+   case TGSI_OPCODE_ENDLOOP:
+   case TGSI_OPCODE_ENDSUB:
+  assert(stack_size > 0);
+  stack_size--;
+  break;
+   case TGSI_OPCODE_BGNSUB:
+   case TGSI_OPCODE_RET:
+   default:
+  break;
+   }
 if (ctx->transform_instruction)
ctx->transform_instruction(ctx, fullinst);
 else



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Re: [Mesa-dev] [PATCH] mesa: add glsl version query (v3)

[Brian Paul]

One more thing: version checks...


On 02/08/2018 02:26 AM, Vadym Shovkoplias wrote:

Add support for GL_NUM_SHADING_LANGUAGE_VERSIONS
and glGetStringi for GL_SHADING_LANGUAGE_VERSION

v2:
   - Combine similar functionality into
 _mesa_get_shading_language_version() function.
   - Change GLSL version return mechanism.
v3:
   - Add return of empty string for GLSL ver 1.10.
   - Move _mesa_get_shading_language_version() function
 to src/mesa/main/version.c.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104915
Signed-off-by: Andriy Khulap 
Signed-off-by: Vadym Shovkoplias 
---
  src/mapi/glapi/gen/GL4x.xml  |  1 +
  src/mesa/main/get.c  |  4 +++
  src/mesa/main/get_hash_params.py |  3 ++
  src/mesa/main/getstring.c| 12 
  src/mesa/main/version.c  | 64 
  src/mesa/main/version.h  |  5 
  6 files changed, 89 insertions(+)

diff --git a/src/mapi/glapi/gen/GL4x.xml b/src/mapi/glapi/gen/GL4x.xml
index cd2e3b831e..2116286b35 100644
--- a/src/mapi/glapi/gen/GL4x.xml
+++ b/src/mapi/glapi/gen/GL4x.xml
@@ -42,6 +42,7 @@
  
  


+  



diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 516e8d174c..9a677a18d9 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -1084,6 +1084,10 @@ find_custom_value(struct gl_context *ctx, const struct 
value_desc *d, union valu
   v->value_int = 0;
}
break;
+   /* GL 4.3 */
+   case GL_NUM_SHADING_LANGUAGE_VERSIONS:


I think we need to test for GL 4.3 here:

   if (!_mesa_is_desktop_gl(ctx) || ctx->Version < 43)
  goto invalid_enum;



+  v->value_int = _mesa_get_shading_language_version(ctx, -1, NULL);
+  break;
 /* GL_ARB_draw_indirect */
 case GL_DRAW_INDIRECT_BUFFER_BINDING:
v->value_int = ctx->DrawIndirectBuffer->Name;
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index df082af207..be716f6f6e 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -543,6 +543,9 @@ descriptor=[
  
# GL_ARB_texture_cube_map_array

[ "TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB", "LOC_CUSTOM, TYPE_INT, 
TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array_OES_texture_cube_map_array" ],
+
+  # GL_NUM_SHADING_LANGUAGE_VERSIONS
+  [ "NUM_SHADING_LANGUAGE_VERSIONS", "LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA" ],


Instead of NO_EXTRA, I think we need EXTRA_VERSION_43.



  ]},
  
  # Enums in OpenGL Core profile and ES 3.0

diff --git a/src/mesa/main/getstring.c b/src/mesa/main/getstring.c
index 931f6a476c..b2109ac3d0 100644
--- a/src/mesa/main/getstring.c
+++ b/src/mesa/main/getstring.c
@@ -32,6 +32,7 @@
  #include "extensions.h"
  #include "mtypes.h"
  #include "macros.h"
+#include "version.h"
  
  /**

   * Return the string for a glGetString(GL_SHADING_LANGUAGE_VERSION) query.
@@ -186,6 +187,17 @@ _mesa_GetStringi(GLenum name, GLuint index)
   return (const GLubyte *) 0;
}
return _mesa_get_enabled_extension(ctx, index);
+   case GL_SHADING_LANGUAGE_VERSION:


Again, I think we need to test for GL 4.3 here and return 
GL_INVALID_ENUM if the version is older.


-Brian



+  {
+ char *version;
+ int num = _mesa_get_shading_language_version(ctx, index, );
+ if (index >= num) {
+_mesa_error(ctx, GL_INVALID_VALUE,
+   "glGetStringi(GL_SHADING_LANGUAGE_VERSION, index=%d)", index);
+return (const GLubyte *) 0;
+ }
+ return (const GLubyte *) version;
+  }
 default:
_mesa_error(ctx, GL_INVALID_ENUM, "glGetStringi");
return (const GLubyte *) 0;
diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c
index 1fce8fe7ca..d26baab820 100644
--- a/src/mesa/main/version.c
+++ b/src/mesa/main/version.c
@@ -665,3 +665,67 @@ _mesa_get_device_uuid(struct gl_context *ctx, GLint *uuid)
  {
 ctx->Driver.GetDeviceUuid(ctx, (char*) uuid);
  }
+
+/**
+ * Get the i-th GLSL version string.  If index=0, return the most recent
+ * supported version.
+ * \param ctx context to query
+ * \param index  which version string to return, or -1 if none
+ * \param versionOut returns the vesrion string
+ * \return total number of shading language versions.
+ */
+int
+_mesa_get_shading_language_version(const struct gl_context *ctx,
+   int index,
+   char **versionOut)
+{
+   int n = 0;
+
+#define GLSL_VERSION(S) \
+   if (n++ == index) \
+  *versionOut = S
+
+   /* GLSL core */
+   if (ctx->Const.GLSLVersion >= 460)
+  GLSL_VERSION("460");
+   if (ctx->Const.GLSLVersion >= 450)
+  GLSL_VERSION("450");
+   if (ctx->Const.GLSLVersion >= 440)
+  GLSL_VERSION("440");
+   if (ctx->Const.GLSLVersion >= 430)
+  GLSL_VERSION("430");
+   if (ctx->Const.GLSLVersion >= 420)
+  GLSL_VERSION("420");
+   if 

[Mesa-dev] [PATCH] tgsi: Recognize RET in main for tgsi_transform

[sroland]

From: Roland Scheidegger 

Shaders coming from dx10 state trackers have a RET before the END.
And the epilog needs to be placed before the RET (otherwise it will
get ignored).
Hence figure out if a RET is in main, in this case we'll place
the epilog there rather than before the END.
(At a closer look, there actually seem to be problems with control
flow in general with output redirection, that would need another
look. It's enough however to fix draw's aa line emulation in some
internal bug - lines tend to be drawn with trivial shaders, moving
either a constant color or a vertex color directly to the output).
---
 src/gallium/auxiliary/tgsi/tgsi_transform.c | 50 ++---
 1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_transform.c 
b/src/gallium/auxiliary/tgsi/tgsi_transform.c
index ffdad13..94d872c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_transform.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_transform.c
@@ -110,6 +110,8 @@ tgsi_transform_shader(const struct tgsi_token *tokens_in,
 {
uint procType;
boolean first_instruction = TRUE;
+   boolean epilog_emitted = FALSE;
+   int stack_size = 0;
 
/* input shader */
struct tgsi_parse_context parse;
@@ -166,22 +168,60 @@ tgsi_transform_shader(const struct tgsi_token *tokens_in,
  {
 struct tgsi_full_instruction *fullinst
= 
+unsigned opcode = fullinst->Instruction.Opcode;
 
 if (first_instruction && ctx->prolog) {
ctx->prolog(ctx);
 }
 
-/* XXX Note: we may also want to look for a main/top-level
- * TGSI_OPCODE_RET instruction in the future.
+/*
+ * XXX Note: we handle the case of ret in main.
+ * However, the output redirections done by transform
+ * have their limits with control flow and will generally
+ * not work correctly. e.g.
+ * if (cond) {
+ *oColor = x;
+ *ret;
+ * }
+ * oColor = y;
+ * end;
+ * If the color output is redirected to a temp and modified
+ * by a transform, this will not work (the oColor assignment
+ * in the conditional will never make it to the actual output).
  */
-if (fullinst->Instruction.Opcode == TGSI_OPCODE_END
-&& ctx->epilog) {
+if ((opcode == TGSI_OPCODE_END ||
+ (opcode == TGSI_OPCODE_RET && stack_size == 0))
+&& ctx->epilog && !epilog_emitted) {
/* Emit caller's epilog */
ctx->epilog(ctx);
-   /* Emit END */
+   epilog_emitted = TRUE;
+   /* Emit END (or RET) */
+   if (opcode == TGSI_OPCODE_END) {
+  assert(stack_size == 0);
+   }
ctx->emit_instruction(ctx, fullinst);
 }
 else {
+   switch (opcode) {
+   case TGSI_OPCODE_IF:
+   case TGSI_OPCODE_UIF:
+   case TGSI_OPCODE_SWITCH:
+   case TGSI_OPCODE_BGNLOOP:
+   case TGSI_OPCODE_CAL:
+  stack_size++;
+  break;
+   case TGSI_OPCODE_ENDIF:
+   case TGSI_OPCODE_ENDSWITCH:
+   case TGSI_OPCODE_ENDLOOP:
+   case TGSI_OPCODE_ENDSUB:
+  assert(stack_size > 0);
+  stack_size--;
+  break;
+   case TGSI_OPCODE_BGNSUB:
+   case TGSI_OPCODE_RET:
+   default:
+  break;
+   }
if (ctx->transform_instruction)
   ctx->transform_instruction(ctx, fullinst);
else
-- 
2.7.4

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[Mesa-dev] [PATCH] virgl: add ARB_sample_shading support.

[Dave Airlie]

From: Dave Airlie 

This enable ARB_sample_shading if the renderer supports it.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/virgl/virgl_encode.c   | 3 ++-
 src/gallium/drivers/virgl/virgl_protocol.h | 1 +
 src/gallium/drivers/virgl/virgl_screen.c   | 5 +++--
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_encode.c 
b/src/gallium/drivers/virgl/virgl_encode.c
index 2ee8eac..80e60bc 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -180,7 +180,8 @@ int virgl_encode_rasterizer_state(struct virgl_context *ctx,
   VIRGL_OBJ_RS_S0_LINE_STIPPLE_ENABLE(state->line_stipple_enable) |
   VIRGL_OBJ_RS_S0_LINE_LAST_PIXEL(state->line_last_pixel) |
   VIRGL_OBJ_RS_S0_HALF_PIXEL_CENTER(state->half_pixel_center) |
-  VIRGL_OBJ_RS_S0_BOTTOM_EDGE_RULE(state->bottom_edge_rule);
+  VIRGL_OBJ_RS_S0_BOTTOM_EDGE_RULE(state->bottom_edge_rule) |
+  VIRGL_OBJ_RS_S0_FORCE_PERSAMPLE_INTERP(state->force_persample_interp);
 
virgl_encoder_write_dword(ctx->cbuf, tmp); /* S0 */
virgl_encoder_write_dword(ctx->cbuf, fui(state->point_size)); /* S1 */
diff --git a/src/gallium/drivers/virgl/virgl_protocol.h 
b/src/gallium/drivers/virgl/virgl_protocol.h
index 1430422..7688ac5 100644
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -181,6 +181,7 @@ enum virgl_context_cmd {
 #define VIRGL_OBJ_RS_S0_LINE_LAST_PIXEL(x) (((x) & 0x1) << 28)
 #define VIRGL_OBJ_RS_S0_HALF_PIXEL_CENTER(x) (((x) & 0x1) << 29)
 #define VIRGL_OBJ_RS_S0_BOTTOM_EDGE_RULE(x) (((x) & 0x1) << 30)
+#define VIRGL_OBJ_RS_S0_FORCE_PERSAMPLE_INTERP(x) (((x) & 0x1) << 31)
 
 #define VIRGL_OBJ_RS_POINT_SIZE 3
 #define VIRGL_OBJ_RS_SPRITE_COORD_ENABLE 4
diff --git a/src/gallium/drivers/virgl/virgl_screen.c 
b/src/gallium/drivers/virgl/virgl_screen.c
index 89f54f6..476345a 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -193,9 +193,11 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
   return vscreen->caps.caps.v1.max_texture_gather_components;
case PIPE_CAP_DRAW_INDIRECT:
   return vscreen->caps.caps.v1.bset.has_indirect_draw;
+   case PIPE_CAP_SAMPLE_SHADING:
+   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
+  return vscreen->caps.caps.v1.bset.has_sample_shading;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
-   case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
@@ -217,7 +219,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_DEPTH_BOUNDS_TEST:
case PIPE_CAP_TGSI_TXQS:
-   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_DRAW_PARAMETERS:
-- 
2.9.5

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Re: [Mesa-dev] [PATCH 17/17] glsl: Suppress sign-compare warning generated by flex 2.6.1.

[Timothy Arceri]

On 13/02/18 06:59, Ian Romanick wrote:

Supposedly later versions of flex fix this... or so I heard.


Yes it's fixed in recent versions.
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[Mesa-dev] [PATCH] virgl: add ARB_draw_indirect support.

[Dave Airlie]

From: Dave Airlie 

This relies on the renderer code landing first.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/virgl/virgl_encode.c   | 15 ++-
 src/gallium/drivers/virgl/virgl_protocol.h | 12 
 src/gallium/drivers/virgl/virgl_screen.c   |  3 ++-
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_encode.c 
b/src/gallium/drivers/virgl/virgl_encode.c
index ee68fe0..2ee8eac 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -417,7 +417,10 @@ int virgl_encoder_set_index_buffer(struct virgl_context 
*ctx,
 int virgl_encoder_draw_vbo(struct virgl_context *ctx,
   const struct pipe_draw_info *info)
 {
-   virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_DRAW_VBO, 0, 
VIRGL_DRAW_VBO_SIZE));
+   uint32_t length = VIRGL_DRAW_VBO_SIZE;
+   if (info->indirect)
+  length = VIRGL_DRAW_VBO_SIZE_INDIRECT;
+   virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_DRAW_VBO, 0, 
length));
virgl_encoder_write_dword(ctx->cbuf, info->start);
virgl_encoder_write_dword(ctx->cbuf, info->count);
virgl_encoder_write_dword(ctx->cbuf, info->mode);
@@ -433,6 +436,16 @@ int virgl_encoder_draw_vbo(struct virgl_context *ctx,
   virgl_encoder_write_dword(ctx->cbuf, 
info->count_from_stream_output->buffer_size);
else
   virgl_encoder_write_dword(ctx->cbuf, 0);
+   if (length == VIRGL_DRAW_VBO_SIZE_INDIRECT) {
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* vertices per patch */
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* drawid */
+  virgl_encoder_write_res(ctx, virgl_resource(info->indirect->buffer));
+  virgl_encoder_write_dword(ctx->cbuf, info->indirect->offset);
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect stride */
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count */
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count offset */
+  virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count handle */
+   }
return 0;
 }
 
diff --git a/src/gallium/drivers/virgl/virgl_protocol.h 
b/src/gallium/drivers/virgl/virgl_protocol.h
index a2f1e81..1430422 100644
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -275,6 +275,8 @@ enum virgl_context_cmd {
 
 /* draw VBO */
 #define VIRGL_DRAW_VBO_SIZE 12
+#define VIRGL_DRAW_VBO_SIZE_TESS 14
+#define VIRGL_DRAW_VBO_SIZE_INDIRECT 20
 #define VIRGL_DRAW_VBO_START 1
 #define VIRGL_DRAW_VBO_COUNT 2
 #define VIRGL_DRAW_VBO_MODE 3
@@ -287,6 +289,16 @@ enum virgl_context_cmd {
 #define VIRGL_DRAW_VBO_MIN_INDEX 10
 #define VIRGL_DRAW_VBO_MAX_INDEX 11
 #define VIRGL_DRAW_VBO_COUNT_FROM_SO 12
+/* tess packet */
+#define VIRGL_DRAW_VBO_VERTICES_PER_PATCH 13
+#define VIRGL_DRAW_VBO_DRAWID 14
+/* indirect packet */
+#define VIRGL_DRAW_VBO_INDIRECT_HANDLE 15
+#define VIRGL_DRAW_VBO_INDIRECT_OFFSET 16
+#define VIRGL_DRAW_VBO_INDIRECT_STRIDE 17
+#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT 18
+#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT_OFFSET 19
+#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT_HANDLE 20
 
 /* create surface */
 #define VIRGL_OBJ_SURFACE_SIZE 5
diff --git a/src/gallium/drivers/virgl/virgl_screen.c 
b/src/gallium/drivers/virgl/virgl_screen.c
index 72dce08..89f54f6 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -191,6 +191,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
   return vscreen->caps.caps.v1.bset.texture_query_lod;
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
   return vscreen->caps.caps.v1.max_texture_gather_components;
+   case PIPE_CAP_DRAW_INDIRECT:
+  return vscreen->caps.caps.v1.bset.has_indirect_draw;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_SAMPLE_SHADING:
@@ -198,7 +200,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
case PIPE_CAP_MAX_VERTEX_STREAMS:
-   case PIPE_CAP_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
-- 
2.9.5

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[Mesa-dev] [Bug 105067] Tesselation broken for dEQP tests

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105067

Marek Olšák  changed:

   What|Removed |Added

   Assignee|mar...@gmail.com|intel-3d-bugs@lists.freedes
   ||ktop.org
  Component|Mesa core   |Drivers/DRI/i965
 QA Contact|mesa-dev@lists.freedesktop. |intel-3d-bugs@lists.freedes
   |org |ktop.org

--- Comment #1 from Marek Olšák  ---
radeonsi passes the test. This is an Intel-specific issue. I recommend you try
this:

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 9c4fb22..10a4ff4 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -251,7 +251,7 @@ brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir)
   if (var->data.location != SYSTEM_VALUE_VERTICES_IN)
  continue;

-  gl_state_index tokens[STATE_LENGTH] = {
+  gl_state_index16 tokens[STATE_LENGTH] = {
  STATE_INTERNAL,
  nir->info.stage == MESA_SHADER_TESS_CTRL ?
 STATE_TCS_PATCH_VERTICES_IN : STATE_TES_PATCH_VERTICES_IN,

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[Mesa-dev] [Bug 105068] vulkaninfo gives an VK_ERROR_INITIALIZATION_FAILED

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105068

Bug ID: 105068
   Summary: vulkaninfo gives an VK_ERROR_INITIALIZATION_FAILED
   Product: Mesa
   Version: 17.2
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: critical
  Priority: medium
 Component: Drivers/Vulkan/radeon
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: ppe...@gmail.com
QA Contact: mesa-dev@lists.freedesktop.org

On Fedora 27, with mesa-vulkan-drivers-17.2.4-3.fc27.x86_64 installed, the
output in vulkaninfo is:

===
VULKAN INFO
===

Vulkan API Version: 1.0.65

WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_object_tracker.json - The file has
already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_core_validation.json - The file has
already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_threading.json - The file has
already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_standard_validation.json - The file
has already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_parameter_validation.json - The file
has already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/explicit_layer.d/VkLayer_unique_objects.json - The file has
already been read once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/icd.d/radeon_icd.x86_64.json - The file has already been read
once
WARNING: [loader] Code 0 : Skipping manifest file
/usr/share/vulkan/icd.d/intel_icd.x86_64.json - The file has already been read
once

Instance Extensions:

Instance Extensions count = 9
VK_KHR_surface  : extension revision 25
VK_KHR_xcb_surface  : extension revision  6
VK_KHR_xlib_surface : extension revision  6
VK_KHR_wayland_surface  : extension revision  6
VK_KHR_get_physical_device_properties2: extension revision  1
VK_KHR_external_memory_capabilities : extension revision  1
VK_KHR_external_semaphore_capabilities: extension revision  1
VK_KHR_get_surface_capabilities2: extension revision  1
VK_EXT_debug_report : extension revision  9
/builddir/build/BUILD/Vulkan-LoaderAndValidationLayers-sdk-1.0.65.2/demos/vulkaninfo.c:1670:
failed with VK_ERROR_INITIALIZATION_FAILED

using;
export VK_LOADER_DEBUG=all

gives a very long output where the interesting part at the end is:

ERROR: setupLoaderTermPhysDevs:  Failed to detect any valid GPUs in the current
config
ERROR: setupLoaderTrampPhysDevs:  Failed during dispatch call of
'vkEnumeratePhysicalDevices' to lower layers or loader to get count.
/builddir/build/BUILD/Vulkan-LoaderAndValidationLayers-sdk-1.0.65.2/demos/vulkaninfo.c:1670:
failed with VK_ERROR_INITIALIZATION_FAILED

My video card is an R7 260X and is supposed to work.

lspci output;
VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Bonaire XTX
[Radeon R7 260X/360]

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[Mesa-dev] [PATCH 2/2] anv/pipeline: Set the correct binding count for compute shaders

[Jason Ekstrand]

---
 src/intel/vulkan/genX_pipeline.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 45ebe31..4aee9ec 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1836,7 +1836,7 @@ compute_pipeline_create(
   .KernelStartPointer = cs_bin->kernel.offset,
 
   .SamplerCount   = get_sampler_count(cs_bin),
-  .BindingTableEntryCount = get_binding_table_entry_count(cs_bin),
+  .BindingTableEntryCount = 1 + MIN2(cs_bin->bind_map.surface_count, 30),
   .BarrierEnable  = cs_prog_data->uses_barrier,
   .SharedLocalMemorySize  =
  encode_slm_size(GEN_GEN, cs_prog_data->base.total_shared),
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 1/2] intel/aubinator: Correctly decode INTERFACE_DESCRIPTOR_DATA

[Jason Ekstrand]

---
 src/intel/tools/gen_batch_decoder.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/tools/gen_batch_decoder.c 
b/src/intel/tools/gen_batch_decoder.c
index 78db83b..1a8794c 100644
--- a/src/intel/tools/gen_batch_decoder.c
+++ b/src/intel/tools/gen_batch_decoder.c
@@ -285,7 +285,7 @@ handle_media_interface_descriptor_load(struct 
gen_batch_decode_ctx *ctx,
for (int i = 0; i < descriptor_count; i++) {
   fprintf(ctx->fp, "descriptor %d: %08x\n", i, descriptor_offset);
 
-  ctx_print_group(ctx, inst, desc_addr, desc_map);
+  ctx_print_group(ctx, desc, desc_addr, desc_map);
 
   gen_field_iterator_init(, desc, desc_map, 0, false);
   uint64_t ksp;
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 2/2] st: add NIR GL_ARB_get_program_binary support

[Timothy Arceri]

---
 src/mesa/state_tracker/st_context.c | 15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/src/mesa/state_tracker/st_context.c 
b/src/mesa/state_tracker/st_context.c
index 7e721572e0..e23f9fd70b 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -758,6 +758,17 @@ st_init_driver_functions(struct pipe_screen *screen,
 
/* GL_ARB_get_program_binary */
functions->GetProgramBinaryDriverSHA1 = st_get_program_binary_driver_sha1;
-   functions->ProgramBinarySerializeDriverBlob = st_serialise_tgsi_program;
-   functions->ProgramBinaryDeserializeDriverBlob = st_deserialise_tgsi_program;
+
+   enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir)
+  screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
+   PIPE_SHADER_CAP_PREFERRED_IR);
+   if (preferred_ir == PIPE_SHADER_IR_NIR) {
+  functions->ProgramBinarySerializeDriverBlob = st_serialise_nir_program;
+  functions->ProgramBinaryDeserializeDriverBlob =
+ st_deserialise_nir_program;
+   } else {
+  functions->ProgramBinarySerializeDriverBlob = st_serialise_tgsi_program;
+  functions->ProgramBinaryDeserializeDriverBlob =
+ st_deserialise_tgsi_program;
+   }
 }
-- 
2.14.3

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[Mesa-dev] [PATCH 1/2] st/shader_cache: add st_{de}serialise_nir_program() helpers

[Timothy Arceri]

These will be used for NIR GL_ARB_get_program_binary support.
---
 src/mesa/state_tracker/st_shader_cache.c | 14 ++
 src/mesa/state_tracker/st_shader_cache.h |  8 
 2 files changed, 22 insertions(+)

diff --git a/src/mesa/state_tracker/st_shader_cache.c 
b/src/mesa/state_tracker/st_shader_cache.c
index 8eccf7c921..6ff404220a 100644
--- a/src/mesa/state_tracker/st_shader_cache.c
+++ b/src/mesa/state_tracker/st_shader_cache.c
@@ -408,3 +408,17 @@ st_deserialise_tgsi_program(struct gl_context *ctx,
 {
st_deserialise_ir_program(ctx, shProg, prog, false);
 }
+
+void
+st_serialise_nir_program(struct gl_context *ctx, struct gl_program *prog)
+{
+   st_serialise_ir_program(ctx, prog, true);
+}
+
+void
+st_deserialise_nir_program(struct gl_context *ctx,
+   struct gl_shader_program *shProg,
+   struct gl_program *prog)
+{
+   st_deserialise_ir_program(ctx, shProg, prog, true);
+}
diff --git a/src/mesa/state_tracker/st_shader_cache.h 
b/src/mesa/state_tracker/st_shader_cache.h
index 4457047e83..132dac00c0 100644
--- a/src/mesa/state_tracker/st_shader_cache.h
+++ b/src/mesa/state_tracker/st_shader_cache.h
@@ -43,6 +43,14 @@ st_deserialise_tgsi_program(struct gl_context *ctx,
 struct gl_shader_program *shProg,
 struct gl_program *prog);
 
+void
+st_serialise_nir_program(struct gl_context *ctx, struct gl_program *prog);
+
+void
+st_deserialise_nir_program(struct gl_context *ctx,
+   struct gl_shader_program *shProg,
+   struct gl_program *prog);
+
 bool
 st_load_ir_from_disk_cache(struct gl_context *ctx,
struct gl_shader_program *prog,
-- 
2.14.3

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[Mesa-dev] [Bug 105029] simdlib_512_avx512.inl:371:57: error: could not convert ‘_mm512_mask_blend_epi32((__mmask16)(ImmT), a, b)’ from ‘__m512i’ {aka ‘__vector(8) long long int’} to ‘SIMDImpl::SIMD51

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105029

George Kyriazis  changed:

   What|Removed |Added

   Assignee|mesa-dev@lists.freedesktop. |george.kyria...@intel.com
   |org |

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[Mesa-dev] [PATCH] i965: fix tessellation regressions with gl_state_index16

[Dave Airlie]

From: Dave Airlie 

Looks like one conversion was missed.

Fixes: e149a0253 (mesa,glsl,nir: reduce gl_state_index size to 2 bytes)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105067
Signed-off-by: Dave Airlie 
---
 src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 9c4fb22..10a4ff4 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -251,7 +251,7 @@ brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir)
   if (var->data.location != SYSTEM_VALUE_VERTICES_IN)
  continue;
 
-  gl_state_index tokens[STATE_LENGTH] = {
+  gl_state_index16 tokens[STATE_LENGTH] = {
  STATE_INTERNAL,
  nir->info.stage == MESA_SHADER_TESS_CTRL ?
 STATE_TCS_PATCH_VERTICES_IN : STATE_TES_PATCH_VERTICES_IN,
-- 
2.9.5

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[Mesa-dev] [Bug 105067] Tesselation broken for dEQP tests

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105067

Bug ID: 105067
   Summary: Tesselation broken for dEQP tests
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Mesa core
  Assignee: mar...@gmail.com
  Reporter: mark.a.ja...@intel.com
QA Contact: mesa-dev@lists.freedesktop.org
CC: bri...@vmware.com

dozens of tests regressed on each i965 platform, eg:
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_isolines_geometry_output_points

Standard Output

Testing isolines->lines primitive conversion with and without transform
feedback.
Sending a patch of 4 vertices (2x2 uniform grid) to tessellation control
shader.
Control shader emits a patch of 9 vertices (3x3 uniform grid).
Setting outer tessellation level = 3, inner = 3.
Primitive generator emits isolines
Geometry shader transforms emitted primitives to points
Reading back vertex positions of generated primitives using transform feedback.
Verifying rendered image and feedback vertices are consistent.
Rendering scene again with identical shader program, but without setting
feedback varying. Expecting similar output image.
Rendering with transform feedback
Begin transform feedback with mode GL_POINTS
Calling drawArrays with mode GL_PATCHES
Verifying GL_PRIMITIVES_GENERATED, expecting 18
Error, GL_PRIMITIVES_GENERATED was 0


Bisected to:
commit e149a0253c12d103805230bc7bc0a36887c3b8df
Author: Marek Olšák 
Date:   Thu Nov 16 04:29:35 2017 +0100
mesa,glsl,nir: reduce gl_state_index size to 2 bytes

Let's use the new gl_state_index16 type everywhere and remove
the typecasts.

This helps reduce the size of gl_program_parameter.

Reviewed-by: Brian Paul 

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Re: [Mesa-dev] [PATCH 2/2] anv: Be more careful about fast-clear colors

[Jason Ekstrand]

On Mon, Feb 12, 2018 at 5:11 PM, Nanley Chery  wrote:

> On Mon, Feb 12, 2018 at 04:35:20PM -0800, Jason Ekstrand wrote:
> > Previously, we just used all the channels regardless of the format.
> > This is less than ideal because some channels may have undefined values
> > and this should be ok from the client's perspective.  Even though the
> > driver should do the correct thing regardless of what is in the
> > undefined value, it makes things less deterministic.  In particular, the
> > driver may choose to fast-clear or not based on undefined values.  This
> > level of nondeterminism is bad.
> >
> > Cc: mesa-sta...@lists.freedesktop.org
> > ---
> >  src/intel/vulkan/genX_cmd_buffer.c | 47 --
> 
> >  1 file changed, 20 insertions(+), 27 deletions(-)
> >
> > diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/intel/vulkan/genX_cmd_buffer.c
> > index 99854eb..a574024 100644
> > --- a/src/intel/vulkan/genX_cmd_buffer.c
> > +++ b/src/intel/vulkan/genX_cmd_buffer.c
> > @@ -202,24 +202,6 @@ add_image_view_relocs(struct anv_cmd_buffer
> *cmd_buffer,
> > }
> >  }
> >
> > -static bool
> > -color_is_zero_one(VkClearColorValue value, enum isl_format format)
> > -{
> > -   if (isl_format_has_int_channel(format)) {
> > -  for (unsigned i = 0; i < 4; i++) {
> > - if (value.int32[i] != 0 && value.int32[i] != 1)
> > -return false;
> > -  }
> > -   } else {
> > -  for (unsigned i = 0; i < 4; i++) {
> > - if (value.float32[i] != 0.0f && value.float32[i] != 1.0f)
> > -return false;
> > -  }
> > -   }
> > -
> > -   return true;
> > -}
> > -
> >  static void
> >  color_attachment_compute_aux_usage(struct anv_device * device,
> > struct anv_cmd_state * cmd_state,
> > @@ -294,13 +276,26 @@ color_attachment_compute_aux_usage(struct
> anv_device * device,
> >
> > assert(iview->image->planes[0].aux_surface.isl.usage &
> ISL_SURF_USAGE_CCS_BIT);
> >
> > +   const struct isl_format_layout *view_fmtl =
> > +  isl_format_get_layout(iview->planes[0].isl.format);
> > +   union isl_color_value clear_color = {};
>
> Is this initializer valid?
>

It's a GCC extension (also supported by clang), but yes.


> > +
> > +#define COPY_CLEAR_COLOR_CHANNEL(c, i) \
> > +   if (view_fmtl->channels.c.bits) \
> > +  clear_color.u32[i] = att_state->clear_value.color.uint32[i]
> > +
> > +   COPY_CLEAR_COLOR_CHANNEL(r, 0);
> > +   COPY_CLEAR_COLOR_CHANNEL(g, 1);
> > +   COPY_CLEAR_COLOR_CHANNEL(b, 2);
> > +   COPY_CLEAR_COLOR_CHANNEL(a, 3);
> > +
> > +#undef COPY_CLEAR_COLOR_CHANNEL
> > +
> > att_state->clear_color_is_zero_one =
> > -  color_is_zero_one(att_state->clear_value.color,
> iview->planes[0].isl.format);
> > +  isl_color_value_is_zero_one(*fast_clear_color,
>
> Should this be clear_color?
>

Yes it should.  Fixed locally.


> > +  iview->planes[0].isl.format);
> > att_state->clear_color_is_zero =
> > -  att_state->clear_value.color.uint32[0] == 0 &&
> > -  att_state->clear_value.color.uint32[1] == 0 &&
> > -  att_state->clear_value.color.uint32[2] == 0 &&
> > -  att_state->clear_value.color.uint32[3] == 0;
> > +  isl_color_value_is_zero(*fast_clear_color,
> iview->planes[0].isl.format);
> >
>
> Should this be clear_color?
>

Yes it should.  Fixed locally.  This caused a lot of fails.  I don't know
how I didn't catch it. :(

Do you want a v2?

--Jason


>
> -Nanley
>
> > if (att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
> >/* Start by getting the fast clear type.  We use the first subpass
> > @@ -358,10 +353,8 @@ color_attachment_compute_aux_usage(struct
> anv_device * device,
> > "LOAD_OP_CLEAR.  Only fast-clearing the first
> slice");
> >}
> >
> > -  if (att_state->fast_clear) {
> > - memcpy(fast_clear_color->u32, att_state->clear_value.color.
> uint32,
> > -sizeof(fast_clear_color->u32));
> > -  }
> > +  if (att_state->fast_clear)
> > + *fast_clear_color = clear_color;
> > } else {
> >att_state->fast_clear = false;
> > }
> > --
> > 2.5.0.400.gff86faf
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
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[Mesa-dev] [PATCH shaderdb 2/3] run: new '--pci-id' option for overriding pci-id

[Dongwon Kim]

Add a new option, '--pciid' to override a pci id of the target arch
to support cross-architecture shader compilation. Not like "-p" option,
it is for accepting any GFX devices supported by the driver.

Setting both "-p" and "--pciid" is blocked to avoid conflict.

Signed-off-by: Dongwon Kim 
---
 run.c | 44 ++--
 1 file changed, 42 insertions(+), 2 deletions(-)

diff --git a/run.c b/run.c
index 23d2b07..d066567 100644
--- a/run.c
+++ b/run.c
@@ -36,6 +36,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -353,10 +355,21 @@ const struct platform platforms[] = {
 "skl",  "0x191D",
 };
 
+enum
+{
+PCI_ID_OVERRIDE_OPTION = CHAR_MAX + 1,
+};
+
+const struct option const long_options[] =
+{
+{"pciid", required_argument, NULL, PCI_ID_OVERRIDE_OPTION},
+{NULL, 0, NULL, 0}
+};
+
 void print_usage(const char *prog_name)
 {
 fprintf(stderr,
-"Usage: %s [-d ] [-j ] [-o ] [-p 
] \n",
+"Usage: %s [-d ] [-j ] [-o ] [-p 
] [--pciid=] \n",
 prog_name);
 }
 
@@ -435,10 +448,13 @@ main(int argc, char **argv)
 char device_path[64];
 int device_id = 0;
 int opt;
+bool platf_overridden = 0;
+bool pci_id_overridden = 0;
 
 max_threads = omp_get_max_threads();
 
-while ((opt = getopt(argc, argv, "d:j:o:p:")) != -1) {
+while ((opt = getopt_long(argc, argv, "d:j:o:p:",
+  long_options, NULL)) != -1) {
 switch(opt) {
 case 'd': {
 char *endptr;
@@ -456,6 +472,13 @@ main(int argc, char **argv)
 break;
 case 'p': {
 const struct platform *platform = NULL;
+
+if (pci_id_overridden) {
+unsetenv("INTEL_DEVID_OVERRIDE");
+fprintf(stderr, "'-p' and '--pciid' can't be used 
together.\n");
+return -1;
+}
+
 for (unsigned i = 0; i < ARRAY_SIZE(platforms); i++) {
 if (strcmp(optarg, platforms[i].name) == 0) {
 platform = platforms + i;
@@ -473,11 +496,28 @@ main(int argc, char **argv)
 
 printf("### Compiling for %s ###\n", platform->name);
 setenv("INTEL_DEVID_OVERRIDE", platform->pci_id, 1);
+platf_overridden = 1;
 break;
 }
 case 'j':
 max_threads = atoi(optarg);
 break;
+case PCI_ID_OVERRIDE_OPTION:
+if (platf_overridden) {
+unsetenv("INTEL_DEVID_OVERRIDE");
+fprintf(stderr, "'-p' and '--pciid' can't be used 
together.\n");
+return -1;
+}
+
+if (optarg[0] != '0' || optarg[1] != 'x') {
+  fprintf(stderr, "pci-id should be a hex number starting with 
'0x'\n");
+  return -1;
+}
+
+printf("### Compiling for GEN arch with PCI_ID=%s ###\n", optarg);
+setenv("INTEL_DEVID_OVERRIDE", optarg, 1);
+pci_id_overridden = 1;
+break;
 default:
 fprintf(stderr, "Unknown option: %x\n", opt);
 print_usage(argv[0]);
-- 
2.16.1

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[Mesa-dev] [PATCH shaderdb 3/3] run: shader program file created via GetProgramBinary

[Dongwon Kim]

extraction of linked binary program to a file using glGetProgramBinary.
This file is intended to be loaded by glProgramBinary in the graphic
application running on the target system.

A new option, '--out=' is available to be used for specifying
the output file name.

Signed-off-by: Dongwon Kim 
---
 run.c | 46 --
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/run.c b/run.c
index d066567..54575e1 100644
--- a/run.c
+++ b/run.c
@@ -358,18 +358,20 @@ const struct platform platforms[] = {
 enum
 {
 PCI_ID_OVERRIDE_OPTION = CHAR_MAX + 1,
+OUT_PROGRAM_OPTION,
 };
 
 const struct option const long_options[] =
 {
 {"pciid", required_argument, NULL, PCI_ID_OVERRIDE_OPTION},
+{"out", required_argument, NULL, OUT_PROGRAM_OPTION},
 {NULL, 0, NULL, 0}
 };
 
 void print_usage(const char *prog_name)
 {
 fprintf(stderr,
-"Usage: %s [-d ] [-j ] [-o ] [-p 
] [--pciid=] \n",
+"Usage: %s [-d ] [-j ] [-o ] [-p 
] [--pciid=] [--out=] \n",
 prog_name);
 }
 
@@ -450,6 +452,7 @@ main(int argc, char **argv)
 int opt;
 bool platf_overridden = 0;
 bool pci_id_overridden = 0;
+char out_file[64] = {0};
 
 max_threads = omp_get_max_threads();
 
@@ -518,6 +521,13 @@ main(int argc, char **argv)
 setenv("INTEL_DEVID_OVERRIDE", optarg, 1);
 pci_id_overridden = 1;
 break;
+case OUT_PROGRAM_OPTION:
+if (optarg[0] == 0) {
+  fprintf(stderr, "Output file name is empty.\n");
+  return -1;
+}
+strncpy(out_file, optarg, 64);
+break;
 default:
 fprintf(stderr, "Unknown option: %x\n", opt);
 print_usage(argv[0]);
@@ -858,13 +868,13 @@ main(int argc, char **argv)
 }
 } else if (type == TYPE_CORE || type == TYPE_COMPAT || type == 
TYPE_ES) {
 GLuint prog = glCreateProgram();
+GLint param;
 
 for (unsigned i = 0; i < num_shaders; i++) {
 GLuint s = glCreateShader(shader[i].type);
 glShaderSource(s, 1, [i].text, [i].length);
 glCompileShader(s);
 
-GLint param;
 glGetShaderiv(s, GL_COMPILE_STATUS, );
 if (unlikely(!param)) {
 GLchar log[4096];
@@ -879,6 +889,38 @@ main(int argc, char **argv)
 }
 
 glLinkProgram(prog);
+
+glGetProgramiv(prog, GL_LINK_STATUS, );
+if (unlikely(!param)) {
+   GLchar log[4096];
+   GLsizei length;
+   glGetProgramInfoLog(prog, 4096, , log);
+
+   fprintf(stderr, "ERROR: failed to link progam:\n%s\n",
+   log);
+} else {
+   if (out_file[0] != 0) {
+  char *prog_buf = (char *)malloc(10*1024*1024);
+  GLenum format;
+  GLsizei length;
+  FILE *fp;
+
+  glGetProgramBinary(prog, 10*1024*1024, , , 
prog_buf);
+
+  param = glGetError();
+  if (param != GL_NO_ERROR) {
+ fprintf(stderr, "ERROR: failed to get Program 
Binary\n");
+  } else {
+ fp = fopen(out_file, "wb");
+ fprintf(stdout, "Binary program is generated (%d 
Byte).\n", length);
+ fprintf(stdout, "Binary Format is %d\n", format);
+ fprintf(stdout, "Now writing to the file\n");
+ fwrite(prog_buf, sizeof(char), length, fp);
+ fclose(fp);
+  }
+  free(prog_buf);
+   }
+}
 glDeleteProgram(prog);
 } else {
 for (unsigned i = 0; i < num_shaders; i++) {
-- 
2.16.1

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[Mesa-dev] [PATCH shaderdb 1/3] intel_stub: override pci-id only if INTEL_DEVID_OVERRIDE is set

[Dongwon Kim]

To prevent a segfault, pci-id is set only if INTEL_DEVID_OVERRIDE exists.

Signed-off-by: Dongwon Kim 
---
 intel_stub.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/intel_stub.c b/intel_stub.c
index ea88400..cf9ddff 100644
--- a/intel_stub.c
+++ b/intel_stub.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -174,6 +175,7 @@ ioctl(int fd, unsigned long request, ...)
va_list args;
void *argp;
struct stat buf;
+   char *pci_id;
 
va_start(args, request);
argp = va_arg(args, void *);
@@ -199,7 +201,13 @@ ioctl(int fd, unsigned long request, ...)
 *getparam->value = 1;
 break;
 case I915_PARAM_CHIPSET_ID:
-*getparam->value = 
strtod(getenv("INTEL_DEVID_OVERRIDE"), NULL);
+pci_id = getenv("INTEL_DEVID_OVERRIDE");
+
+if (pci_id)
+*getparam->value = strtod(pci_id, NULL);
+else
+return -EINVAL;
+
 break;
 case I915_PARAM_CMD_PARSER_VERSION:
 *getparam->value = 9;
-- 
2.16.1

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[Mesa-dev] [PATCH shaderdb 0/3] offline building of shader program for a desired target

[Dongwon Kim]

This series of changes are for making shaderdb as a complete standalone 
compiler that
can create a shader program in binary form (using glGetProgramBinary), which 
can later
be loaded on the target system specified by user (glProgramBinary).

As a prerequisite, the patch "run: new '--pci-id' option for overriding pci-id"
was written to add support for other GEN architectures that is not listed in
run.c.

The first patch, "intel_stub: override pci-id only if INTEL_DEVID_OVERRIDE is 
set"
is for fixing a segfault problem when ./intel_run is executed without
INTEL_DEVID_OVERRIDE.

Dongwon Kim (3):
  intel_stub: override pci-id only if INTEL_DEVID_OVERRIDE is set
  run: new '--pci-id' option for overriding pci-id
  run: shader program file created via GetProgramBinary

 intel_stub.c | 10 ++-
 run.c| 88 +---
 2 files changed, 94 insertions(+), 4 deletions(-)

-- 
2.16.1

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[Mesa-dev] [PATCH] virgl: Support v2 caps struct (v2)

[Dave Airlie]

From: Stéphane Marchesin 

This struct allows us to report:
- accurate max point size/line width.
- accurate texel and texture gather offsets
- vertex/geometry limits.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/virgl/virgl_hw.h| 28 ++
 src/gallium/drivers/virgl/virgl_screen.c| 29 +++
 src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 38 -
 3 files changed, 82 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_hw.h 
b/src/gallium/drivers/virgl/virgl_hw.h
index e3c56db2ac6..833ab91eee7 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -232,6 +232,11 @@ struct virgl_caps_bool_set1 {
 unsigned poly_stipple:1; /* not in GL 3.1 core profile */
 unsigned mirror_clamp:1;
 unsigned texture_query_lod:1;
+unsigned has_fp64:1;
+unsigned has_tessellation_shaders:1;
+unsigned has_indirect_draw:1;
+unsigned has_sample_shading:1;
+unsigned has_cull:1;
 };
 
 /* endless expansion capabilites - current gallium has 252 formats */
@@ -259,9 +264,32 @@ struct virgl_caps_v1 {
 uint32_t max_texture_gather_components;
 };
 
+struct virgl_caps_v2 {
+struct virgl_caps_v1 v1;
+float min_aliased_point_size;
+float max_aliased_point_size;
+float min_smooth_point_size;
+float max_smooth_point_size;
+float min_aliased_line_width;
+float max_aliased_line_width;
+float min_smooth_line_width;
+float max_smooth_line_width;
+float max_texture_lod_bias;
+uint32_t max_geom_output_vertices;
+uint32_t max_geom_total_output_components;
+uint32_t max_vertex_outputs;
+uint32_t max_vertex_attribs;
+uint32_t max_shader_patch_varyings;
+int32_t min_texel_offset;
+int32_t max_texel_offset;
+int32_t min_texture_gather_offset;
+int32_t max_texture_gather_offset;
+};
+
 union virgl_caps {
 uint32_t max_version;
 struct virgl_caps_v1 v1;
+struct virgl_caps_v2 v2;
 };
 
 enum virgl_errors {
diff --git a/src/gallium/drivers/virgl/virgl_screen.c 
b/src/gallium/drivers/virgl/virgl_screen.c
index ca73b90e0fd..72dce08c286 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -113,11 +113,13 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
   return vscreen->caps.caps.v1.max_texture_array_layers;
case PIPE_CAP_MIN_TEXEL_OFFSET:
+  return vscreen->caps.caps.v2.min_texel_offset;
case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
-  return -8;
+  return vscreen->caps.caps.v2.min_texture_gather_offset;
case PIPE_CAP_MAX_TEXEL_OFFSET:
+  return vscreen->caps.caps.v2.max_texel_offset;
case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
-  return 7;
+  return vscreen->caps.caps.v2.max_texture_gather_offset;
case PIPE_CAP_CONDITIONAL_RENDER:
   return vscreen->caps.caps.v1.bset.conditional_render;
case PIPE_CAP_TEXTURE_BARRIER:
@@ -182,9 +184,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
   return 0;
case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
-  return 256;
+  return vscreen->caps.caps.v2.max_geom_output_vertices;
case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
-  return 16384;
+  return vscreen->caps.caps.v2.max_geom_total_output_components;
case PIPE_CAP_TEXTURE_QUERY_LOD:
   return vscreen->caps.caps.v1.bset.texture_query_lod;
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
@@ -310,11 +312,13 @@ virgl_get_shader_param(struct pipe_screen *screen,
  return 1;
   case PIPE_SHADER_CAP_MAX_INPUTS:
  if (vscreen->caps.caps.v1.glsl_level < 150)
-return 16;
+return vscreen->caps.caps.v2.max_vertex_attribs;
  return (shader == PIPE_SHADER_VERTEX ||
- shader == PIPE_SHADER_GEOMETRY) ? 16 : 32;
+ shader == PIPE_SHADER_GEOMETRY) ? 
vscreen->caps.caps.v2.max_vertex_attribs : 32;
   case PIPE_SHADER_CAP_MAX_OUTPUTS:
- return 32;
+ if (shader == PIPE_SHADER_FRAGMENT)
+return vscreen->caps.caps.v1.max_render_targets;
+ return vscreen->caps.caps.v2.max_vertex_outputs;
  // case PIPE_SHADER_CAP_MAX_CONSTS:
  //return 4096;
   case PIPE_SHADER_CAP_MAX_TEMPS:
@@ -350,19 +354,20 @@ virgl_get_shader_param(struct pipe_screen *screen,
 static float
 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 {
+   struct virgl_screen *vscreen = virgl_screen(screen);
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
-  /* fall-through */
+  return vscreen->caps.caps.v2.max_aliased_line_width;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
-  

Re: [Mesa-dev] [PATCH 2/2] anv: Be more careful about fast-clear colors

[Nanley Chery]

On Mon, Feb 12, 2018 at 04:35:20PM -0800, Jason Ekstrand wrote:
> Previously, we just used all the channels regardless of the format.
> This is less than ideal because some channels may have undefined values
> and this should be ok from the client's perspective.  Even though the
> driver should do the correct thing regardless of what is in the
> undefined value, it makes things less deterministic.  In particular, the
> driver may choose to fast-clear or not based on undefined values.  This
> level of nondeterminism is bad.
> 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/intel/vulkan/genX_cmd_buffer.c | 47 
> --
>  1 file changed, 20 insertions(+), 27 deletions(-)
> 
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
> b/src/intel/vulkan/genX_cmd_buffer.c
> index 99854eb..a574024 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -202,24 +202,6 @@ add_image_view_relocs(struct anv_cmd_buffer *cmd_buffer,
> }
>  }
>  
> -static bool
> -color_is_zero_one(VkClearColorValue value, enum isl_format format)
> -{
> -   if (isl_format_has_int_channel(format)) {
> -  for (unsigned i = 0; i < 4; i++) {
> - if (value.int32[i] != 0 && value.int32[i] != 1)
> -return false;
> -  }
> -   } else {
> -  for (unsigned i = 0; i < 4; i++) {
> - if (value.float32[i] != 0.0f && value.float32[i] != 1.0f)
> -return false;
> -  }
> -   }
> -
> -   return true;
> -}
> -
>  static void
>  color_attachment_compute_aux_usage(struct anv_device * device,
> struct anv_cmd_state * cmd_state,
> @@ -294,13 +276,26 @@ color_attachment_compute_aux_usage(struct anv_device * 
> device,
>  
> assert(iview->image->planes[0].aux_surface.isl.usage & 
> ISL_SURF_USAGE_CCS_BIT);
>  
> +   const struct isl_format_layout *view_fmtl =
> +  isl_format_get_layout(iview->planes[0].isl.format);
> +   union isl_color_value clear_color = {};

Is this initializer valid?

> +
> +#define COPY_CLEAR_COLOR_CHANNEL(c, i) \
> +   if (view_fmtl->channels.c.bits) \
> +  clear_color.u32[i] = att_state->clear_value.color.uint32[i]
> +
> +   COPY_CLEAR_COLOR_CHANNEL(r, 0);
> +   COPY_CLEAR_COLOR_CHANNEL(g, 1);
> +   COPY_CLEAR_COLOR_CHANNEL(b, 2);
> +   COPY_CLEAR_COLOR_CHANNEL(a, 3);
> +
> +#undef COPY_CLEAR_COLOR_CHANNEL
> +
> att_state->clear_color_is_zero_one =
> -  color_is_zero_one(att_state->clear_value.color, 
> iview->planes[0].isl.format);
> +  isl_color_value_is_zero_one(*fast_clear_color,

Should this be clear_color?

> +  iview->planes[0].isl.format);
> att_state->clear_color_is_zero =
> -  att_state->clear_value.color.uint32[0] == 0 &&
> -  att_state->clear_value.color.uint32[1] == 0 &&
> -  att_state->clear_value.color.uint32[2] == 0 &&
> -  att_state->clear_value.color.uint32[3] == 0;
> +  isl_color_value_is_zero(*fast_clear_color, 
> iview->planes[0].isl.format);
>  

Should this be clear_color?


-Nanley

> if (att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
>/* Start by getting the fast clear type.  We use the first subpass
> @@ -358,10 +353,8 @@ color_attachment_compute_aux_usage(struct anv_device * 
> device,
> "LOAD_OP_CLEAR.  Only fast-clearing the first slice");
>}
>  
> -  if (att_state->fast_clear) {
> - memcpy(fast_clear_color->u32, att_state->clear_value.color.uint32,
> -sizeof(fast_clear_color->u32));
> -  }
> +  if (att_state->fast_clear)
> + *fast_clear_color = clear_color;
> } else {
>att_state->fast_clear = false;
> }
> -- 
> 2.5.0.400.gff86faf
> 
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Re: [Mesa-dev] [PATCH 19/29] anv/cmd_buffer: Move the rest of clear_subpass into begin_subpass

[Nanley Chery]

On Thu, Feb 08, 2018 at 05:23:21PM -0800, Jason Ekstrand wrote:
> On Thu, Feb 8, 2018 at 5:20 PM, Jason Ekstrand  wrote:
> 
> > On Fri, Jan 12, 2018 at 2:45 PM, Nanley Chery 
> > wrote:
> >
> >> On Mon, Nov 27, 2017 at 07:06:09PM -0800, Jason Ekstrand wrote:
> >> > ---
> >> >  src/intel/vulkan/anv_blorp.c   | 243 --
> >> ---
> >> >  src/intel/vulkan/anv_private.h |  17 ++-
> >> >  src/intel/vulkan/genX_cmd_buffer.c |  68 ++-
> >> >  3 files changed, 188 insertions(+), 140 deletions(-)
> >> >
> >> > diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> >> > index 7401234..45d7b12 100644
> >> > --- a/src/intel/vulkan/anv_blorp.c
> >> > +++ b/src/intel/vulkan/anv_blorp.c
> >> > @@ -1132,143 +1132,6 @@ enum subpass_stage {
> >> > SUBPASS_STAGE_RESOLVE,
> >> >  };
> >> >
> >> > -static bool
> >> > -subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
> >> > -{
> >> > -   const struct anv_cmd_state *cmd_state = _buffer->state;
> >> > -   uint32_t ds = cmd_state->subpass->depth_sten
> >> cil_attachment.attachment;
> >> > -
> >> > -   if (ds != VK_ATTACHMENT_UNUSED) {
> >> > -  assert(ds < cmd_state->pass->attachment_count);
> >> > -  if (cmd_state->attachments[ds].pending_clear_aspects)
> >> > - return true;
> >> > -   }
> >> > -
> >> > -   return false;
> >> > -}
> >> > -
> >> > -void
> >> > -anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
> >> > -{
> >> > -   const struct anv_cmd_state *cmd_state = _buffer->state;
> >> > -   const VkRect2D render_area = cmd_buffer->state.render_area;
> >> > -
> >> > -
> >> > -   if (!subpass_needs_clear(cmd_buffer))
> >> > -  return;
> >> > -
> >> > -   /* Because this gets called within a render pass, we tell blorp not
> >> to
> >> > -* trash our depth and stencil buffers.
> >> > -*/
> >> > -   struct blorp_batch batch;
> >> > -   blorp_batch_init(_buffer->device->blorp, , cmd_buffer,
> >> > -BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
> >> > -
> >> > -   VkClearRect clear_rect = {
> >> > -  .rect = cmd_buffer->state.render_area,
> >> > -  .baseArrayLayer = 0,
> >> > -  .layerCount = cmd_buffer->state.framebuffer->layers,
> >> > -   };
> >> > -
> >> > -   struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
> >> > -
> >> > -   const uint32_t ds = cmd_state->subpass->depth_sten
> >> cil_attachment.attachment;
> >> > -   assert(ds == VK_ATTACHMENT_UNUSED || ds <
> >> cmd_state->pass->attachment_count);
> >> > -
> >> > -   if (ds != VK_ATTACHMENT_UNUSED &&
> >> > -   cmd_state->attachments[ds].pending_clear_aspects) {
> >> > -
> >> > -  VkClearAttachment clear_att = {
> >> > - .aspectMask = cmd_state->attachments[ds].pen
> >> ding_clear_aspects,
> >> > - .clearValue = cmd_state->attachments[ds].clear_value,
> >> > -  };
> >> > -
> >> > -
> >> > -  const uint8_t gen = cmd_buffer->device->info.gen;
> >> > -  bool clear_with_hiz = gen >= 8 && 
> >> > cmd_state->attachments[ds].aux_usage
> >> ==
> >> > -ISL_AUX_USAGE_HIZ;
> >> > -  const struct anv_image_view *iview = fb->attachments[ds];
> >> > -
> >> > -  if (clear_with_hiz) {
> >> > - const bool clear_depth = clear_att.aspectMask &
> >> > -  VK_IMAGE_ASPECT_DEPTH_BIT;
> >> > - const bool clear_stencil = clear_att.aspectMask &
> >> > -VK_IMAGE_ASPECT_STENCIL_BIT;
> >> > -
> >> > - /* Check against restrictions for depth buffer clearing. A
> >> great GPU
> >> > -  * performance benefit isn't expected when using the HZ
> >> sequence for
> >> > -  * stencil-only clears. Therefore, we don't emit a HZ op
> >> sequence for
> >> > -  * a stencil clear in addition to using the BLORP-fallback
> >> for depth.
> >> > -  */
> >> > - if (clear_depth) {
> >> > -if (!blorp_can_hiz_clear_depth(gen,
> >> iview->planes[0].isl.format,
> >> > -   iview->image->samples,
> >> > -   render_area.offset.x,
> >> > -   render_area.offset.y,
> >> > -   render_area.offset.x +
> >> > -   render_area.extent.width,
> >> > -   render_area.offset.y +
> >> > -   render_area.extent.height))
> >> {
> >> > -   clear_with_hiz = false;
> >> > -} else if (clear_att.clearValue.depthStencil.depth !=
> >> > -   ANV_HZ_FC_VAL) {
> >> > -   /* Don't enable fast depth clears for any color not
> >> equal to
> >> > -* ANV_HZ_FC_VAL.
> >> > -*/
> >> > -   clear_with_hiz = false;
> >> > -

[Mesa-dev] [PATCH 1/2] intel/isl: Add an isl_color_value_is_zero helper

[Jason Ekstrand]

Cc: mesa-sta...@lists.freedesktop.org
---
 src/intel/isl/isl.c | 20 
 src/intel/isl/isl.h |  3 +++
 2 files changed, 23 insertions(+)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 59f512f..f4b0502 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -269,6 +269,26 @@ isl_tiling_get_info(enum isl_tiling tiling,
 }
 
 bool
+isl_color_value_is_zero(union isl_color_value value,
+enum isl_format format)
+{
+   const struct isl_format_layout *fmtl = isl_format_get_layout(format);
+
+#define RETURN_FALSE_IF_NOT_0(c, i) \
+   if (fmtl->channels.c.bits && value.u32[i] != 0) \
+  return false
+
+   RETURN_FALSE_IF_NOT_0(r, 0);
+   RETURN_FALSE_IF_NOT_0(g, 1);
+   RETURN_FALSE_IF_NOT_0(b, 2);
+   RETURN_FALSE_IF_NOT_0(a, 3);
+
+#undef RETURN_FALSE_IF_NOT_0
+
+   return true;
+}
+
+bool
 isl_color_value_is_zero_one(union isl_color_value value,
 enum isl_format format)
 {
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index fda2411..209769a 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1692,6 +1692,9 @@ isl_extent4d(uint32_t width, uint32_t height, uint32_t 
depth,
return e;
 }
 
+bool isl_color_value_is_zero(union isl_color_value value,
+ enum isl_format format);
+
 bool isl_color_value_is_zero_one(union isl_color_value value,
  enum isl_format format);
 
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 2/2] anv: Be more careful about fast-clear colors

[Jason Ekstrand]

Previously, we just used all the channels regardless of the format.
This is less than ideal because some channels may have undefined values
and this should be ok from the client's perspective.  Even though the
driver should do the correct thing regardless of what is in the
undefined value, it makes things less deterministic.  In particular, the
driver may choose to fast-clear or not based on undefined values.  This
level of nondeterminism is bad.

Cc: mesa-sta...@lists.freedesktop.org
---
 src/intel/vulkan/genX_cmd_buffer.c | 47 --
 1 file changed, 20 insertions(+), 27 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index 99854eb..a574024 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -202,24 +202,6 @@ add_image_view_relocs(struct anv_cmd_buffer *cmd_buffer,
}
 }
 
-static bool
-color_is_zero_one(VkClearColorValue value, enum isl_format format)
-{
-   if (isl_format_has_int_channel(format)) {
-  for (unsigned i = 0; i < 4; i++) {
- if (value.int32[i] != 0 && value.int32[i] != 1)
-return false;
-  }
-   } else {
-  for (unsigned i = 0; i < 4; i++) {
- if (value.float32[i] != 0.0f && value.float32[i] != 1.0f)
-return false;
-  }
-   }
-
-   return true;
-}
-
 static void
 color_attachment_compute_aux_usage(struct anv_device * device,
struct anv_cmd_state * cmd_state,
@@ -294,13 +276,26 @@ color_attachment_compute_aux_usage(struct anv_device * 
device,
 
assert(iview->image->planes[0].aux_surface.isl.usage & 
ISL_SURF_USAGE_CCS_BIT);
 
+   const struct isl_format_layout *view_fmtl =
+  isl_format_get_layout(iview->planes[0].isl.format);
+   union isl_color_value clear_color = {};
+
+#define COPY_CLEAR_COLOR_CHANNEL(c, i) \
+   if (view_fmtl->channels.c.bits) \
+  clear_color.u32[i] = att_state->clear_value.color.uint32[i]
+
+   COPY_CLEAR_COLOR_CHANNEL(r, 0);
+   COPY_CLEAR_COLOR_CHANNEL(g, 1);
+   COPY_CLEAR_COLOR_CHANNEL(b, 2);
+   COPY_CLEAR_COLOR_CHANNEL(a, 3);
+
+#undef COPY_CLEAR_COLOR_CHANNEL
+
att_state->clear_color_is_zero_one =
-  color_is_zero_one(att_state->clear_value.color, 
iview->planes[0].isl.format);
+  isl_color_value_is_zero_one(*fast_clear_color,
+  iview->planes[0].isl.format);
att_state->clear_color_is_zero =
-  att_state->clear_value.color.uint32[0] == 0 &&
-  att_state->clear_value.color.uint32[1] == 0 &&
-  att_state->clear_value.color.uint32[2] == 0 &&
-  att_state->clear_value.color.uint32[3] == 0;
+  isl_color_value_is_zero(*fast_clear_color, iview->planes[0].isl.format);
 
if (att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
   /* Start by getting the fast clear type.  We use the first subpass
@@ -358,10 +353,8 @@ color_attachment_compute_aux_usage(struct anv_device * 
device,
"LOAD_OP_CLEAR.  Only fast-clearing the first slice");
   }
 
-  if (att_state->fast_clear) {
- memcpy(fast_clear_color->u32, att_state->clear_value.color.uint32,
-sizeof(fast_clear_color->u32));
-  }
+  if (att_state->fast_clear)
+ *fast_clear_color = clear_color;
} else {
   att_state->fast_clear = false;
}
-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH 6/7] vulkan: Add new VK_MESA_query_timestamp extension

[Dylan Baker]

Quoting Keith Packard (2018-02-09 20:45:15)
> This extension adds a single function to query the current GPU
> timestamp, just like glGetInteger64v(GL_TIMESTAMP, ). This
> function is needed to complete the implementation of
> GOOGLE_display_timing, which needs to be able to coorelate GPU and CPU
> timestamps.
> 
> Signed-off-by: Keith Packard 
> ---
>  include/vulkan/vulkan.h |  6 ++
>  src/Makefile.am |  1 +
>  src/amd/vulkan/Makefile.am  |  3 +++
>  src/amd/vulkan/meson.build  |  8 
>  src/amd/vulkan/radv_device.c|  8 
>  src/amd/vulkan/radv_extensions.py   |  1 +
>  src/intel/Makefile.vulkan.am|  7 +++
>  src/intel/vulkan/anv_extensions.py  |  1 +
>  src/intel/vulkan/anv_gem.c  | 13 +
>  src/intel/vulkan/anv_private.h  |  1 +
>  src/intel/vulkan/genX_query.c   | 15 +++
>  src/intel/vulkan/meson.build| 12 ++--
>  src/vulkan/meson.build  |  1 +
>  src/vulkan/registry/vk_mesa_query_timestamp.xml | 22 ++
>  14 files changed, 89 insertions(+), 10 deletions(-)
>  create mode 100644 src/vulkan/registry/vk_mesa_query_timestamp.xml
> 
> diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
> index d3e2e246cf3..5523eb7586f 100644
> --- a/include/vulkan/vulkan.h
> +++ b/include/vulkan/vulkan.h
> @@ -7025,6 +7025,12 @@ VKAPI_ATTR VkResult VKAPI_CALL 
> vkGetMemoryHostPointerPropertiesEXT(
>  VkMemoryHostPointerPropertiesEXT*   
> pMemoryHostPointerProperties);
>  #endif
>  
> +typedef VkResult (VKAPI_PTR *PFN_vkQueryCurrentTimestampMESA)(VkDevice 
> device, uint64_t *timestamp);
> +
> +VKAPI_ATTR VkResult VKAPI_CALL vkQueryCurrentTimestampMESA(
> +VkDevice_device,
> +uint64_t*timestamp);
> +
>  #ifdef __cplusplus
>  }
>  #endif
> diff --git a/src/Makefile.am b/src/Makefile.am
> index 014ffaf3e29..74ff305d7c6 100644
> --- a/src/Makefile.am
> +++ b/src/Makefile.am
> @@ -68,6 +68,7 @@ endif
>  
>  EXTRA_DIST += vulkan/registry/vk.xml
>  EXTRA_DIST += vulkan/registry/vk_android_native_buffer.xml
> +EXTRA_DIST += vulkan/registry/vk_mesa_query_timestamp.xml
>  
>  if HAVE_AMD_DRIVERS
>  SUBDIRS += amd
> diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
> index 94ece06e99e..0626fa2b3b3 100644
> --- a/src/amd/vulkan/Makefile.am
> +++ b/src/amd/vulkan/Makefile.am
> @@ -129,12 +129,14 @@ libvulkan_radeon_la_SOURCES = $(VULKAN_GEM_FILES)
>  
>  vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml
>  vk_android_native_buffer_xml = 
> $(top_srcdir)/src/vulkan/registry/vk_android_native_buffer.xml
> +vk_mesa_query_timestamp_xml = 
> $(top_srcdir)/src/vulkan/registry/vk_mesa_query_timestamps.xml
>  
>  radv_entrypoints.c: radv_entrypoints_gen.py radv_extensions.py 
> $(vulkan_api_xml)
> $(MKDIR_GEN)
> $(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_entrypoints_gen.py \
> --xml $(vulkan_api_xml) \
> --xml $(vk_android_native_buffer_xml) \
> +   --xml $(vk_mesa_query_timestamp_xml) \
> --outdir $(builddir)
>  radv_entrypoints.h: radv_entrypoints.c
>  
> @@ -144,6 +146,7 @@ radv_extensions.c: radv_extensions.py \
> $(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_extensions.py \
> --xml $(vulkan_api_xml) \
> --xml $(vk_android_native_buffer_xml) \
> +   --xml $(vk_mesa_query_timestamp_xml) \
> --out $@
>  
>  vk_format_table.c: vk_format_table.py \
> diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
> index 0b92a1763a1..34f578476c0 100644
> --- a/src/amd/vulkan/meson.build
> +++ b/src/amd/vulkan/meson.build
> @@ -20,10 +20,10 @@
>  
>  radv_entrypoints = custom_target(
>'radv_entrypoints.[ch]',
> -  input : ['radv_entrypoints_gen.py', vk_api_xml],
> +  input : ['radv_entrypoints_gen.py', vk_api_xml, 
> vk_android_native_buffer_xml, vk_mesa_query_timestamp_xml],

some of these lines look a little long, 
input : [
'radv_entrypoints_gen.py', vk_api_xml, vk_android_native_buffer_xml,
vk_mesa_query_timestamp_xml,
],

>output : ['radv_entrypoints.h', 'radv_entrypoints.c'],
>command : [
> -prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--outdir',
> +prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--xml', '@INPUT2@', 
> '--xml', '@INPUT3@', '--outdir',
>  meson.current_build_dir()
>],
>depend_files : files('radv_extensions.py'),
> @@ -31,10 +31,10 @@ radv_entrypoints = custom_target(
>  
>  radv_extensions_c = custom_target(
>'radv_extensions.c',
> -  input : ['radv_extensions.py', vk_api_xml, vk_android_native_buffer_xml],
> +  input : ['radv_extensions.py', vk_api_xml, 

Re: [Mesa-dev] [PATCH 3/7] vulkan: Add EXT_acquire_xlib_display

[Dylan Baker]

Quoting Keith Packard (2018-02-09 20:45:12)
> This extension adds the ability to borrow an X RandR output for
> temporary use directly by a Vulkan application. For DRM, we use the
> Linux resource leasing mechanism.
> 
> Signed-off-by: Keith Packard 
> ---
>  configure.ac   |  25 ++
>  meson.build|  17 ++
>  meson_options.txt  |   7 +
>  src/amd/vulkan/Makefile.am |   7 +
>  src/amd/vulkan/meson.build |   7 +
>  src/amd/vulkan/radv_extensions.py  |  11 +-
>  src/amd/vulkan/radv_wsi_display.c  |  30 +++
>  src/intel/Makefile.vulkan.am   |   7 +
>  src/intel/vulkan/anv_extensions.py |   1 +
>  src/intel/vulkan/anv_extensions_gen.py |  10 +-
>  src/intel/vulkan/anv_wsi_display.c |  30 +++
>  src/intel/vulkan/meson.build   |   7 +
>  src/vulkan/Makefile.am |   5 +
>  src/vulkan/wsi/meson.build |   7 +
>  src/vulkan/wsi/wsi_common_display.c| 472 
> +
>  src/vulkan/wsi/wsi_common_display.h|  17 ++
>  16 files changed, 650 insertions(+), 10 deletions(-)
> 
> diff --git a/configure.ac b/configure.ac
> index 46318365603..9effd15e8c5 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1547,6 +1547,7 @@ AM_CONDITIONAL(HAVE_APPLEDRI, test "x$enable_dri" = 
> xyes -a "x$dri_platform" = x
>  AM_CONDITIONAL(HAVE_LMSENSORS, test "x$enable_lmsensors" = xyes )
>  AM_CONDITIONAL(HAVE_GALLIUM_EXTRA_HUD, test "x$enable_gallium_extra_hud" = 
> xyes )
>  AM_CONDITIONAL(HAVE_WINDOWSDRI, test "x$enable_dri" = xyes -a 
> "x$dri_platform" = xwindows )
> +AM_CONDITIONAL(HAVE_XLEASE, test "x$have_xlease" = xyes )
>  
>  AC_ARG_ENABLE([shared-glapi],
>  [AS_HELP_STRING([--enable-shared-glapi],
> @@ -1846,6 +1847,11 @@ if test x"$enable_dri3" = xyes; then
>  PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
>  fi
>  
> +if test x"$have_xlease" = xyes; then
> +randr_modules="x11-xcb xcb-randr"
> +PKG_CHECK_MODULES([XCB_RANDR], [$randr_modules])
> +fi
> +
>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
>  AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, echo "$platforms" | grep -q 'wayland')
>  AM_CONDITIONAL(HAVE_PLATFORM_DRM, echo "$platforms" | grep -q 'drm')
> @@ -1853,6 +1859,25 @@ AM_CONDITIONAL(HAVE_PLATFORM_DISPLAY, echo 
> "$platforms" | grep -q 'drm')
>  AM_CONDITIONAL(HAVE_PLATFORM_SURFACELESS, echo "$platforms" | grep -q 
> 'surfaceless')
>  AM_CONDITIONAL(HAVE_PLATFORM_ANDROID, echo "$platforms" | grep -q 'android')
>  
> +AC_ARG_ENABLE(xlib-lease,
> +[AS_HELP_STRING([--enable-xlib-lease]
> +[enable VK_acquire_xlib_display using X leases])],
> +[enable_xlib_lease=$enableval], [enable_xlib_lease=auto])
> +case "x$enable_xlib_lease" in
> +xyes)
> +;;
> +xno)
> +;;
> +*)
> +if echo "$platforms" | grep -q 'x11' && echo "$platforms" | grep -q 
> 'drm';
> +enable_xlib_lease=yes
> +else
> +enable_xlib_lease=no
> +fi
> +esac
> +
> +AM_CONDITIONAL(HAVE_XLIB_LEASE, test "x$enable_xlib_lease" = xyes)
> +
>  dnl
>  dnl More DRI setup
>  dnl
> diff --git a/meson.build b/meson.build
> index aeb7f5e2917..595b0f66cd7 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -262,6 +262,19 @@ if _platforms != ''
>egl_native_platform = _split[0]
>  endif
>  
> +with_xlib_lease = get_option('xlib-lease')
> +if with_xlib_lease == 'auto'
> +  if with_platform_x11 and with_platform_display
> +with_xlib_lease = true
> +  else
> +with_xlib_lease = false
> +  endif

You could simplify this to
with_xlib_lease = with_platform_x11 and with_platform_display

> +elif with_xlib_lease == 'true'

We should probably error here if we don't have the correct platforms.

> +  with_xlib_lease = true
> +else
> +  with_xlib_lease = false
> +endif
> +
>  with_glx = get_option('glx')
>  if with_glx == 'auto'
>if with_dri
> @@ -1151,6 +1164,7 @@ dep_xcb_present = []
>  dep_xcb_sync = []
>  dep_xcb_xfixes = []
>  dep_xshmfence = []
> +dep_xcb_xrandr = []
>  if with_platform_x11
>if with_glx == 'xlib' or with_glx == 'gallium-xlib'
>  dep_x11 = dependency('x11')
> @@ -1190,6 +1204,9 @@ if with_platform_x11
>if with_egl
>  dep_xcb_xfixes = dependency('xcb-xfixes')
>endif
> +  if with_xlib_lease
> +dep_xcb_xrandr = dependency('xcb-randr', version : '>= 1.12')
> +  endif
>  endif
>  
>  if get_option('gallium-extra-hud')
> diff --git a/meson_options.txt b/meson_options.txt
> index 7fafe2deaac..d38c9aa6149 100644
> --- a/meson_options.txt
> +++ b/meson_options.txt
> @@ -286,3 +286,10 @@ option(
>value : '',
>description : 'Comma delimited list of tools to build. choices : 
> freedreno,glsl,intel,nir,nouveau or all'
>  )
> +option(
> +  'xlib-lease',
> +  type : 'combo',
> +  value : 'auto',
> +  choices : ['auto', 'true', 'false'],
> +  description : 'Enable VK_EXT_acquire_xlib_display.'
> +)
> diff --git 

Re: [Mesa-dev] [PATCH 1/7] vulkan: Add KHR_display extension to anv and radv using DRM

[Keith Packard]

Emil Velikov  writes:

> A few top level comments:

Thanks much for looking over this code. I realize it's a large amount of
change and hence more work to review.

>  - using card/primary node and (missing) authentication
> Current code opens the primary node when VK_KHR_display is available.
> Thus running a platform=drm,x11,wayland build will fail, as the client
> is not authenticated with the X/WL server.

this is really mostly there to make it easy to test the KHR_display
backend without needing any further code. I added this only recently for
this purpose. I'm not sure how we should be selecting for opening the
primary device; perhaps another extension that adds a block in the pNext
chain to look for?

I don't know if you saw the first version of this series, but I had
specified a new extension which provided the device FD from the
application, letting you pass in whatever you could open (including a
leased FD from X or a primary opened from the application). That seems
like it could use some design ideas so we can make this do what we
want.

One option would be to remove the primary device code from the drivers
once the leasing code is added so that the only way to use KHR_display
is by leasing resources from the window system?

The radv driver goes a bit further and checks with the kernel to see if
rendering will work. For anv, the ioctls necessary for drawing are
permitting on a non-authenticated node. Both drivers work fine for
direct and X as-is, but I'm not very happy with having a random app with
the primary device open as that seems like a mistake waiting to happen.

>  - reuse "drm" as a shorthand for the "display"
> We've been using drm for egl/gbm, va/drm, etc, one less platform plus
> no equivalent in either of egl/va/...

Yeah, anything that supports drm can support display. I'll review the
build process and try to simplify it further.

>  - remove conditional compilation based on library version/features.
> Eg. checks like the following should be avoided.
> #if DRM_EVENT_CONTEXT_VERSION

Should I just have the build depend on a recent enough version of the library?

>  - use drmModeAddFB2 (or the withModifiers version even) over drmModeAddFB
> Might help with the XXX just above it ;-)

It won't help with that -- I just need more information from the
driver. However, that information could come back as a format instead of
depth/bpp, which would mean using drmModeAddFB2 instead of
drmModeAddFB. Thanks for reminding me of this XXX.  wsi_create_*_image
gets a VkSwapchainCreateInfoKHR which has a VkFormat inside. Is that
sufficient to compute a fourcc format for AddFB2? I think I could
probably guess depth/bpp from it and be right most of the time?

>  - the spec says we're at VK_KHR_display rev 21, while the code advertises 
> rev1
> Extension('VK_KHR_display',   1,
> 'VK_USE_PLATFORM_DISPLAY_KHR'),

Thanks. The version of the spec I've got (1.0.49) says it's already at
rev 23!

>  - there are plenty of unnecessary of headers #include(d)

As is often the case. I can go trim things down.

>  - we could simplify the ifdef spaghetti by making
> wsi_*_{init,finish}_wsi empty stubs
> Definitely something that can be done, independently of your work.

That would be lovely.

-- 
-keith


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Re: [Mesa-dev] [PATCH 04/13] mesa: decrease the array size of ctx->Texture.FixedFuncUnit to 8

[Brian Paul]

Minor nits below.

Otherwise, for the series, Reviewed-by: Brian Paul 


On 02/08/2018 06:18 PM, Marek Olšák wrote:

From: Marek Olšák 

GL allows doing glTexEnv on 192 texture units, while in reality,
only MaxTextureCoordUnits units are used by fixed-func shaders.

There is a piglit patch that adjusts piglits/texunits to check only
MaxTextureCoordUnits units.
---
  src/mesa/main/enable.c   |  5 +
  src/mesa/main/mtypes.h   |  2 +-
  src/mesa/main/texenv.c   | 27 +++
  src/mesa/main/texstate.c |  2 +-
  src/mesa/main/texstate.h |  3 +++
  5 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c
index 4c5f9dc..f811ab5 100644
--- a/src/mesa/main/enable.c
+++ b/src/mesa/main/enable.c
@@ -202,20 +202,22 @@ get_texcoord_unit(struct gl_context *ctx)
  /**
   * Helper function to enable or disable a texture target.
   * \param bit  one of the TEXTURE_x_BIT values
   * \return GL_TRUE if state is changing or GL_FALSE if no change
   */
  static GLboolean
  enable_texture(struct gl_context *ctx, GLboolean state, GLbitfield texBit)
  {
 struct gl_fixedfunc_texture_unit *texUnit =
_mesa_get_current_fixedfunc_tex_unit(ctx);
+   if (!texUnit)
+  return false;


return GL_FALSE since the return type is GLboolean.  Or change the 
function to use bool/true/false.


  
 const GLbitfield newenabled = state

? (texUnit->Enabled | texBit) : (texUnit->Enabled & ~texBit);
  
 if (texUnit->Enabled == newenabled)

 return GL_FALSE;
  
 FLUSH_VERTICES(ctx, _NEW_TEXTURE_STATE);

 texUnit->Enabled = newenabled;
 return GL_TRUE;
@@ -1286,20 +1288,23 @@ _mesa_IsEnabledi( GLenum cap, GLuint index )
  
  /**

   * Helper function to determine whether a texture target is enabled.
   */
  static GLboolean
  is_texture_enabled(struct gl_context *ctx, GLbitfield bit)
  {
 const struct gl_fixedfunc_texture_unit *const texUnit =
_mesa_get_current_fixedfunc_tex_unit(ctx);
  
+   if (!texUnit)

+  return false;


again.


+
 return (texUnit->Enabled & bit) ? GL_TRUE : GL_FALSE;
  }
  
  
  /**

   * Return simple enable/disable state.
   *
   * \param cap  state variable to query.
   *
   * Returns the state of the specified capability from the current GL context.
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 562fb17..3a4fdb5 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -1363,21 +1363,21 @@ struct gl_texture_attrib
 /** Bitwise-OR of all Texture.Unit[i]._GenFlags */
 GLbitfield _GenFlags;
  
 /** Largest index of a texture unit with _Current != NULL. */

 GLint _MaxEnabledTexImageUnit;
  
 /** Largest index + 1 of texture units that have had any CurrentTex set. */

 GLint NumCurrentTexUsed;
  
 struct gl_texture_unit Unit[MAX_COMBINED_TEXTURE_IMAGE_UNITS];

-   struct gl_fixedfunc_texture_unit 
FixedFuncUnit[MAX_COMBINED_TEXTURE_IMAGE_UNITS];
+   struct gl_fixedfunc_texture_unit FixedFuncUnit[MAX_TEXTURE_COORD_UNITS];
  };
  
  
  /**

   * Data structure representing a single clip plane (e.g. one of the elements
   * of the ctx->Transform.EyeUserPlane or ctx->Transform._ClipUserPlane array).
   */
  typedef GLfloat gl_clip_plane[4];
  
  
diff --git a/src/mesa/main/texenv.c b/src/mesa/main/texenv.c

index 9018ce9..22fc8da 100644
--- a/src/mesa/main/texenv.c
+++ b/src/mesa/main/texenv.c
@@ -393,20 +393,29 @@ _mesa_TexEnvfv( GLenum target, GLenum pname, const 
GLfloat *param )
? ctx->Const.MaxTextureCoordUnits : 
ctx->Const.MaxCombinedTextureImageUnits;
 if (ctx->Texture.CurrentUnit >= maxUnit) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glTexEnvfv(current unit)");
return;
 }
  
 if (target == GL_TEXTURE_ENV) {

struct gl_fixedfunc_texture_unit *texUnit =
   _mesa_get_current_fixedfunc_tex_unit(ctx);
  
+  /* The GL spec says that we should report an error if the unit is greater

+   * than GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS, but in practice, only
+   * fixed-function units are usable. This is probably a spec bug.
+   * Ignore glTexEnv(GL_TEXTURE_ENV) calls for non-fixed-func units,
+   * because we don't want to process calls that have no effect.
+   */
+  if (!texUnit)
+ return;
+
switch (pname) {
case GL_TEXTURE_ENV_MODE:
   set_env_mode(ctx, texUnit, (GLenum) iparam0);
   break;
case GL_TEXTURE_ENV_COLOR:
   set_env_color(ctx, texUnit, param);
   break;
case GL_COMBINE_RGB:
case GL_COMBINE_ALPHA:
   set_combiner_mode(ctx, texUnit, pname, (GLenum) iparam0);
@@ -642,20 +651,29 @@ _mesa_GetTexEnvfv( GLenum target, GLenum pname, GLfloat 
*params )
? ctx->Const.MaxTextureCoordUnits : 
ctx->Const.MaxCombinedTextureImageUnits;
 if (ctx->Texture.CurrentUnit >= maxUnit) {
_mesa_error(ctx, 

[Mesa-dev] [PATCH] ac/nir_to_llvm: fix image size for arrays of arrays

[Timothy Arceri]

Fixes cts test:
KHR-GL44.shader_image_size.advanced-changeSize
---
 src/amd/common/ac_nir_to_llvm.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 15402694fc..c0a0da1656 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3801,12 +3801,10 @@ static LLVMValueRef visit_image_size(struct 
ac_nir_context *ctx,
 {
LLVMValueRef res;
const nir_variable *var = instr->variables[0]->var;
-   const struct glsl_type *type = instr->variables[0]->var->type;
-   bool da = glsl_sampler_type_is_array(var->type) ||
- glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE ||
- glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_3D;
-   if(instr->variables[0]->deref.child)
-   type = instr->variables[0]->deref.child->type;
+   const struct glsl_type *type = glsl_without_array(var->type);
+   bool da = glsl_sampler_type_is_array(type) ||
+ glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE ||
+ glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_3D;
 
if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
return get_buffer_size(ctx,
-- 
2.14.3

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Re: [Mesa-dev] [PATCH] anv: Don't resolve or ambiguate non-existent layers

[Nanley Chery]

On Mon, Feb 12, 2018 at 01:41:44PM -0800, Jason Ekstrand wrote:
> The previous code was trying to avoid non-existent layers by taking a
> MAX with anv_image_aux_layers.  Unfortunately, it wasn't taking into
  ^
MIN

With that fixed, this patch is
Reviewed-by: Nanley Chery 

> account that layer_count starts at base_layer which may not be zero.
> Instead, we need to subtract base_layer from anv_image_aux_layers with
> a guard against roll-over.
> 
> Cc: Nanley Chery 
> Fixes: de3be6180169f9 "anv/cmd_buffer: Rework aux tracking"
> ---
>  src/intel/vulkan/genX_cmd_buffer.c | 12 ++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
> b/src/intel/vulkan/genX_cmd_buffer.c
> index 9a2ffb4..99854eb 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -931,8 +931,12 @@ transition_color_buffer(struct anv_cmd_buffer 
> *cmd_buffer,
>if (image->samples == 1) {
>   for (uint32_t l = 0; l < level_count; l++) {
>  const uint32_t level = base_level + l;
> +
> +uint32_t aux_layers = anv_image_aux_layers(image, aspect, level);
> +if (base_layer >= aux_layers)
> +   break; /* We will only get fewer layers as level increases */
>  uint32_t level_layer_count =
> -   MIN2(layer_count, anv_image_aux_layers(image, aspect, level));
> +   MIN2(layer_count, aux_layers - base_layer);
>  
>  anv_image_ccs_op(cmd_buffer, image, aspect, level,
>   base_layer, level_layer_count,
> @@ -1020,8 +1024,12 @@ transition_color_buffer(struct anv_cmd_buffer 
> *cmd_buffer,
>  
> for (uint32_t l = 0; l < level_count; l++) {
>uint32_t level = base_level + l;
> +
> +  uint32_t aux_layers = anv_image_aux_layers(image, aspect, level);
> +  if (base_layer >= aux_layers)
> + break; /* We will only get fewer layers as level increases */
>uint32_t level_layer_count =
> - MIN2(layer_count, anv_image_aux_layers(image, aspect, level));
> + MIN2(layer_count, aux_layers - base_layer);
>  
>for (uint32_t a = 0; a < level_layer_count; a++) {
>   uint32_t array_layer = base_layer + a;
> -- 
> 2.5.0.400.gff86faf
> 
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[Mesa-dev] [PATCH] radeonsi/nir: fix shader ballot return value bitsize

[Timothy Arceri]

Fixes cts test:
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot
---
 src/gallium/drivers/radeonsi/si_shader_nir.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c 
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 39fb8ece25..b46c7dca86 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -639,7 +639,7 @@ si_lower_nir(struct si_shader_selector* sel)
 
const nir_lower_subgroups_options subgroups_options = {
.subgroup_size = 64,
-   .ballot_bit_size = 32,
+   .ballot_bit_size = 64,
.lower_to_scalar = true,
.lower_subgroup_masks = true,
.lower_vote_trivial = false,
-- 
2.14.3

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[Mesa-dev] [PATCH] virgl: fix caps ioctl size check.

[Dave Airlie]

From: Dave Airlie 

The size check seems backwards, if userspace gives us a size
larger it is probably asking for a newer version of the caps,
so we just fill in the caps version we have at the smaller
size, and it can work it out from there.

Userspace will probably still need a fallback as old
kernel are out there.

Cc: 
Signed-off-by: Dave Airlie 
---
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c 
b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index 5720a0d4ac0a..5d5f79508100 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -497,7 +497,7 @@ static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
}
 
size = vgdev->capsets[found_valid].max_size;
-   if (args->size > size) {
+   if (size > args->size) {
spin_unlock(>display_info_lock);
return -EINVAL;
}
-- 
2.14.3

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Re: [Mesa-dev] [PATCH] Move setting current_pipeline to cmd_state_init

[Lionel Landwerlin]

I guess the default context setup in the kernel is very 3D friendly.

Reviewed-by: Lionel Landwerlin 

On 12/02/18 21:42, Jason Ekstrand wrote:

We were setting current_pipeline to UINT32_MAX and then calling
cmd_cmd_state_reset which memsets the entire state struct to 0 which
implicitly resets current_pipeline to 3D.  I have no idea how this
hasn't caused everything to explode.

Fixes: cd3feea74582 "anv/cmd_buffer: Rework anv_cmd_state_reset"
cc: mesa-sta...@lists.freedesktop.org
---
  src/intel/vulkan/anv_cmd_buffer.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index 6980281..160ff53 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -119,6 +119,7 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
  
 memset(state, 0, sizeof(*state));
  
+   state->current_pipeline = UINT32_MAX;

 state->restart_index = UINT32_MAX;
 state->gfx.dynamic = default_dynamic_state;
  }
@@ -292,7 +293,6 @@ VkResult
  anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
  {
 cmd_buffer->usage_flags = 0;
-   cmd_buffer->state.current_pipeline = UINT32_MAX;
 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
 anv_cmd_state_reset(cmd_buffer);
  



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Re: [Mesa-dev] [PATCH 1/7] vulkan: Add KHR_display extension to anv and radv using DRM

[Keith Packard]

Eric Engestrom  writes:

> copy/paste error: s/drm/display/

That's actually intentional -- any system which supports 'drm' can
support the display backend as it's based on that. Maybe it should use a
different test? (note that I haven't been using the autotools backend
recently, so it may not be great at this point. At least my current tree
builds?)

>> +if with_platform_display
>> +  radv_flags += [
>> +'-DVK_USE_PLATFORM_DISPLAY_KHR',
>> +  ]
>
> Nit: this can be a simple
>   radv_flags += '-DVK_USE_PLATFORM_DISPLAY_KHR'
>
>> +if with_platform_display
>> +  vulkan_wsi_args += [
>> +'-DVK_USE_PLATFORM_DISPLAY_KHR',
>> +  ]
>
> Ditto:
>   vulkan_wsi_args += '-DVK_USE_PLATFORM_DISPLAY_KHR'


Oh, good point -- I'd split out the RANDR and DISPLAY bits but didn't
simplify the meson stuff.

> Nit: src/amd/vulkan/ uses tabs for indent, you used spaces.

Thanks; I'll reconfigure my environment so that it uses tabs in that
directory, and re-indent the changes.

>> +#define MM_PER_PIXEL (1.0/96.0 * 25.4)
>
> unused

Good catch; those got left in both anv and radv directories after some
refactoring.

>> +#if 0
>
> `#if DEBUG` maybe?

Could do; I could also just strip out the printf debugging, but when
you're doing timing-sensitive stuff at that level, printf debugging is
pretty useful.

>> +#define wsi_display_debug(...) fprintf(stderr, __VA_ARGS__)
>> +#define wsi_display_debug_code(...) __VA_ARGS__
>
> that 2nd one is unused

It gets used in a later patch.

>> +   if (wsi) {
>
> if (!wsi) return;
> and carry on without the extra indent

Yeah, would probably look cleaner.

> I don't know enough for this to be an actual review though, but the rest
> of this file looks reasonable to me :)

Thanks for reviewing the basic formatting and structure though; I
totally missed the tabs/spaces issue.

-- 
-keith


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Re: [Mesa-dev] [PATCH] gallium: drop all the guard band float caps.

[Roland Scheidegger]

Looks alright to me. Not sure why they were introduced - d3d9 has
queryable caps for them (d3d10 does not, allows guard band but not
required). Maybe they were relevant for d3d9 software vertex processing
mode at some point, but it looks like we never actually used them with
gallium.
Reviewed-by: Roland Scheidegger 

Am 12.02.2018 um 20:32 schrieb Dave Airlie:
> From: Dave Airlie 
> 
> Nobody queries these and nobody sets them to anything useful,
> the docs say TODO.
> 
> Drop them until a use appears.
> 
> Signed-off-by: Dave Airlie 
> ---
>  src/gallium/docs/source/screen.rst   | 4 
>  src/gallium/drivers/etnaviv/etnaviv_screen.c | 5 -
>  src/gallium/drivers/freedreno/freedreno_screen.c | 5 -
>  src/gallium/drivers/llvmpipe/lp_screen.c | 5 -
>  src/gallium/drivers/nouveau/nv50/nv50_screen.c   | 6 --
>  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c   | 6 --
>  src/gallium/drivers/r300/r300_screen.c   | 5 -
>  src/gallium/drivers/r600/r600_pipe_common.c  | 5 -
>  src/gallium/drivers/radeonsi/si_get.c| 5 -
>  src/gallium/drivers/softpipe/sp_screen.c | 5 -
>  src/gallium/drivers/svga/svga_screen.c   | 5 -
>  src/gallium/drivers/swr/swr_screen.cpp   | 5 -
>  src/gallium/drivers/vc4/vc4_screen.c | 5 -
>  src/gallium/drivers/vc5/vc5_screen.c | 5 -
>  src/gallium/drivers/virgl/virgl_screen.c | 5 -
>  src/gallium/include/pipe/p_defines.h | 4 
>  16 files changed, 80 deletions(-)
> 
> diff --git a/src/gallium/docs/source/screen.rst 
> b/src/gallium/docs/source/screen.rst
> index cb3418fce35..95b62534493 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -431,10 +431,6 @@ The floating-point capabilities are:
>applied to anisotropically filtered textures.
>  * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may 
> be applied
>to filtered textures.
> -* ``PIPE_CAPF_GUARD_BAND_LEFT``,
> -  ``PIPE_CAPF_GUARD_BAND_TOP``,
> -  ``PIPE_CAPF_GUARD_BAND_RIGHT``,
> -  ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
>  
>  
>  .. _pipe_shader_cap:
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c 
> b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> index d5d1f4fdad2..16b58d3f03f 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> @@ -367,11 +367,6 @@ etna_screen_get_paramf(struct pipe_screen *pscreen, enum 
> pipe_capf param)
>return 16.0f;
> case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
>return util_last_bit(screen->specs.max_texture_size);
> -   case PIPE_CAPF_GUARD_BAND_LEFT:
> -   case PIPE_CAPF_GUARD_BAND_TOP:
> -   case PIPE_CAPF_GUARD_BAND_RIGHT:
> -   case PIPE_CAPF_GUARD_BAND_BOTTOM:
> -  return 0.0f;
> }
>  
> debug_printf("unknown paramf %d", param);
> diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
> b/src/gallium/drivers/freedreno/freedreno_screen.c
> index 438817d0034..eb5c436e109 100644
> --- a/src/gallium/drivers/freedreno/freedreno_screen.c
> +++ b/src/gallium/drivers/freedreno/freedreno_screen.c
> @@ -476,11 +476,6 @@ fd_screen_get_paramf(struct pipe_screen *pscreen, enum 
> pipe_capf param)
>   return 16.0f;
>   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
>   return 15.0f;
> - case PIPE_CAPF_GUARD_BAND_LEFT:
> - case PIPE_CAPF_GUARD_BAND_TOP:
> - case PIPE_CAPF_GUARD_BAND_RIGHT:
> - case PIPE_CAPF_GUARD_BAND_BOTTOM:
> - return 0.0f;
>   }
>   debug_printf("unknown paramf %d\n", param);
>   return 0;
> diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c 
> b/src/gallium/drivers/llvmpipe/lp_screen.c
> index b46ea06775d..439e15bc1a7 100644
> --- a/src/gallium/drivers/llvmpipe/lp_screen.c
> +++ b/src/gallium/drivers/llvmpipe/lp_screen.c
> @@ -420,11 +420,6 @@ llvmpipe_get_paramf(struct pipe_screen *screen, enum 
> pipe_capf param)
>return 16.0; /* not actually signficant at this time */
> case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
>return 16.0; /* arbitrary */
> -   case PIPE_CAPF_GUARD_BAND_LEFT:
> -   case PIPE_CAPF_GUARD_BAND_TOP:
> -   case PIPE_CAPF_GUARD_BAND_RIGHT:
> -   case PIPE_CAPF_GUARD_BAND_BOTTOM:
> -  return 0.0;
> }
> /* should only get here on unhandled cases */
> debug_printf("Unexpected PIPE_CAP %d query\n", param);
> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c 
> b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> index 4c13d04eb75..5c006e6be75 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> @@ -396,12 +396,6 @@ nv50_screen_get_paramf(struct pipe_screen *pscreen, enum 
> pipe_capf param)
>return 16.0f;
> case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
>return 4.0f;
> -   case 

Re: [Mesa-dev] [PATCH 08/17] loader: Fix compiler warnings about truncating the PCI ID path.

[Ian Romanick]

On 02/10/2018 08:33 AM, Eric Anholt wrote:
> My build was producing:
> 
> ../src/loader/loader.c:121:67: warning: ‘%1u’ directive output may be 
> truncated writing between 1 and 3 bytes into a region of size 2 
> [-Wformat-truncation=]
> 
> and we can avoid this careful calculation by just using asprintf (as we do
> elsewhere in the file).
> 
> Cc: Eric Engestrom 
> ---
>  src/loader/loader.c | 15 +++
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/src/loader/loader.c b/src/loader/loader.c
> index 913b3dcac032..92b4c5204b19 100644
> --- a/src/loader/loader.c
> +++ b/src/loader/loader.c
> @@ -110,17 +110,16 @@ static char *loader_get_dri_config_device_id(void)
>  
>  static char *drm_construct_id_path_tag(drmDevicePtr device)
>  {
> -#define PCI_ID_PATH_TAG_LENGTH sizeof("pci-_xx_xx_x")
> char *tag = NULL;
>  
> if (device->bustype == DRM_BUS_PCI) {
> -tag = calloc(PCI_ID_PATH_TAG_LENGTH, sizeof(char));
> -if (tag == NULL)
> -return NULL;
> -
> -snprintf(tag, PCI_ID_PATH_TAG_LENGTH, "pci-%04x_%02x_%02x_%1u",
> - device->businfo.pci->domain, device->businfo.pci->bus,
> - device->businfo.pci->dev, device->businfo.pci->func);
> +  if (asprintf(, "pci-%04x_%02x_%02x_%1u",
> +   device->businfo.pci->domain,
> +   device->businfo.pci->bus,
> +   device->businfo.pci->dev,
> +   device->businfo.pci->func) < 0) {
> + return NULL;

Won't tag be NULL on failure?  Then you could just

  asprintf(, "pci-%04x_%02x_%02x_%1u",
   device->businfo.pci->domain,
   device->businfo.pci->bus,
   device->businfo.pci->dev,
   device->businfo.pci->func);
  return tag;

> +  }
> }
> return tag;
>  }
> 

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Re: [Mesa-dev] [PATCH 09/17] spirv: Silence compiler warning about undefined srcs[0]

[Ian Romanick]

On 02/10/2018 08:33 AM, Eric Anholt wrote:
> It doesn't know that elems >= 1.

Does adding assume(elems >= 1) help?

> Cc: Jason Ekstrand 
> ---
>  src/compiler/spirv/spirv_to_nir.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/compiler/spirv/spirv_to_nir.c 
> b/src/compiler/spirv/spirv_to_nir.c
> index c6df764682ec..f86d45511df8 100644
> --- a/src/compiler/spirv/spirv_to_nir.c
> +++ b/src/compiler/spirv/spirv_to_nir.c
> @@ -2923,7 +2923,7 @@ vtn_handle_composite(struct vtn_builder *b, SpvOp 
> opcode,
> case SpvOpCompositeConstruct: {
>unsigned elems = count - 3;
>if (glsl_type_is_vector_or_scalar(type)) {
> - nir_ssa_def *srcs[4];
> + nir_ssa_def *srcs[4] = { NULL };
>   for (unsigned i = 0; i < elems; i++)
>  srcs[i] = vtn_ssa_value(b, w[3 + i])->def;
>   val->ssa->def =
> 

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[Mesa-dev] [PATCH] Move setting current_pipeline to cmd_state_init

[Jason Ekstrand]

We were setting current_pipeline to UINT32_MAX and then calling
cmd_cmd_state_reset which memsets the entire state struct to 0 which
implicitly resets current_pipeline to 3D.  I have no idea how this
hasn't caused everything to explode.

Fixes: cd3feea74582 "anv/cmd_buffer: Rework anv_cmd_state_reset"
cc: mesa-sta...@lists.freedesktop.org
---
 src/intel/vulkan/anv_cmd_buffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index 6980281..160ff53 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -119,6 +119,7 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
 
memset(state, 0, sizeof(*state));
 
+   state->current_pipeline = UINT32_MAX;
state->restart_index = UINT32_MAX;
state->gfx.dynamic = default_dynamic_state;
 }
@@ -292,7 +293,6 @@ VkResult
 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
 {
cmd_buffer->usage_flags = 0;
-   cmd_buffer->state.current_pipeline = UINT32_MAX;
anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
anv_cmd_state_reset(cmd_buffer);
 
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH] anv: Don't resolve or ambiguate non-existent layers

[Jason Ekstrand]

The previous code was trying to avoid non-existent layers by taking a
MAX with anv_image_aux_layers.  Unfortunately, it wasn't taking into
account that layer_count starts at base_layer which may not be zero.
Instead, we need to subtract base_layer from anv_image_aux_layers with
a guard against roll-over.

Cc: Nanley Chery 
Fixes: de3be6180169f9 "anv/cmd_buffer: Rework aux tracking"
---
 src/intel/vulkan/genX_cmd_buffer.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index 9a2ffb4..99854eb 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -931,8 +931,12 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
   if (image->samples == 1) {
  for (uint32_t l = 0; l < level_count; l++) {
 const uint32_t level = base_level + l;
+
+uint32_t aux_layers = anv_image_aux_layers(image, aspect, level);
+if (base_layer >= aux_layers)
+   break; /* We will only get fewer layers as level increases */
 uint32_t level_layer_count =
-   MIN2(layer_count, anv_image_aux_layers(image, aspect, level));
+   MIN2(layer_count, aux_layers - base_layer);
 
 anv_image_ccs_op(cmd_buffer, image, aspect, level,
  base_layer, level_layer_count,
@@ -1020,8 +1024,12 @@ transition_color_buffer(struct anv_cmd_buffer 
*cmd_buffer,
 
for (uint32_t l = 0; l < level_count; l++) {
   uint32_t level = base_level + l;
+
+  uint32_t aux_layers = anv_image_aux_layers(image, aspect, level);
+  if (base_layer >= aux_layers)
+ break; /* We will only get fewer layers as level increases */
   uint32_t level_layer_count =
- MIN2(layer_count, anv_image_aux_layers(image, aspect, level));
+ MIN2(layer_count, aux_layers - base_layer);
 
   for (uint32_t a = 0; a < level_layer_count; a++) {
  uint32_t array_layer = base_layer + a;
-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH] meson: use a custom target instead of a generator for i965 oa

[Lionel Landwerlin]

I ran into the same issue with gputop.

Acked-by: Lionel Landwerlin 

On 12/02/18 20:00, Dylan Baker wrote:

generators really are never the thing you want. The problem in this case
is that a generator must create a file that contains any file that the
generated target depends on. Since brw_oa.py doesn't generate such a
file the generated sources are not regenerated even if the xml files
they should depend on changes.

While we could change brw_oa.py to write such a file, that's silly, it
depends on itself and the xml file. So we'll just use a custom target
instead, which will have the correct dependency behavior and doesn't
really add that much code.

Fixes: 3218056e0eb3 ("meson: Build i965 and dri stack")
CC: Ian Romanick 
Signed-off-by: Dylan Baker 
---
  src/mesa/drivers/dri/i965/meson.build | 21 ++---
  1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/meson.build 
b/src/mesa/drivers/dri/i965/meson.build
index 9adda06183d..8ce54449002 100644
--- a/src/mesa/drivers/dri/i965/meson.build
+++ b/src/mesa/drivers/dri/i965/meson.build
@@ -148,20 +148,19 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80', 
'90', '100']
)
  endforeach
  
-oa_generator = generator(

-  prog_python2,
-  arguments : [
-'@CURRENT_SOURCE_DIR@/brw_oa.py', '@INPUT@', '--chipset', '@EXTRA_ARGS@',
-'--code', '@OUTPUT0@', '--header', '@OUTPUT1@',
-  ],
-  output : ['@BASENAME@.c', '@BASENAME@.h'],
-)
-
  i965_oa_sources = []
  foreach hw : ['hsw', 'bdw', 'chv', 'sklgt2', 'sklgt3', 'sklgt4', 'bxt',
'kblgt2', 'kblgt3', 'glk', 'cflgt2', 'cflgt3']
-  _xml = 'brw_oa_@0@.xml'.format(hw)
-  i965_oa_sources += oa_generator.process(_xml, extra_args : hw)
+  _name = 'brw_oa_@0@'.format(hw)
+  i965_oa_sources += custom_target(
+_name,
+input : ['brw_oa.py', '@0@.xml'.format(_name)],
+output : ['@0@.c'.format(_name), '@0@.h'.format(_name)],
+command : [
+  prog_python2, '@INPUT0@', '--chipset', hw, '--code', '@OUTPUT0@',
+  '--header', '@OUTPUT1@', '@INPUT1@',
+],
+  )
  endforeach
  
  libi965 = static_library(



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[Mesa-dev] [PATCH] meson: use a custom target instead of a generator for i965 oa

[Dylan Baker]

generators really are never the thing you want. The problem in this case
is that a generator must create a file that contains any file that the
generated target depends on. Since brw_oa.py doesn't generate such a
file the generated sources are not regenerated even if the xml files
they should depend on changes.

While we could change brw_oa.py to write such a file, that's silly, it
depends on itself and the xml file. So we'll just use a custom target
instead, which will have the correct dependency behavior and doesn't
really add that much code.

Fixes: 3218056e0eb3 ("meson: Build i965 and dri stack")
CC: Ian Romanick 
Signed-off-by: Dylan Baker 
---
 src/mesa/drivers/dri/i965/meson.build | 21 ++---
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/meson.build 
b/src/mesa/drivers/dri/i965/meson.build
index 9adda06183d..8ce54449002 100644
--- a/src/mesa/drivers/dri/i965/meson.build
+++ b/src/mesa/drivers/dri/i965/meson.build
@@ -148,20 +148,19 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80', 
'90', '100']
   )
 endforeach
 
-oa_generator = generator(
-  prog_python2,
-  arguments : [
-'@CURRENT_SOURCE_DIR@/brw_oa.py', '@INPUT@', '--chipset', '@EXTRA_ARGS@',
-'--code', '@OUTPUT0@', '--header', '@OUTPUT1@',
-  ],
-  output : ['@BASENAME@.c', '@BASENAME@.h'],
-)
-
 i965_oa_sources = []
 foreach hw : ['hsw', 'bdw', 'chv', 'sklgt2', 'sklgt3', 'sklgt4', 'bxt',
   'kblgt2', 'kblgt3', 'glk', 'cflgt2', 'cflgt3']
-  _xml = 'brw_oa_@0@.xml'.format(hw)
-  i965_oa_sources += oa_generator.process(_xml, extra_args : hw)
+  _name = 'brw_oa_@0@'.format(hw)
+  i965_oa_sources += custom_target(
+_name,
+input : ['brw_oa.py', '@0@.xml'.format(_name)],
+output : ['@0@.c'.format(_name), '@0@.h'.format(_name)],
+command : [
+  prog_python2, '@INPUT0@', '--chipset', hw, '--code', '@OUTPUT0@',
+  '--header', '@OUTPUT1@', '@INPUT1@',
+],
+  )
 endforeach
 
 libi965 = static_library(
-- 
2.16.0

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Re: [Mesa-dev] [PATCH 07/17] glsl: Silence warnings in the uniform initializer test about 16-bit types

[Ian Romanick]

Shutting up this warning has been (fairly low) on my to-do list for some
time now... thanks for beating me to it. :)

Reviewed-by: Ian Romanick 

On 02/10/2018 08:33 AM, Eric Anholt wrote:
> They should probably get unit tests implemented, but this cleans up a
> bunch of warnings in my build for now.
> 
> Fixes: 59f458cd8703 ("glsl: Add 16-bit types")
> Cc: Eduardo Lima Mitev 
> ---
>  src/compiler/glsl/tests/uniform_initializer_utils.cpp | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/src/compiler/glsl/tests/uniform_initializer_utils.cpp 
> b/src/compiler/glsl/tests/uniform_initializer_utils.cpp
> index c5502b632697..701c8ef4d091 100644
> --- a/src/compiler/glsl/tests/uniform_initializer_utils.cpp
> +++ b/src/compiler/glsl/tests/uniform_initializer_utils.cpp
> @@ -110,6 +110,9 @@ generate_data_element(void *mem_ctx, const glsl_type 
> *type,
>case GLSL_TYPE_INTERFACE:
>case GLSL_TYPE_SUBROUTINE:
>case GLSL_TYPE_FUNCTION:
> +  case GLSL_TYPE_FLOAT16:
> +  case GLSL_TYPE_UINT16:
> +  case GLSL_TYPE_INT16:
>ASSERT_TRUE(false);
>break;
>}
> @@ -150,6 +153,9 @@ generate_data_element(void *mem_ctx, const glsl_type 
> *type,
>case GLSL_TYPE_INTERFACE:
>case GLSL_TYPE_SUBROUTINE:
>case GLSL_TYPE_FUNCTION:
> +  case GLSL_TYPE_FLOAT16:
> +  case GLSL_TYPE_UINT16:
> +  case GLSL_TYPE_INT16:
>ASSERT_TRUE(false);
>break;
>}
> @@ -262,6 +268,9 @@ verify_data(gl_constant_value *storage, unsigned 
> storage_array_size,
>case GLSL_TYPE_INTERFACE:
>case GLSL_TYPE_SUBROUTINE:
>   case GLSL_TYPE_FUNCTION:
> + case GLSL_TYPE_FLOAT16:
> + case GLSL_TYPE_UINT16:
> + case GLSL_TYPE_INT16:
>   ASSERT_TRUE(false);
>   break;
>}
> 

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Re: [Mesa-dev] [PATCH 11/17] glsl/tests: Fix a compiler warning about signed/unsigned loop comparison.

[Ian Romanick]

Reviewed-by: Ian Romanick 

On 02/10/2018 08:33 AM, Eric Anholt wrote:
> Cc: Ian Romanick 
> Fixes: d32956935edf ("glsl: Walk a list of ir_dereference_array to mark array 
> elements as accessed")
> ---
>  src/compiler/glsl/tests/array_refcount_test.cpp | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/compiler/glsl/tests/array_refcount_test.cpp 
> b/src/compiler/glsl/tests/array_refcount_test.cpp
> index ecd7f46900b8..0d8f4521caed 100644
> --- a/src/compiler/glsl/tests/array_refcount_test.cpp
> +++ b/src/compiler/glsl/tests/array_refcount_test.cpp
> @@ -628,7 +628,7 @@ TEST_F(array_refcount_test, visit_array_indexing_an_array)
>  
> ir_array_refcount_entry *const entry_c = v.get_variable_entry(var_c);
>  
> -   for (unsigned i = 0; i < var_c->type->array_size(); i++) {
> +   for (int i = 0; i < var_c->type->array_size(); i++) {
>EXPECT_EQ(true, entry_c->is_linearized_index_referenced(i)) <<
>   "array c, i = " << i;
> }
> 

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Re: [Mesa-dev] [PATCH 17/17] glsl: Suppress sign-compare warning generated by flex 2.6.1.

[Ian Romanick]

Supposedly later versions of flex fix this... or so I heard.

On 02/10/2018 08:33 AM, Eric Anholt wrote:
> I got the following warning:
> 
> src/compiler/glsl/glsl_lexer.cpp:1521:18: warning: comparison between signed 
> and unsigned integer expressions [-Wsign-compare]
>for ( n = 0; n < max_size && \
> src/compiler/glsl/glsl_lexer.cpp:3448:3: note: in expansion of macro 
> ‘YY_INPUT’
>YY_INPUT( (_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
>^~~~
> 
> and it doesn't look like something from our code.  Just silence it.
> ---
>  src/compiler/glsl/meson.build | 11 +--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/src/compiler/glsl/meson.build b/src/compiler/glsl/meson.build
> index 26ab4f1c8d3a..12bf545132fd 100644
> --- a/src/compiler/glsl/meson.build
> +++ b/src/compiler/glsl/meson.build
> @@ -199,13 +199,20 @@ files_libglsl_standalone = files(
>'standalone.h',
>  )
>  
> +# flex 2.6.1 generates code with sign-compare warnings
> +glsl_lexer_warnings_suppressed = static_library('glsl-lexer',
> +  glsl_lexer_cpp,
> +  cpp_args : [cpp_vis_args, cpp_msvc_compat_args, '-Wno-sign-compare'],
> +  include_directories : [inc_common, inc_compiler, inc_nir],
> +)
> +
>  libglsl = static_library(
>'glsl',
> -  [files_libglsl, glsl_parser, glsl_lexer_cpp, ir_expression_operation_h,
> +  [files_libglsl, glsl_parser, ir_expression_operation_h,
> ir_expression_operation_strings_h, ir_expression_operation_constant_h],
>c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
>cpp_args : [cpp_vis_args, cpp_msvc_compat_args],
> -  link_with : libglcpp,
> +  link_with : [libglcpp, glsl_lexer_warnings_suppressed],
>include_directories : [inc_common, inc_compiler, inc_nir],
>dependencies : idep_nir,
>build_by_default : false,
> 

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Re: [Mesa-dev] [PATCH 01/17] r200: Remove dead rop table

[Ian Romanick]

I thought I removed that... thanks for taking care of this.

Reviewed-by: Ian Romanick 

On 02/10/2018 08:32 AM, Eric Anholt wrote:
> Fixes: 0aaa27f29187 ("mesa: Pass the translated color logic op 
> dd_function_table::LogicOpcode")
> Cc: Ian Romanick 
> ---
>  src/mesa/drivers/dri/r200/r200_state.c | 20 
>  1 file changed, 20 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/r200/r200_state.c 
> b/src/mesa/drivers/dri/r200/r200_state.c
> index 33b696347a3d..d53225d63abe 100644
> --- a/src/mesa/drivers/dri/r200/r200_state.c
> +++ b/src/mesa/drivers/dri/r200/r200_state.c
> @@ -1626,26 +1626,6 @@ static void r200RenderMode( struct gl_context *ctx, 
> GLenum mode )
> FALLBACK( rmesa, R200_FALLBACK_RENDER_MODE, (mode != GL_RENDER) );
>  }
>  
> -
> -static GLuint r200_rop_tab[] = {
> -   R200_ROP_CLEAR,
> -   R200_ROP_AND,
> -   R200_ROP_AND_REVERSE,
> -   R200_ROP_COPY,
> -   R200_ROP_AND_INVERTED,
> -   R200_ROP_NOOP,
> -   R200_ROP_XOR,
> -   R200_ROP_OR,
> -   R200_ROP_NOR,
> -   R200_ROP_EQUIV,
> -   R200_ROP_INVERT,
> -   R200_ROP_OR_REVERSE,
> -   R200_ROP_COPY_INVERTED,
> -   R200_ROP_OR_INVERTED,
> -   R200_ROP_NAND,
> -   R200_ROP_SET,
> -};
> -
>  static void r200LogicOpCode(struct gl_context *ctx, enum gl_logicop_mode 
> opcode)
>  {
> r200ContextPtr rmesa = R200_CONTEXT(ctx);
> 

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Re: [Mesa-dev] [PATCH 3/6] i965: Use gen_get_pci_device_id_override

[Jordan Justen]

On 2018-02-12 10:53:47, Scott D Phillips wrote:
> Jordan Justen  writes:
> 
> > Signed-off-by: Jordan Justen 
> > ---
> >  src/mesa/drivers/dri/i965/intel_screen.c | 55 
> > ++--
> >  1 file changed, 3 insertions(+), 52 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
> > b/src/mesa/drivers/dri/i965/intel_screen.c
> > index 1f866cf8459..ea5306e441f 100644
> > --- a/src/mesa/drivers/dri/i965/intel_screen.c
> > +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> > @@ -2350,57 +2350,6 @@ shader_perf_log_mesa(void *data, const char *fmt, 
> > ...)
> > va_end(args);
> >  }
> >  
> > -static int
> > -parse_devid_override(const char *devid_override)
> > -{
> > -   static const struct {
> > -  const char *name;
> > -  int pci_id;
> > -   } name_map[] = {
> > -  { "brw", 0x2a02 },
> > -  { "g4x", 0x2a42 },
> > -  { "ilk", 0x0042 },
> > -  { "snb", 0x0126 },
> > -  { "ivb", 0x016a },
> > -  { "hsw", 0x0d2e },
> > -  { "byt", 0x0f33 },
> > -  { "bdw", 0x162e },
> > -  { "chv", 0x22B3 },
> > -  { "skl", 0x1912 },
> > -  { "bxt", 0x5A85 },
> > -  { "kbl", 0x5912 },
> > -  { "glk", 0x3185 },
> > -  { "cnl", 0x5a52 },
> > -   };
> > -
> > -   for (unsigned i = 0; i < ARRAY_SIZE(name_map); i++) {
> > -  if (!strcmp(name_map[i].name, devid_override))
> > - return name_map[i].pci_id;
> > -   }
> > -
> > -   return strtol(devid_override, NULL, 0);
> > -}
> > -
> > -/**
> > - * Get the PCI ID for the device.  This can be overridden by setting the
> > - * INTEL_DEVID_OVERRIDE environment variable to the desired ID.
> > - *
> > - * Returns -1 on ioctl failure.
> > - */
> > -static int
> > -get_pci_device_id(struct intel_screen *screen)
> > -{
> > -   if (geteuid() == getuid()) {
> > -  char *devid_override = getenv("INTEL_DEVID_OVERRIDE");
> > -  if (devid_override) {
> > - screen->no_hw = true;
> > - return parse_devid_override(devid_override);
> > -  }
> > -   }
> > -
> > -   return intel_get_integer(screen, I915_PARAM_CHIPSET_ID);
> > -}
> > -
> >  /**
> >   * This is the driver specific part of the createNewScreen entry point.
> >   * Called when using DRI2.
> > @@ -2438,7 +2387,9 @@ __DRIconfig **intelInitScreen2(__DRIscreen 
> > *dri_screen)
> > screen->driScrnPriv = dri_screen;
> > dri_screen->driverPrivate = (void *) screen;
> >  
> > -   screen->deviceID = get_pci_device_id(screen);
> > +   screen->deviceID = gen_get_pci_device_id_override();
> > +   if (screen->deviceID < 0)
> > +  screen->deviceID = intel_get_integer(screen, I915_PARAM_CHIPSET_ID);
> 
> Setting `screen->no_hw = true` gets dropped here right?

Oh, good catch! I'll set that in an else clause.

-Jordan

> 
> > if (!gen_get_device_info(screen->deviceID, >devinfo))
> >return NULL;
> > -- 
> > 2.15.1
> >
> > ___
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> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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Re: [Mesa-dev] [PATCH 2/6] intel/common: Add gen_get_pci_device_id_override

[Jordan Justen]

On 2018-02-12 11:01:01, Scott D Phillips wrote:
> Jordan Justen  writes:
> 
> > +/**
> > + * Get the overridden PCI ID for the device. This is set with the
> > + * INTEL_DEVID_OVERRIDE environment variable.
> > + *
> > + * Returns -1 if the override is not set.
> > + */
> > +int
> > +gen_get_pci_device_id_override(void)
> > +{
> > +   if (geteuid() == getuid()) {
> > +  const char *devid_override = getenv("INTEL_DEVID_OVERRIDE");
> > +  if (devid_override)
> > + return parse_devid_override(devid_override);
> > +   }
> > +
> > +   return -1;
> 
> Would it maybe make sense to always return -1 ifndef DEBUG or something?
> Is this useful functionality to the world at large?

I don't know if it is useful for release builds, but currently it is
not limited to debug builds in the GL driver.

-Jordan
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[Mesa-dev] [PATCH] gallium: drop all the guard band float caps.

[Dave Airlie]

From: Dave Airlie 

Nobody queries these and nobody sets them to anything useful,
the docs say TODO.

Drop them until a use appears.

Signed-off-by: Dave Airlie 
---
 src/gallium/docs/source/screen.rst   | 4 
 src/gallium/drivers/etnaviv/etnaviv_screen.c | 5 -
 src/gallium/drivers/freedreno/freedreno_screen.c | 5 -
 src/gallium/drivers/llvmpipe/lp_screen.c | 5 -
 src/gallium/drivers/nouveau/nv50/nv50_screen.c   | 6 --
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c   | 6 --
 src/gallium/drivers/r300/r300_screen.c   | 5 -
 src/gallium/drivers/r600/r600_pipe_common.c  | 5 -
 src/gallium/drivers/radeonsi/si_get.c| 5 -
 src/gallium/drivers/softpipe/sp_screen.c | 5 -
 src/gallium/drivers/svga/svga_screen.c   | 5 -
 src/gallium/drivers/swr/swr_screen.cpp   | 5 -
 src/gallium/drivers/vc4/vc4_screen.c | 5 -
 src/gallium/drivers/vc5/vc5_screen.c | 5 -
 src/gallium/drivers/virgl/virgl_screen.c | 5 -
 src/gallium/include/pipe/p_defines.h | 4 
 16 files changed, 80 deletions(-)

diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index cb3418fce35..95b62534493 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -431,10 +431,6 @@ The floating-point capabilities are:
   applied to anisotropically filtered textures.
 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be 
applied
   to filtered textures.
-* ``PIPE_CAPF_GUARD_BAND_LEFT``,
-  ``PIPE_CAPF_GUARD_BAND_TOP``,
-  ``PIPE_CAPF_GUARD_BAND_RIGHT``,
-  ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
 
 
 .. _pipe_shader_cap:
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c 
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index d5d1f4fdad2..16b58d3f03f 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -367,11 +367,6 @@ etna_screen_get_paramf(struct pipe_screen *pscreen, enum 
pipe_capf param)
   return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
   return util_last_bit(screen->specs.max_texture_size);
-   case PIPE_CAPF_GUARD_BAND_LEFT:
-   case PIPE_CAPF_GUARD_BAND_TOP:
-   case PIPE_CAPF_GUARD_BAND_RIGHT:
-   case PIPE_CAPF_GUARD_BAND_BOTTOM:
-  return 0.0f;
}
 
debug_printf("unknown paramf %d", param);
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 438817d0034..eb5c436e109 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -476,11 +476,6 @@ fd_screen_get_paramf(struct pipe_screen *pscreen, enum 
pipe_capf param)
return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
return 15.0f;
-   case PIPE_CAPF_GUARD_BAND_LEFT:
-   case PIPE_CAPF_GUARD_BAND_TOP:
-   case PIPE_CAPF_GUARD_BAND_RIGHT:
-   case PIPE_CAPF_GUARD_BAND_BOTTOM:
-   return 0.0f;
}
debug_printf("unknown paramf %d\n", param);
return 0;
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c 
b/src/gallium/drivers/llvmpipe/lp_screen.c
index b46ea06775d..439e15bc1a7 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -420,11 +420,6 @@ llvmpipe_get_paramf(struct pipe_screen *screen, enum 
pipe_capf param)
   return 16.0; /* not actually signficant at this time */
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
   return 16.0; /* arbitrary */
-   case PIPE_CAPF_GUARD_BAND_LEFT:
-   case PIPE_CAPF_GUARD_BAND_TOP:
-   case PIPE_CAPF_GUARD_BAND_RIGHT:
-   case PIPE_CAPF_GUARD_BAND_BOTTOM:
-  return 0.0;
}
/* should only get here on unhandled cases */
debug_printf("Unexpected PIPE_CAP %d query\n", param);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c 
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 4c13d04eb75..5c006e6be75 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -396,12 +396,6 @@ nv50_screen_get_paramf(struct pipe_screen *pscreen, enum 
pipe_capf param)
   return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
   return 4.0f;
-   case PIPE_CAPF_GUARD_BAND_LEFT:
-   case PIPE_CAPF_GUARD_BAND_TOP:
-  return 0.0f;
-   case PIPE_CAPF_GUARD_BAND_RIGHT:
-   case PIPE_CAPF_GUARD_BAND_BOTTOM:
-  return 0.0f; /* that or infinity */
}
 
NOUVEAU_ERR("unknown PIPE_CAPF %d\n", param);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 7ba8086a533..322382adceb 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -449,12 +449,6 @@ nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum 
pipe_capf 

[Mesa-dev] [PATCH v4 12/12] meson: fix xvmc target linkage

[Dylan Baker]

This needs to link the state tracker with --whole-archive to expose the
right symbols.

v4: - Always add libswdri and libswkmsdri to the link_with list

Fixes: 22a817af8a89eb3c7 ("meson: build gallium xvmc state tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/xvmc/meson.build | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/xvmc/meson.build 
b/src/gallium/targets/xvmc/meson.build
index 07d6c72..1c25f6d 100644
--- a/src/gallium/targets/xvmc/meson.build
+++ b/src/gallium/targets/xvmc/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -31,6 +31,7 @@ if with_ld_version_script
   xvmc_link_depends += files('xvmc.sym')
 endif
 
+
 libxvmc_gallium = shared_library(
   'XvMCgallium',
   'target.c',
@@ -40,9 +41,10 @@ libxvmc_gallium = shared_library(
   include_directories : [
 inc_common, inc_util, inc_gallium_winsys, inc_gallium_drivers,
   ],
+  link_whole : [libxvmc_st],
   link_with : [
-libxvmc_st, libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
-libpipe_loader_static, libws_null, libwsw,
+libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
+libpipe_loader_static, libws_null, libwsw, libswdri, libswkmsdri,
   ],
   dependencies : [dep_thread, driver_r600, driver_nouveau],
   link_depends : xvmc_link_depends,
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 02/12] meson: add libswdri and libswkmsdri to link_with unconditionally

[Dylan Baker]

Fixes: 6b4c7047d571 ("meson: build gallium nine state_tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/d3dadapter9/meson.build | 13 +++--
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/src/gallium/targets/d3dadapter9/meson.build 
b/src/gallium/targets/d3dadapter9/meson.build
index 5476e80..f1b68fd 100644
--- a/src/gallium/targets/d3dadapter9/meson.build
+++ b/src/gallium/targets/d3dadapter9/meson.build
@@ -1,4 +1,5 @@
 # Copyright © 2017 Dylan Baker
+# Copyright © 2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -31,20 +32,12 @@ gallium_nine_c_args = [
 ]
 gallium_nine_ld_args = []
 gallium_nine_link_depends = []
-gallium_nine_link_with = []
 
 if with_ld_version_script
   gallium_nine_ld_args += ['-Wl,--version-script', 
join_paths(meson.current_source_dir(), 'd3dadapter9.sym')]
   gallium_nine_link_depends += files('d3dadapter9.sym')
 endif
 
-if with_dri
-  gallium_nine_link_with += libswdri
-endif
-if with_gallium_drisw_kms
-  gallium_nine_link_with += libswkmsdri
-endif
-
 libgallium_nine = shared_library(
   'd3dadapter9',
   [files('description.c', 'getproc.c', 'drm.c'), xmlpool_options_h],
@@ -60,8 +53,8 @@ libgallium_nine = shared_library(
   link_depends : gallium_nine_link_depends,
   link_with : [
 libgalliumvl_stub, libgallium, libnine_st, libmesa_util, libddebug,
-librbug, libtrace, libpipe_loader_static, libws_null, libwsw,
-gallium_nine_link_with,
+librbug, libtrace, libpipe_loader_static, libws_null, libwsw, libswdi,
+libswkmsdri,
   ],
   dependencies : [
 dep_selinux, dep_expat, dep_libdrm, dep_llvm,
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 01/12] meson: define empty variables for libswdri and libswkmsdri

[Dylan Baker]

This allows these variables to unconditionally included in `link_with`
lists, even if they're not used. This allows deleting duplicated logic
in nearly every gallium target implemented in meson today. This also
removes the now useless `build_by_default` flag from swdri and swkmsdri.

v4: - add this patch

Fixes: 66c94b9313a697ce8f2b222f4ba353035e4b8726
   ("meson: build gallium winsys for dri, null, and wrapper")
Signed-off-by: Dylan Baker 
---
 src/gallium/meson.build   | 12 ++--
 src/gallium/winsys/sw/dri/meson.build |  2 +-
 src/gallium/winsys/sw/kms-dri/meson.build |  3 +--
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 6330c75..d05e676 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -29,8 +29,16 @@ subdir('drivers/noop')
 subdir('drivers/trace')
 subdir('drivers/rbug')
 subdir('winsys/sw/null')
-subdir('winsys/sw/dri')
-subdir('winsys/sw/kms-dri')
+if with_dri
+  subdir('winsys/sw/dri')
+else
+  libswdri = []
+endif
+if with_gallium_drisw_kms
+  subdir('winsys/sw/kms-dri')
+else
+  libswkmsdri = []
+endif
 subdir('winsys/sw/wrapper')
 if with_gallium_swr
   if meson.version().version_compare('< 0.44.0')
diff --git a/src/gallium/winsys/sw/dri/meson.build 
b/src/gallium/winsys/sw/dri/meson.build
index 6ada8d1..0de6222 100644
--- a/src/gallium/winsys/sw/dri/meson.build
+++ b/src/gallium/winsys/sw/dri/meson.build
@@ -1,4 +1,5 @@
 # Copyright © 2017 Dylan Baker
+# Copyright © 2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -23,5 +24,4 @@ libswdri = static_library(
   files('dri_sw_winsys.c', 'dri_sw_winsys.h'),
   c_args : c_vis_args,
   include_directories : [inc_gallium, inc_include, inc_src, inc_gallium_aux],
-  build_by_default : false,
 )
diff --git a/src/gallium/winsys/sw/kms-dri/meson.build 
b/src/gallium/winsys/sw/kms-dri/meson.build
index a26644d..9c46d6e 100644
--- a/src/gallium/winsys/sw/kms-dri/meson.build
+++ b/src/gallium/winsys/sw/kms-dri/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -25,5 +25,4 @@ libswkmsdri = static_library(
   c_args : c_vis_args,
   include_directories : [inc_gallium, inc_include, inc_src, inc_gallium_aux],
   dependencies : dep_libdrm,
-  build_by_default : false,
 )
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 06/12] meson: actually link with libomxil-bellagio

[Dylan Baker]

This state tracker actually needs to link, unlike vdpau.

Fixes: 1d36dc674d528b93b ("meson: build gallium omx state tracker")
Signed-off-by: Dylan Baker 
---
 meson.build | 5 -
 1 file changed, 5 deletions(-)

diff --git a/meson.build b/meson.build
index 570c508..b5fa5a8 100644
--- a/meson.build
+++ b/meson.build
@@ -514,11 +514,6 @@ if with_gallium_omx
 endif
   endif
 endif
-if with_gallium_omx
-  dep_omx = declare_dependency(
-compile_args : run_command(prog_pkgconfig, ['libomxil-bellagio', 
'--cflags']).stdout().split()
-  )
-endif
 
 _va = get_option('gallium-va')
 if not system_has_kms_drm
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 09/12] meson: fix va target linkage

[Dylan Baker]

The state tracker needs to be linked with whole-archive (like
autotools). As a result there are symbols from libswdri and libswkmsdri
that are needed, so link those as well.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 5a785d51a6d6 ("meson: build gallium va state tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/va/meson.build | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/va/meson.build 
b/src/gallium/targets/va/meson.build
index 1e453c9..57d267e 100644
--- a/src/gallium/targets/va/meson.build
+++ b/src/gallium/targets/va/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -40,9 +40,10 @@ libva_gallium = shared_library(
   include_directories : [
 inc_common, inc_util, inc_gallium_winsys, inc_gallium_drivers,
   ],
+  link_whole : [libva_st],
   link_with : [
-libva_st, libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
-libpipe_loader_static, libws_null, libwsw,
+libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
+libpipe_loader_static, libws_null, libwsw, libswdri, libswkmsdri,
   ],
   dependencies : [
 dep_libdrm, dep_thread, driver_r600, driver_radeonsi, driver_nouveau,
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 00/12] meson: fix gallium media target linkage

[Dylan Baker]

The linkage of all of the gallium media targets is broken in various
ways in the meson build. This series should correct that by doing more
what the autotools build does.

Changes since v2:
- Add patch to fix va-api version checking
- link xcb libs into vlwinsys instead of into each media state
  tracker/target
- Split the remaining bits into patches that fix one problem.

Changes since v3:
- Define libswdri and libswkmsdri as empty lists if they're not going to
  be built, this allows them to be unconditionally included in the
  targets that want them
- Change the d3dadaptor and dri targets to take advantage of that change
- Make the media drivers take advantage of that change as well

Dylan Baker (12):
  meson: define empty variables for libswdri and libswkmsdri
  meson: add libswdri and libswkmsdri to link_with unconditionally
  meson: Unconditionally add libswdri and libswkmsdri to dri link_with
  meson: use va-api version reported by pkg-config
  meson: link dri3 xcb libs into vlwinsys instead of into each target
  meson: actually link with libomxil-bellagio
  meson: Actually link xvmc target with libxvmc
  meson: fix vdpau target linkage
  meson: fix va target linkage
  meson: Fix omx-bellagio target linkage
  meson: Fix xa target linkage
  meson: fix xvmc target linkage

 meson.build  | 10 +-
 src/gallium/auxiliary/meson.build|  7 ++-
 src/gallium/meson.build  | 12 ++--
 src/gallium/state_trackers/va/meson.build|  6 +++---
 src/gallium/targets/d3dadapter9/meson.build  | 13 +++--
 src/gallium/targets/dri/meson.build  | 11 ++-
 src/gallium/targets/omx-bellagio/meson.build | 12 +---
 src/gallium/targets/va/meson.build   | 13 +
 src/gallium/targets/vdpau/meson.build| 11 ++-
 src/gallium/targets/xa/meson.build   | 11 ++-
 src/gallium/targets/xvmc/meson.build | 13 ++---
 src/gallium/winsys/sw/dri/meson.build|  2 +-
 src/gallium/winsys/sw/kms-dri/meson.build|  3 +--
 13 files changed, 55 insertions(+), 69 deletions(-)

base-commit: bd87bd178ce59b46a875f4bb0aa2332ea03bb735
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 07/12] meson: Actually link xvmc target with libxvmc

[Dylan Baker]

Unlike vdpau this is required.

Fixes: 22a817af8a89eb3c7 ("meson: build gallium xvmc state tracker")
Signed-off-by: Dylan Baker 
---
 meson.build | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/meson.build b/meson.build
index b5fa5a8..3925ec4 100644
--- a/meson.build
+++ b/meson.build
@@ -452,9 +452,6 @@ with_gallium_xvmc = _xvmc == 'true'
 dep_xvmc = []
 if with_gallium_xvmc
   dep_xvmc = dependency('xvmc', version : '>= 1.0.6')
-  dep_xvmc = declare_dependency(
-compile_args : run_command(prog_pkgconfig, ['xvmc', 
'--cflags']).stdout().split()
-  )
 endif
 
 xvmc_drivers_path = get_option('xvmc-libs-path')
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 11/12] meson: Fix xa target linkage

[Dylan Baker]

This needs to use --whole-archive (link_whole in meson) to properly
expose symbols.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 0ba909f0f111824 ("meson: build gallium xa state tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/xa/meson.build | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/xa/meson.build 
b/src/gallium/targets/xa/meson.build
index 75808cd..ea6e129 100644
--- a/src/gallium/targets/xa/meson.build
+++ b/src/gallium/targets/xa/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -30,6 +30,7 @@ if with_ld_version_script
   xa_link_depends += files('xa.sym')
 endif
 
+
 libxatracker = shared_library(
   'xatracker',
   'target.c',
@@ -39,9 +40,10 @@ libxatracker = shared_library(
   include_directories : [
 inc_common, inc_util, inc_gallium_winsys, inc_gallium_drivers,
   ],
+  link_whole : [libxa_st],
   link_with : [
-libxa_st, libgalliumvl_stub, libgallium, libmesa_util,
-libpipe_loader_static, libws_null, libwsw,
+libgalliumvl_stub, libgallium, libmesa_util, libpipe_loader_static,
+libws_null, libwsw, libswdri, libswkmsdri,
   ],
   link_depends : xa_link_depends,
   dependencies : [
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 05/12] meson: link dri3 xcb libs into vlwinsys instead of into each target

[Dylan Baker]

This makes the dependencies easier to manage, since each media target
doesn't need to worry about linking to half a dozen libraries.

Fixes: b1b65397d0c4978e3 ("meson: Build gallium auxiliary")
Signed-off-by: Dylan Baker 
---
 src/gallium/auxiliary/meson.build| 7 ++-
 src/gallium/targets/omx-bellagio/meson.build | 5 +
 src/gallium/targets/va/meson.build   | 6 +-
 src/gallium/targets/vdpau/meson.build| 3 +--
 src/gallium/targets/xa/meson.build   | 3 +--
 src/gallium/targets/xvmc/meson.build | 5 +
 6 files changed, 11 insertions(+), 18 deletions(-)

diff --git a/src/gallium/auxiliary/meson.build 
b/src/gallium/auxiliary/meson.build
index 6f1542d..5908f9c 100644
--- a/src/gallium/auxiliary/meson.build
+++ b/src/gallium/auxiliary/meson.build
@@ -452,10 +452,15 @@ files_libgalliumvl = files(
   'vl/vl_zscan.h',
 )
 
+vlwinsys_deps = []
 files_libgalliumvlwinsys = files('vl/vl_winsys.h')
 if with_dri2
   files_libgalliumvlwinsys += files('vl/vl_winsys_dri.c')
   if with_dri3
+vlwinsys_deps += [
+  dep_xcb_sync, dep_xcb_present, dep_xshmfence, dep_xcb_xfixes,
+  dep_xcb_dri3, 
+]
 files_libgalliumvlwinsys += files('vl/vl_winsys_dri3.c')
   endif
 endif
@@ -526,6 +531,6 @@ libgalliumvlwinsys = static_library(
   'galliumvlwinsys',
   files_libgalliumvlwinsys,
   include_directories : [inc_gallium, inc_include, inc_loader, inc_src],
-  dependencies : [dep_libdrm],
+  dependencies : [dep_libdrm, vlwinsys_deps],
   build_by_default : false,
 )
diff --git a/src/gallium/targets/omx-bellagio/meson.build 
b/src/gallium/targets/omx-bellagio/meson.build
index a3fba3f..c9e8eb8 100644
--- a/src/gallium/targets/omx-bellagio/meson.build
+++ b/src/gallium/targets/omx-bellagio/meson.build
@@ -44,10 +44,7 @@ libomx_gallium = shared_library(
 libpipe_loader_static, libws_null, libwsw,
   ],
   link_depends : omx_link_depends,
-  dependencies : [
-dep_xcb, dep_x11_xcb, dep_xcb_dri2, dep_xcb_dri3, dep_libdrm, dep_thread,
-driver_r600, driver_radeonsi, driver_nouveau,
-  ],
+  dependencies : [dep_thread, driver_r600, driver_radeonsi, driver_nouveau],
   install : true,
   install_dir : omx_drivers_path,
 )
diff --git a/src/gallium/targets/va/meson.build 
b/src/gallium/targets/va/meson.build
index 0ea0cd1..1e453c9 100644
--- a/src/gallium/targets/va/meson.build
+++ b/src/gallium/targets/va/meson.build
@@ -22,7 +22,6 @@
 # Static targets are always enabled in autotools (unless you modify
 # configure.ac)
 
-va_deps = []
 va_link_args = []
 va_link_depends = []
 va_drivers = []
@@ -31,9 +30,6 @@ if with_ld_version_script
   va_link_args += ['-Wl,--version-script', 
join_paths(meson.current_source_dir(), 'va.sym')]
   va_link_depends += files('va.sym')
 endif
-if with_platform_x11
-  va_deps += [dep_xcb, dep_x11_xcb, dep_xcb_dri2, dep_xcb_dri3]
-endif
 
 libva_gallium = shared_library(
   'gallium_drv_video',
@@ -49,7 +45,7 @@ libva_gallium = shared_library(
 libpipe_loader_static, libws_null, libwsw,
   ],
   dependencies : [
-dep_libdrm, dep_thread, va_deps, driver_r600, driver_radeonsi, 
driver_nouveau,
+dep_libdrm, dep_thread, driver_r600, driver_radeonsi, driver_nouveau,
   ],
   link_depends : va_link_depends,
   install : true,
diff --git a/src/gallium/targets/vdpau/meson.build 
b/src/gallium/targets/vdpau/meson.build
index 67f1469..a03f0ed 100644
--- a/src/gallium/targets/vdpau/meson.build
+++ b/src/gallium/targets/vdpau/meson.build
@@ -49,8 +49,7 @@ libvdpau_gallium = shared_library(
 libpipe_loader_static, libws_null, libwsw,
   ],
   dependencies : [
-dep_thread, dep_xcb, dep_x11_xcb, dep_xcb_dri2, dep_libdrm,
-driver_r300, driver_r600, driver_radeonsi, driver_nouveau,
+dep_thread, driver_r300, driver_r600, driver_radeonsi, driver_nouveau,
   ],
   link_depends : vdpau_link_depends,
 )
diff --git a/src/gallium/targets/xa/meson.build 
b/src/gallium/targets/xa/meson.build
index 8ff6486..75808cd 100644
--- a/src/gallium/targets/xa/meson.build
+++ b/src/gallium/targets/xa/meson.build
@@ -45,8 +45,7 @@ libxatracker = shared_library(
   ],
   link_depends : xa_link_depends,
   dependencies : [
-dep_xcb, dep_x11_xcb, dep_xcb_dri2, dep_xcb_dri3, dep_libdrm, dep_thread,
-driver_nouveau, driver_i915, driver_svga, driver_freedreno,
+dep_thread, driver_nouveau, driver_i915, driver_svga, driver_freedreno,
   ],
   install : true,
 )
diff --git a/src/gallium/targets/xvmc/meson.build 
b/src/gallium/targets/xvmc/meson.build
index 48759de..07d6c72 100644
--- a/src/gallium/targets/xvmc/meson.build
+++ b/src/gallium/targets/xvmc/meson.build
@@ -44,10 +44,7 @@ libxvmc_gallium = shared_library(
 libxvmc_st, libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
 libpipe_loader_static, libws_null, libwsw,
   ],
-  dependencies : [
-dep_xcb, dep_x11_xcb, dep_xcb_dri2, dep_xcb_dri3, dep_libdrm, dep_thread,
-driver_r600, driver_nouveau,
-  ],
+  dependencies : [dep_thread, 

[Mesa-dev] [PATCH v4 08/12] meson: fix vdpau target linkage

[Dylan Baker]

The VDPAU state tracker needs to be linked with whole-archive (autotools
does this). Because we are linking the whole archive we alos need to
link with libswdri and libswkmsdri if those have been enabled.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 68076b87474e7959 ("meson: build gallium vdpau state tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/vdpau/meson.build | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/vdpau/meson.build 
b/src/gallium/targets/vdpau/meson.build
index a03f0ed..93969d8 100644
--- a/src/gallium/targets/vdpau/meson.build
+++ b/src/gallium/targets/vdpau/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -35,6 +35,7 @@ if with_ld_dynamic_list
   vdpau_link_depends += files('../dri-vdpau.dyn')
 endif
 
+
 libvdpau_gallium = shared_library(
   'vdpau_gallium',
   'target.c',
@@ -44,9 +45,10 @@ libvdpau_gallium = shared_library(
   include_directories : [
 inc_common, inc_util, inc_gallium_winsys, inc_gallium_drivers,
   ],
+  link_whole : [libvdpau_st],
   link_with : [
-libvdpau_st, libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
-libpipe_loader_static, libws_null, libwsw,
+libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
+libpipe_loader_static, libws_null, libwsw, libswdri, libswkmsdri,
   ],
   dependencies : [
 dep_thread, driver_r300, driver_r600, driver_radeonsi, driver_nouveau,
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 03/12] meson: Unconditionally add libswdri and libswkmsdri to dri link_with

[Dylan Baker]

Fixes: b154b44ae342 ("meson: build radeonsi gallium driver")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/dri/meson.build | 11 ++-
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/src/gallium/targets/dri/meson.build 
b/src/gallium/targets/dri/meson.build
index 75ce94a..a432622 100644
--- a/src/gallium/targets/dri/meson.build
+++ b/src/gallium/targets/dri/meson.build
@@ -1,4 +1,5 @@
 # Copyright © 2017 Dylan Baker
+# Copyright © 2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -29,7 +30,6 @@ gallium_dri_c_args = [
   '-DGALLIUME_TRACE',
 ]
 gallium_dri_ld_args = []
-gallium_dri_link_with = []
 gallium_dri_link_depends = []
 gallium_dri_drivers = []
 
@@ -42,13 +42,6 @@ if with_ld_dynamic_list
   gallium_dri_link_depends += files('../dri-vdpau.dyn')
 endif
 
-if with_dri
-  gallium_dri_link_with += libswdri
-endif
-if with_gallium_drisw_kms
-  gallium_dri_link_with += libswkmsdri
-endif
-
 libgallium_dri = shared_library(
   'gallium_dri',
   [files('target.c'), xmlpool_options_h],
@@ -63,7 +56,7 @@ libgallium_dri = shared_library(
   link_with : [
 libmesa_gallium, libdricommon, libmegadriver_stub, libdri, libgalliumvl,
 libgallium, libddebug, libnoop, librbug, libtrace, libglapi,
-libpipe_loader_static, libws_null, libwsw,  gallium_dri_link_with,
+libpipe_loader_static, libws_null, libwsw, libswdri, libswkmsdri,
   ],
   dependencies : [
 dep_selinux, dep_expat, dep_libdrm, dep_llvm, dep_thread,
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 10/12] meson: Fix omx-bellagio target linkage

[Dylan Baker]

This needs to use --whole-archive (link_whole in meson) to properly
expose symbols.

v4: - Always add libswdri and libswkmsdri to link_with

Fixes: 1d36dc674d528b93b ("meson: build gallium omx state tracker")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/omx-bellagio/meson.build | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/omx-bellagio/meson.build 
b/src/gallium/targets/omx-bellagio/meson.build
index c9e8eb8..6811e6f 100644
--- a/src/gallium/targets/omx-bellagio/meson.build
+++ b/src/gallium/targets/omx-bellagio/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -39,9 +39,10 @@ libomx_gallium = shared_library(
   include_directories : [
 inc_common, inc_util, inc_gallium_winsys, inc_gallium_drivers,
   ],
+  link_whole : [libomx_st],
   link_with : [
-libomx_st, libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
-libpipe_loader_static, libws_null, libwsw,
+libgalliumvlwinsys, libgalliumvl, libgallium, libmesa_util,
+libpipe_loader_static, libws_null, libwsw, libswdri, libswkmsdri,
   ],
   link_depends : omx_link_depends,
   dependencies : [dep_thread, driver_r600, driver_radeonsi, driver_nouveau],
-- 
git-series 0.9.1
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[Mesa-dev] [PATCH v4 04/12] meson: use va-api version reported by pkg-config

[Dylan Baker]

Fixes: 5a785d51a6d6 ("meson: build gallium va state tracker")
Signed-off-by: Dylan Baker 
---
 meson.build   | 2 +-
 src/gallium/state_trackers/va/meson.build | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/meson.build b/meson.build
index b39e2f8..570c508 100644
--- a/meson.build
+++ b/meson.build
@@ -546,7 +546,7 @@ with_gallium_va = _va == 'true'
 dep_va = []
 if with_gallium_va
   dep_va = dependency('libva', version : '>= 0.38.0')
-  dep_va = declare_dependency(
+  dep_va_headers = declare_dependency(
 compile_args : run_command(prog_pkgconfig, ['libva', 
'--cflags']).stdout().split()
   )
 endif
diff --git a/src/gallium/state_trackers/va/meson.build 
b/src/gallium/state_trackers/va/meson.build
index bddd5ef..deb1127 100644
--- a/src/gallium/state_trackers/va/meson.build
+++ b/src/gallium/state_trackers/va/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -18,7 +18,7 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 # SOFTWARE.
 
-libva_version = ['2', '3', '0']
+libva_version = dep_va.version().split('.')
 
 libva_st = static_library(
   'va_st',
@@ -35,5 +35,5 @@ libva_st = static_library(
 ),
   ],
   include_directories : [inc_common],
-  dependencies : [dep_va, dep_x11_xcb, dep_xcb, dep_xcb_dri2, dep_xcb_dri3],
+  dependencies : [dep_va_headers, dep_x11_xcb, dep_xcb, dep_xcb_dri2, 
dep_xcb_dri3],
 )
-- 
git-series 0.9.1
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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

[Zhu, James]

On 2018-02-10 11:06 AM, Mark Thompson wrote:

On 08/02/18 23:05, Mark Thompson wrote:


On 08/02/18 22:37, Alex Deucher wrote:


On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson 
 wrote:


On 06/02/18 20:05, James Zhu wrote:


The whole series are the updated version. Changes are made mainly based
on the comments from prevous code review from Alex, Leo and Boyuan

James Zhu (8):
  amd/common:add uvd hevc enc support check in hw query
  winsys/amdgpu:add uvd hevc enc support in amdgpu cs
  radeon/uvd:add uvd hevc enc hw interface header
  radeon/uvd:add uvd hevc enc hw ib implementation
  radeon/uvd:add uvd hevc enc functions
  radeon/uvd:add uvd hevc enc files in Makefile list
  radeonsi:create uvd hevc enc entry
  radeonsi: enable uvd encode for HEVC main

 src/amd/common/ac_gpu_info.c|   10 +-
 src/amd/common/ac_gpu_info.h|1 +
 src/gallium/drivers/radeon/Makefile.sources |3 +
 src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
 src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
 src/gallium/drivers/radeonsi/si_get.c   |4 +-
 src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
 9 files changed, 1990 insertions(+), 5 deletions(-)
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c



Can you explain what the requirements are for using this (hardware, firmware, 
software)?

>From what I can find it should be on Polaris and Vega, but I haven't succeeded 
>in getting it working on Polaris.


Yes, polaris and vega10.  For polaris, you'll need a kernel that
enables the uvd enc rings.  Patches went upstream last year, 4.14 I
think?  4.15 is a good bet.


Ah, that's where I'm going wrong - despite the dates it's not actually in 4.14, 
so I need 4.15.



 As for the polaris firmware, you'll need
version FW_1_130_16 or newer:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b


Right, I have the encoder working with 4.15.2 on an RX 460 / Polaris 11 with 
firmware 1.130_16.

There seems to be some issue with using both encode and playback at the same 
time?  It hangs the amdgpu driver and all userspaces processes interacting with 
it become stuck and unkillable, requiring a reboot to recover.  It's completely 
repeatable, and only needs a few seconds to die when both mpv (playback) and 
ffmpeg (transcode) are running at the same time.

There is no message at all from the stuck driver, but I end up with hung tasks 
like:

[ 1209.317130] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1209.317132]   Not tainted 4.15.2 #2
[ 1209.317133] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1209.317133] kworker/u24:0   D0 5  2 0x8000
[ 1209.317137] Workqueue: events_unbound commit_work
[ 1209.317138] Call Trace:
[ 1209.317142]  ? __schedule+0x26b/0x840
[ 1209.317144]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1209.317145]  schedule+0x28/0x80
[ 1209.317146]  schedule_timeout+0x1de/0x360
[ 1209.317177]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1209.317199]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1209.317201]  dma_fence_default_wait+0x1f6/0x280
[ 1209.317203]  ? dma_fence_release+0x90/0x90
[ 1209.317204]  dma_fence_wait_timeout+0x33/0xe0
[ 1209.317205]  reservation_object_wait_timeout_rcu+0x198/0x340
[ 1209.317227]  amdgpu_dm_do_flip+0x112/0x350 [amdgpu]
[ 1209.317248]  amdgpu_dm_atomic_commit_tail+0x8a4/0x9a0 [amdgpu]
[ 1209.317250]  ? pick_next_task_fair+0x14f/0x5f0
[ 1209.317251]  commit_tail+0x3a/0x70
[ 1209.317252]  process_one_work+0x17c/0x370
[ 1209.317253]  worker_thread+0x2e/0x370
[ 1209.317255]  ? process_one_work+0x370/0x370
[ 1209.317256]  kthread+0x111/0x130
[ 1209.317257]  ? kthread_create_worker_on_cpu+0x70/0x70
[ 1209.317258]  ret_from_fork+0x1f/0x30
[ 1330.152054] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1330.152056]   Not tainted 4.15.2 #2
[ 1330.152056] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1330.152057] kworker/u24:0   D0 5  2 0x8000
[ 1330.152059] Workqueue: events_unbound commit_work
[ 1330.152060] Call Trace:
[ 1330.152063]  ? __schedule+0x26b/0x840
[ 1330.152065]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1330.152066]  schedule+0x28/0x80
[ 1330.152067]  schedule_timeout+0x1de/0x360
[ 1330.152108]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1330.152130]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1330.152132]  dma_fence_default_wait+0x1f6/0x280
[ 

Re: [Mesa-dev] [PATCH 2/6] intel/common: Add gen_get_pci_device_id_override

[Scott D Phillips]

Jordan Justen  writes:

> Signed-off-by: Jordan Justen 
> ---
>  src/intel/common/gen_device_info.c | 51 
> ++
>  src/intel/common/gen_device_info.h |  1 +
>  2 files changed, 52 insertions(+)
>
> diff --git a/src/intel/common/gen_device_info.c 
> b/src/intel/common/gen_device_info.c
> index c0eb7c3c356..1e0cac8e537 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -24,10 +24,61 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
>  #include "gen_device_info.h"
>  #include "compiler/shader_enums.h"
>  #include "util/macros.h"
>  
> +static int
> +parse_devid_override(const char *devid_override)
> +{
> +   static const struct {
> +  const char *name;
> +  int pci_id;
> +   } name_map[] = {
> +  { "brw", 0x2a02 },
> +  { "g4x", 0x2a42 },
> +  { "ilk", 0x0042 },
> +  { "snb", 0x0126 },
> +  { "ivb", 0x016a },
> +  { "hsw", 0x0d2e },
> +  { "byt", 0x0f33 },
> +  { "bdw", 0x162e },
> +  { "chv", 0x22B3 },
> +  { "skl", 0x1912 },
> +  { "bxt", 0x5A85 },
> +  { "kbl", 0x5912 },
> +  { "glk", 0x3185 },
> +  { "cnl", 0x5a52 },
> +   };
> +
> +   for (unsigned i = 0; i < ARRAY_SIZE(name_map); i++) {
> +  if (!strcmp(name_map[i].name, devid_override))
> + return name_map[i].pci_id;
> +   }
> +
> +   return strtol(devid_override, NULL, 0);
> +}
> +
> +/**
> + * Get the overridden PCI ID for the device. This is set with the
> + * INTEL_DEVID_OVERRIDE environment variable.
> + *
> + * Returns -1 if the override is not set.
> + */
> +int
> +gen_get_pci_device_id_override(void)
> +{
> +   if (geteuid() == getuid()) {
> +  const char *devid_override = getenv("INTEL_DEVID_OVERRIDE");
> +  if (devid_override)
> + return parse_devid_override(devid_override);
> +   }
> +
> +   return -1;

Would it maybe make sense to always return -1 ifndef DEBUG or something?
Is this useful functionality to the world at large?

It looks like patches 2 & 5 could maybe be squashed too.

With the comment in patch 3 fixed and some thought on the other points,
series is

Reviewed-by: Scott D Phillips 

> +}
> +
>  static const struct gen_device_info gen_device_info_i965 = {
> .gen = 4,
> .has_negative_rhw_bug = true,
> diff --git a/src/intel/common/gen_device_info.h 
> b/src/intel/common/gen_device_info.h
> index 30ddd905be1..f3f2daa966c 100644
> --- a/src/intel/common/gen_device_info.h
> +++ b/src/intel/common/gen_device_info.h
> @@ -199,6 +199,7 @@ struct gen_device_info
>  #define gen_device_info_is_9lp(devinfo) \
> ((devinfo)->is_broxton || (devinfo)->is_geminilake)
>  
> +int gen_get_pci_device_id_override(void);
>  bool gen_get_device_info(int devid, struct gen_device_info *devinfo);
>  const char *gen_get_device_name(int devid);
>  
> -- 
> 2.15.1
>
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Re: [Mesa-dev] [PATCH 3/6] i965: Use gen_get_pci_device_id_override

[Scott D Phillips]

Jordan Justen  writes:

> Signed-off-by: Jordan Justen 
> ---
>  src/mesa/drivers/dri/i965/intel_screen.c | 55 
> ++--
>  1 file changed, 3 insertions(+), 52 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 1f866cf8459..ea5306e441f 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -2350,57 +2350,6 @@ shader_perf_log_mesa(void *data, const char *fmt, ...)
> va_end(args);
>  }
>  
> -static int
> -parse_devid_override(const char *devid_override)
> -{
> -   static const struct {
> -  const char *name;
> -  int pci_id;
> -   } name_map[] = {
> -  { "brw", 0x2a02 },
> -  { "g4x", 0x2a42 },
> -  { "ilk", 0x0042 },
> -  { "snb", 0x0126 },
> -  { "ivb", 0x016a },
> -  { "hsw", 0x0d2e },
> -  { "byt", 0x0f33 },
> -  { "bdw", 0x162e },
> -  { "chv", 0x22B3 },
> -  { "skl", 0x1912 },
> -  { "bxt", 0x5A85 },
> -  { "kbl", 0x5912 },
> -  { "glk", 0x3185 },
> -  { "cnl", 0x5a52 },
> -   };
> -
> -   for (unsigned i = 0; i < ARRAY_SIZE(name_map); i++) {
> -  if (!strcmp(name_map[i].name, devid_override))
> - return name_map[i].pci_id;
> -   }
> -
> -   return strtol(devid_override, NULL, 0);
> -}
> -
> -/**
> - * Get the PCI ID for the device.  This can be overridden by setting the
> - * INTEL_DEVID_OVERRIDE environment variable to the desired ID.
> - *
> - * Returns -1 on ioctl failure.
> - */
> -static int
> -get_pci_device_id(struct intel_screen *screen)
> -{
> -   if (geteuid() == getuid()) {
> -  char *devid_override = getenv("INTEL_DEVID_OVERRIDE");
> -  if (devid_override) {
> - screen->no_hw = true;
> - return parse_devid_override(devid_override);
> -  }
> -   }
> -
> -   return intel_get_integer(screen, I915_PARAM_CHIPSET_ID);
> -}
> -
>  /**
>   * This is the driver specific part of the createNewScreen entry point.
>   * Called when using DRI2.
> @@ -2438,7 +2387,9 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
> screen->driScrnPriv = dri_screen;
> dri_screen->driverPrivate = (void *) screen;
>  
> -   screen->deviceID = get_pci_device_id(screen);
> +   screen->deviceID = gen_get_pci_device_id_override();
> +   if (screen->deviceID < 0)
> +  screen->deviceID = intel_get_integer(screen, I915_PARAM_CHIPSET_ID);

Setting `screen->no_hw = true` gets dropped here right?

> if (!gen_get_device_info(screen->deviceID, >devinfo))
>return NULL;
> -- 
> 2.15.1
>
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Re: [Mesa-dev] [PATCH] ac/shader: scan force_persample

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen 

On Mon, Feb 12, 2018 at 3:57 PM, Samuel Pitoiset
 wrote:
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/amd/common/ac_nir_to_llvm.c |  5 ++---
>  src/amd/common/ac_shader_info.c | 15 +++
>  2 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index bf5b0bc1e1..86795875a1 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -5413,10 +5413,9 @@ handle_fs_input_decl(struct radv_shader_context *ctx,
>
> if (glsl_get_base_type(glsl_without_array(variable->type)) == 
> GLSL_TYPE_FLOAT) {
> unsigned interp_type;
> -   if (variable->data.sample) {
> +   if (variable->data.sample)
> interp_type = INTERP_SAMPLE;
> -   ctx->shader_info->info.ps.force_persample = true;
> -   } else if (variable->data.centroid)
> +   else if (variable->data.centroid)
> interp_type = INTERP_CENTROID;
> else
> interp_type = INTERP_CENTER;
> diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
> index b211da60b3..3b0887995d 100644
> --- a/src/amd/common/ac_shader_info.c
> +++ b/src/amd/common/ac_shader_info.c
> @@ -179,6 +179,18 @@ gather_info_block(const nir_shader *nir, const nir_block 
> *block,
> }
>  }
>
> +static void
> +gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
> + struct ac_shader_info *info)
> +{
> +   const struct glsl_type *type = glsl_without_array(var->type);
> +
> +   if (glsl_get_base_type(type) == GLSL_TYPE_FLOAT) {
> +   if (var->data.sample)
> +   info->ps.force_persample = true;
> +   }
> +}
> +
>  static void
>  gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
>struct ac_shader_info *info)
> @@ -187,6 +199,9 @@ gather_info_input_decl(const nir_shader *nir, const 
> nir_variable *var,
> case MESA_SHADER_VERTEX:
> info->vs.has_vertex_buffers = true;
> break;
> +   case MESA_SHADER_FRAGMENT:
> +   gather_info_input_decl_ps(nir, var, info);
> +   break;
> default:
> break;
> }
> --
> 2.16.1
>
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[Mesa-dev] [PATCH] i965: Fix bugs in intel_from_planar

[Daniel Stone]

From: Jason Ekstrand 

This commit fixes two bugs in intel_from_planar.  First, if the planar
format was non-NULL but only had a single plane, we were falling through
to the planar case.  If we had a CCS modifier and plane == 1, we would
return NULL instead of the CCS plane.  Second, if we did end up in the
planar_format == NULL case and the modifier was DRM_FORMAT_MOD_INVALID,
we would end up segfaulting in isl_drm_modifier_has_aux.

Cc: mesa-sta...@lists.freedesktop.org
Fixes: 8f6e54c92966bb94a3f05f2cc7ea804273e125ad
Signed-off-by: Daniel Stone 
---
 src/mesa/drivers/dri/i965/intel_screen.c | 56 +---
 1 file changed, 29 insertions(+), 27 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index 61d33311142..7dfaec63779 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1312,42 +1312,44 @@ intel_query_dma_buf_modifiers(__DRIscreen *_screen, int 
fourcc, int max,
 static __DRIimage *
 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
 {
-int width, height, offset, stride, dri_format, index;
-const struct intel_image_format *f;
+int width, height, offset, stride, dri_format;
 __DRIimage *image;
 
-if (parent == NULL) {
+if (parent == NULL)
return NULL;
-} else if (parent->planar_format == NULL) {
-   const bool is_aux =
-  isl_drm_modifier_has_aux(parent->modifier) && plane == 1;
-   if (!is_aux)
-  return NULL;
-
-   width = parent->width;
-   height = parent->height;
-   dri_format = parent->dri_format;
-   offset = parent->aux_offset;
-   stride = parent->aux_pitch;
-} else {
-   /* Planar formats don't support aux buffers/images */
-   assert(!isl_drm_modifier_has_aux(parent->modifier));
-   f = parent->planar_format;
 
-   if (plane >= f->nplanes)
-  return NULL;
+width = parent->width;
+height = parent->height;
 
-   width = parent->width >> f->planes[plane].width_shift;
-   height = parent->height >> f->planes[plane].height_shift;
+const struct intel_image_format *f = parent->planar_format;
+
+if (f && plane < f->nplanes) {
+   /* Use the planar format definition. */
+   width >>= f->planes[plane].width_shift;
+   height >>= f->planes[plane].height_shift;
dri_format = f->planes[plane].dri_format;
-   index = f->planes[plane].buffer_index;
+   int index = f->planes[plane].buffer_index;
offset = parent->offsets[index];
stride = parent->strides[index];
+} else if (plane == 0) {
+   /* The only plane of a non-planar image: copy the parent definition
+* directly. */
+   dri_format = parent->dri_format;
+   offset = parent->offset;
+   stride = parent->pitch;
+} else if (plane == 1 && parent->modifier != DRM_FORMAT_MOD_INVALID &&
+   isl_drm_modifier_has_aux(parent->modifier)) {
+   /* Auxiliary plane */
+   dri_format = parent->dri_format;
+   offset = parent->aux_offset;
+   stride = parent->aux_pitch;
+} else {
+   return NULL;
+}
 
-   if (offset + height * stride > parent->bo->size) {
-  _mesa_warning(NULL, "intel_create_sub_image: subimage out of 
bounds");
-  return NULL;
-   }
+if (offset + height * stride > parent->bo->size) {
+   _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
+   return NULL;
 }
 
 image = intel_allocate_image(parent->screen, dri_format, loaderPrivate);
-- 
2.14.3

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Re: [Mesa-dev] [PATCH] i965: Fix bugs in intel_from_planar

[Jason Ekstrand]

On Mon, Feb 12, 2018 at 9:45 AM, Daniel Stone  wrote:

> Hi,
>
> On 12 February 2018 at 17:16, Jason Ekstrand  wrote:
> > On Mon, Feb 12, 2018 at 6:36 AM, Daniel Stone 
> wrote:
> >> On further thought, I don't see how this could work at all. If we call
> >> fromPlanar on plane 0 of a non-planar image with an aux plane, we need
> >> to land in the first branch (due to the assert). But since plane 0 is
> >> strictly less than the number of planes 1, we don't.
> >>
> >> I think something like this: https://hastebin.com/axuqorenax
> >
> > I like that.  Mind making a proper patch out of it (not based on this
> one)
> > and sending to the list?  Between the four of us, maybe we can write this
> > correctly. :-)
>
> Oh yeah. I'm just waiting for my repo to get reactivated for CI
> runners, so I can find out what I broke with that strawman. :)
>

Eh.  Just send it to the list.  I can run it through CI.

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[Mesa-dev] [Bug 104820] White screen in SDDM after upgrade to latest padoka

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104820

--- Comment #11 from Roman Gilg  ---
Apparently this is a bug in Qt: https://bugreports.qt.io/browse/QTBUG-66348

Workaround is to delete $HOME/.cache/qtshadercache

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Re: [Mesa-dev] [PATCH] i965: Fix bugs in intel_from_planar

[Daniel Stone]

Hi,

On 12 February 2018 at 17:16, Jason Ekstrand  wrote:
> On Mon, Feb 12, 2018 at 6:36 AM, Daniel Stone  wrote:
>> On further thought, I don't see how this could work at all. If we call
>> fromPlanar on plane 0 of a non-planar image with an aux plane, we need
>> to land in the first branch (due to the assert). But since plane 0 is
>> strictly less than the number of planes 1, we don't.
>>
>> I think something like this: https://hastebin.com/axuqorenax
>
> I like that.  Mind making a proper patch out of it (not based on this one)
> and sending to the list?  Between the four of us, maybe we can write this
> correctly. :-)

Oh yeah. I'm just waiting for my repo to get reactivated for CI
runners, so I can find out what I broke with that strawman. :)

Cheers,
Daniel
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[Mesa-dev] [Bug 104820] White screen in SDDM after upgrade to latest padoka

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104820

Emil Velikov  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|REOPENED|RESOLVED

--- Comment #10 from Emil Velikov  ---
Reopening old bugs with "me too" doesn't help much, do file new ones.

Please work with your packager/distro tracking down the component you have
based on the current suggestions.

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Re: [Mesa-dev] [PATCH] i965: Fix bugs in intel_from_planar

[Jason Ekstrand]

On Mon, Feb 12, 2018 at 6:36 AM, Daniel Stone  wrote:

> Hi,
>
> On 10 February 2018 at 06:50, Jason Ekstrand  wrote:
> > -} else if (parent->planar_format == NULL) {
> > +
> > +const struct intel_image_format *f = parent->planar_format;
> > +const int nplanes = f ? f->nplanes : 1;
> > +
> > +if (plane > nplanes) {
> > +   if (parent->modifier == DRM_FORMAT_MOD_INVALID)
> > +  return NULL;
> > +
> > const bool is_aux =
> >isl_drm_modifier_has_aux(parent->modifier) && plane == 1;
> > if (!is_aux)
> > @@ -1332,10 +1338,6 @@ intel_from_planar(__DRIimage *parent, int plane,
> void *loaderPrivate)
> >  } else {
> > /* Planar formats don't support aux buffers/images */
> > assert(!isl_drm_modifier_has_aux(parent->modifier));
> > -   f = parent->planar_format;
> > -
> > -   if (plane >= f->nplanes)
> > -  return NULL;
>
> On further thought, I don't see how this could work at all. If we call
> fromPlanar on plane 0 of a non-planar image with an aux plane, we need
> to land in the first branch (due to the assert). But since plane 0 is
> strictly less than the number of planes 1, we don't.
>
> I think something like this: https://hastebin.com/axuqorenax
>

I like that.  Mind making a proper patch out of it (not based on this one)
and sending to the list?  Between the four of us, maybe we can write this
correctly. :-)

--Jason
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Re: [Mesa-dev] [PATCH] disk cache: move path creation back to constructor

[Emil Velikov]

On 9 February 2018 at 05:44, Tapani Pälli  wrote:
> This patch moves disk cache path and index creation back to the
> constructor which matches previous behavior. We still allow create
> to succeed without path so that cache can be used with callback
> functionality.
>
> Fixes: c95d3ed091 "disk cache: create cache even if path creation fails"
> Signed-off-by: Tapani Pälli 
> ---
The commit sha + name seems off with the correct one below. This patch
has landed, so I'm just mentioning for posterity/stable purposes.

-Emil

commit 6a651b6b77b68db71a027c826abccc843ace88ef
Author: Tapani Pälli 
Date:   Mon Jan 22 11:55:06 2018 +0200

   disk cache: initialize cache path and index only when used
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[Mesa-dev] [PATCH] Move setting current_pipeline to cmd_state_init

[Jason Ekstrand]

We were setting current_pipeline to UINT32_MAX and then calling
cmd_cmd_state_reset which memsets the entire state struct to 0 which
implicitly resets current_pipeline to 3D.  I have no idea how this
hasn't caused everything to explode.

Fixes: cd3feea74582 "anv/cmd_buffer: Rework anv_cmd_state_reset"
cc: mesa-sta...@lists.freedesktop.org
---
 src/intel/vulkan/anv_cmd_buffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index 6980281..160ff53 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -119,6 +119,7 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
 
memset(state, 0, sizeof(*state));
 
+   state->current_pipeline = UINT32_MAX;
state->restart_index = UINT32_MAX;
state->gfx.dynamic = default_dynamic_state;
 }
@@ -292,7 +293,6 @@ VkResult
 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
 {
cmd_buffer->usage_flags = 0;
-   cmd_buffer->state.current_pipeline = UINT32_MAX;
anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
anv_cmd_state_reset(cmd_buffer);
 
-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH] gallium/hud: add pipe context parameter to extra HUD queries

[Marek Olšák]

Reviewed-by: Marek Olšák 

Marek

On Mon, Feb 12, 2018 at 5:05 PM, Lucas Stach  wrote:
> Those have been missed when the new parameter was introduced, leading to
> incompatible pointer assignement warnings.
>
> Fixes: 3132afdf4c12 (gallium/hud: pass pipe_context explicitly to most 
> functions)
> CC: 
> Signed-off-by: Lucas Stach 
> ---
>  src/gallium/auxiliary/hud/hud_cpufreq.c  | 2 +-
>  src/gallium/auxiliary/hud/hud_diskstat.c | 2 +-
>  src/gallium/auxiliary/hud/hud_sensors_temp.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/auxiliary/hud/hud_cpufreq.c 
> b/src/gallium/auxiliary/hud/hud_cpufreq.c
> index f5b7c0f2eb49..78a660795c40 100644
> --- a/src/gallium/auxiliary/hud/hud_cpufreq.c
> +++ b/src/gallium/auxiliary/hud/hud_cpufreq.c
> @@ -91,7 +91,7 @@ get_file_value(const char *fn, uint64_t *KHz)
>  }
>
>  static void
> -query_cfi_load(struct hud_graph *gr)
> +query_cfi_load(struct hud_graph *gr, struct pipe_context *pipe)
>  {
> struct cpufreq_info *cfi = gr->query_data;
>
> diff --git a/src/gallium/auxiliary/hud/hud_diskstat.c 
> b/src/gallium/auxiliary/hud/hud_diskstat.c
> index 44174d655db9..7eaaf35a7c7d 100644
> --- a/src/gallium/auxiliary/hud/hud_diskstat.c
> +++ b/src/gallium/auxiliary/hud/hud_diskstat.c
> @@ -117,7 +117,7 @@ get_file_values(const char *fn, struct stat_s *s)
>  }
>
>  static void
> -query_dsi_load(struct hud_graph *gr)
> +query_dsi_load(struct hud_graph *gr, struct pipe_context *pipe)
>  {
> /* The framework calls us periodically, compensate for the
>  * calling interval accordingly when reporting per second.
> diff --git a/src/gallium/auxiliary/hud/hud_sensors_temp.c 
> b/src/gallium/auxiliary/hud/hud_sensors_temp.c
> index 4d3a11b1c9c1..c26e7b9b2a70 100644
> --- a/src/gallium/auxiliary/hud/hud_sensors_temp.c
> +++ b/src/gallium/auxiliary/hud/hud_sensors_temp.c
> @@ -154,7 +154,7 @@ find_sti_by_name(const char *n, unsigned int mode)
>  }
>
>  static void
> -query_sti_load(struct hud_graph *gr)
> +query_sti_load(struct hud_graph *gr, struct pipe_context *pipe)
>  {
> struct sensors_temp_info *sti = gr->query_data;
> uint64_t now = os_time_get();
> --
> 2.15.1
>
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Re: [Mesa-dev] [PATCH 4/4] radv: Return NULL for entrypoints when not supported.

[Emil Velikov]

Hi Bas,

On 11 February 2018 at 15:29, Bas Nieuwenhuizen  
wrote:
> This implements strict checking for the entrypoint ProcAddr
> functions.
>
>  - InstanceProcAddr with instance = NULL, only returns the 3 allowed
>entrypoints.
>  - DeviceProcAddr does not return any instance entrypoints.
>  - InstanceProcAddr does not return non-supported or disabled
>instance entrypoints.
>  - DeviceProcAddr does not return non-supported or disabled device
>entrypoints.
>  - InstanceProcAddr still returns non-supported device entrypoints.
> ---
>  src/amd/vulkan/radv_device.c   | 18 +++---
>  src/amd/vulkan/radv_entrypoints_gen.py | 66 
> --
>  src/amd/vulkan/radv_private.h  |  6 +++-
>  src/amd/vulkan/radv_wsi.c  |  2 +-
>  4 files changed, 83 insertions(+), 9 deletions(-)
>
Have you thought about splitting out the device specifics* and sharing the rest.
It should save you all the cross-porting, plus it'll add things like
radv_entrypoint_is_enabled NULL instance handling back to ANV.

Quick looks flags the following as device specific:
*_extensions.py
 - MAX_API_VERSION(?)
 - EXTENSIONS and respective extension structs/enums/data names

*_entrypoints_gen.py
 - LAYERS
 - dispatch table struct/enum/data names
 - *_resolve_entrypoint()
 - *_private.h

-Emil
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Re: [Mesa-dev] [PATCH] nir/spirv: add gl_spirv_validation method

[Jason Ekstrand]

On Tue, Jan 23, 2018 at 7:04 AM, Alejandro Piñeiro 
wrote:

> Gentle ping to Jason, as he probably missed that I was trying (but
> failed) to make a question. See below (also skipped most of the original
> email)
>
>
> On 18/01/18 13:31, Alejandro Piñeiro wrote:
> >
> > +
> > +#include "nir_spirv.h"
> > +
> > +#include "vtn_private.h"
> > +#include "spirv_info.h"
> > +
> > +static bool
> > +vtn_validate_preamble_instruction(struct vtn_builder *b, SpvOp
> > opcode,
> > +  const uint32_t *w, unsigned count)
> >
> >
> > I think you could probably re-use all of
> > vtn_handle_preamble_instruction.  It would do a bit more than strictly
> > needed (like handle capabilities) but I don't see any harm in it.
> >> Ok, will try to re-use it.
> > Well, I tried, and here the situation: as the validation is doing the
> > barely minimum to check for the errors defined at the method
> > glSpecializeShader, we are also passing it the barely minimum parameters
> > needed. So we are not passing spirv_to_nir_options. So if we try to
> > reuse vtn_handle_preamble_instruction during the validation, we start to
> > get several "Unsupported SPIR-V capabilities" vtn_warnings. So the
> > option is passing the spirv_to_nir_options here too, or just keep the
> > simplified version that this patch already includes.
>
> What option would you prefer? Pass the spirv_to_nir_options to the
> validation method in order to be able to reuse
> vtn_handle_preamble_instruction, or as it is not really needed for this
> validation, not pass the spirv_to_nir_options and keep a simplified
> version of such method in order to avoid those vtn_warnings?
>

Just keeping the simplified version is fine with me.  I was hoping to save
you some typing but didn't know that it would cause problems.
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Re: [Mesa-dev] [PATCH 5/5] ac/nir: add nir_intrinsic_{load, store}_shared support

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák 

Marek

On Fri, Feb 9, 2018 at 2:48 AM, Timothy Arceri  wrote:
> ---
>  src/amd/common/ac_nir_to_llvm.c | 46 
> +
>  1 file changed, 46 insertions(+)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index db692919ce..c69aaed7ed 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -3918,6 +3918,46 @@ visit_load_local_invocation_index(struct 
> nir_to_llvm_context *ctx)
> return LLVMBuildAdd(ctx->builder, result, thread_id, "");
>  }
>
> +static LLVMValueRef
> +visit_load_shared(struct ac_nir_context *ctx,
> +  const nir_intrinsic_instr *instr)
> +{
> +   LLVMValueRef values[4], derived_ptr, index, ret;
> +
> +   LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
> +
> +   for (int chan = 0; chan < instr->num_components; chan++) {
> +   index = LLVMConstInt(ctx->ac.i32, chan, 0);
> +   derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, , 1, 
> "");
> +   values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, 
> "");
> +   }
> +
> +   ret = ac_build_gather_values(>ac, values, instr->num_components);
> +   return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, 
> >dest.ssa), "");
> +}
> +
> +static void
> +visit_store_shared(struct ac_nir_context *ctx,
> +  const nir_intrinsic_instr *instr)
> +{
> +   LLVMValueRef derived_ptr, data,index;
> +   LLVMBuilderRef builder = ctx->ac.builder;
> +
> +   LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
> +   LLVMValueRef src = get_src(ctx, instr->src[0]);
> +
> +   int writemask = nir_intrinsic_write_mask(instr);
> +   for (int chan = 0; chan < 4; chan++) {
> +   if (!(writemask & (1 << chan))) {
> +   continue;
> +   }
> +   data = ac_llvm_extract_elem(>ac, src, chan);
> +   index = LLVMConstInt(ctx->ac.i32, chan, 0);
> +   derived_ptr = LLVMBuildGEP(builder, ptr, , 1, "");
> +   LLVMBuildStore(builder, data, derived_ptr);
> +   }
> +}
> +
>  static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
>  const nir_intrinsic_instr *instr,
>  LLVMValueRef ptr)
> @@ -4440,6 +4480,12 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
> case nir_intrinsic_store_var:
> visit_store_var(ctx, instr);
> break;
> +   case nir_intrinsic_load_shared:
> +   result = visit_load_shared(ctx, instr);
> +   break;
> +   case nir_intrinsic_store_shared:
> +   visit_store_shared(ctx, instr);
> +   break;
> case nir_intrinsic_image_load:
> result = visit_image_load(ctx, instr);
> break;
> --
> 2.14.3
>
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Re: [Mesa-dev] [PATCH 1/7] vulkan: Add KHR_display extension to anv and radv using DRM

[Emil Velikov]

Hi Keith,

A few top level comments:

 - using card/primary node and (missing) authentication
Current code opens the primary node when VK_KHR_display is available.
Thus running a platform=drm,x11,wayland build will fail, as the client
is not authenticated with the X/WL server.

 - reuse "drm" as a shorthand for the "display"
We've been using drm for egl/gbm, va/drm, etc, one less platform plus
no equivalent in either of egl/va/...

 - remove conditional compilation based on library version/features.
Eg. checks like the following should be avoided.
#if DRM_EVENT_CONTEXT_VERSION

 - use drmModeAddFB2 (or the withModifiers version even) over drmModeAddFB
Might help with the XXX just above it ;-)

 - the spec says we're at VK_KHR_display rev 21, while the code advertises rev1
Extension('VK_KHR_display',   1,
'VK_USE_PLATFORM_DISPLAY_KHR'),

 - there are plenty of unnecessary of headers #include(d)

 - we could simplify the ifdef spaghetti by making
wsi_*_{init,finish}_wsi empty stubs
Definitely something that can be done, independently of your work.

HTH
Emil
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[Mesa-dev] [PATCH] gallium/hud: add pipe context parameter to extra HUD queries

[Lucas Stach]

Those have been missed when the new parameter was introduced, leading to
incompatible pointer assignement warnings.

Fixes: 3132afdf4c12 (gallium/hud: pass pipe_context explicitly to most 
functions)
CC: 
Signed-off-by: Lucas Stach 
---
 src/gallium/auxiliary/hud/hud_cpufreq.c  | 2 +-
 src/gallium/auxiliary/hud/hud_diskstat.c | 2 +-
 src/gallium/auxiliary/hud/hud_sensors_temp.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/hud/hud_cpufreq.c 
b/src/gallium/auxiliary/hud/hud_cpufreq.c
index f5b7c0f2eb49..78a660795c40 100644
--- a/src/gallium/auxiliary/hud/hud_cpufreq.c
+++ b/src/gallium/auxiliary/hud/hud_cpufreq.c
@@ -91,7 +91,7 @@ get_file_value(const char *fn, uint64_t *KHz)
 }
 
 static void
-query_cfi_load(struct hud_graph *gr)
+query_cfi_load(struct hud_graph *gr, struct pipe_context *pipe)
 {
struct cpufreq_info *cfi = gr->query_data;
 
diff --git a/src/gallium/auxiliary/hud/hud_diskstat.c 
b/src/gallium/auxiliary/hud/hud_diskstat.c
index 44174d655db9..7eaaf35a7c7d 100644
--- a/src/gallium/auxiliary/hud/hud_diskstat.c
+++ b/src/gallium/auxiliary/hud/hud_diskstat.c
@@ -117,7 +117,7 @@ get_file_values(const char *fn, struct stat_s *s)
 }
 
 static void
-query_dsi_load(struct hud_graph *gr)
+query_dsi_load(struct hud_graph *gr, struct pipe_context *pipe)
 {
/* The framework calls us periodically, compensate for the
 * calling interval accordingly when reporting per second.
diff --git a/src/gallium/auxiliary/hud/hud_sensors_temp.c 
b/src/gallium/auxiliary/hud/hud_sensors_temp.c
index 4d3a11b1c9c1..c26e7b9b2a70 100644
--- a/src/gallium/auxiliary/hud/hud_sensors_temp.c
+++ b/src/gallium/auxiliary/hud/hud_sensors_temp.c
@@ -154,7 +154,7 @@ find_sti_by_name(const char *n, unsigned int mode)
 }
 
 static void
-query_sti_load(struct hud_graph *gr)
+query_sti_load(struct hud_graph *gr, struct pipe_context *pipe)
 {
struct sensors_temp_info *sti = gr->query_data;
uint64_t now = os_time_get();
-- 
2.15.1

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Re: [Mesa-dev] [PATCH 2/3] Revert "disk cache: initialize cache path and index only when used"

[Marek Olšák]

radeonsi uses the shader cache from multiple threads.

Marek

On Fri, Feb 9, 2018 at 4:59 AM, Timothy Arceri  wrote:
> This reverts commit 6a651b6b77b68db71a027c826abccc843ace88ef.
>
> This change was not thread safe. Applications are allowed to compile
> multiple programs attached to the same context in different threads
> which means we can end up with multiple threads inside
> disk_cache_path_init() or thinking disk_cache_path_init() has
> completed when it hasn't causing various problems.
>
> This change was also causing piglit runs to deadlock with radeonsi
> on a Ryzen 1800X (8 cores), I don't believe shader runner does
> threaded compiles so I'm unsure of the exact root of this additional
> problem.
> ---
>  src/util/disk_cache.c | 129 
> +++---
>  1 file changed, 49 insertions(+), 80 deletions(-)
>
> diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
> index dec5a67a79..2884d3c9c1 100644
> --- a/src/util/disk_cache.c
> +++ b/src/util/disk_cache.c
> @@ -77,7 +77,6 @@
>  struct disk_cache {
> /* The path to the cache directory. */
> char *path;
> -   bool path_init_failed;
>
> /* Thread queue for compressing and writing cache entries to disk */
> struct util_queue cache_queue;
> @@ -179,20 +178,37 @@ concatenate_and_mkdir(void *ctx, const char *path, 
> const char *name)
>return NULL;
>  }
>
> -static bool
> -disk_cache_path_init(struct disk_cache *cache)
> +#define DRV_KEY_CPY(_dst, _src, _src_size) \
> +do {   \
> +   memcpy(_dst, _src, _src_size);  \
> +   _dst += _src_size;  \
> +} while (0);
> +
> +struct disk_cache *
> +disk_cache_create(const char *gpu_name, const char *timestamp,
> +  uint64_t driver_flags)
>  {
> -   void *local = NULL;
> -   char *path;
> +   void *local;
> +   struct disk_cache *cache = NULL;
> +   char *path, *max_size_str;
> +   uint64_t max_size;
> int fd = -1;
> struct stat sb;
> size_t size;
>
> +   /* If running as a users other than the real user disable cache */
> +   if (geteuid() != getuid())
> +  return NULL;
> +
> /* A ralloc context for transient data during this invocation. */
> local = ralloc_context(NULL);
> if (local == NULL)
>goto fail;
>
> +   /* At user request, disable shader cache entirely. */
> +   if (env_var_as_boolean("MESA_GLSL_CACHE_DISABLE", false))
> +  goto fail;
> +
> /* Determine path for cache based on the first defined name as follows:
>  *
>  *   $MESA_GLSL_CACHE_DIR
> @@ -257,6 +273,10 @@ disk_cache_path_init(struct disk_cache *cache)
>   goto fail;
> }
>
> +   cache = ralloc(NULL, struct disk_cache);
> +   if (cache == NULL)
> +  goto fail;
> +
> cache->path = ralloc_strdup(cache, path);
> if (cache->path == NULL)
>goto fail;
> @@ -305,58 +325,6 @@ disk_cache_path_init(struct disk_cache *cache)
> cache->size = (uint64_t *) cache->index_mmap;
> cache->stored_keys = cache->index_mmap + sizeof(uint64_t);
>
> -   /* 1 thread was chosen because we don't really care about getting things
> -* to disk quickly just that it's not blocking other tasks.
> -*
> -* The queue will resize automatically when it's full, so adding new jobs
> -* doesn't stall.
> -*/
> -   util_queue_init(>cache_queue, "disk_cache", 32, 1,
> -   UTIL_QUEUE_INIT_RESIZE_IF_FULL |
> -   UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY);
> -
> -   ralloc_free(local);
> -
> -   return true;
> -
> - fail:
> -   if (fd != -1)
> -  close(fd);
> -
> -   if (local)
> -  ralloc_free(local);
> -
> -   cache->path_init_failed = true;
> -
> -   return false;
> -}
> -
> -#define DRV_KEY_CPY(_dst, _src, _src_size) \
> -do {   \
> -   memcpy(_dst, _src, _src_size);  \
> -   _dst += _src_size;  \
> -} while (0);
> -
> -struct disk_cache *
> -disk_cache_create(const char *gpu_name, const char *timestamp,
> -  uint64_t driver_flags)
> -{
> -   struct disk_cache *cache = NULL;
> -   char *max_size_str;
> -   uint64_t max_size;
> -
> -   /* If running as a users other than the real user disable cache */
> -   if (geteuid() != getuid())
> -  return NULL;
> -
> -   /* At user request, disable shader cache entirely. */
> -   if (env_var_as_boolean("MESA_GLSL_CACHE_DISABLE", false))
> -  return NULL;
> -
> -   cache = rzalloc(NULL, struct disk_cache);
> -   if (cache == NULL)
> -  return NULL;
> -
> max_size = 0;
>
> max_size_str = getenv("MESA_GLSL_CACHE_MAX_SIZE");
> @@ -392,6 +360,16 @@ disk_cache_create(const char *gpu_name, const char 
> *timestamp,
>
> cache->max_size = max_size;
>
> +   /* 1 thread was chosen because we don't really care about getting things
> +* to disk quickly just that it's not blocking other tasks.
> +*
> +* The queue will resize automatically 

Re: [Mesa-dev] [PATCH 3/3] Revert "i965: add __DRI2_BLOB support and set cache functions"

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák 

Marek

On Fri, Feb 9, 2018 at 4:59 AM, Timothy Arceri  wrote:
> This reverts commit 9d322fde9781f9fc53c3baac6995ab1cbd8d6135.
> ---
>  src/mesa/drivers/dri/i965/intel_screen.c | 21 -
>  1 file changed, 21 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 1f866cf845..8c78b73b64 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -36,7 +36,6 @@
>  #include "main/version.h"
>  #include "swrast/s_renderbuffer.h"
>  #include "util/ralloc.h"
> -#include "util/disk_cache.h"
>  #include "brw_defines.h"
>  #include "brw_state.h"
>  #include "compiler/nir/nir.h"
> @@ -1495,19 +1494,6 @@ brw_query_renderer_string(__DRIscreen *dri_screen,
> return -1;
>  }
>
> -static void
> -brw_set_cache_funcs(__DRIscreen *dri_screen,
> -__DRIblobCacheSet set, __DRIblobCacheGet get)
> -{
> -   const struct intel_screen *const screen =
> -  (struct intel_screen *) dri_screen->driverPrivate;
> -
> -   if (!screen->disk_cache)
> -  return;
> -
> -   disk_cache_set_callbacks(screen->disk_cache, set, get);
> -}
> -
>  static const __DRI2rendererQueryExtension intelRendererQueryExtension = {
> .base = { __DRI2_RENDERER_QUERY, 1 },
>
> @@ -1519,11 +1505,6 @@ static const __DRIrobustnessExtension dri2Robustness = 
> {
> .base = { __DRI2_ROBUSTNESS, 1 }
>  };
>
> -static const __DRI2blobExtension intelBlobExtension = {
> -   .base = { __DRI2_BLOB, 1 },
> -   .set_cache_funcs = brw_set_cache_funcs
> -};
> -
>  static const __DRIextension *screenExtensions[] = {
>  ,
>  ,
> @@ -1532,7 +1513,6 @@ static const __DRIextension *screenExtensions[] = {
>  ,
>  ,
>  ,
> -,
>  NULL
>  };
>
> @@ -1545,7 +1525,6 @@ static const __DRIextension 
> *intelRobustScreenExtensions[] = {
>  ,
>  ,
>  ,
> -,
>  NULL
>  };
>
> --
> 2.14.3
>
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[Mesa-dev] [Bug 102077] multilib mesa fail to build with "egl/drivers/dri2/platform_drm.c:542: undefined reference to `gbm_bo_get_bpp'"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102077

--- Comment #4 from Emil Velikov  ---
(In reply to Nix from comment #3)
> This is actually a Mesa bug: the install-time link of libEGL.la is picking
> up libgbm from the installation prefix rather than the $DESTDIR-prepended
> prefix: for some reason --inst-prefix-dir isn't working.
> 
> I, too, would be inclined to ignore it on the grounds that the whole mess
> will be thrown overboard once Meson becomes the build system.

Pretty much all of this is wrong and off-topic. Arch has a broken circular
dependency, which is part of the problem.

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Re: [Mesa-dev] [PATCH 1/7] vulkan: Add KHR_display extension to anv and radv using DRM

[Eric Engestrom]

On Friday, 2018-02-09 20:45:10 -0800, Keith Packard wrote:
> This adds support for the KHR_display extension to the anv and radv
> Vulkan drivers. The drivers now attempt to open the master DRM node
> when the KHR_display extension is requested so that the common winsys
> code can perform the necessary operations.
> 
> Signed-off-by: Keith Packard 
> ---
>  configure.ac   |1 +
>  meson.build|4 +-
>  src/amd/vulkan/Makefile.am |8 +
>  src/amd/vulkan/Makefile.sources|3 +
>  src/amd/vulkan/meson.build |7 +
>  src/amd/vulkan/radv_device.c   |   28 +-
>  src/amd/vulkan/radv_extensions.py  |7 +-
>  src/amd/vulkan/radv_private.h  |2 +
>  src/amd/vulkan/radv_wsi.c  |3 +-
>  src/amd/vulkan/radv_wsi_display.c  |  143 
>  src/intel/Makefile.sources |3 +
>  src/intel/Makefile.vulkan.am   |7 +
>  src/intel/vulkan/anv_device.c  |   18 +-
>  src/intel/vulkan/anv_extensions.py |1 +
>  src/intel/vulkan/anv_extensions_gen.py |5 +-
>  src/intel/vulkan/anv_wsi.c |3 +-
>  src/intel/vulkan/anv_wsi_display.c |  129 +++
>  src/intel/vulkan/meson.build   |7 +
>  src/vulkan/Makefile.am |7 +
>  src/vulkan/Makefile.sources|4 +
>  src/vulkan/wsi/meson.build |   10 +
>  src/vulkan/wsi/wsi_common.c|   19 +-
>  src/vulkan/wsi/wsi_common.h|5 +-
>  src/vulkan/wsi/wsi_common_display.c| 1368 
> 
>  src/vulkan/wsi/wsi_common_display.h|   72 ++
>  src/vulkan/wsi/wsi_common_private.h|   10 +
>  26 files changed, 1858 insertions(+), 16 deletions(-)
>  create mode 100644 src/amd/vulkan/radv_wsi_display.c
>  create mode 100644 src/intel/vulkan/anv_wsi_display.c
>  create mode 100644 src/vulkan/wsi/wsi_common_display.c
>  create mode 100644 src/vulkan/wsi/wsi_common_display.h
> 
> diff --git a/configure.ac b/configure.ac
> index 8ed606c7694..46318365603 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1849,6 +1849,7 @@ fi
>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
>  AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, echo "$platforms" | grep -q 'wayland')
>  AM_CONDITIONAL(HAVE_PLATFORM_DRM, echo "$platforms" | grep -q 'drm')
> +AM_CONDITIONAL(HAVE_PLATFORM_DISPLAY, echo "$platforms" | grep -q 'drm')

copy/paste error: s/drm/display/

>  AM_CONDITIONAL(HAVE_PLATFORM_SURFACELESS, echo "$platforms" | grep -q 
> 'surfaceless')
>  AM_CONDITIONAL(HAVE_PLATFORM_ANDROID, echo "$platforms" | grep -q 'android')
>  
> diff --git a/meson.build b/meson.build
> index b39e2f8ab96..aeb7f5e2917 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -239,11 +239,12 @@ with_platform_wayland = false
>  with_platform_x11 = false
>  with_platform_drm = false
>  with_platform_surfaceless = false
> +with_platform_display = false
>  egl_native_platform = ''
>  _platforms = get_option('platforms')
>  if _platforms == 'auto'
>if system_has_kms_drm
> -_platforms = 'x11,wayland,drm,surfaceless'
> +_platforms = 'x11,wayland,drm,surfaceless,display'
>elif ['darwin', 'windows', 'cygwin'].contains(host_machine.system())
>  _platforms = 'x11,surfaceless'
>else
> @@ -257,6 +258,7 @@ if _platforms != ''
>with_platform_wayland = _split.contains('wayland')
>with_platform_drm = _split.contains('drm')
>with_platform_surfaceless = _split.contains('surfaceless')
> +  with_platform_display = _split.contains('display')
>egl_native_platform = _split[0]
>  endif
>  
> diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
> index 61025968942..061b8144b88 100644
> --- a/src/amd/vulkan/Makefile.am
> +++ b/src/amd/vulkan/Makefile.am
> @@ -76,6 +76,14 @@ VULKAN_LIB_DEPS = \
>   $(DLOPEN_LIBS) \
>   -lm
>  
> +if HAVE_PLATFORM_DISPLAY
> +AM_CPPFLAGS += \
> + -DVK_USE_PLATFORM_DISPLAY_KHR
> +
> +VULKAN_SOURCES += $(VULKAN_WSI_DISPLAY_FILES)
> +
> +endif
> +
>  if HAVE_PLATFORM_X11
>  AM_CPPFLAGS += \
>   $(XCB_DRI3_CFLAGS) \
> diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources
> index a510d88d965..618a6cdaed0 100644
> --- a/src/amd/vulkan/Makefile.sources
> +++ b/src/amd/vulkan/Makefile.sources
> @@ -78,6 +78,9 @@ VULKAN_WSI_WAYLAND_FILES := \
>  VULKAN_WSI_X11_FILES := \
>   radv_wsi_x11.c
>  
> +VULKAN_WSI_DISPLAY_FILES := \
> + radv_wsi_display.c
> +
>  VULKAN_GENERATED_FILES := \
>   radv_entrypoints.c \
>   radv_entrypoints.h \
> diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
> index 0a7b7c0bf3c..b7bb1075e7d 100644
> --- a/src/amd/vulkan/meson.build
> +++ b/src/amd/vulkan/meson.build
> @@ -112,6 +112,13 @@ if with_platform_wayland
>libradv_files += files('radv_wsi_wayland.c')
>  endif
>  
> +if with_platform_display
> +  radv_flags += [
> +

Re: [Mesa-dev] [PATCH] Haiku: convert to autotools

[Emil Velikov]

On 5 February 2018 at 22:14, kallisti5  wrote:
> On 2018-02-05 15:39, Dylan Baker wrote:
>>
>> Quoting kallisti5 (2018-02-05 12:58:30)
>>>
>>> On 2017-10-24 11:47, Emil Velikov wrote:
>>> > Hi Jerome,
>>> >
>>> > On 23 October 2017 at 16:58, Jerome Duval 
>>> > wrote:
>>> >> * configure.ac:
>>> >>   -pthread is not available on Haiku.
>>> >>   Haiku doesn't require --enable-dri
>>> >>   build hgl on Haiku
>>> >> * egl/Makefile.am: define backendfiles for Haiku
>>> >> * src/gallium/Makefile.am: build winsys/sw/hgl, state_trackers/hgl and
>>> >> targets/haiku-softpipe on Haiku.
>>> >> * src/gallium/targets/haiku-softpipe: add Makefile.am
>>> >> * src/gallium/state_trackers/hgl: add Makefile.am
>>> >> * winsys/sw/hgl: add Makefile.am
>>> >> * src/hgl/Makefile.am: add Makefile.am
>>> >> ---
>>> > Thanks for the patch. I think Eric has a point regarding splitting this
>>> > up.
>>> > Here is one way to handle it:
>>> >  - patch 1 - the driver, aka st/hgl + sw/hgl + targets/haiku
>>> >  - 2 - src/egl
>>> >  - 3 - src/hgl
>>> >  - 4 misc fixes (the SoftwareRenderer.cpp hunk?)
>>> >  - 5 toggle - configure.ac + src/Makefile.am
>>>
>>> Hm, it looks like Jerome never got back to work on these changes... let
>>> me try to
>>> pick up the ball and run with it.
>>>
>>> > Couple of small suggestions:
>>> >  - keep all the sources and headers in the sources lists in
>>> > Makefile.sources
>>> >  - how do you guys manage pthreads - please mention that in the commit
>>> > message.
>>> >
>>> > If I'm reading this correctly, you strip out -pthread and there's no
>>> > pthread-stubs on Haiku.
>>>
>>> Haiku (and BeOS for that matter) has pthread support built into its core
>>> libroot.so.
>>>
>>> No need for -lpthread, all applications can assume its presence. Things
>>> that link -lpthread actually fail due to a non-existant libpthread...
>>> *however* as i'm typing this i'm being told we recently implemented a
>>> dummy static libpthread.a to try and appease assumptions about -lpthread
>>> existence so i'll remove the pthread checks :-)
>>>

Seems like an extra L was added where it's not needed. Namely I
mentioned pthread (notice the lack of L)
For a while gcc/clang has worked on unifying all the pthread platform
specifics behind the -pthread toggle.

Some specifics include: presence/lack of a separate library, -D_REENTRANT,

>>>   -- Alex
>>
>>
>> Hi Alex,
>>
>> I have a branch for building haiku with meson, when I was trying to
>> compile
>> neither the scons build nor the autotools build seemed to compile on a
>> Haiku VM
>> instance (x86_64), that was a few months ago though, so maybe its fixed.
>>
>> Our plan is to remove autotools from mesa, probably this year. I'm
>> thinking if
>> things look pretty good through the 18.0 release cycle I'll probably
>> propose
>> marking autotools as deprecated for 18.1 and propose removal in 18.2.
>
>
> Ah. crap.  I just got autoconfig working :-).  Historically I have only used
> SCons for our builds.  I always preferred the SCons build since autotools
> always
> ends up looking like spaghetti.  Here is what our current build does:
>
> https://github.com/haikuports/haikuports/blob/master/sys-libs/mesa/mesa-17.1.4.recipe#L52
>
> It looks like Jerome hacked in a patch for autotools... but i've heard some
> reports
> of instability with the resulting artifacts.
>
AFAICT Jerome's work was fine, modulo the "let's do everything at
once" which tends to bite us all.
Can you please send that over, even if there's a meson support in the works.

Two is better than none ;-)

Thanks
Emil
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Re: [Mesa-dev] [PATCH v2 4/8] radeon/uvd:add uvd hevc enc hw ib implementation

[James Zhu]

Hi Mark,

thanks for point them out. [PATCH v4 3/8] / [PATCH v4 4/8] / [PATCH v4 
5/8] update accordingly.


James.


On 2018-02-08 05:13 PM, Mark Thompson wrote:

On 06/02/18 20:05, James Zhu wrote:

Implement required IBs for UVD HEVC encode.

Signed-off-by: James Zhu 
---
  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
  1 file changed, 1115 insertions(+)
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c

diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c 
b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
new file mode 100644
index 000..17a39c2
--- /dev/null
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -0,0 +1,1115 @@
+/**
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include 
+
+#include "pipe/p_video_codec.h"
+
+#include "util/u_video.h"
+#include "util/u_memory.h"
+
+#include "vl/vl_video_buffer.h"
+#include "radeonsi/si_pipe.h"
+#include "radeon_video.h"
+#include "radeon_uvd_enc.h"
+
+#define RADEON_ENC_CS(value) (enc->cs->current.buf[enc->cs->current.cdw++] = 
(value))
+#define RADEON_ENC_BEGIN(cmd) { \
+   uint32_t *begin = >cs->current.buf[enc->cs->current.cdw++]; \
+RADEON_ENC_CS(cmd)
+#define RADEON_ENC_READ(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_READ, (domain), (off))
+#define RADEON_ENC_WRITE(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_WRITE, (domain), (off))
+#define RADEON_ENC_READWRITE(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_READWRITE, (domain), (off))
+#define RADEON_ENC_END() *begin = (>cs->current.buf[enc->cs->current.cdw] 
- begin) * 4; \
+   enc->total_task_size += *begin;}
+
+static const unsigned profiles[7] = { 66, 77, 88, 100, 110, 122, 244 };

This looks very suspicious in an H.265 file, because those are H.264 profile 
values...


+static const unsigned index_to_shifts[4] = { 24, 16, 8, 0 };
+
...
+
+static void
+radeon_uvd_enc_session_init_hevc(struct radeon_uvd_encoder *enc)
+{
+   enc->enc_pic.session_init.aligned_picture_width =
+  align(enc->base.width, 64);

Do you really need to pad width to 64 rather than the MinCbSizeY?


+   enc->enc_pic.session_init.aligned_picture_height =
+  align(enc->base.height, 16);
+   enc->enc_pic.session_init.padding_width =
+  enc->enc_pic.session_init.aligned_picture_width - enc->base.width;
+   enc->enc_pic.session_init.padding_height =
+  enc->enc_pic.session_init.aligned_picture_height - enc->base.height;
+   enc->enc_pic.session_init.pre_encode_mode = RENC_UVD_PREENCODE_MODE_NONE;
+   enc->enc_pic.session_init.pre_encode_chroma_enabled = false;
+
+   RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_SESSION_INIT);
+   RADEON_ENC_CS(enc->enc_pic.session_init.aligned_picture_width);
+   RADEON_ENC_CS(enc->enc_pic.session_init.aligned_picture_height);
+   RADEON_ENC_CS(enc->enc_pic.session_init.padding_width);
+   RADEON_ENC_CS(enc->enc_pic.session_init.padding_height);
+   RADEON_ENC_CS(enc->enc_pic.session_init.pre_encode_mode);
+   RADEON_ENC_CS(enc->enc_pic.session_init.pre_encode_chroma_enabled);
+   RADEON_ENC_END();
+}
+
...
+
+static void
+radeon_uvd_enc_nalu_sps_hevc(struct radeon_uvd_encoder *enc)
+{
+   RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_INSERT_NALU_BUFFER);
+   RADEON_ENC_CS(RENC_UVD_NALU_TYPE_SPS);
+   uint32_t *size_in_bytes = >cs->current.buf[enc->cs->current.cdw++];
+   int i;
+
+   radeon_uvd_enc_reset(enc);
+   radeon_uvd_enc_set_emulation_prevention(enc, false);
+   radeon_uvd_enc_code_fixed_bits(enc, 0x0001, 32);
+   radeon_uvd_enc_code_fixed_bits(enc, 0x4201, 16);
+   radeon_uvd_enc_byte_align(enc);
+   

[Mesa-dev] [PATCH v4 4/8] radeon/uvd:add uvd hevc enc hw ib implementation

[James Zhu]

Implement required IBs for UVD HEVC encode.

Signed-off-by: James Zhu 
---
 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1131 +++
 1 file changed, 1131 insertions(+)
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c

diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c 
b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
new file mode 100644
index 000..e507bae
--- /dev/null
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -0,0 +1,1131 @@
+/**
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include 
+
+#include "pipe/p_video_codec.h"
+
+#include "util/u_video.h"
+#include "util/u_memory.h"
+
+#include "vl/vl_video_buffer.h"
+#include "radeonsi/si_pipe.h"
+#include "radeon_video.h"
+#include "radeon_uvd_enc.h"
+
+#define RADEON_ENC_CS(value) (enc->cs->current.buf[enc->cs->current.cdw++] = 
(value))
+#define RADEON_ENC_BEGIN(cmd) { \
+   uint32_t *begin = >cs->current.buf[enc->cs->current.cdw++]; \
+RADEON_ENC_CS(cmd)
+#define RADEON_ENC_READ(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_READ, (domain), (off))
+#define RADEON_ENC_WRITE(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_WRITE, (domain), (off))
+#define RADEON_ENC_READWRITE(buf, domain, off) radeon_uvd_enc_add_buffer(enc, 
(buf), RADEON_USAGE_READWRITE, (domain), (off))
+#define RADEON_ENC_END() *begin = (>cs->current.buf[enc->cs->current.cdw] 
- begin) * 4; \
+   enc->total_task_size += *begin;}
+
+static const unsigned index_to_shifts[4] = { 24, 16, 8, 0 };
+
+static void
+radeon_uvd_enc_add_buffer(struct radeon_uvd_encoder *enc,
+  struct pb_buffer *buf, enum radeon_bo_usage usage,
+  enum radeon_bo_domain domain, signed offset)
+{
+   enc->ws->cs_add_buffer(enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED,
+  domain, RADEON_PRIO_VCE);
+   uint64_t addr;
+   addr = enc->ws->buffer_get_virtual_address(buf);
+   addr = addr + offset;
+   RADEON_ENC_CS(addr >> 32);
+   RADEON_ENC_CS(addr);
+}
+
+static void
+radeon_uvd_enc_set_emulation_prevention(struct radeon_uvd_encoder *enc,
+bool set)
+{
+   if (set != enc->emulation_prevention) {
+  enc->emulation_prevention = set;
+  enc->num_zeros = 0;
+   }
+}
+
+static void
+radeon_uvd_enc_output_one_byte(struct radeon_uvd_encoder *enc,
+   unsigned char byte)
+{
+   if (enc->byte_index == 0)
+  enc->cs->current.buf[enc->cs->current.cdw] = 0;
+   enc->cs->current.buf[enc->cs->current.cdw] |=
+  ((unsigned int) (byte) << index_to_shifts[enc->byte_index]);
+   enc->byte_index++;
+
+   if (enc->byte_index >= 4) {
+  enc->byte_index = 0;
+  enc->cs->current.cdw++;
+   }
+}
+
+static void
+radeon_uvd_enc_emulation_prevention(struct radeon_uvd_encoder *enc,
+unsigned char byte)
+{
+   if (enc->emulation_prevention) {
+  if ((enc->num_zeros >= 2)
+  && ((byte == 0x00) || (byte == 0x01) || (byte == 0x03))) {
+ radeon_uvd_enc_output_one_byte(enc, 0x03);
+ enc->bits_output += 8;
+ enc->num_zeros = 0;
+  }
+  enc->num_zeros = (byte == 0 ? (enc->num_zeros + 1) : 0);
+   }
+}
+
+static void
+radeon_uvd_enc_code_fixed_bits(struct radeon_uvd_encoder *enc,
+   unsigned int value, unsigned int num_bits)
+{
+   unsigned int bits_to_pack = 0;
+
+   while (num_bits > 0) {
+  unsigned int value_to_pack = value & (0x >> (32 - num_bits));
+  bits_to_pack =
+ num_bits >
+ (32 - enc->bits_in_shifter) 

[Mesa-dev] [PATCH v4 5/8] radeon/uvd:add uvd hevc enc functions

[James Zhu]

Implement UVD hevc encode functions

Signed-off-by: James Zhu 
---
 src/gallium/drivers/radeon/radeon_uvd_enc.c | 381 
 1 file changed, 381 insertions(+)
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c

diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.c 
b/src/gallium/drivers/radeon/radeon_uvd_enc.c
new file mode 100644
index 000..94bd26a
--- /dev/null
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.c
@@ -0,0 +1,381 @@
+/**
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include 
+
+#include "pipe/p_video_codec.h"
+
+#include "util/u_video.h"
+#include "util/u_memory.h"
+
+#include "vl/vl_video_buffer.h"
+
+#include "radeonsi/si_pipe.h"
+#include "radeon_video.h"
+#include "radeon_uvd_enc.h"
+
+#define UVD_HEVC_LEVEL_1   30
+#define UVD_HEVC_LEVEL_2   60
+#define UVD_HEVC_LEVEL_2_1 63
+#define UVD_HEVC_LEVEL_3   90
+#define UVD_HEVC_LEVEL_3_1 93
+#define UVD_HEVC_LEVEL_4   120
+#define UVD_HEVC_LEVEL_4_1 123
+#define UVD_HEVC_LEVEL_5   150
+#define UVD_HEVC_LEVEL_5_1 153
+#define UVD_HEVC_LEVEL_5_2 156
+#define UVD_HEVC_LEVEL_6   180
+#define UVD_HEVC_LEVEL_6_1 183
+#define UVD_HEVC_LEVEL_6_2 186
+
+static void
+radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
+ struct pipe_h265_enc_picture_desc *pic)
+{
+   enc->enc_pic.picture_type = pic->picture_type;
+   enc->enc_pic.frame_num = pic->frame_num;
+   enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
+   enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
+   enc->enc_pic.not_referenced = pic->not_referenced;
+   enc->enc_pic.is_iframe =
+  (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_IDR)
+  || (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_I);
+   enc->enc_pic.crop_left = 0;
+   enc->enc_pic.crop_right =
+  (align(enc->base.width, 16) - enc->base.width) / 2;
+   enc->enc_pic.crop_top = 0;
+   enc->enc_pic.crop_bottom =
+  (align(enc->base.height, 16) - enc->base.height) / 2;
+   enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
+   enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
+   enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
+   enc->enc_pic.max_poc = pic->seq.intra_period;
+   enc->enc_pic.log2_max_poc = 0;
+   for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
+  i = (i >> 1);
+   enc->enc_pic.chroma_format_idc = pic->seq.chroma_format_idc;
+   enc->enc_pic.pic_width_in_luma_samples =
+  pic->seq.pic_width_in_luma_samples;
+   enc->enc_pic.pic_height_in_luma_samples =
+  pic->seq.pic_height_in_luma_samples;
+   enc->enc_pic.log2_diff_max_min_luma_coding_block_size =
+  pic->seq.log2_diff_max_min_luma_coding_block_size;
+   enc->enc_pic.log2_min_transform_block_size_minus2 =
+  pic->seq.log2_min_transform_block_size_minus2;
+   enc->enc_pic.log2_diff_max_min_transform_block_size =
+  pic->seq.log2_diff_max_min_transform_block_size;
+   enc->enc_pic.max_transform_hierarchy_depth_inter =
+  pic->seq.max_transform_hierarchy_depth_inter;
+   enc->enc_pic.max_transform_hierarchy_depth_intra =
+  pic->seq.max_transform_hierarchy_depth_intra;
+   enc->enc_pic.log2_parallel_merge_level_minus2 =
+  pic->pic.log2_parallel_merge_level_minus2;
+   enc->enc_pic.bit_depth_luma_minus8 = pic->seq.bit_depth_luma_minus8;
+   enc->enc_pic.bit_depth_chroma_minus8 = pic->seq.bit_depth_chroma_minus8;
+   enc->enc_pic.nal_unit_type = pic->pic.nal_unit_type;
+   enc->enc_pic.max_num_merge_cand = pic->slice.max_num_merge_cand;
+   enc->enc_pic.sample_adaptive_offset_enabled_flag =
+  

[Mesa-dev] [PATCH v4 3/8] radeon/uvd:add uvd hevc enc hw interface header

[James Zhu]

Add hevc encode hardware interface for UVD

Signed-off-by: James Zhu 
---
 src/gallium/drivers/radeon/radeon_uvd_enc.h | 469 
 1 file changed, 469 insertions(+)
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h

diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.h 
b/src/gallium/drivers/radeon/radeon_uvd_enc.h
new file mode 100644
index 000..20c340d
--- /dev/null
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.h
@@ -0,0 +1,469 @@
+/**
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#ifndef _RADEON_UVD_ENC_H
+#define _RADEON_UVD_ENC_H
+
+#define RENC_UVD_FW_INTERFACE_MAJOR_VERSION 1
+#define RENC_UVD_FW_INTERFACE_MINOR_VERSION 1
+
+#define RENC_UVD_IB_PARAM_SESSION_INFO  0x0001
+#define RENC_UVD_IB_PARAM_TASK_INFO 0x0002
+#define RENC_UVD_IB_PARAM_SESSION_INIT  0x0003
+#define RENC_UVD_IB_PARAM_LAYER_CONTROL 0x0004
+#define RENC_UVD_IB_PARAM_LAYER_SELECT  0x0005
+#define RENC_UVD_IB_PARAM_SLICE_CONTROL 0x0006
+#define RENC_UVD_IB_PARAM_SPEC_MISC 0x0007
+#define RENC_UVD_IB_PARAM_RATE_CONTROL_SESSION_INIT 0x0008
+#define RENC_UVD_IB_PARAM_RATE_CONTROL_LAYER_INIT   0x0009
+#define RENC_UVD_IB_PARAM_RATE_CONTROL_PER_PICTURE  0x000a
+#define RENC_UVD_IB_PARAM_SLICE_HEADER  0x000b
+#define RENC_UVD_IB_PARAM_ENCODE_PARAMS 0x000c
+#define RENC_UVD_IB_PARAM_QUALITY_PARAMS0x000d
+#define RENC_UVD_IB_PARAM_DEBLOCKING_FILTER 0x000e
+#define RENC_UVD_IB_PARAM_INTRA_REFRESH 0x000f
+#define RENC_UVD_IB_PARAM_ENCODE_CONTEXT_BUFFER 0x0010
+#define RENC_UVD_IB_PARAM_VIDEO_BITSTREAM_BUFFER0x0011
+#define RENC_UVD_IB_PARAM_FEEDBACK_BUFFER   0x0012
+#define RENC_UVD_IB_PARAM_INSERT_NALU_BUFFER0x0013
+#define RENC_UVD_IB_PARAM_FEEDBACK_BUFFER_ADDITIONAL0x0014
+
+#define RENC_UVD_IB_OP_INITIALIZE   0x0801
+#define RENC_UVD_IB_OP_CLOSE_SESSION0x0802
+#define RENC_UVD_IB_OP_ENCODE   0x0803
+#define RENC_UVD_IB_OP_INIT_RC  0x0804
+#define RENC_UVD_IB_OP_INIT_RC_VBV_BUFFER_LEVEL 0x0805
+#define RENC_UVD_IB_OP_SET_SPEED_ENCODING_MODE  0x0806
+#define RENC_UVD_IB_OP_SET_BALANCE_ENCODING_MODE0x0807
+#define RENC_UVD_IB_OP_SET_QUALITY_ENCODING_MODE0x0808
+
+#define RENC_UVD_IF_MAJOR_VERSION_MASK  0x
+#define RENC_UVD_IF_MAJOR_VERSION_SHIFT 16
+#define RENC_UVD_IF_MINOR_VERSION_MASK  0x
+#define RENC_UVD_IF_MINOR_VERSION_SHIFT 0
+
+#define RENC_UVD_PREENCODE_MODE_NONE0x
+#define RENC_UVD_PREENCODE_MODE_1X  0x0001
+#define RENC_UVD_PREENCODE_MODE_2X  0x0002
+#define RENC_UVD_PREENCODE_MODE_4X  0x0004
+
+#define RENC_UVD_SLICE_CONTROL_MODE_FIXED_CTBS  0x
+#define RENC_UVD_SLICE_CONTROL_MODE_FIXED_BITS  0x0001
+
+#define RENC_UVD_RATE_CONTROL_METHOD_NONE   0x
+#define RENC_UVD_RATE_CONTROL_METHOD_LATENCY_CONSTRAINED_VBR0x0001
+#define RENC_UVD_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR   0x0002
+#define RENC_UVD_RATE_CONTROL_METHOD_CBR0x0003
+
+#define RENC_UVD_NALU_TYPE_AUD  0x0001
+#define 

[Mesa-dev] [PATCH] ac/shader: scan force_persample

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/ac_nir_to_llvm.c |  5 ++---
 src/amd/common/ac_shader_info.c | 15 +++
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bf5b0bc1e1..86795875a1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5413,10 +5413,9 @@ handle_fs_input_decl(struct radv_shader_context *ctx,
 
if (glsl_get_base_type(glsl_without_array(variable->type)) == 
GLSL_TYPE_FLOAT) {
unsigned interp_type;
-   if (variable->data.sample) {
+   if (variable->data.sample)
interp_type = INTERP_SAMPLE;
-   ctx->shader_info->info.ps.force_persample = true;
-   } else if (variable->data.centroid)
+   else if (variable->data.centroid)
interp_type = INTERP_CENTROID;
else
interp_type = INTERP_CENTER;
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index b211da60b3..3b0887995d 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -179,6 +179,18 @@ gather_info_block(const nir_shader *nir, const nir_block 
*block,
}
 }
 
+static void
+gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
+ struct ac_shader_info *info)
+{
+   const struct glsl_type *type = glsl_without_array(var->type);
+
+   if (glsl_get_base_type(type) == GLSL_TYPE_FLOAT) {
+   if (var->data.sample)
+   info->ps.force_persample = true;
+   }
+}
+
 static void
 gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
   struct ac_shader_info *info)
@@ -187,6 +199,9 @@ gather_info_input_decl(const nir_shader *nir, const 
nir_variable *var,
case MESA_SHADER_VERTEX:
info->vs.has_vertex_buffers = true;
break;
+   case MESA_SHADER_FRAGMENT:
+   gather_info_input_decl_ps(nir, var, info);
+   break;
default:
break;
}
-- 
2.16.1

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Re: [Mesa-dev] [PATCH] i965: Fix bugs in intel_from_planar

[Daniel Stone]

Hi,

On 10 February 2018 at 06:50, Jason Ekstrand  wrote:
> -} else if (parent->planar_format == NULL) {
> +
> +const struct intel_image_format *f = parent->planar_format;
> +const int nplanes = f ? f->nplanes : 1;
> +
> +if (plane > nplanes) {
> +   if (parent->modifier == DRM_FORMAT_MOD_INVALID)
> +  return NULL;
> +
> const bool is_aux =
>isl_drm_modifier_has_aux(parent->modifier) && plane == 1;
> if (!is_aux)
> @@ -1332,10 +1338,6 @@ intel_from_planar(__DRIimage *parent, int plane, void 
> *loaderPrivate)
>  } else {
> /* Planar formats don't support aux buffers/images */
> assert(!isl_drm_modifier_has_aux(parent->modifier));
> -   f = parent->planar_format;
> -
> -   if (plane >= f->nplanes)
> -  return NULL;

On further thought, I don't see how this could work at all. If we call
fromPlanar on plane 0 of a non-planar image with an aux plane, we need
to land in the first branch (due to the assert). But since plane 0 is
strictly less than the number of planes 1, we don't.

I think something like this: https://hastebin.com/axuqorenax

Cheers,
Daniel
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[Mesa-dev] [PATCH] etnaviv: add useful information to BO import errors

[Lucas Stach]

From: Philipp Zabel 

Signed-off-by: Philipp Zabel 
---
 src/gallium/drivers/etnaviv/etnaviv_resource.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c 
b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index d70152e082dd..4365947a1573 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -535,11 +535,15 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
 * The stride of the BO must be greater or equal to our padded
 * stride. The size of the BO must accomodate the padded height. */
if (level->stride < util_format_get_stride(tmpl->format, 
level->padded_width)) {
-  BUG("BO stride is too small for RS engine width padding");
+  BUG("BO stride %u is too small for RS engine width padding (%u, format 
%s)",
+  level->stride, util_format_get_stride(tmpl->format, 
level->padded_width),
+  util_format_name(tmpl->format));
   goto fail;
}
if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
-  BUG("BO size is too small for RS engine height padding");
+  BUG("BO size %u is too small for RS engine height padding (%u, format 
%s)",
+  etna_bo_size(rsc->bo), level->stride * level->padded_height,
+  util_format_name(tmpl->format));
   goto fail;
}
 
-- 
2.15.1

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Re: [Mesa-dev] [PATCH] nvc0: disable MS Images for sample_count == 1 on Maxwell

[Ilia Mirkin]

Reviewed-by: Ilia Mirkin 

I think things brings up the MSAAx1 question again. Apparently you're
allowed to use a MSAAx1 image with image2DMS? Anyways, we can just
avoid it all for now by not supporting it.

On Mon, Feb 12, 2018 at 8:46 AM, Karol Herbst  wrote:
> fixes KHR-GL45.multi_bind.dispatch_bind_textures on Maxwell
>
> Suggested-by: Ilia Mirkin 
> Signed-off-by: Karol Herbst 
> ---
>  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 7ba8086a533..67cd6f44ca7 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -88,7 +88,7 @@ nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
>   PIPE_BIND_SHARED);
>
> if (bindings & PIPE_BIND_SHADER_IMAGE) {
> -  if (sample_count > 1 &&
> +  if (sample_count > 0 &&
>nouveau_screen(pscreen)->class_3d >= GM107_3D_CLASS) {
>   /* MS images are currently unsupported on Maxwell because they have 
> to
>* be handled explicitly. */
> --
> 2.14.3
>
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[Mesa-dev] [PATCH] nvc0: disable MS Images for sample_count == 1 on Maxwell

[Karol Herbst]

fixes KHR-GL45.multi_bind.dispatch_bind_textures on Maxwell

Suggested-by: Ilia Mirkin 
Signed-off-by: Karol Herbst 
---
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 7ba8086a533..67cd6f44ca7 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -88,7 +88,7 @@ nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
  PIPE_BIND_SHARED);
 
if (bindings & PIPE_BIND_SHADER_IMAGE) {
-  if (sample_count > 1 &&
+  if (sample_count > 0 &&
   nouveau_screen(pscreen)->class_3d >= GM107_3D_CLASS) {
  /* MS images are currently unsupported on Maxwell because they have to
   * be handled explicitly. */
-- 
2.14.3

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[Mesa-dev] [PATCH v4 2/5] android: Add version variable to gralloc_handle_t

[Robert Foss]

The version variable will be used for versioning of this
struct and the corresponding accessor functions.

Signed-off-by: Robert Foss 
Reviewed-by: Rob Herring 
---
 android/gralloc_handle.h | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/android/gralloc_handle.h b/android/gralloc_handle.h
index 45b9f2e9b8dc..7cbc8ee7cef3 100644
--- a/android/gralloc_handle.h
+++ b/android/gralloc_handle.h
@@ -27,6 +27,7 @@
 #define __ANDROID_GRALLOC_HANDLE_H__
 
 #include 
+#include 
 
 /* support users of drm_gralloc/gbm_gralloc */
 #define gralloc_gbm_handle_t gralloc_handle_t
@@ -49,7 +50,9 @@ struct gralloc_handle_t {
 */
int prime_fd;
 
+   /* api variables */
int magic; /* differentiate between allocator impls */
+   const uint32_t version; /* api version */
 
int width; /* width of buffer in pixels */
int height; /* height of buffer in pixels */
@@ -67,6 +70,7 @@ struct gralloc_handle_t {
} __attribute__((aligned(8)));
 };
 
+#define GRALLOC_HANDLE_VERSION 1
 #define GRALLOC_HANDLE_MAGIC 0x60585350
 #define GRALLOC_HANDLE_NUM_FDS 1
 #define GRALLOC_HANDLE_NUM_INTS (  \
@@ -79,7 +83,9 @@ struct gralloc_handle_t {
 static struct gralloc_handle_t gralloc_handle_create(int width, int height,
  int format, int usage)
 {
-   struct gralloc_handle_t handle = { .magic = GRALLOC_HANDLE_MAGIC };
+   struct alloc_handle_t handle = {
+   .magic = GRALLOC_HANDLE_MAGIC,
+   .version = GRALLOC_HANDLE_VERSION };
 
native_handle_t *nhandle = native_handle_create(GRALLOC_HANDLE_NUM_FDS,

GRALLOC_HANDLE_NUM_INTS);
-- 
2.14.1

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[Mesa-dev] [PATCH v4 1/5] android: Move gralloc handle struct to libdrm

[Robert Foss]

This struct is used in mesa and drm_hwcomposer.
Versions of if have been implemented in several grallocs:
drm_gralloc, gbm_gralloc, minigbm and intel-minigbm.

Other than the 1:1 move of the struct a new generic name
has been chosen and variables have had comments added to them.

Signed-off-by: Robert Foss 
Reviewed-by: Rob Herring 
---
Changes since v2:
 Suggested by Rob Herring:
 - Switch to gbm_gralloc copyright statement as a base

Changes since v1:
 Suggested by Rob Herring:
 - Fixed copyright statement
 - Moved FDs to be first in handle
 - Initialize native_handle_t using native_handle_create()

 Android.mk   |   8 +++-
 Makefile.sources |   3 ++
 android/gralloc_handle.h | 101 +++
 3 files changed, 110 insertions(+), 2 deletions(-)
 create mode 100644 android/gralloc_handle.h

diff --git a/Android.mk b/Android.mk
index 292be2360263..8611c5e316d8 100644
--- a/Android.mk
+++ b/Android.mk
@@ -28,7 +28,7 @@ LIBDRM_TOP := $(LOCAL_PATH)
 
 include $(CLEAR_VARS)
 
-# Import variables LIBDRM_{,H_,INCLUDE_H_,INCLUDE_VMWGFX_H_}FILES
+# Import variables 
LIBDRM_{,H,INCLUDE_H,INCLUDE_ANDROID_H,INCLUDE_VMWGFX_H}_FILES
 include $(LOCAL_PATH)/Makefile.sources
 
 #static library for the device (recovery)
@@ -38,7 +38,8 @@ LOCAL_MODULE := libdrm
 LOCAL_SRC_FILES := $(LIBDRM_FILES)
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH) \
-   $(LOCAL_PATH)/include/drm
+   $(LOCAL_PATH)/include/drm \
+   $(LOCAL_PATH)/android
 
 LOCAL_C_INCLUDES := \
$(LOCAL_PATH)/include/drm
@@ -54,6 +55,9 @@ LOCAL_SRC_FILES := $(LIBDRM_FILES)
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
 $(LOCAL_PATH)/include/drm
 
+LOCAL_SHARED_LIBRARIES := \
+   libcutils
+
 LOCAL_C_INCLUDES := \
 $(LOCAL_PATH)/include/drm
 
diff --git a/Makefile.sources b/Makefile.sources
index 10aa1d0f4b6e..1f8372bca183 100644
--- a/Makefile.sources
+++ b/Makefile.sources
@@ -37,5 +37,8 @@ LIBDRM_INCLUDE_H_FILES := \
include/drm/via_drm.h \
include/drm/virtgpu_drm.h
 
+LIBDRM_INCLUDE_ANDROID_H_FILES := \
+   android/gralloc_handle.h
+
 LIBDRM_INCLUDE_VMWGFX_H_FILES := \
include/drm/vmwgfx_drm.h
diff --git a/android/gralloc_handle.h b/android/gralloc_handle.h
new file mode 100644
index ..45b9f2e9b8dc
--- /dev/null
+++ b/android/gralloc_handle.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2010-2011 Chia-I Wu 
+ * Copyright (C) 2010-2011 LunarG Inc.
+ * Copyright (C) 2016 Linaro, Ltd., Rob Herring 
+ * Copyright (C) 2018 Collabora, Robert Foss 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __ANDROID_GRALLOC_HANDLE_H__
+#define __ANDROID_GRALLOC_HANDLE_H__
+
+#include 
+
+/* support users of drm_gralloc/gbm_gralloc */
+#define gralloc_gbm_handle_t gralloc_handle_t
+#define gralloc_drm_handle_t gralloc_handle_t
+
+struct gralloc_handle_t {
+   native_handle_t base;
+
+   /* dma-buf file descriptor
+* Must be located first since, native_handle_t is allocated
+* using native_handle_create(), which allocates space for
+* sizeof(native_handle_t) + sizeof(int) * (numFds + numInts)
+* numFds = GRALLOC_HANDLE_NUM_FDS
+* numInts = GRALLOC_HANDLE_NUM_INTS
+* Where numFds represents the number of FDs and
+* numInts represents the space needed for the
+* remainder of this struct.
+* And the FDs are expected to be found first following
+* native_handle_t.
+*/
+   int prime_fd;
+
+   int magic; /* differentiate between allocator impls */
+
+   int width; /* width of buffer in pixels */
+   int height; /* height of buffer in pixels */
+   int format; /* pixel format (Android) */
+   int usage; /* android libhardware usage flags */
+
+   int name;   /* the name of the bo */
+