[Mesa-dev] [Bug 111150] [BRW] WRC 5 asserts with gallium nine and iris.
https://bugs.freedesktop.org/show_bug.cgi?id=50 --- Comment #8 from Matías Zúñiga --- (In reply to Nanley Chery from comment #7) > (In reply to Matías Zúñiga from comment #6) > > (In reply to Nanley Chery from comment #3) > > > *** Bug 62 has been marked as a duplicate of this bug. *** > > > > Sorry, i didn't find this bug before posting. > > > > The merge request also fixes the problem for me > > No problem. I just updated the MR to fix the issue in iris. Please let me > know if it still helps. Yeah, still working > I'm not sure what issues are remaining in gallium nine (if any). League Of Legends didnt work for me (it works with other Gallium drivers), but I cant get any information on were it crashes (to make League work, a patched version of wine is needed. that patch makes core-dumps unreadable, so i can't get a backtrace). I will open a report when i get useful information -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [AppVeyor] mesa master #12031 completed
Build mesa 12031 completed
Commit 16fcbb2eba by Dave Airlie on 7/24/2019 11:33 PM:
gallium: fix windows build from params change.\n\nThis is why we can't have nice things. I'm sure there's someway\nto do this with {0} but I really don't have time for that.\n\nFixes: 2631fd3b0bf ("gallivm: rework lp_build_tgsi_soa to take a struct")\nReviewed-by: Timothy Arceri
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[Mesa-dev] A question about order of st_update_*p
In src/mesa/state_tracker/st_atom_list.h, Now it's this order: ST_STATE(ST_NEW_FS_STATE, st_update_fp) ST_STATE(ST_NEW_GS_STATE, st_update_gp) ST_STATE(ST_NEW_TES_STATE, st_update_tep) ST_STATE(ST_NEW_TCS_STATE, st_update_tcp) ST_STATE(ST_NEW_VS_STATE, st_update_vp) While code in src/mesa/state_tracker/st_atom.c: while (dirty_lo) update_functions[u_bit_scan(_lo)](st); That means if will call st_update_fp first and then st_update_gp... etc. But this is inconsistent with opengl pipeline: should we reverse the order here or I missed something? Background: https://gitlab.freedesktop.org/virgl/virglrenderer/issues/114 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 111212] gen_builder_meta.hpp:53:117: error: no matching function for call to ‘cast(llvm::FunctionCallee)’
https://bugs.freedesktop.org/show_bug.cgi?id=111212
Bug ID: 111212
Summary: gen_builder_meta.hpp:53:117: error: no matching
function for call to ‘cast(llvm::FunctionCallee)’
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/Gallium/swr
Assignee: mesa-dev@lists.freedesktop.org
Reporter: v...@freedesktop.org
QA Contact: mesa-dev@lists.freedesktop.org
Build error with llvm-10.0
In file included from
../src/gallium/drivers/swr/rasterizer/jitter/builder.h:161:0,
from ../src/gallium/drivers/swr/swr_shader.cpp:35:
src/gallium/drivers/swr/rasterizer/jitter/gen_builder_meta.hpp: In member
function ‘llvm::Value* SwrJit::Builder::VGATHERPD(llvm::Value*, llvm::Value*,
llvm::Value*, llvm::Value*, llvm::Value*, const llvm::Twine&)’:
src/gallium/drivers/swr/rasterizer/jitter/gen_builder_meta.hpp:53:117: error:
no matching function for call to ‘cast(llvm::FunctionCallee)’
Function* pFunc =
cast(JM()->mpCurrentModule->getOrInsertFunction("meta.intrinsic.VGATHERPD",
pFuncTy));
^
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Re: [Mesa-dev] [PATCH] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB
On Wed, Jul 24, 2019 at 9:18 AM Bas Nieuwenhuizen
wrote:
> On Wed, Jul 24, 2019 at 3:00 PM Samuel Pitoiset
> wrote:
> >
> > This fixes
> > dEQP-VK.rasterization.primitive_size.points.point_size_*
> >
> > This also fixes some black squares with the Sascha SSAO demo.
> >
> > Signed-off-by: Samuel Pitoiset
> > ---
> > src/amd/vulkan/radv_image.c | 15 ++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> > index 0941cbb..59d6d0ced78 100644
> > --- a/src/amd/vulkan/radv_image.c
> > +++ b/src/amd/vulkan/radv_image.c
> > @@ -617,6 +617,19 @@ static unsigned gfx9_border_color_swizzle(const
> enum vk_swizzle swizzle[4])
> > return bc_swizzle;
> > }
> >
> > +static bool vi_alpha_is_on_msb(struct radv_device *device, VkFormat
> format)
> > +{
> > + const struct vk_format_description *desc =
> vk_format_description(format);
> > +
> > + /* Formats with 3 channels can't have alpha. */
> > + if (desc->nr_channels == 3)
> > + return true; /* same as xxxA; is any value OK here? */
>
> I don't think this is correct. For formats with multiple channels,
> this bit is not about "does this format have alpha", but "is the alpha
> channel on MSB or LSB". IIRC even for RG the "alpha" is just the G
> component, no explicit alpha needed.
>
Invalid example. RG has 2 channels. The code is for 3 channels. All 3
channel formats don't have an alpha channel, and therefore the clear alpha
value doesn't matter.
Marek
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Re: [Mesa-dev] How to build mesa to run vulkan application on Intel HD graphics?
On Wed, Jul 24, 2019 at 2:00 AM Xu, Xing wrote:
> Hi, I tried to add some logs as below in file
> ./src/vulkan/wsi/wsi_common_x11.c (x11_queue_present):
>
> printf("%s,%d\n",__FUNCTION__,__LINE__);
>
> assert(0);
>
> but got nothing when I run my application.
>
>
>
> How I build run my applications:
>
> 1), Build install
>
> meson configure builddir -Dvulkan-drivers=intel
>
> ninja -C builddir/
>
> meson configure builddir -Dprefix=/tmp/install
>
You don't need to run meson twice. You can just add -Dprefix=/tmp/install
to the first meson line.
> sudo ninja -C builddir/ install
>
>
>
> 2), Run
>
> export LD_LIBRARY_PATH=/tmp/install/lib/x86_64-linux-gnu/:$LD_LIBRARY_PATH
>
> export LIBGL_DRIVERS_PATH=/tmp/install/lib/x86_64-linux-gnu/dri
>
> ./angle_end2end_tests
>
For Vulkan, LD_LIBRARY_PATH and LIBGL_DRIVERS_PATH do nothing. What you
want is
VK_ICD_FILENAMES=/tmp/install/share/vulkan/icd.d/intel_icd.x86_64.json
>
>
>
>
> Do you have any hints how to see the add logs or make the assert happen?
>
>
>
>
>
> Also I notice’ d that there are soft links between libvulkan.so under
> /usr/lib, but no libvulkan.so under /tmp/install:
>
> ls -l /usr/lib/x86_64-linux-gnu/libvulkan*
>
That's because libvulkan.so is provided by the loader which should be
installed by your OS. You don't need to rebuild the loader to try out new
driver builds.
--Jason
> /usr/lib/x86_64-linux-gnu/libvulkan_intel.so
>
> /usr/lib/x86_64-linux-gnu/libvulkan_radeon.so
>
> /usr/lib/x86_64-linux-gnu/libvulkan.so -> libvulkan.so.1
>
> /usr/lib/x86_64-linux-gnu/libvulkan.so.1 -> libvulkan.so.1.1.70
>
> /usr/lib/x86_64-linux-gnu/libvulkan.so.1.1.70
>
>
>
> Here are the detail structure for /tmp/install1911:
>
> ls /tmp/install1911/lib/x86_64-linux-gnu/ -l
>
> dri
>
> libEGL.so -> libEGL.so.1
>
> libEGL.so.1 -> libEGL.so.1.0.0
>
> libEGL.so.1.0.0
>
> libgbm.so -> libgbm.so.1
>
> libgbm.so.1 -> libgbm.so.1.0.0
>
> libgbm.so.1.0.0
>
> libglapi.so -> libglapi.so.0
>
> libglapi.so.0 -> libglapi.so.0.0.0
>
> libglapi.so.0.0.0
>
> libGLESv1_CM.so -> libGLESv1_CM.so.1
>
> libGLESv1_CM.so.1 -> libGLESv1_CM.so.1.1.0
>
> libGLESv1_CM.so.1.1.0
>
> libGLESv2.so -> libGLESv2.so.2
>
> libGLESv2.so.2 -> libGLESv2.so.2.0.0
>
> libGLESv2.so.2.0.0
>
> libGL.so -> libGL.so.1
>
> libGL.so.1 -> libGL.so.1.2.0
>
> libGL.so.1.2.0
>
> libvulkan_intel.so
>
> libxatracker.so -> libxatracker.so.2
>
> libxatracker.so.2 -> libxatracker.so.2.5.0
>
> libxatracker.so.2.5.0
>
> pkgconfig
>
> vdpau
>
>
>
> Regards,
>
> Xing
>
>
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[Mesa-dev] [Bug 111126] Build problem: meson build can not find wayland-scanner
https://bugs.freedesktop.org/show_bug.cgi?id=26 --- Comment #5 from Dylan Baker --- Are you doing a cross compile? -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 111126] Build problem: meson build can not find wayland-scanner
https://bugs.freedesktop.org/show_bug.cgi?id=26 --- Comment #4 from Emil Velikov --- BTH it's been a while, so I don't recall the details. It was either: - target machine was missing wayland-scanner (correct), so we had to tell meson to use the one of the build host, or - meson was trying to run the target wayland-scanner on the build host, and failing since they are different architectures Quick look around shows that meson 0.51 release notes mentions something about this in "Specifying options per mer machine". Yet I cannot see a clear example having meson.build compatible with old and new meson :-\ FWIW I'm inclined to call this a meson bug - changing behaviour is w/o a big fat preemptive WARNING is not nice. Yet I won't object if you want to revert my patch. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the bug.___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB
This fixes
dEQP-VK.rasterization.primitive_size.points.point_size_*
This also fixes some black squares with the Sascha SSAO demo.
v2: - do not set for multiple channels
- call vi_alpha_is_on_msb() for pre-GFX10
- remove unused 'swap'
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_image.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 0941cbb..d46946269e6 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -617,6 +617,15 @@ static unsigned gfx9_border_color_swizzle(const enum
vk_swizzle swizzle[4])
return bc_swizzle;
}
+static bool vi_alpha_is_on_msb(struct radv_device *device, VkFormat format)
+{
+ const struct vk_format_description *desc =
vk_format_description(format);
+
+ if (device->physical_device->rad_info.chip_class >= GFX10 &&
desc->nr_channels == 1)
+ return desc->swizzle[3] == VK_SWIZZLE_X;
+
+ return radv_translate_colorswap(format, false) <= 1;
+}
/**
* Build the sampler view descriptor for a texture (GFX10).
*/
@@ -691,11 +700,9 @@ gfx10_make_texture_descriptor(struct radv_device *device,
state[7] = 0;
if (radv_dcc_enabled(image, first_level)) {
- unsigned swap = radv_translate_colorswap(vk_format, FALSE);
-
state[6] |=
S_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_256B) |
S_00A018_MAX_COMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_128B) |
- S_00A018_ALPHA_IS_ON_MSB(swap <= 1);
+ S_00A018_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device,
vk_format));
}
/* Initialize the sampler view for FMASK. */
@@ -849,9 +856,7 @@ si_make_texture_descriptor(struct radv_device *device,
state[5] |= S_008F24_LAST_ARRAY(last_layer);
}
if (image->dcc_offset) {
- unsigned swap = radv_translate_colorswap(vk_format, FALSE);
-
- state[6] = S_008F28_ALPHA_IS_ON_MSB(swap <= 1);
+ state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device,
vk_format));
} else {
/* The last dword is unused by hw. The shader uses it to clear
* bits in the first dword of sampler state.
--
2.22.0
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Re: [Mesa-dev] [PATCH] nvc0/ir: Fix assert accessing null pointer
On Wed, 2019-07-24 at 14:27 +0200, Karol Herbst wrote:
> it's only fixing a crash in a build with asserts enabled, but if
> somebody wants to apply those to stable, then go ahead.
>
OK; in that case I will keep it out.
Thanks!
J.A.
> On Wed, Jul 24, 2019 at 12:48 PM Juan A. Suarez Romero
> wrote:
> > On Fri, 2019-07-19 at 13:56 +0200, Mark Menzynski wrote:
> > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=111007
> > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=67
> > > Signed-off-by: Mark Menzynski
> > > ---
> > > src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > Looks like a good candidate for 19.1 stable. WDYT?
> >
> > J.A.
> >
> > > diff --git
> > > a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > > b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > > index aca3b0afb1e..1f702a987d8 100644
> > > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > > @@ -51,12 +51,12 @@ NVC0LegalizeSSA::handleDIV(Instruction *i)
> > > // Generate movs to the input regs for the call we want to generate
> > > for (int s = 0; i->srcExists(s); ++s) {
> > >Instruction *ld = i->getSrc(s)->getInsn();
> > > - assert(ld->getSrc(0) != NULL);
> > >// check if we are moving an immediate, propagate it in that case
> > >if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) ||
> > > !(ld->src(0).getFile() == FILE_IMMEDIATE))
> > > bld.mkMovToReg(s, i->getSrc(s));
> > >else {
> > > + assert(ld->getSrc(0) != NULL);
> > > bld.mkMovToReg(s, ld->getSrc(0));
> > > // Clear the src, to make code elimination possible here before
> > > we
> > > // delete the instruction i later
> >
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Re: [Mesa-dev] [PATCH] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB
On Wed, Jul 24, 2019 at 3:00 PM Samuel Pitoiset
wrote:
>
> This fixes
> dEQP-VK.rasterization.primitive_size.points.point_size_*
>
> This also fixes some black squares with the Sascha SSAO demo.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_image.c | 15 ++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index 0941cbb..59d6d0ced78 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -617,6 +617,19 @@ static unsigned gfx9_border_color_swizzle(const enum
> vk_swizzle swizzle[4])
> return bc_swizzle;
> }
>
> +static bool vi_alpha_is_on_msb(struct radv_device *device, VkFormat format)
> +{
> + const struct vk_format_description *desc =
> vk_format_description(format);
> +
> + /* Formats with 3 channels can't have alpha. */
> + if (desc->nr_channels == 3)
> + return true; /* same as xxxA; is any value OK here? */
I don't think this is correct. For formats with multiple channels,
this bit is not about "does this format have alpha", but "is the alpha
channel on MSB or LSB". IIRC even for RG the "alpha" is just the G
component, no explicit alpha needed.
> +
> + if (device->physical_device->rad_info.chip_class >= GFX10 &&
> desc->nr_channels == 1)
> + return desc->swizzle[3] == VK_SWIZZLE_X;
> +
> + return radv_translate_colorswap(format, false) <= 1;
> +}
> /**
> * Build the sampler view descriptor for a texture (GFX10).
> */
> @@ -695,7 +708,7 @@ gfx10_make_texture_descriptor(struct radv_device *device,
>
> state[6] |=
> S_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_256B) |
>
> S_00A018_MAX_COMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_128B) |
> - S_00A018_ALPHA_IS_ON_MSB(swap <= 1);
> +
> S_00A018_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format));
> }
>
> /* Initialize the sampler view for FMASK. */
> --
> 2.22.0
>
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[Mesa-dev] [AppVeyor] mesa master #12021 failed
Build mesa 12021 failed Commit 280dfa02fa by Qiang Yu on 7/20/2019 10:11 AM: lima/ppir: fix disassembler temp read/write print\n\ntemp read/write use negtive offset, and handle\nalignment==1 case.\n\nReviewed-by: Vasily Khoruzhick \nSigned-off-by: Qiang Yu Configure your notification preferences ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB
This fixes
dEQP-VK.rasterization.primitive_size.points.point_size_*
This also fixes some black squares with the Sascha SSAO demo.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_image.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 0941cbb..59d6d0ced78 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -617,6 +617,19 @@ static unsigned gfx9_border_color_swizzle(const enum
vk_swizzle swizzle[4])
return bc_swizzle;
}
+static bool vi_alpha_is_on_msb(struct radv_device *device, VkFormat format)
+{
+ const struct vk_format_description *desc =
vk_format_description(format);
+
+ /* Formats with 3 channels can't have alpha. */
+ if (desc->nr_channels == 3)
+ return true; /* same as xxxA; is any value OK here? */
+
+ if (device->physical_device->rad_info.chip_class >= GFX10 &&
desc->nr_channels == 1)
+ return desc->swizzle[3] == VK_SWIZZLE_X;
+
+ return radv_translate_colorswap(format, false) <= 1;
+}
/**
* Build the sampler view descriptor for a texture (GFX10).
*/
@@ -695,7 +708,7 @@ gfx10_make_texture_descriptor(struct radv_device *device,
state[6] |=
S_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_256B) |
S_00A018_MAX_COMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_128B) |
- S_00A018_ALPHA_IS_ON_MSB(swap <= 1);
+ S_00A018_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device,
vk_format));
}
/* Initialize the sampler view for FMASK. */
--
2.22.0
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Re: [Mesa-dev] [PATCH] nvc0/ir: Fix assert accessing null pointer
it's only fixing a crash in a build with asserts enabled, but if
somebody wants to apply those to stable, then go ahead.
On Wed, Jul 24, 2019 at 12:48 PM Juan A. Suarez Romero
wrote:
>
> On Fri, 2019-07-19 at 13:56 +0200, Mark Menzynski wrote:
> > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=111007
> > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=67
> > Signed-off-by: Mark Menzynski
> > ---
> > src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
> Looks like a good candidate for 19.1 stable. WDYT?
>
> J.A.
>
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > index aca3b0afb1e..1f702a987d8 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > @@ -51,12 +51,12 @@ NVC0LegalizeSSA::handleDIV(Instruction *i)
> > // Generate movs to the input regs for the call we want to generate
> > for (int s = 0; i->srcExists(s); ++s) {
> >Instruction *ld = i->getSrc(s)->getInsn();
> > - assert(ld->getSrc(0) != NULL);
> >// check if we are moving an immediate, propagate it in that case
> >if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) ||
> > !(ld->src(0).getFile() == FILE_IMMEDIATE))
> > bld.mkMovToReg(s, i->getSrc(s));
> >else {
> > + assert(ld->getSrc(0) != NULL);
> > bld.mkMovToReg(s, ld->getSrc(0));
> > // Clear the src, to make code elimination possible here before we
> > // delete the instruction i later
>
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[Mesa-dev] [AppVeyor] mesa staging/19.1 #12020 completed
Build mesa 12020 completed
Commit 97cfb89b73 by Eric Engestrom on 7/23/2019 9:01 AM:
gallium+mesa: fix tgsi_semantic array type\n\nFixes: ed23335a313dfc9cec26 ("gallium: use enums in p_shader_tokens.h (v2)")\nSigned-off-by: Eric Engestrom \nReviewed-by: Marek Olšák \n(cherry picked from commit e7e31b18d606ed25e3faab5969b6b52cd9f90162)
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Re: [Mesa-dev] [PATCH] nvc0/ir: Fix assert accessing null pointer
On Fri, 2019-07-19 at 13:56 +0200, Mark Menzynski wrote:
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=111007
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=67
> Signed-off-by: Mark Menzynski
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Looks like a good candidate for 19.1 stable. WDYT?
J.A.
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index aca3b0afb1e..1f702a987d8 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -51,12 +51,12 @@ NVC0LegalizeSSA::handleDIV(Instruction *i)
> // Generate movs to the input regs for the call we want to generate
> for (int s = 0; i->srcExists(s); ++s) {
>Instruction *ld = i->getSrc(s)->getInsn();
> - assert(ld->getSrc(0) != NULL);
>// check if we are moving an immediate, propagate it in that case
>if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) ||
> !(ld->src(0).getFile() == FILE_IMMEDIATE))
> bld.mkMovToReg(s, i->getSrc(s));
>else {
> + assert(ld->getSrc(0) != NULL);
> bld.mkMovToReg(s, ld->getSrc(0));
> // Clear the src, to make code elimination possible here before we
> // delete the instruction i later
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Re: [Mesa-dev] [PATCH] i965/tex: ignore the diff between GL_TEXTURE_2D and GL_TEXTURE_RECTANGLE
Hi, On Wed, May 22, 2019 at 4:01 AM Ian Romanick wrote: > > On Thu, Jul 19, 2018 at 12:08 PM andrey simiklit > > > > Jason, can we reconsider Andrii's patch? It still applies cleanly > > (https://patchwork.freedesktop.org/patch/237490/) > > Looking at the patch and the "Simple reproducer" in the bug, I think > this just papers over the issue. It seems like the problem is somewhere > down inside the driver's handling of glXBindTexImageEXT. My best guess > is that the texture is GL_TEXTURE_2D but the miptree backing it is > GL_TEXTURE_RECTANGLE. It seems that the glXBindTexImageEXT handling > should mark the miptree as GL_TEXTURE_2D when binding the image to a > texture that is GL_TEXTURE_2D. Or is that not possible for some > non-obvious reason? Sorry to be a pain, but I still get bug reports in xfce for this, for everyone using a Mesa build with debug enabled (or a pre-release for that matter) on Intel, the `assert()` are enabled and this bug occurs with the xfce compositor. Maybe Andrii's patch is just hiding the issue, but that's already the case without the `assert()` enabled (i.e. all stable releases of Mesa), so I guess it's not such a big deal anyway. Can we agree on a fix on this? Cheers, Olivier ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] How to build mesa to run vulkan application on Intel HD graphics?
Hi, I tried to add some logs as below in file ./src/vulkan/wsi/wsi_common_x11.c
(x11_queue_present):
printf("%s,%d\n",__FUNCTION__,__LINE__);
assert(0);
but got nothing when I run my application.
How I build run my applications:
1), Build install
meson configure builddir -Dvulkan-drivers=intel
ninja -C builddir/
meson configure builddir -Dprefix=/tmp/install
sudo ninja -C builddir/ install
2), Run
export LD_LIBRARY_PATH=/tmp/install/lib/x86_64-linux-gnu/:$LD_LIBRARY_PATH
export LIBGL_DRIVERS_PATH=/tmp/install/lib/x86_64-linux-gnu/dri
./angle_end2end_tests
Do you have any hints how to see the add logs or make the assert happen?
Also I notice' d that there are soft links between libvulkan.so under /usr/lib,
but no libvulkan.so under /tmp/install:
ls -l /usr/lib/x86_64-linux-gnu/libvulkan*
/usr/lib/x86_64-linux-gnu/libvulkan_intel.so
/usr/lib/x86_64-linux-gnu/libvulkan_radeon.so
/usr/lib/x86_64-linux-gnu/libvulkan.so -> libvulkan.so.1
/usr/lib/x86_64-linux-gnu/libvulkan.so.1 -> libvulkan.so.1.1.70
/usr/lib/x86_64-linux-gnu/libvulkan.so.1.1.70
Here are the detail structure for /tmp/install1911:
ls /tmp/install1911/lib/x86_64-linux-gnu/ -l
dri
libEGL.so -> libEGL.so.1
libEGL.so.1 -> libEGL.so.1.0.0
libEGL.so.1.0.0
libgbm.so -> libgbm.so.1
libgbm.so.1 -> libgbm.so.1.0.0
libgbm.so.1.0.0
libglapi.so -> libglapi.so.0
libglapi.so.0 -> libglapi.so.0.0.0
libglapi.so.0.0.0
libGLESv1_CM.so -> libGLESv1_CM.so.1
libGLESv1_CM.so.1 -> libGLESv1_CM.so.1.1.0
libGLESv1_CM.so.1.1.0
libGLESv2.so -> libGLESv2.so.2
libGLESv2.so.2 -> libGLESv2.so.2.0.0
libGLESv2.so.2.0.0
libGL.so -> libGL.so.1
libGL.so.1 -> libGL.so.1.2.0
libGL.so.1.2.0
libvulkan_intel.so
libxatracker.so -> libxatracker.so.2
libxatracker.so.2 -> libxatracker.so.2.5.0
libxatracker.so.2.5.0
pkgconfig
vdpau
Regards,
Xing
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[Mesa-dev] AMD HEVC decoder is not working with IDR 30
Hi Mesa-dev, I am seeing frame corruption on video playback when I play HEVC .mp4 stream which is encoded with IDR period 30. The same stream is able to play properly when Ichange the DPB_MAX_SIZE from 32 to 30 in *Mesa3d/src/gallium/state_trackers/omx/bellagio/vid_dec_h265.c,* FROM #define DPB_MAX_SIZE 32 TO #define DPB_MAX_SIZE 30 *Is there any limitation on IDR period value for AMD HEVC Decoder with OMX component ?* *Thanks,* ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] radv/gfx10: do not enable NGG if a pipeline uses XFB
On 7/23/19 9:31 PM, Bas Nieuwenhuizen wrote:
On Tue, Jul 23, 2019 at 3:21 PM Samuel Pitoiset
wrote:
NGG GS for streamout requires a bunch of work, so enable it with
the legacy path only for now.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_pipeline.c | 28
1 file changed, 28 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a7ff0e2d139..0903e5abf37 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -33,6 +33,7 @@
#include "radv_shader.h"
#include "nir/nir.h"
#include "nir/nir_builder.h"
+#include "nir/nir_xfb_info.h"
#include "spirv/nir_spirv.h"
#include "vk_util.h"
@@ -2269,6 +2270,16 @@ radv_generate_graphics_pipeline_key(struct radv_pipeline
*pipeline,
return key;
}
+static bool
+radv_nir_stage_uses_xfb(const nir_shader *nir)
+{
+ nir_xfb_info *xfb = nir_gather_xfb_info(nir, NULL);
+ bool uses_xfb = !!xfb;
+
+ ralloc_free(xfb);
+ return uses_xfb;
+}
+
static void
radv_fill_shader_keys(struct radv_device *device,
struct radv_shader_variant_key *keys,
@@ -2321,6 +2332,23 @@ radv_fill_shader_keys(struct radv_device *device,
*/
keys[MESA_SHADER_TESS_EVAL].vs_common_out.as_ngg =
false;
}
+
+ /* TODO: Implement streamout support for NGG. */
+ bool uses_xfb = false;
+ if ((nir[MESA_SHADER_VERTEX] &&
+radv_nir_stage_uses_xfb(nir[MESA_SHADER_VERTEX])) ||
+ (nir[MESA_SHADER_TESS_EVAL] &&
+radv_nir_stage_uses_xfb(nir[MESA_SHADER_TESS_EVAL])) ||
+ (nir[MESA_SHADER_GEOMETRY] &&
+radv_nir_stage_uses_xfb(nir[MESA_SHADER_GEOMETRY])))
+ uses_xfb = true;
transform feedback can only happen on the last stage before PS right?
Can we first determine what the last shader is and only then check for
xfb? That way we don't have to scan 3 shaders.
Yes. Pushed with this slightly improved.
+
+ if (uses_xfb) {
+ if (nir[MESA_SHADER_TESS_CTRL])
+
keys[MESA_SHADER_TESS_EVAL].vs_common_out.as_ngg = false;
+ else
+ keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg =
false;
+ }
}
for(int i = 0; i < MESA_SHADER_STAGES; ++i)
--
2.22.0
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