Re: [Mesa-dev] [PATCH] gallium: add more exceptions to tgsi_util_get_inst_usage_mask

[Marek Olšák]

Reviewed-by: Marek Olšák 

Marek

On Thu, Oct 19, 2017 at 6:40 PM, Tim Rowley  wrote:
> A number of double/int64 operations don't have matching
> read and write usage masks, which the fallthrough case of
> tgsi_util_get_inst_usage_mask assumes for componentwise
> tagged instructions.
>
> No regressions in llvmpipe piglit; fixes a large number of
> swr regressions.
> ---
>  src/gallium/auxiliary/tgsi/tgsi_util.c | 12 
>  1 file changed, 12 insertions(+)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c 
> b/src/gallium/auxiliary/tgsi/tgsi_util.c
> index cfce59093c..afe5690ce0 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_util.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
> @@ -230,13 +230,25 @@ tgsi_util_get_inst_usage_mask(const struct 
> tgsi_full_instruction *inst,
>read_mask = TGSI_WRITEMASK_XYZ;
>break;
>
> +   case TGSI_OPCODE_DSEQ:
> +   case TGSI_OPCODE_DSNE:
> +   case TGSI_OPCODE_DSLT:
> +   case TGSI_OPCODE_DSGE:
> case TGSI_OPCODE_DP4:
> case TGSI_OPCODE_PK4B:
> case TGSI_OPCODE_PK4UB:
> case TGSI_OPCODE_D2F:
> +   case TGSI_OPCODE_D2I:
> +   case TGSI_OPCODE_D2U:
> case TGSI_OPCODE_I2F:
> case TGSI_OPCODE_U2F:
> +   case TGSI_OPCODE_U64SEQ:
> +   case TGSI_OPCODE_U64SNE:
> +   case TGSI_OPCODE_U64SLT:
> +   case TGSI_OPCODE_U64SGE:
> case TGSI_OPCODE_U642F:
> +   case TGSI_OPCODE_I64SLT:
> +   case TGSI_OPCODE_I64SGE:
> case TGSI_OPCODE_I642F:
>read_mask = TGSI_WRITEMASK_XYZW;
>break;
> --
> 2.11.0
>
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Re: [Mesa-dev] [PATCH] gallium: add more exceptions to tgsi_util_get_inst_usage_mask

[Roland Scheidegger]

Reviewed-by: Roland Scheidegger 

Albeit the way those masks are derived looks quite error-prone in
general (especially for new opcodes).

Am 19.10.2017 um 18:40 schrieb Tim Rowley:
> A number of double/int64 operations don't have matching
> read and write usage masks, which the fallthrough case of
> tgsi_util_get_inst_usage_mask assumes for componentwise
> tagged instructions.
> 
> No regressions in llvmpipe piglit; fixes a large number of
> swr regressions.
> ---
>  src/gallium/auxiliary/tgsi/tgsi_util.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c 
> b/src/gallium/auxiliary/tgsi/tgsi_util.c
> index cfce59093c..afe5690ce0 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_util.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
> @@ -230,13 +230,25 @@ tgsi_util_get_inst_usage_mask(const struct 
> tgsi_full_instruction *inst,
>read_mask = TGSI_WRITEMASK_XYZ;
>break;
>  
> +   case TGSI_OPCODE_DSEQ:
> +   case TGSI_OPCODE_DSNE:
> +   case TGSI_OPCODE_DSLT:
> +   case TGSI_OPCODE_DSGE:
> case TGSI_OPCODE_DP4:
> case TGSI_OPCODE_PK4B:
> case TGSI_OPCODE_PK4UB:
> case TGSI_OPCODE_D2F:
> +   case TGSI_OPCODE_D2I:
> +   case TGSI_OPCODE_D2U:
> case TGSI_OPCODE_I2F:
> case TGSI_OPCODE_U2F:
> +   case TGSI_OPCODE_U64SEQ:
> +   case TGSI_OPCODE_U64SNE:
> +   case TGSI_OPCODE_U64SLT:
> +   case TGSI_OPCODE_U64SGE:
> case TGSI_OPCODE_U642F:
> +   case TGSI_OPCODE_I64SLT:
> +   case TGSI_OPCODE_I64SGE:
> case TGSI_OPCODE_I642F:
>read_mask = TGSI_WRITEMASK_XYZW;
>break;
> 

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[Mesa-dev] [PATCH] gallium: add more exceptions to tgsi_util_get_inst_usage_mask

[Tim Rowley]

A number of double/int64 operations don't have matching
read and write usage masks, which the fallthrough case of
tgsi_util_get_inst_usage_mask assumes for componentwise
tagged instructions.

No regressions in llvmpipe piglit; fixes a large number of
swr regressions.
---
 src/gallium/auxiliary/tgsi/tgsi_util.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c 
b/src/gallium/auxiliary/tgsi/tgsi_util.c
index cfce59093c..afe5690ce0 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_util.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
@@ -230,13 +230,25 @@ tgsi_util_get_inst_usage_mask(const struct 
tgsi_full_instruction *inst,
   read_mask = TGSI_WRITEMASK_XYZ;
   break;
 
+   case TGSI_OPCODE_DSEQ:
+   case TGSI_OPCODE_DSNE:
+   case TGSI_OPCODE_DSLT:
+   case TGSI_OPCODE_DSGE:
case TGSI_OPCODE_DP4:
case TGSI_OPCODE_PK4B:
case TGSI_OPCODE_PK4UB:
case TGSI_OPCODE_D2F:
+   case TGSI_OPCODE_D2I:
+   case TGSI_OPCODE_D2U:
case TGSI_OPCODE_I2F:
case TGSI_OPCODE_U2F:
+   case TGSI_OPCODE_U64SEQ:
+   case TGSI_OPCODE_U64SNE:
+   case TGSI_OPCODE_U64SLT:
+   case TGSI_OPCODE_U64SGE:
case TGSI_OPCODE_U642F:
+   case TGSI_OPCODE_I64SLT:
+   case TGSI_OPCODE_I64SGE:
case TGSI_OPCODE_I642F:
   read_mask = TGSI_WRITEMASK_XYZW;
   break;
-- 
2.11.0

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