Reviewed-by: Chris Forbes
On Tue, Jan 12, 2016 at 12:04 PM, Kenneth Graunke
wrote:
> This adds barrier dependencies around TCS_OPCODE_URB_WRITE, preventing
> reads and writes from being incorrectly scheduled.
>
> Fixes rendering in GFXBench 4.0's tessellation demo.
>
> For some reason, we haven't ever listed URB writes as having
> side-effects. This hasn't been a problem because in most stages, we
> never read from the URB, and only write to each location once.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93526
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index efc24f9..0ac3f4a 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -1022,6 +1022,7 @@ backend_instruction::has_side_effects() const
> case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT:
> case FS_OPCODE_FB_WRITE:
> case SHADER_OPCODE_BARRIER:
> + case TCS_OPCODE_URB_WRITE:
> case TCS_OPCODE_RELEASE_INPUT:
>return true;
> default:
> --
> 2.7.0
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
