Re: [Mesa-dev] [PATCH] radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION

2014-11-14 Thread Commend Sarnex 
Tested-by: Nick Sarnie commendsar...@gmail.com using Gallium Nine.

On Sun, Nov 9, 2014 at 6:09 PM, Marek Olšák mar...@gmail.com wrote:

 From: Marek Olšák marek.ol...@amd.com

 Required by Nine.
 ---
  src/gallium/drivers/radeonsi/si_pipe.c   |  2 +-
  src/gallium/drivers/radeonsi/si_state.c  |  1 -
  src/gallium/drivers/radeonsi/si_state_draw.c | 16 +++-
  3 files changed, 16 insertions(+), 3 deletions(-)

 diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
 b/src/gallium/drivers/radeonsi/si_pipe.c
 index 7c479d6..279d7ce 100644
 --- a/src/gallium/drivers/radeonsi/si_pipe.c
 +++ b/src/gallium/drivers/radeonsi/si_pipe.c
 @@ -211,6 +211,7 @@ static int si_get_param(struct pipe_screen* pscreen,
 enum pipe_cap param)
 case PIPE_CAP_SAMPLE_SHADING:
 case PIPE_CAP_DRAW_INDIRECT:
 case PIPE_CAP_CLIP_HALFZ:
 +   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 return 1;

 case PIPE_CAP_TEXTURE_MULTISAMPLE:
 @@ -249,7 +250,6 @@ static int si_get_param(struct pipe_screen* pscreen,
 enum pipe_cap param)
 case PIPE_CAP_TGSI_TEXCOORD:
 case PIPE_CAP_FAKE_SW_MSAA:
 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 -   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 case PIPE_CAP_SAMPLER_VIEW_TARGET:
 diff --git a/src/gallium/drivers/radeonsi/si_state.c
 b/src/gallium/drivers/radeonsi/si_state.c
 index 030d6e9..ea8e61a 100644
 --- a/src/gallium/drivers/radeonsi/si_state.c
 +++ b/src/gallium/drivers/radeonsi/si_state.c
 @@ -3184,7 +3184,6 @@ void si_init_config(struct si_context *sctx)
 si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0x);
 si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0, 0x);
 si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0, 0x3F80);
 -   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL, 0x043F);
 si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0x);
 si_pm4_set_reg(pm4, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 0x3F80);
 si_pm4_set_reg(pm4, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, 0x3F80);
 diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
 b/src/gallium/drivers/radeonsi/si_state_draw.c
 index 708e42a..d5b27e7 100644
 --- a/src/gallium/drivers/radeonsi/si_state_draw.c
 +++ b/src/gallium/drivers/radeonsi/si_state_draw.c
 @@ -150,6 +150,8 @@ static void si_shader_vs(struct si_shader *shader)
 unsigned num_sgprs, num_user_sgprs;
 unsigned nparams, i, vgpr_comp_cnt;
 uint64_t va;
 +   unsigned window_space =
 +
 shader-selector-info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];

 pm4 = shader-pm4 = CALLOC_STRUCT(si_pm4_state);

 @@ -218,6 +220,15 @@ static void si_shader_vs(struct si_shader *shader)

  S_00B12C_SO_BASE2_EN(!!shader-selector-so.stride[2]) |

  S_00B12C_SO_BASE3_EN(!!shader-selector-so.stride[3]) |
S_00B12C_SO_EN(!!shader-selector-so.num_outputs));
 +   if (window_space)
 +   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL,
 +  S_028818_VTX_XY_FMT(1) |
 S_028818_VTX_Z_FMT(1));
 +   else
 +   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL,
 +  S_028818_VTX_W0_FMT(1) |
 +  S_028818_VPORT_X_SCALE_ENA(1) |
 S_028818_VPORT_X_OFFSET_ENA(1) |
 +  S_028818_VPORT_Y_SCALE_ENA(1) |
 S_028818_VPORT_Y_OFFSET_ENA(1) |
 +  S_028818_VPORT_Z_SCALE_ENA(1) |
 S_028818_VPORT_Z_OFFSET_ENA(1));
  }

  static void si_shader_ps(struct si_shader *shader)
 @@ -436,6 +447,8 @@ static bool si_update_draw_info_state(struct
 si_context *sctx,
  {
 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
 struct si_shader *vs = si_get_vs_state(sctx);
 +   unsigned window_space =
 +
 vs-selector-info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
 unsigned prim = si_conv_pipe_prim(info-mode);
 unsigned gs_out_prim =
 si_conv_prim_to_gs_out(sctx-gs_shader ?
 @@ -496,7 +509,8 @@ static bool si_update_draw_info_state(struct
 si_context *sctx,
 si_pm4_set_reg(pm4, R_028810_PA_CL_CLIP_CNTL,
sctx-queued.named.rasterizer-pa_cl_clip_cntl |
(vs-clip_dist_write ? 0 :
 -   sctx-queued.named.rasterizer-clip_plane_enable 
 0x3F));
 +   sctx-queued.named.rasterizer-clip_plane_enable 
 0x3F) |
 +  S_028810_CLIP_DISABLE(window_space));

 si_pm4_set_state(sctx, draw_info, pm4);
 return true;
 --
 2.1.0

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[Mesa-dev] [PATCH] radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION

2014-11-09 Thread Marek Olšák 
From: Marek Olšák marek.ol...@amd.com

Required by Nine.
---
 src/gallium/drivers/radeonsi/si_pipe.c   |  2 +-
 src/gallium/drivers/radeonsi/si_state.c  |  1 -
 src/gallium/drivers/radeonsi/si_state_draw.c | 16 +++-
 3 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 7c479d6..279d7ce 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -211,6 +211,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum 
pipe_cap param)
case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_DRAW_INDIRECT:
case PIPE_CAP_CLIP_HALFZ:
+   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
return 1;
 
case PIPE_CAP_TEXTURE_MULTISAMPLE:
@@ -249,7 +250,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum 
pipe_cap param)
case PIPE_CAP_TGSI_TEXCOORD:
case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
-   case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
case PIPE_CAP_SAMPLER_VIEW_TARGET:
diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 030d6e9..ea8e61a 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3184,7 +3184,6 @@ void si_init_config(struct si_context *sctx)
si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0x);
si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0, 0x);
si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0, 0x3F80);
-   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL, 0x043F);
si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0x);
si_pm4_set_reg(pm4, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 0x3F80);
si_pm4_set_reg(pm4, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, 0x3F80);
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c 
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 708e42a..d5b27e7 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -150,6 +150,8 @@ static void si_shader_vs(struct si_shader *shader)
unsigned num_sgprs, num_user_sgprs;
unsigned nparams, i, vgpr_comp_cnt;
uint64_t va;
+   unsigned window_space =
+  
shader-selector-info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
 
pm4 = shader-pm4 = CALLOC_STRUCT(si_pm4_state);
 
@@ -218,6 +220,15 @@ static void si_shader_vs(struct si_shader *shader)
   S_00B12C_SO_BASE2_EN(!!shader-selector-so.stride[2]) |
   S_00B12C_SO_BASE3_EN(!!shader-selector-so.stride[3]) |
   S_00B12C_SO_EN(!!shader-selector-so.num_outputs));
+   if (window_space)
+   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL,
+  S_028818_VTX_XY_FMT(1) | S_028818_VTX_Z_FMT(1));
+   else
+   si_pm4_set_reg(pm4, R_028818_PA_CL_VTE_CNTL,
+  S_028818_VTX_W0_FMT(1) |
+  S_028818_VPORT_X_SCALE_ENA(1) | 
S_028818_VPORT_X_OFFSET_ENA(1) |
+  S_028818_VPORT_Y_SCALE_ENA(1) | 
S_028818_VPORT_Y_OFFSET_ENA(1) |
+  S_028818_VPORT_Z_SCALE_ENA(1) | 
S_028818_VPORT_Z_OFFSET_ENA(1));
 }
 
 static void si_shader_ps(struct si_shader *shader)
@@ -436,6 +447,8 @@ static bool si_update_draw_info_state(struct si_context 
*sctx,
 {
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
struct si_shader *vs = si_get_vs_state(sctx);
+   unsigned window_space =
+  
vs-selector-info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
unsigned prim = si_conv_pipe_prim(info-mode);
unsigned gs_out_prim =
si_conv_prim_to_gs_out(sctx-gs_shader ?
@@ -496,7 +509,8 @@ static bool si_update_draw_info_state(struct si_context 
*sctx,
si_pm4_set_reg(pm4, R_028810_PA_CL_CLIP_CNTL,
   sctx-queued.named.rasterizer-pa_cl_clip_cntl |
   (vs-clip_dist_write ? 0 :
-   sctx-queued.named.rasterizer-clip_plane_enable  
0x3F));
+   sctx-queued.named.rasterizer-clip_plane_enable  
0x3F) |
+  S_028810_CLIP_DISABLE(window_space));
 
si_pm4_set_state(sctx, draw_info, pm4);
return true;
-- 
2.1.0

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Re: [Mesa-dev] [PATCH] radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION

2014-11-09 Thread Michel Dänzer 

On 10.11.2014 08:09, Marek Olšák wrote:

From: Marek Olšák marek.ol...@amd.com

Required by Nine.


Reviewed-by: Michel Dänzer michel.daen...@amd.com


--
Earthling Michel Dänzer|  http://www.amd.com
Libre software enthusiast  |Mesa and X developer
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