Re: [Mesa-dev] [PATCH] radv: don't assert on empty hash table

2017-08-29 Thread Bas Nieuwenhuizen
Reviewed-by: Bas Nieuwenhuizen 

On Sun, Aug 27, 2017, at 23:44, Grazvydas Ignotas wrote:
> Currently if table_size is 0, it's falling through to:
> 
> unreachable("hash table should never be full");
> 
> But table_size can be 0 when RADV_DEBUG=nocache is set, or when the
> table allocation fails (which is not considered an error).
> 
> Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
> Signed-off-by: Grazvydas Ignotas 
> ---
>  src/amd/vulkan/radv_pipeline_cache.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/src/amd/vulkan/radv_pipeline_cache.c
> b/src/amd/vulkan/radv_pipeline_cache.c
> index 99a614d..beed35b 100644
> --- a/src/amd/vulkan/radv_pipeline_cache.c
> +++ b/src/amd/vulkan/radv_pipeline_cache.c
> @@ -116,10 +116,13 @@ radv_pipeline_cache_search_unlocked(struct
> radv_pipeline_cache *cache,
>   const unsigned char *sha1)
>  {
>   const uint32_t mask = cache->table_size - 1;
>   const uint32_t start = (*(uint32_t *) sha1);
>  
> +   if (cache->table_size == 0)
> +   return NULL;
> +
>   for (uint32_t i = 0; i < cache->table_size; i++) {
>   const uint32_t index = (start + i) & mask;
>   struct cache_entry *entry = cache->hash_table[index];
>  
>   if (!entry)
> -- 
> 2.7.4
> 
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[Mesa-dev] [PATCH] radv: don't assert on empty hash table

2017-08-27 Thread Grazvydas Ignotas
Currently if table_size is 0, it's falling through to:

unreachable("hash table should never be full");

But table_size can be 0 when RADV_DEBUG=nocache is set, or when the
table allocation fails (which is not considered an error).

Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Grazvydas Ignotas 
---
 src/amd/vulkan/radv_pipeline_cache.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/amd/vulkan/radv_pipeline_cache.c 
b/src/amd/vulkan/radv_pipeline_cache.c
index 99a614d..beed35b 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -116,10 +116,13 @@ radv_pipeline_cache_search_unlocked(struct 
radv_pipeline_cache *cache,
const unsigned char *sha1)
 {
const uint32_t mask = cache->table_size - 1;
const uint32_t start = (*(uint32_t *) sha1);
 
+   if (cache->table_size == 0)
+   return NULL;
+
for (uint32_t i = 0; i < cache->table_size; i++) {
const uint32_t index = (start + i) & mask;
struct cache_entry *entry = cache->hash_table[index];
 
if (!entry)
-- 
2.7.4

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