Please ignore this patch, I'm about to send a patch series that includes
this patch and another one for bitfield ops.
Sam
On 25/04/18 14:07, Samuel Iglesias Gonsálvez wrote:
> SPIR-V allows to define the shift operand for shift opcodes with
> a bit-size different than 32 bits, but in NIR the opcodes have
> that limitation. As agreed in the mailing list, this patch adds
> a conversion to 32 bits to fix this.
>
> For more info, see:
>
> https://lists.freedesktop.org/archives/mesa-dev/2018-April/193026.html
>
> Signed-off-by: Samuel Iglesias Gonsálvez
> ---
> src/compiler/spirv/vtn_alu.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
> index 71e743cdd1e..1d33ae28273 100644
> --- a/src/compiler/spirv/vtn_alu.c
> +++ b/src/compiler/spirv/vtn_alu.c
> @@ -640,6 +640,19 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
>break;
> }
>
> + case SpvOpShiftLeftLogical:
> + case SpvOpShiftRightArithmetic:
> + case SpvOpShiftRightLogical: {
> + if (src[1]->bit_size != 32) {
> + /* Convert the Shift operand to 32 bits, which is the bitsize
> + * supported by the NIR instruction. See discussion here:
> + *
> + *
> https://lists.freedesktop.org/archives/mesa-dev/2018-April/193026.html
> + */
> + src[1] = nir_build_alu(&b->nb, nir_op_u2u32, src[1], NULL, NULL,
> NULL);
> + }
> + }
> + /* fall-through */
> default: {
>bool swap;
>unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
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