[Mesa-dev] [PATCH 09/10] ac: remove usused v4f32

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ac50debdde..ec51ed7007 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,22 +127,20 @@ struct nir_to_llvm_context {
        LLVMValueRef esgs_ring;
        LLVMValueRef gsvs_ring;
        LLVMValueRef hs_ring_tess_offchip;
        LLVMValueRef hs_ring_tess_factor;
 
        LLVMValueRef prim_mask;
        LLVMValueRef sample_pos_offset;
        LLVMValueRef persp_sample, persp_center, persp_centroid;
        LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-       LLVMTypeRef v4f32;
-
        unsigned uniform_md_kind;
        LLVMValueRef empty_md;
        gl_shader_stage stage;
 
        LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
        uint64_t input_mask;
        uint64_t output_mask;
        uint8_t num_output_clips;
        uint8_t num_output_culls;
@@ -977,22 +975,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
                break;
        default:
                unreachable("Shader stage not implemented");
        }
 
        ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-       ctx->v4f32 = LLVMVectorType(ctx->ac.f32, 4);
-
        ctx->uniform_md_kind =
            LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
        ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
        LLVMTypeRef type = LLVMTypeOf(value);
        unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
                                      ? LLVMGetVectorSize(type)
-- 
2.14.3

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