Re: [Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-16 Thread Jordan Justen 
On 2015-11-12 15:38:51, Kenneth Graunke wrote:
> I was going to add scalar_tcs and scalar_tes flags, and then thought
> better of it and decided to convert this to an array.  Simpler.
> 
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
>  src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
>  src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
>  src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
>  src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
>  src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 
> ++-
>  src/mesa/drivers/dri/i965/brw_shader.h|  2 --
>  src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
>  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
>  src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
>  10 files changed, 28 insertions(+), 40 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
> b/src/mesa/drivers/dri/i965/brw_compiler.h
> index e3a26d6..3f54616 100644
> --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> @@ -89,8 +89,7 @@ struct brw_compiler {
> void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
> void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
>  
> -   bool scalar_vs;
> -   bool scalar_gs;
> +   bool scalar_stage[MESA_SHADER_STAGES];
> struct gl_shader_compiler_options 
> glsl_compiler_options[MESA_SHADER_STAGES];
>  };
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> b/src/mesa/drivers/dri/i965/brw_context.c
> index ac6045d..2db99c7 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context *brw)
>ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
>   BRW_MAX_IMAGES;
>ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
> - (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
> + (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] ? 
> BRW_MAX_IMAGES : 0);

Line > 80.

Reviewed-by: Jordan Justen 

>ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
>   BRW_MAX_IMAGES;
>ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
> diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
> b/src/mesa/drivers/dri/i965/brw_gs.c
> index ed0890f..ad5b242 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> @@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
> prog_data.base.base.nr_image_params = gs->NumImages;
>  
> brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, >program.Base,
> -   _data.base.base, compiler->scalar_gs);
> +   _data.base.base,
> +   compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
>  
> GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
> b/src/mesa/drivers/dri/i965/brw_link.cpp
> index 2991173..14421d4 100644
> --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> @@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
> gl_shader_stage shader_type,
> exec_list *ir)
>  {
> +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> +
> int ops = LOWER_PACK_SNORM_2x16
> | LOWER_UNPACK_SNORM_2x16
> | LOWER_PACK_UNORM_2x16
> | LOWER_UNPACK_UNORM_2x16;
>  
> -   if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> +   if (compiler->scalar_stage[shader_type]) {
>ops |= LOWER_UNPACK_UNORM_4x8
> | LOWER_UNPACK_SNORM_4x8
> | LOWER_PACK_UNORM_4x8
> @@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
> * lowering is needed. For SOA code, the Half2x16 ops must be
> * scalarized.
> */
> -  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> +  if (compiler->scalar_stage[shader_type]) {
>   ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
>   |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
>}
> @@ -103,6 +105,7 @@ process_glsl_ir(gl_shader_stage stage,
>  struct gl_shader *shader)
>  {
> struct gl_context *ctx = >ctx;
> +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> const struct gl_shader_compiler_options *options =
>>Const.ShaderCompilerOptions[shader->Stage];
>  
> @@ -161,7 +164,7 @@ process_glsl_ir(gl_shader_stage stage,
> do {
>progress = false;
>  
> -  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader->Stage)) 
> {
> +  if

Re: [Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-16 Thread Kenneth Graunke 
On Monday, November 16, 2015 10:23:22 AM Pohjolainen, Topi wrote:
> On Fri, Nov 13, 2015 at 11:29:00AM -0800, Kenneth Graunke wrote:
> > On Friday, November 13, 2015 10:06:23 AM Pohjolainen, Topi wrote:
> > > On Thu, Nov 12, 2015 at 03:38:51PM -0800, Kenneth Graunke wrote:
> > > > I was going to add scalar_tcs and scalar_tes flags, and then thought
> > > > better of it and decided to convert this to an array.  Simpler.
> > > > 
> > > > Signed-off-by: Kenneth Graunke 
> > > > ---
> > > >  src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
> > > >  src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
> > > >  src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
> > > >  src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
> > > >  src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
> > > >  src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 
> > > > ++-
> > > >  src/mesa/drivers/dri/i965/brw_shader.h|  2 --
> > > >  src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
> > > >  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
> > > >  src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
> > > >  10 files changed, 28 insertions(+), 40 deletions(-)
> > > > 
> > > > diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
> > > > b/src/mesa/drivers/dri/i965/brw_compiler.h
> > > > index e3a26d6..3f54616 100644
> > > > --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> > > > +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> > > > @@ -89,8 +89,7 @@ struct brw_compiler {
> > > > void (*shader_debug_log)(void *, const char *str, ...) 
> > > > PRINTFLIKE(2, 3);
> > > > void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 
> > > > 3);
> > > >  
> > > > -   bool scalar_vs;
> > > > -   bool scalar_gs;
> > > > +   bool scalar_stage[MESA_SHADER_STAGES];
> > > > struct gl_shader_compiler_options 
> > > > glsl_compiler_options[MESA_SHADER_STAGES];
> > > >  };
> > > >  
> > > > diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> > > > b/src/mesa/drivers/dri/i965/brw_context.c
> > > > index ac6045d..2db99c7 100644
> > > > --- a/src/mesa/drivers/dri/i965/brw_context.c
> > > > +++ b/src/mesa/drivers/dri/i965/brw_context.c
> > > > @@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context 
> > > > *brw)
> > > >ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
> > > >   BRW_MAX_IMAGES;
> > > >ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
> > > > - (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
> > > > + (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] 
> > > > ? BRW_MAX_IMAGES : 0);
> > > >ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
> > > >   BRW_MAX_IMAGES;
> > > >ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
> > > > diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
> > > > b/src/mesa/drivers/dri/i965/brw_gs.c
> > > > index ed0890f..ad5b242 100644
> > > > --- a/src/mesa/drivers/dri/i965/brw_gs.c
> > > > +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> > > > @@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
> > > > prog_data.base.base.nr_image_params = gs->NumImages;
> > > >  
> > > > brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, 
> > > > >program.Base,
> > > > -   _data.base.base, 
> > > > compiler->scalar_gs);
> > > > +   _data.base.base,
> > > > +   
> > > > compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
> > > >  
> > > > GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
> > > >  
> > > > diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
> > > > b/src/mesa/drivers/dri/i965/brw_link.cpp
> > > > index 2991173..14421d4 100644
> > > > --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> > > > +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> > > > @@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > > > gl_shader_stage shader_type,
> > > > exec_list *ir)
> > > >  {
> > > > +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> > > > +
> > > > int ops = LOWER_PACK_SNORM_2x16
> > > > | LOWER_UNPACK_SNORM_2x16
> > > > | LOWER_PACK_UNORM_2x16
> > > > | LOWER_UNPACK_UNORM_2x16;
> > > >  
> > > > -   if (is_scalar_shader_stage(brw->intelScreen->compiler, 
> > > > shader_type)) {
> > > > +   if (compiler->scalar_stage[shader_type]) {
> > > >ops |= LOWER_UNPACK_UNORM_4x8
> > > > | LOWER_UNPACK_SNORM_4x8
> > > > | LOWER_PACK_UNORM_4x8
> > > > @@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > > > * lowering is needed. For SOA code, the Half2x16 ops must be
> > > > * scalarized.
> > > > */
> > > > -  if

Re: [Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-16 Thread Pohjolainen, Topi 
On Fri, Nov 13, 2015 at 11:29:00AM -0800, Kenneth Graunke wrote:
> On Friday, November 13, 2015 10:06:23 AM Pohjolainen, Topi wrote:
> > On Thu, Nov 12, 2015 at 03:38:51PM -0800, Kenneth Graunke wrote:
> > > I was going to add scalar_tcs and scalar_tes flags, and then thought
> > > better of it and decided to convert this to an array.  Simpler.
> > > 
> > > Signed-off-by: Kenneth Graunke 
> > > ---
> > >  src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
> > >  src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
> > >  src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
> > >  src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
> > >  src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
> > >  src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 
> > > ++-
> > >  src/mesa/drivers/dri/i965/brw_shader.h|  2 --
> > >  src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
> > >  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
> > >  src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
> > >  10 files changed, 28 insertions(+), 40 deletions(-)
> > > 
> > > diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
> > > b/src/mesa/drivers/dri/i965/brw_compiler.h
> > > index e3a26d6..3f54616 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> > > @@ -89,8 +89,7 @@ struct brw_compiler {
> > > void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 
> > > 3);
> > > void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 
> > > 3);
> > >  
> > > -   bool scalar_vs;
> > > -   bool scalar_gs;
> > > +   bool scalar_stage[MESA_SHADER_STAGES];
> > > struct gl_shader_compiler_options 
> > > glsl_compiler_options[MESA_SHADER_STAGES];
> > >  };
> > >  
> > > diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> > > b/src/mesa/drivers/dri/i965/brw_context.c
> > > index ac6045d..2db99c7 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_context.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_context.c
> > > @@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context 
> > > *brw)
> > >ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
> > >   BRW_MAX_IMAGES;
> > >ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
> > > - (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
> > > + (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] ? 
> > > BRW_MAX_IMAGES : 0);
> > >ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
> > >   BRW_MAX_IMAGES;
> > >ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
> > > diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
> > > b/src/mesa/drivers/dri/i965/brw_gs.c
> > > index ed0890f..ad5b242 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_gs.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> > > @@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
> > > prog_data.base.base.nr_image_params = gs->NumImages;
> > >  
> > > brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, 
> > > >program.Base,
> > > -   _data.base.base, 
> > > compiler->scalar_gs);
> > > +   _data.base.base,
> > > +   
> > > compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
> > >  
> > > GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
> > >  
> > > diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
> > > b/src/mesa/drivers/dri/i965/brw_link.cpp
> > > index 2991173..14421d4 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> > > +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> > > @@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > > gl_shader_stage shader_type,
> > > exec_list *ir)
> > >  {
> > > +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> > > +
> > > int ops = LOWER_PACK_SNORM_2x16
> > > | LOWER_UNPACK_SNORM_2x16
> > > | LOWER_PACK_UNORM_2x16
> > > | LOWER_UNPACK_UNORM_2x16;
> > >  
> > > -   if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> > > +   if (compiler->scalar_stage[shader_type]) {
> > >ops |= LOWER_UNPACK_UNORM_4x8
> > > | LOWER_UNPACK_SNORM_4x8
> > > | LOWER_PACK_UNORM_4x8
> > > @@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > > * lowering is needed. For SOA code, the Half2x16 ops must be
> > > * scalarized.
> > > */
> > > -  if (is_scalar_shader_stage(brw->intelScreen->compiler, 
> > > shader_type)) {
> > > +  if (compiler->scalar_stage[shader_type]) {
> > >   ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
> > >   |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
> > >}
> > > @@ -103,6 +105,7 @@

Re: [Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-13 Thread Pohjolainen, Topi 
On Thu, Nov 12, 2015 at 03:38:51PM -0800, Kenneth Graunke wrote:
> I was going to add scalar_tcs and scalar_tes flags, and then thought
> better of it and decided to convert this to an array.  Simpler.
> 
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
>  src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
>  src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
>  src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
>  src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
>  src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 
> ++-
>  src/mesa/drivers/dri/i965/brw_shader.h|  2 --
>  src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
>  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
>  src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
>  10 files changed, 28 insertions(+), 40 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
> b/src/mesa/drivers/dri/i965/brw_compiler.h
> index e3a26d6..3f54616 100644
> --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> @@ -89,8 +89,7 @@ struct brw_compiler {
> void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
> void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
>  
> -   bool scalar_vs;
> -   bool scalar_gs;
> +   bool scalar_stage[MESA_SHADER_STAGES];
> struct gl_shader_compiler_options 
> glsl_compiler_options[MESA_SHADER_STAGES];
>  };
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> b/src/mesa/drivers/dri/i965/brw_context.c
> index ac6045d..2db99c7 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context *brw)
>ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
>   BRW_MAX_IMAGES;
>ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
> - (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
> + (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] ? 
> BRW_MAX_IMAGES : 0);
>ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
>   BRW_MAX_IMAGES;
>ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
> diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
> b/src/mesa/drivers/dri/i965/brw_gs.c
> index ed0890f..ad5b242 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> @@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
> prog_data.base.base.nr_image_params = gs->NumImages;
>  
> brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, >program.Base,
> -   _data.base.base, compiler->scalar_gs);
> +   _data.base.base,
> +   compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
>  
> GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
> b/src/mesa/drivers/dri/i965/brw_link.cpp
> index 2991173..14421d4 100644
> --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> @@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
> gl_shader_stage shader_type,
> exec_list *ir)
>  {
> +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> +
> int ops = LOWER_PACK_SNORM_2x16
> | LOWER_UNPACK_SNORM_2x16
> | LOWER_PACK_UNORM_2x16
> | LOWER_UNPACK_UNORM_2x16;
>  
> -   if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> +   if (compiler->scalar_stage[shader_type]) {
>ops |= LOWER_UNPACK_UNORM_4x8
> | LOWER_UNPACK_SNORM_4x8
> | LOWER_PACK_UNORM_4x8
> @@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
> * lowering is needed. For SOA code, the Half2x16 ops must be
> * scalarized.
> */
> -  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> +  if (compiler->scalar_stage[shader_type]) {
>   ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
>   |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
>}
> @@ -103,6 +105,7 @@ process_glsl_ir(gl_shader_stage stage,
>  struct gl_shader *shader)
>  {
> struct gl_context *ctx = >ctx;
> +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> const struct gl_shader_compiler_options *options =
>>Const.ShaderCompilerOptions[shader->Stage];
>  
> @@ -161,7 +164,7 @@ process_glsl_ir(gl_shader_stage stage,
> do {
>progress = false;
>  
> -  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader->Stage)) 
> {
> +  if (compiler->scalar_stage[shader->Stage]) {
>

Re: [Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-13 Thread Kenneth Graunke 
On Friday, November 13, 2015 10:06:23 AM Pohjolainen, Topi wrote:
> On Thu, Nov 12, 2015 at 03:38:51PM -0800, Kenneth Graunke wrote:
> > I was going to add scalar_tcs and scalar_tes flags, and then thought
> > better of it and decided to convert this to an array.  Simpler.
> > 
> > Signed-off-by: Kenneth Graunke 
> > ---
> >  src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
> >  src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
> >  src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
> >  src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
> >  src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
> >  src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 
> > ++-
> >  src/mesa/drivers/dri/i965/brw_shader.h|  2 --
> >  src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
> >  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
> >  src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
> >  10 files changed, 28 insertions(+), 40 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
> > b/src/mesa/drivers/dri/i965/brw_compiler.h
> > index e3a26d6..3f54616 100644
> > --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> > +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> > @@ -89,8 +89,7 @@ struct brw_compiler {
> > void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
> > void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
> >  
> > -   bool scalar_vs;
> > -   bool scalar_gs;
> > +   bool scalar_stage[MESA_SHADER_STAGES];
> > struct gl_shader_compiler_options 
> > glsl_compiler_options[MESA_SHADER_STAGES];
> >  };
> >  
> > diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> > b/src/mesa/drivers/dri/i965/brw_context.c
> > index ac6045d..2db99c7 100644
> > --- a/src/mesa/drivers/dri/i965/brw_context.c
> > +++ b/src/mesa/drivers/dri/i965/brw_context.c
> > @@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context 
> > *brw)
> >ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
> >   BRW_MAX_IMAGES;
> >ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
> > - (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
> > + (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] ? 
> > BRW_MAX_IMAGES : 0);
> >ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
> >   BRW_MAX_IMAGES;
> >ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
> > diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
> > b/src/mesa/drivers/dri/i965/brw_gs.c
> > index ed0890f..ad5b242 100644
> > --- a/src/mesa/drivers/dri/i965/brw_gs.c
> > +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> > @@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
> > prog_data.base.base.nr_image_params = gs->NumImages;
> >  
> > brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, 
> > >program.Base,
> > -   _data.base.base, compiler->scalar_gs);
> > +   _data.base.base,
> > +   
> > compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
> >  
> > GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
> >  
> > diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
> > b/src/mesa/drivers/dri/i965/brw_link.cpp
> > index 2991173..14421d4 100644
> > --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> > @@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > gl_shader_stage shader_type,
> > exec_list *ir)
> >  {
> > +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> > +
> > int ops = LOWER_PACK_SNORM_2x16
> > | LOWER_UNPACK_SNORM_2x16
> > | LOWER_PACK_UNORM_2x16
> > | LOWER_UNPACK_UNORM_2x16;
> >  
> > -   if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
> > +   if (compiler->scalar_stage[shader_type]) {
> >ops |= LOWER_UNPACK_UNORM_4x8
> > | LOWER_UNPACK_SNORM_4x8
> > | LOWER_PACK_UNORM_4x8
> > @@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
> > * lowering is needed. For SOA code, the Half2x16 ops must be
> > * scalarized.
> > */
> > -  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) 
> > {
> > +  if (compiler->scalar_stage[shader_type]) {
> >   ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
> >   |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
> >}
> > @@ -103,6 +105,7 @@ process_glsl_ir(gl_shader_stage stage,
> >  struct gl_shader *shader)
> >  {
> > struct gl_context *ctx = >ctx;
> > +   const struct brw_compiler *compiler = brw->intelScreen->compiler;
> > const struct gl_shader_compiler_options *options =
> >

[Mesa-dev] [PATCH 1/2] i965: Convert scalar_* flags to a scalar_stage array.

2015-11-12 Thread Kenneth Graunke 
I was going to add scalar_tcs and scalar_tes flags, and then thought
better of it and decided to convert this to an array.  Simpler.

Signed-off-by: Kenneth Graunke 
---
 src/mesa/drivers/dri/i965/brw_compiler.h  |  3 +--
 src/mesa/drivers/dri/i965/brw_context.c   |  2 +-
 src/mesa/drivers/dri/i965/brw_gs.c|  3 ++-
 src/mesa/drivers/dri/i965/brw_link.cpp| 11 +---
 src/mesa/drivers/dri/i965/brw_program.c   |  3 ++-
 src/mesa/drivers/dri/i965/brw_shader.cpp  | 31 ++-
 src/mesa/drivers/dri/i965/brw_shader.h|  2 --
 src/mesa/drivers/dri/i965/brw_vec4.cpp|  4 +--
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_vs.c|  7 ++---
 10 files changed, 28 insertions(+), 40 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h 
b/src/mesa/drivers/dri/i965/brw_compiler.h
index e3a26d6..3f54616 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -89,8 +89,7 @@ struct brw_compiler {
void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
 
-   bool scalar_vs;
-   bool scalar_gs;
+   bool scalar_stage[MESA_SHADER_STAGES];
struct gl_shader_compiler_options glsl_compiler_options[MESA_SHADER_STAGES];
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index ac6045d..2db99c7 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -525,7 +525,7 @@ brw_initialize_context_constants(struct brw_context *brw)
   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
  BRW_MAX_IMAGES;
   ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
- (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
+ (brw->intelScreen->compiler->scalar_stage[MESA_SHADER_VERTEX] ? 
BRW_MAX_IMAGES : 0);
   ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
  BRW_MAX_IMAGES;
   ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c 
b/src/mesa/drivers/dri/i965/brw_gs.c
index ed0890f..ad5b242 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -87,7 +87,8 @@ brw_codegen_gs_prog(struct brw_context *brw,
prog_data.base.base.nr_image_params = gs->NumImages;
 
brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, >program.Base,
-   _data.base.base, compiler->scalar_gs);
+   _data.base.base,
+   compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
 
GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
 
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
b/src/mesa/drivers/dri/i965/brw_link.cpp
index 2991173..14421d4 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -66,12 +66,14 @@ brw_lower_packing_builtins(struct brw_context *brw,
gl_shader_stage shader_type,
exec_list *ir)
 {
+   const struct brw_compiler *compiler = brw->intelScreen->compiler;
+
int ops = LOWER_PACK_SNORM_2x16
| LOWER_UNPACK_SNORM_2x16
| LOWER_PACK_UNORM_2x16
| LOWER_UNPACK_UNORM_2x16;
 
-   if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
+   if (compiler->scalar_stage[shader_type]) {
   ops |= LOWER_UNPACK_UNORM_4x8
| LOWER_UNPACK_SNORM_4x8
| LOWER_PACK_UNORM_4x8
@@ -84,7 +86,7 @@ brw_lower_packing_builtins(struct brw_context *brw,
* lowering is needed. For SOA code, the Half2x16 ops must be
* scalarized.
*/
-  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader_type)) {
+  if (compiler->scalar_stage[shader_type]) {
  ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
  |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
   }
@@ -103,6 +105,7 @@ process_glsl_ir(gl_shader_stage stage,
 struct gl_shader *shader)
 {
struct gl_context *ctx = >ctx;
+   const struct brw_compiler *compiler = brw->intelScreen->compiler;
const struct gl_shader_compiler_options *options =
   >Const.ShaderCompilerOptions[shader->Stage];
 
@@ -161,7 +164,7 @@ process_glsl_ir(gl_shader_stage stage,
do {
   progress = false;
 
-  if (is_scalar_shader_stage(brw->intelScreen->compiler, shader->Stage)) {
+  if (compiler->scalar_stage[shader->Stage]) {
  brw_do_channel_expressions(shader->ir);
  brw_do_vector_splitting(shader->ir);
   }
@@ -252,7 +255,7 @@ brw_link_shader(struct gl_context *ctx, struct 
gl_shader_program *shProg)
   brw_add_texrect_params(prog);
 
   prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage)