[Mesa-dev] [PATCH 10/24] radeonsi: factor out metadata import

[Timothy Arceri]

From: Andres Rodriguez 

Plumbing for importing memobj backed textures.

Signed-off-by: Andres Rodriguez 
Reviewed-by: Marek Olšák 
---
 src/gallium/drivers/radeon/r600_texture.c | 63 ++-
 1 file changed, 36 insertions(+), 27 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c 
b/src/gallium/drivers/radeon/r600_texture.c
index 3aac3c78a9..ca2b37b21a 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -333,20 +333,53 @@ static void r600_texture_init_metadata(struct 
r600_common_screen *rscreen,
metadata->u.legacy.bankw = surface->u.legacy.bankw;
metadata->u.legacy.bankh = surface->u.legacy.bankh;
metadata->u.legacy.tile_split = surface->u.legacy.tile_split;
metadata->u.legacy.mtilea = surface->u.legacy.mtilea;
metadata->u.legacy.num_banks = surface->u.legacy.num_banks;
metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * 
surface->bpe;
metadata->u.legacy.scanout = (surface->flags & 
RADEON_SURF_SCANOUT) != 0;
}
 }
 
+static void r600_surface_import_metadata(struct r600_common_screen *rscreen,
+struct radeon_surf *surf,
+struct radeon_bo_metadata *metadata,
+enum radeon_surf_mode *array_mode,
+bool *is_scanout)
+{
+   if (rscreen->chip_class >= GFX9) {
+   if (metadata->u.gfx9.swizzle_mode > 0)
+   *array_mode = RADEON_SURF_MODE_2D;
+   else
+   *array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
+
+   *is_scanout = metadata->u.gfx9.swizzle_mode == 0 ||
+   metadata->u.gfx9.swizzle_mode % 4 == 2;
+   } else {
+   surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
+   surf->u.legacy.bankw = metadata->u.legacy.bankw;
+   surf->u.legacy.bankh = metadata->u.legacy.bankh;
+   surf->u.legacy.tile_split = metadata->u.legacy.tile_split;
+   surf->u.legacy.mtilea = metadata->u.legacy.mtilea;
+   surf->u.legacy.num_banks = metadata->u.legacy.num_banks;
+
+   if (metadata->u.legacy.macrotile == RADEON_LAYOUT_TILED)
+   *array_mode = RADEON_SURF_MODE_2D;
+   else if (metadata->u.legacy.microtile == RADEON_LAYOUT_TILED)
+   *array_mode = RADEON_SURF_MODE_1D;
+   else
+   *array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
+
+   *is_scanout = metadata->u.legacy.scanout;
+   }
+}
+
 static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx,
struct r600_texture *rtex)
 {
struct r600_common_screen *rscreen = rctx->screen;
struct pipe_context *ctx = >b;
 
if (ctx == rscreen->aux_context)
mtx_lock(>aux_context_lock);
 
ctx->flush_resource(ctx, >resource.b.b);
@@ -1435,63 +1468,39 @@ struct pipe_resource *r600_texture_create(struct 
pipe_screen *screen,
 }
 
 static struct pipe_resource *r600_texture_from_handle(struct pipe_screen 
*screen,
  const struct 
pipe_resource *templ,
  struct winsys_handle 
*whandle,
   unsigned usage)
 {
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
struct pb_buffer *buf = NULL;
unsigned stride = 0, offset = 0;
-   unsigned array_mode;
+   enum radeon_surf_mode array_mode;
struct radeon_surf surface;
int r;
struct radeon_bo_metadata metadata = {};
struct r600_texture *rtex;
bool is_scanout;
 
/* Support only 2D textures without mipmaps */
if ((templ->target != PIPE_TEXTURE_2D && templ->target != 
PIPE_TEXTURE_RECT) ||
  templ->depth0 != 1 || templ->last_level != 0)
return NULL;
 
buf = rscreen->ws->buffer_from_handle(rscreen->ws, whandle, , 
);
if (!buf)
return NULL;
 
rscreen->ws->buffer_get_metadata(buf, );
-
-   if (rscreen->chip_class >= GFX9) {
-   if (metadata.u.gfx9.swizzle_mode > 0)
-   array_mode = RADEON_SURF_MODE_2D;
-   else
-   array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
-
-   is_scanout = metadata.u.gfx9.swizzle_mode == 0 ||
-metadata.u.gfx9.swizzle_mode % 4 == 2;
-   } else {
-   surface.u.legacy.pipe_config = metadata.u.legacy.pipe_config;
-   surface.u.legacy.bankw = 

[Mesa-dev] [PATCH 10/24] radeonsi: factor out metadata import

[Timothy Arceri]

From: Andres Rodriguez 

Plumbing for importing memobj backed textures.

Signed-off-by: Andres Rodriguez 
Reviewed-by: Marek Olšák 
---
 src/gallium/drivers/radeon/r600_texture.c | 63 ++-
 1 file changed, 36 insertions(+), 27 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c 
b/src/gallium/drivers/radeon/r600_texture.c
index 3aac3c7..ca2b37b 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -340,6 +340,39 @@ static void r600_texture_init_metadata(struct 
r600_common_screen *rscreen,
}
 }
 
+static void r600_surface_import_metadata(struct r600_common_screen *rscreen,
+struct radeon_surf *surf,
+struct radeon_bo_metadata *metadata,
+enum radeon_surf_mode *array_mode,
+bool *is_scanout)
+{
+   if (rscreen->chip_class >= GFX9) {
+   if (metadata->u.gfx9.swizzle_mode > 0)
+   *array_mode = RADEON_SURF_MODE_2D;
+   else
+   *array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
+
+   *is_scanout = metadata->u.gfx9.swizzle_mode == 0 ||
+   metadata->u.gfx9.swizzle_mode % 4 == 2;
+   } else {
+   surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
+   surf->u.legacy.bankw = metadata->u.legacy.bankw;
+   surf->u.legacy.bankh = metadata->u.legacy.bankh;
+   surf->u.legacy.tile_split = metadata->u.legacy.tile_split;
+   surf->u.legacy.mtilea = metadata->u.legacy.mtilea;
+   surf->u.legacy.num_banks = metadata->u.legacy.num_banks;
+
+   if (metadata->u.legacy.macrotile == RADEON_LAYOUT_TILED)
+   *array_mode = RADEON_SURF_MODE_2D;
+   else if (metadata->u.legacy.microtile == RADEON_LAYOUT_TILED)
+   *array_mode = RADEON_SURF_MODE_1D;
+   else
+   *array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
+
+   *is_scanout = metadata->u.legacy.scanout;
+   }
+}
+
 static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx,
struct r600_texture *rtex)
 {
@@ -1442,7 +1475,7 @@ static struct pipe_resource 
*r600_texture_from_handle(struct pipe_screen *screen
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
struct pb_buffer *buf = NULL;
unsigned stride = 0, offset = 0;
-   unsigned array_mode;
+   enum radeon_surf_mode array_mode;
struct radeon_surf surface;
int r;
struct radeon_bo_metadata metadata = {};
@@ -1459,32 +1492,8 @@ static struct pipe_resource 
*r600_texture_from_handle(struct pipe_screen *screen
return NULL;
 
rscreen->ws->buffer_get_metadata(buf, );
-
-   if (rscreen->chip_class >= GFX9) {
-   if (metadata.u.gfx9.swizzle_mode > 0)
-   array_mode = RADEON_SURF_MODE_2D;
-   else
-   array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
-
-   is_scanout = metadata.u.gfx9.swizzle_mode == 0 ||
-metadata.u.gfx9.swizzle_mode % 4 == 2;
-   } else {
-   surface.u.legacy.pipe_config = metadata.u.legacy.pipe_config;
-   surface.u.legacy.bankw = metadata.u.legacy.bankw;
-   surface.u.legacy.bankh = metadata.u.legacy.bankh;
-   surface.u.legacy.tile_split = metadata.u.legacy.tile_split;
-   surface.u.legacy.mtilea = metadata.u.legacy.mtilea;
-   surface.u.legacy.num_banks = metadata.u.legacy.num_banks;
-
-   if (metadata.u.legacy.macrotile == RADEON_LAYOUT_TILED)
-   array_mode = RADEON_SURF_MODE_2D;
-   else if (metadata.u.legacy.microtile == RADEON_LAYOUT_TILED)
-   array_mode = RADEON_SURF_MODE_1D;
-   else
-   array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
-
-   is_scanout = metadata.u.legacy.scanout;
-   }
+   r600_surface_import_metadata(rscreen, , ,
+_mode, _scanout);
 
r = r600_init_surface(rscreen, , templ, array_mode, stride,
  offset, true, is_scanout, false, false);
-- 
2.9.4

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