---
src/mesa/drivers/dri/i965/brw_blorp.c | 15 ++-
src/mesa/drivers/dri/i965/brw_blorp.h | 3 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 15 ++-
3 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 96e239a..51cf277 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -986,7 +986,8 @@ brw_blorp_clear_color(struct brw_context *brw, struct
gl_framebuffer *fb,
void
brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,
-unsigned level, unsigned layer)
+unsigned level, unsigned layer,
+enum blorp_fast_clear_op resolve_op)
{
DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer);
@@ -1000,18 +1001,6 @@ brw_blorp_resolve_color(struct brw_context *brw, struct
intel_mipmap_tree *mt,
&level, layer, 1 /* num_layers */,
isl_tmp);
- enum blorp_fast_clear_op resolve_op;
- if (brw->gen >= 9) {
- if (surf.aux_usage == ISL_AUX_USAGE_CCS_E)
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
- else
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
- } else {
- assert(surf.aux_usage == ISL_AUX_USAGE_CCS_D);
- /* Broadwell and earlier do not have a partial resolve */
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
- }
-
/* Ivybrigde PRM Vol 2, Part 1, "11.7 MCS Buffer for Render Target(s)":
*
*"Any transition from any value in {Clear, Render, Resolve} to a
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 8743d96..b41222b 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -66,7 +66,8 @@ brw_blorp_clear_color(struct brw_context *brw, struct
gl_framebuffer *fb,
void
brw_blorp_resolve_color(struct brw_context *brw,
struct intel_mipmap_tree *mt,
-unsigned level, unsigned layer);
+unsigned level, unsigned layer,
+enum blorp_fast_clear_op resolve_op);
void
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2c9bb97..6cd32ce 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2175,6 +2175,19 @@ intel_miptree_resolve_color(struct brw_context *brw,
if (!intel_miptree_needs_color_resolve(brw, mt, flags))
return false;
+ enum blorp_fast_clear_op resolve_op;
+ if (brw->gen >= 9) {
+ if (intel_miptree_is_lossless_compressed(brw, mt)) {
+ resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
+ } else {
+ resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
+ }
+ } else {
+ /* Broadwell and earlier do not have a partial resolve */
+ assert(!intel_miptree_is_lossless_compressed(brw, mt));
+ resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
+ }
+
bool resolved = false;
foreach_list_typed_safe(struct intel_resolve_map, map, link,
&mt->color_resolve_map) {
@@ -2191,7 +2204,7 @@ intel_miptree_resolve_color(struct brw_context *brw,
assert(map->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED);
- brw_blorp_resolve_color(brw, mt, map->level, map->layer);
+ brw_blorp_resolve_color(brw, mt, map->level, map->layer, resolve_op);
intel_resolve_map_remove(map);
resolved = true;
}
--
2.5.0.400.gff86faf
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