Re: [Mesa-dev] [PATCH 13/14] intel/compiler: use new shuffle_32bit_write for all 64-bit storage writes

[Jason Ekstrand]

On Thu, Jun 14, 2018 at 3:47 PM, Chema Casanova 
wrote:

> On 14/06/18 03:44, Jason Ekstrand wrote:
> > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > mailto:jmcasan...@igalia.com>> wrote:
> >
> > ---
> >  src/intel/compiler/brw_fs_nir.cpp | 13 ++---
> >  1 file changed, 6 insertions(+), 7 deletions(-)
> >
> > diff --git a/src/intel/compiler/brw_fs_nir.cpp
> > b/src/intel/compiler/brw_fs_nir.cpp
> > index 2521f3c001b..833fad4247a 100644
> > --- a/src/intel/compiler/brw_fs_nir.cpp
> > +++ b/src/intel/compiler/brw_fs_nir.cpp
> > @@ -2839,8 +2839,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const
> > fs_builder ,
> >  * for that.
> >  */
> > unsigned channel = iter * 2 + i;
> > -   fs_reg dest = shuffle_64bit_data_for_32bit_
> write(bld,
> > -  offset(value, bld, channel), 1);
> > +   fs_reg dest = shuffle_for_32bit_write(bld, value,
> > channel, 1);
> >
> >
> > What happened to offsetting "value"?
>
> Using channel as first_component in shuffle_for_32bit_write is
> equivalent to offsetting value, and we save one line. :)
>

Ah, makes sense.  R-B.


> >
> >
> >
> > srcs[header_regs + (i + first_component) * 2] = dest;
> > srcs[header_regs + (i + first_component) * 2 + 1] =
> > @@ -3694,8 +3693,8 @@ fs_visitor::nir_emit_cs_intrinsic(const
> > fs_builder ,
> >unsigned type_size = 4;
> >if (nir_src_bit_size(instr->src[0]) == 64) {
> >   type_size = 8;
> > - val_reg = shuffle_64bit_data_for_32bit_write(bld,
> > -val_reg, instr->num_components);
> > + val_reg = shuffle_for_32bit_write(bld, val_reg, 0,
> > +   instr->num_components);
> >}
> >
> >unsigned type_slots = type_size / 4;
> > @@ -4236,8 +4235,8 @@ fs_visitor::nir_emit_intrinsic(const
> > fs_builder , nir_intrinsic_instr *instr
> >   * iteration handle the rest.
> >   */
> >  num_components = MIN2(2, num_components);
> > -write_src = shuffle_64bit_data_for_32bit_write(bld,
> > write_src,
> > -
> >  num_components);
> > +write_src = shuffle_for_32bit_write(bld, write_src, 0,
> > +num_components);
> >   } else if (type_size < 4) {
> >  assert(type_size == 2);
> >  /* For 16-bit types we pack two consecutive values into
> > a 32-bit
> > @@ -4333,7 +4332,7 @@ fs_visitor::nir_emit_intrinsic(const
> > fs_builder , nir_intrinsic_instr *instr
> >unsigned num_components = instr->num_components;
> >unsigned first_component = nir_intrinsic_component(instr);
> >if (nir_src_bit_size(instr->src[0]) == 64) {
> > - src = shuffle_64bit_data_for_32bit_write(bld, src,
> > num_components);
> > + src = shuffle_for_32bit_write(bld, src, 0, num_components);
> >   num_components *= 2;
> >}
> >
> > --
> > 2.17.1
> >
> > ___
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> > 
> >
> >
> >
> >
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Re: [Mesa-dev] [PATCH 13/14] intel/compiler: use new shuffle_32bit_write for all 64-bit storage writes

[Chema Casanova]

On 14/06/18 03:44, Jason Ekstrand wrote:
> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
> 
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 13 ++---
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 2521f3c001b..833fad4247a 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2839,8 +2839,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const
> fs_builder ,
>                  * for that.
>                  */
>                 unsigned channel = iter * 2 + i;
> -               fs_reg dest = shuffle_64bit_data_for_32bit_write(bld,
> -                  offset(value, bld, channel), 1);
> +               fs_reg dest = shuffle_for_32bit_write(bld, value,
> channel, 1);
> 
> 
> What happened to offsetting "value"?

Using channel as first_component in shuffle_for_32bit_write is
equivalent to offsetting value, and we save one line. :)

>  
> 
> 
>                 srcs[header_regs + (i + first_component) * 2] = dest;
>                 srcs[header_regs + (i + first_component) * 2 + 1] =
> @@ -3694,8 +3693,8 @@ fs_visitor::nir_emit_cs_intrinsic(const
> fs_builder ,
>        unsigned type_size = 4;
>        if (nir_src_bit_size(instr->src[0]) == 64) {
>           type_size = 8;
> -         val_reg = shuffle_64bit_data_for_32bit_write(bld,
> -            val_reg, instr->num_components);
> +         val_reg = shuffle_for_32bit_write(bld, val_reg, 0,
> +                                           instr->num_components);
>        }
> 
>        unsigned type_slots = type_size / 4;
> @@ -4236,8 +4235,8 @@ fs_visitor::nir_emit_intrinsic(const
> fs_builder , nir_intrinsic_instr *instr
>               * iteration handle the rest.
>               */
>              num_components = MIN2(2, num_components);
> -            write_src = shuffle_64bit_data_for_32bit_write(bld,
> write_src,
> -                                                         
>  num_components);
> +            write_src = shuffle_for_32bit_write(bld, write_src, 0,
> +                                                num_components);
>           } else if (type_size < 4) {
>              assert(type_size == 2);
>              /* For 16-bit types we pack two consecutive values into
> a 32-bit
> @@ -4333,7 +4332,7 @@ fs_visitor::nir_emit_intrinsic(const
> fs_builder , nir_intrinsic_instr *instr
>        unsigned num_components = instr->num_components;
>        unsigned first_component = nir_intrinsic_component(instr);
>        if (nir_src_bit_size(instr->src[0]) == 64) {
> -         src = shuffle_64bit_data_for_32bit_write(bld, src,
> num_components);
> +         src = shuffle_for_32bit_write(bld, src, 0, num_components);
>           num_components *= 2;
>        }
>  
> -- 
> 2.17.1
> 
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> 
> 
> 
> 
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Re: [Mesa-dev] [PATCH 13/14] intel/compiler: use new shuffle_32bit_write for all 64-bit storage writes

[Jason Ekstrand]

On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:

> ---
>  src/intel/compiler/brw_fs_nir.cpp | 13 ++---
>  1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 2521f3c001b..833fad4247a 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2839,8 +2839,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder
> ,
>  * for that.
>  */
> unsigned channel = iter * 2 + i;
> -   fs_reg dest = shuffle_64bit_data_for_32bit_write(bld,
> -  offset(value, bld, channel), 1);
> +   fs_reg dest = shuffle_for_32bit_write(bld, value, channel,
> 1);
>

What happened to offsetting "value"?


>
> srcs[header_regs + (i + first_component) * 2] = dest;
> srcs[header_regs + (i + first_component) * 2 + 1] =
> @@ -3694,8 +3693,8 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder
> ,
>unsigned type_size = 4;
>if (nir_src_bit_size(instr->src[0]) == 64) {
>   type_size = 8;
> - val_reg = shuffle_64bit_data_for_32bit_write(bld,
> -val_reg, instr->num_components);
> + val_reg = shuffle_for_32bit_write(bld, val_reg, 0,
> +   instr->num_components);
>}
>
>unsigned type_slots = type_size / 4;
> @@ -4236,8 +4235,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> , nir_intrinsic_instr *instr
>   * iteration handle the rest.
>   */
>  num_components = MIN2(2, num_components);
> -write_src = shuffle_64bit_data_for_32bit_write(bld,
> write_src,
> -
>  num_components);
> +write_src = shuffle_for_32bit_write(bld, write_src, 0,
> +num_components);
>   } else if (type_size < 4) {
>  assert(type_size == 2);
>  /* For 16-bit types we pack two consecutive values into a
> 32-bit
> @@ -4333,7 +4332,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> , nir_intrinsic_instr *instr
>unsigned num_components = instr->num_components;
>unsigned first_component = nir_intrinsic_component(instr);
>if (nir_src_bit_size(instr->src[0]) == 64) {
> - src = shuffle_64bit_data_for_32bit_write(bld, src,
> num_components);
> + src = shuffle_for_32bit_write(bld, src, 0, num_components);
>   num_components *= 2;
>}
>
> --
> 2.17.1
>
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[Mesa-dev] [PATCH 13/14] intel/compiler: use new shuffle_32bit_write for all 64-bit storage writes

[Jose Maria Casanova Crespo]

---
 src/intel/compiler/brw_fs_nir.cpp | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp 
b/src/intel/compiler/brw_fs_nir.cpp
index 2521f3c001b..833fad4247a 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -2839,8 +2839,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder ,
 * for that.
 */
unsigned channel = iter * 2 + i;
-   fs_reg dest = shuffle_64bit_data_for_32bit_write(bld,
-  offset(value, bld, channel), 1);
+   fs_reg dest = shuffle_for_32bit_write(bld, value, channel, 1);
 
srcs[header_regs + (i + first_component) * 2] = dest;
srcs[header_regs + (i + first_component) * 2 + 1] =
@@ -3694,8 +3693,8 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder ,
   unsigned type_size = 4;
   if (nir_src_bit_size(instr->src[0]) == 64) {
  type_size = 8;
- val_reg = shuffle_64bit_data_for_32bit_write(bld,
-val_reg, instr->num_components);
+ val_reg = shuffle_for_32bit_write(bld, val_reg, 0,
+   instr->num_components);
   }
 
   unsigned type_slots = type_size / 4;
@@ -4236,8 +4235,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
nir_intrinsic_instr *instr
  * iteration handle the rest.
  */
 num_components = MIN2(2, num_components);
-write_src = shuffle_64bit_data_for_32bit_write(bld, write_src,
-   num_components);
+write_src = shuffle_for_32bit_write(bld, write_src, 0,
+num_components);
  } else if (type_size < 4) {
 assert(type_size == 2);
 /* For 16-bit types we pack two consecutive values into a 32-bit
@@ -4333,7 +4332,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
nir_intrinsic_instr *instr
   unsigned num_components = instr->num_components;
   unsigned first_component = nir_intrinsic_component(instr);
   if (nir_src_bit_size(instr->src[0]) == 64) {
- src = shuffle_64bit_data_for_32bit_write(bld, src, num_components);
+ src = shuffle_for_32bit_write(bld, src, 0, num_components);
  num_components *= 2;
   }
 
-- 
2.17.1

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