Re: [Mesa-dev] [PATCH 2/2] anv: gen7/75: Set multisample modes

2016-08-08 Thread Jason Ekstrand 
On Mon, Aug 8, 2016 at 12:30 PM, Lionel Landwerlin 
wrote:

> Fixes the following failures :
>
> dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
> dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
> dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
>
> Tested on IVB/HSW
>
> v2: Check pMultisampleState is not NULL
>
> v3: Drop rasterization state rename (Anuj)
> Fix value of MultisampleRasterizationMode in 3DSTATE_SF
>
> v4: rebase on master
>
> Signed-off-by: Lionel Landwerlin 
> Cc: Jason Ekstrand 
> ---
>  src/intel/vulkan/gen7_pipeline.c  | 10 --
>  src/intel/vulkan/gen8_pipeline.c  |  2 +-
>  src/intel/vulkan/genX_pipeline_util.h |  4 
>  3 files changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_
> pipeline.c
> index 1da28c0..135281d 100644
> --- a/src/intel/vulkan/gen7_pipeline.c
> +++ b/src/intel/vulkan/gen7_pipeline.c
> @@ -68,7 +68,7 @@ genX(graphics_pipeline_create)(
>
> assert(pCreateInfo->pRasterizationState);
> emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
> - pass, subpass, extra);
> + pCreateInfo->pMultisampleState, pass, subpass, extra);
>
> emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass,
> subpass);
>
> @@ -85,7 +85,8 @@ genX(graphics_pipeline_create)(
> pCreateInfo->pMultisampleState->rasterizationSamples > 1)
>anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_
> STATE_CREATE_INFO");
>
> -   uint32_t samples = 1;
> +   uint32_t samples = pCreateInfo->pMultisampleState ?
> +  pCreateInfo->pMultisampleState->rasterizationSamples
> : 1;
> uint32_t log2_samples = __builtin_ffs(samples) - 1;
>
> anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
> @@ -273,6 +274,11 @@ genX(graphics_pipeline_create)(
>   }
>
>   wm.BarycentricInterpolationMode=
> wm_prog_data->barycentric_interp_modes;
> +
> + wm.MultisampleRasterizationMode= samples > 1 ?
> +  MSRASTMODE_ON_PATTERN :
> MSRASTMODE_OFF_PIXEL;
> + wm.MultisampleDispatchMode = 
> wm_prog_data->persample_dispatch
> ?
> +  MSDISPMODE_PERSAMPLE :
> MSDISPMODE_PERPIXEL;
>}
> }
>
> diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_
> pipeline.c
> index d16ce7b..1840ce2 100644
> --- a/src/intel/vulkan/gen8_pipeline.c
> +++ b/src/intel/vulkan/gen8_pipeline.c
> @@ -120,7 +120,7 @@ genX(graphics_pipeline_create)(
> emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
> assert(pCreateInfo->pRasterizationState);
> emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
> - pass, subpass, extra);
> + pCreateInfo->pMultisampleState, pass, subpass, extra);
> emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
> emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass,
> subpass);
> emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
> diff --git a/src/intel/vulkan/genX_pipeline_util.h
> b/src/intel/vulkan/genX_pipeline_util.h
> index 0aa85ba..3d0ab9a 100644
> --- a/src/intel/vulkan/genX_pipeline_util.h
> +++ b/src/intel/vulkan/genX_pipeline_util.h
> @@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = {
>  static void
>  emit_rs_state(struct anv_pipeline *pipeline,
>const VkPipelineRasterizationStateCreateInfo *rs_info,
> +  const VkPipelineMultisampleStateCreateInfo *ms_info,
>const struct anv_render_pass *pass,
>const struct anv_subpass *subpass,
>const struct anv_graphics_pipeline_create_info *extra)
> @@ -433,6 +434,9 @@ emit_rs_state(struct anv_pipeline *pipeline,
>  isl_format_get_depth_format(isl_format, false);
>}
> }
> +
> +   sf.MultisampleRasterizationMode = (ms_info &&
> ms_info->rasterizationSamples > 1) ?
> + MSRASTMODE_ON_PATTERN :
> MSRASTMODE_OFF_PIXEL;
>

I moved this up a little to put it near the multisample stuff for gen8 and
pushed the patches with my and Anuj's reviews.  Thanks!

--Jason


>  #endif
>
>  #if GEN_GEN >= 8
> --
> 2.8.1
>
>
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Re: [Mesa-dev] [PATCH 2/2] anv: gen7/75: Set multisample modes

2016-08-08 Thread Anuj Phogat 
On Mon, Aug 8, 2016 at 12:30 PM, Lionel Landwerlin 
wrote:

> Fixes the following failures :
>
> dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
> dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
> dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
> dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
>
> Tested on IVB/HSW
>
> v2: Check pMultisampleState is not NULL
>
> v3: Drop rasterization state rename (Anuj)
> Fix value of MultisampleRasterizationMode in 3DSTATE_SF
>
> v4: rebase on master
>
> Signed-off-by: Lionel Landwerlin 
> Cc: Jason Ekstrand 
> ---
>  src/intel/vulkan/gen7_pipeline.c  | 10 --
>  src/intel/vulkan/gen8_pipeline.c  |  2 +-
>  src/intel/vulkan/genX_pipeline_util.h |  4 
>  3 files changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_
> pipeline.c
> index 1da28c0..135281d 100644
> --- a/src/intel/vulkan/gen7_pipeline.c
> +++ b/src/intel/vulkan/gen7_pipeline.c
> @@ -68,7 +68,7 @@ genX(graphics_pipeline_create)(
>
> assert(pCreateInfo->pRasterizationState);
> emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
> - pass, subpass, extra);
> + pCreateInfo->pMultisampleState, pass, subpass, extra);
>
> emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass,
> subpass);
>
> @@ -85,7 +85,8 @@ genX(graphics_pipeline_create)(
> pCreateInfo->pMultisampleState->rasterizationSamples > 1)
>anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_
> STATE_CREATE_INFO");
>
> -   uint32_t samples = 1;
> +   uint32_t samples = pCreateInfo->pMultisampleState ?
> +  pCreateInfo->pMultisampleState->rasterizationSamples
> : 1;
> uint32_t log2_samples = __builtin_ffs(samples) - 1;
>
> anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
> @@ -273,6 +274,11 @@ genX(graphics_pipeline_create)(
>   }
>
>   wm.BarycentricInterpolationMode=
> wm_prog_data->barycentric_interp_modes;
> +
> + wm.MultisampleRasterizationMode= samples > 1 ?
> +  MSRASTMODE_ON_PATTERN :
> MSRASTMODE_OFF_PIXEL;
> + wm.MultisampleDispatchMode = 
> wm_prog_data->persample_dispatch
> ?
> +  MSDISPMODE_PERSAMPLE :
> MSDISPMODE_PERPIXEL;
>}
> }
>
> diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_
> pipeline.c
> index d16ce7b..1840ce2 100644
> --- a/src/intel/vulkan/gen8_pipeline.c
> +++ b/src/intel/vulkan/gen8_pipeline.c
> @@ -120,7 +120,7 @@ genX(graphics_pipeline_create)(
> emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
> assert(pCreateInfo->pRasterizationState);
> emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
> - pass, subpass, extra);
> + pCreateInfo->pMultisampleState, pass, subpass, extra);
> emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
> emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass,
> subpass);
> emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
> diff --git a/src/intel/vulkan/genX_pipeline_util.h
> b/src/intel/vulkan/genX_pipeline_util.h
> index 0aa85ba..3d0ab9a 100644
> --- a/src/intel/vulkan/genX_pipeline_util.h
> +++ b/src/intel/vulkan/genX_pipeline_util.h
> @@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = {
>  static void
>  emit_rs_state(struct anv_pipeline *pipeline,
>const VkPipelineRasterizationStateCreateInfo *rs_info,
> +  const VkPipelineMultisampleStateCreateInfo *ms_info,
>const struct anv_render_pass *pass,
>const struct anv_subpass *subpass,
>const struct anv_graphics_pipeline_create_info *extra)
> @@ -433,6 +434,9 @@ emit_rs_state(struct anv_pipeline *pipeline,
>  isl_format_get_depth_format(isl_format, false);
>}
> }
> +
> +   sf.MultisampleRasterizationMode = (ms_info &&
> ms_info->rasterizationSamples > 1) ?
> + MSRASTMODE_ON_PATTERN :
> MSRASTMODE_OFF_PIXEL;
>  #endif
>
>  #if GEN_GEN >= 8
> --
> 2.8.1
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>

​Both patches are:
​Reviewed-by: Anuj Phogat 
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[Mesa-dev] [PATCH 2/2] anv: gen7/75: Set multisample modes

2016-08-08 Thread Lionel Landwerlin 
Fixes the following failures :

dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit

Tested on IVB/HSW

v2: Check pMultisampleState is not NULL

v3: Drop rasterization state rename (Anuj)
Fix value of MultisampleRasterizationMode in 3DSTATE_SF

v4: rebase on master

Signed-off-by: Lionel Landwerlin 
Cc: Jason Ekstrand 
---
 src/intel/vulkan/gen7_pipeline.c  | 10 --
 src/intel/vulkan/gen8_pipeline.c  |  2 +-
 src/intel/vulkan/genX_pipeline_util.h |  4 
 3 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 1da28c0..135281d 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -68,7 +68,7 @@ genX(graphics_pipeline_create)(
 
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
- pass, subpass, extra);
+ pCreateInfo->pMultisampleState, pass, subpass, extra);
 
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
 
@@ -85,7 +85,8 @@ genX(graphics_pipeline_create)(
pCreateInfo->pMultisampleState->rasterizationSamples > 1)
   anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
 
-   uint32_t samples = 1;
+   uint32_t samples = pCreateInfo->pMultisampleState ?
+  pCreateInfo->pMultisampleState->rasterizationSamples : 1;
uint32_t log2_samples = __builtin_ffs(samples) - 1;
 
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
@@ -273,6 +274,11 @@ genX(graphics_pipeline_create)(
  }
 
  wm.BarycentricInterpolationMode= 
wm_prog_data->barycentric_interp_modes;
+
+ wm.MultisampleRasterizationMode= samples > 1 ?
+  MSRASTMODE_ON_PATTERN : 
MSRASTMODE_OFF_PIXEL;
+ wm.MultisampleDispatchMode = 
wm_prog_data->persample_dispatch ?
+  MSDISPMODE_PERSAMPLE : 
MSDISPMODE_PERPIXEL;
   }
}
 
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index d16ce7b..1840ce2 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -120,7 +120,7 @@ genX(graphics_pipeline_create)(
emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
- pass, subpass, extra);
+ pCreateInfo->pMultisampleState, pass, subpass, extra);
emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
diff --git a/src/intel/vulkan/genX_pipeline_util.h 
b/src/intel/vulkan/genX_pipeline_util.h
index 0aa85ba..3d0ab9a 100644
--- a/src/intel/vulkan/genX_pipeline_util.h
+++ b/src/intel/vulkan/genX_pipeline_util.h
@@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = {
 static void
 emit_rs_state(struct anv_pipeline *pipeline,
   const VkPipelineRasterizationStateCreateInfo *rs_info,
+  const VkPipelineMultisampleStateCreateInfo *ms_info,
   const struct anv_render_pass *pass,
   const struct anv_subpass *subpass,
   const struct anv_graphics_pipeline_create_info *extra)
@@ -433,6 +434,9 @@ emit_rs_state(struct anv_pipeline *pipeline,
 isl_format_get_depth_format(isl_format, false);
   }
}
+
+   sf.MultisampleRasterizationMode = (ms_info && ms_info->rasterizationSamples 
> 1) ?
+ MSRASTMODE_ON_PATTERN : 
MSRASTMODE_OFF_PIXEL;
 #endif
 
 #if GEN_GEN >= 8
-- 
2.8.1

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