[Mesa-dev] [PATCH 2/3] radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

2014-04-18 Thread Bruno Jiménez 
From: Tom Stellard thomas.stell...@amd.com

v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)

Signed-off-by: Igor Gnatenko i.gnatenko.br...@gmail.com

r600: Correct the case MAX_CLOCK_FREQUENCY in get_compute_param

v3: Convert the frequency to MHz from kHz after getting it in
'do_winsys_init'
---
 src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +
 src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
 3 files changed, 13 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 7508865..957186a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen 
*screen,
}
return sizeof(uint64_t);
 
+   case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
+   if (ret) {
+   uint32_t *max_clock_frequency = ret;
+   *max_clock_frequency = rscreen-info.max_sclk;
+   }
+   return sizeof(uint32_t);
+
default:
fprintf(stderr, unknown PIPE_COMPUTE_CAP %d\n, param);
return 0;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c 
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 0eb0c6a..92fbc7f 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -316,6 +316,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 ws-info.gart_size = gem_info.gart_size;
 ws-info.vram_size = gem_info.vram_size;
 
+/* Get max clock frequency info and convert it to MHz */
+radeon_get_drm_value(ws-fd, RADEON_INFO_MAX_SCLK, NULL,
+ ws-info.max_sclk);
+ws-info.max_sclk /= 1000;
+
 ws-num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 
 /* Generation-specific queries. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h 
b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index fe0617b..1cb17bb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -196,6 +196,7 @@ struct radeon_info {
 enum chip_class chip_class;
 uint32_tgart_size;
 uint32_tvram_size;
+uint32_tmax_sclk;
 
 uint32_tdrm_major; /* version */
 uint32_tdrm_minor;
-- 
1.9.2

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[Mesa-dev] [PATCH 2/3] radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

2014-04-17 Thread Bruno Jiménez 
From: Tom Stellard thomas.stell...@amd.com

v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)

Signed-off-by: Igor Gnatenko i.gnatenko.br...@gmail.com

r600: Correct the case MAX_CLOCK_FREQUENCY in get_compute_param
---
 src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 3 +++
 src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
 3 files changed, 11 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 7508865..957186a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen 
*screen,
}
return sizeof(uint64_t);
 
+   case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
+   if (ret) {
+   uint32_t *max_clock_frequency = ret;
+   *max_clock_frequency = rscreen-info.max_sclk;
+   }
+   return sizeof(uint32_t);
+
default:
fprintf(stderr, unknown PIPE_COMPUTE_CAP %d\n, param);
return 0;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c 
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 0eb0c6a..a7f0d9e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -316,6 +316,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 ws-info.gart_size = gem_info.gart_size;
 ws-info.vram_size = gem_info.vram_size;
 
+radeon_get_drm_value(ws-fd, RADEON_INFO_MAX_SCLK, NULL,
+ ws-info.max_sclk);
+
 ws-num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 
 /* Generation-specific queries. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h 
b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index fe0617b..1cb17bb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -196,6 +196,7 @@ struct radeon_info {
 enum chip_class chip_class;
 uint32_tgart_size;
 uint32_tvram_size;
+uint32_tmax_sclk;
 
 uint32_tdrm_major; /* version */
 uint32_tdrm_minor;
-- 
1.9.2

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