Re: [Mesa-dev] [PATCH 2/3] radv: Use a lower max offchip buffer count.

2018-09-03 Thread Samuel Pitoiset 



On 9/3/18 2:35 AM, Bas Nieuwenhuizen wrote:

No clue what gets fixed by this but both radeonsi and amdvlk do it.

CC: 
---
  src/amd/vulkan/radv_device.c | 24 ++--
  1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c300c88468a..3d208ab053d 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1901,10 +1901,30 @@ radv_get_hs_offchip_param(struct radv_device *device, 
uint32_t *max_offchip_buff
device->physical_device->rad_info.family != CHIP_CARRIZO &&
device->physical_device->rad_info.family != CHIP_STONEY;
unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
-   unsigned max_offchip_buffers = max_offchip_buffers_per_se *
-   device->physical_device->rad_info.max_se;
+   unsigned max_offchip_buffers;
unsigned offchip_granularity;
unsigned hs_offchip_param;
+
+   /*
+* Per RadeonSI:
+* This must be one less than the maximum number due to a hw limitation.
+ * Various hardware bugs in SI, CIK, and GFX9 need this.
+*
+* Per AMDVLK:
+* Vega10 should limit max_offchip_buffers to 508 (4 * 127).
+* Gfx7 should limit max_offchip_buffers to 508
+* Gfx6 should limit max_offchip_buffers to 126 (2 * 63)
+*
+* Follow AMDVLK here.
+ */


Can you adjust the indentation here please?

Otherwise, series is:

Reviewed-by: Samuel Pitoiset 


+   if (device->physical_device->rad_info.family == CHIP_VEGA10 ||
+   device->physical_device->rad_info.chip_class == CIK ||
+   device->physical_device->rad_info.chip_class == SI)
+   --max_offchip_buffers_per_se;
+
+   max_offchip_buffers = max_offchip_buffers_per_se *
+   device->physical_device->rad_info.max_se;
+
switch (device->tess_offchip_block_dw_size) {
default:
assert(0);


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[Mesa-dev] [PATCH 2/3] radv: Use a lower max offchip buffer count.

2018-09-02 Thread Bas Nieuwenhuizen 
No clue what gets fixed by this but both radeonsi and amdvlk do it.

CC: 
---
 src/amd/vulkan/radv_device.c | 24 ++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c300c88468a..3d208ab053d 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1901,10 +1901,30 @@ radv_get_hs_offchip_param(struct radv_device *device, 
uint32_t *max_offchip_buff
device->physical_device->rad_info.family != CHIP_CARRIZO &&
device->physical_device->rad_info.family != CHIP_STONEY;
unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
-   unsigned max_offchip_buffers = max_offchip_buffers_per_se *
-   device->physical_device->rad_info.max_se;
+   unsigned max_offchip_buffers;
unsigned offchip_granularity;
unsigned hs_offchip_param;
+
+   /*
+* Per RadeonSI:
+* This must be one less than the maximum number due to a hw limitation.
+ * Various hardware bugs in SI, CIK, and GFX9 need this.
+*
+* Per AMDVLK:
+* Vega10 should limit max_offchip_buffers to 508 (4 * 127).
+* Gfx7 should limit max_offchip_buffers to 508
+* Gfx6 should limit max_offchip_buffers to 126 (2 * 63)
+*
+* Follow AMDVLK here.
+ */
+   if (device->physical_device->rad_info.family == CHIP_VEGA10 ||
+   device->physical_device->rad_info.chip_class == CIK ||
+   device->physical_device->rad_info.chip_class == SI)
+   --max_offchip_buffers_per_se;
+
+   max_offchip_buffers = max_offchip_buffers_per_se *
+   device->physical_device->rad_info.max_se;
+
switch (device->tess_offchip_block_dw_size) {
default:
assert(0);
-- 
2.18.0

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