Re: [Mesa-dev] [PATCH 2/7] i965: Adjust set_message_descriptor to handle non-sends

2014-08-15 Thread Kenneth Graunke
On Sunday, August 03, 2014 12:36:31 PM Chris Forbes wrote:
 We're about to be using this infrastructure to build descriptors in
 src1 of non-send instructions, when preparing to do an indirect send.
 
 Don't accidentally clobber the conditionalmod field of those
 instructions with SFID bits, which aren't part of the descriptor.
 
 Signed-off-by: Chris Forbes chr...@ijw.co.nz
 ---
  src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)
 
 diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c 
 b/src/mesa/drivers/dri/i965/brw_eu_emit.c
 index bc74de3..cdfc78e 100644
 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
 +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
 @@ -540,7 +540,19 @@ brw_set_message_descriptor(struct brw_compile *p,
 struct brw_context *brw = p-brw;
  
 brw_set_src1(p, inst, brw_imm_d(0));
 -   brw_inst_set_sfid(brw, inst, sfid);
 +
 +   /* For indirect sends, `inst` will not be the SEND/SENDC instruction
 +* itself; instead, it will be a MOV/OR into the address register.
 +*
 +* In this case, we avoid setting the extended message descriptor bits,
 +* since they go on the later SEND/SENDC instead and if set here would
 +* instead clobber the conditionalmod bits.
 +*/
 +   unsigned opcode = brw_inst_opcode(brw, inst);
 +   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
 +  brw_inst_set_sfid(brw, inst, sfid);
 +   }
 +
 brw_inst_set_mlen(brw, inst, msg_length);
 brw_inst_set_rlen(brw, inst, response_length);
 brw_inst_set_eot(brw, inst, end_of_thread);
 

Hey Chris,

I was originally confused by this - setting message descriptor bits on non-SEND 
instructions seemed bizarre to me.  But, now that I've looked a bit more 
closely, I see what you're doing...the message descriptor bits are already in 
src1, so it actually is a convenient way to set up the right constant to copy 
into a0.0.

Clever - nice work :)

This series is:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org

signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


Re: [Mesa-dev] [PATCH 2/7] i965: Adjust set_message_descriptor to handle non-sends

2014-08-15 Thread Chris Forbes
Thanks, landed.

On Fri, Aug 15, 2014 at 6:44 PM, Kenneth Graunke kenn...@whitecape.org wrote:
 On Sunday, August 03, 2014 12:36:31 PM Chris Forbes wrote:
 We're about to be using this infrastructure to build descriptors in
 src1 of non-send instructions, when preparing to do an indirect send.

 Don't accidentally clobber the conditionalmod field of those
 instructions with SFID bits, which aren't part of the descriptor.

 Signed-off-by: Chris Forbes chr...@ijw.co.nz
 ---
  src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 +-
  1 file changed, 13 insertions(+), 1 deletion(-)

 diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c 
 b/src/mesa/drivers/dri/i965/brw_eu_emit.c
 index bc74de3..cdfc78e 100644
 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
 +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
 @@ -540,7 +540,19 @@ brw_set_message_descriptor(struct brw_compile *p,
 struct brw_context *brw = p-brw;

 brw_set_src1(p, inst, brw_imm_d(0));
 -   brw_inst_set_sfid(brw, inst, sfid);
 +
 +   /* For indirect sends, `inst` will not be the SEND/SENDC instruction
 +* itself; instead, it will be a MOV/OR into the address register.
 +*
 +* In this case, we avoid setting the extended message descriptor bits,
 +* since they go on the later SEND/SENDC instead and if set here would
 +* instead clobber the conditionalmod bits.
 +*/
 +   unsigned opcode = brw_inst_opcode(brw, inst);
 +   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
 +  brw_inst_set_sfid(brw, inst, sfid);
 +   }
 +
 brw_inst_set_mlen(brw, inst, msg_length);
 brw_inst_set_rlen(brw, inst, response_length);
 brw_inst_set_eot(brw, inst, end_of_thread);


 Hey Chris,

 I was originally confused by this - setting message descriptor bits on 
 non-SEND instructions seemed bizarre to me.  But, now that I've looked a bit 
 more closely, I see what you're doing...the message descriptor bits are 
 already in src1, so it actually is a convenient way to set up the right 
 constant to copy into a0.0.

 Clever - nice work :)

 This series is:
 Reviewed-by: Kenneth Graunke kenn...@whitecape.org
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev


[Mesa-dev] [PATCH 2/7] i965: Adjust set_message_descriptor to handle non-sends

2014-08-02 Thread Chris Forbes
We're about to be using this infrastructure to build descriptors in
src1 of non-send instructions, when preparing to do an indirect send.

Don't accidentally clobber the conditionalmod field of those
instructions with SFID bits, which aren't part of the descriptor.

Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
 src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c 
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index bc74de3..cdfc78e 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -540,7 +540,19 @@ brw_set_message_descriptor(struct brw_compile *p,
struct brw_context *brw = p-brw;
 
brw_set_src1(p, inst, brw_imm_d(0));
-   brw_inst_set_sfid(brw, inst, sfid);
+
+   /* For indirect sends, `inst` will not be the SEND/SENDC instruction
+* itself; instead, it will be a MOV/OR into the address register.
+*
+* In this case, we avoid setting the extended message descriptor bits,
+* since they go on the later SEND/SENDC instead and if set here would
+* instead clobber the conditionalmod bits.
+*/
+   unsigned opcode = brw_inst_opcode(brw, inst);
+   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
+  brw_inst_set_sfid(brw, inst, sfid);
+   }
+
brw_inst_set_mlen(brw, inst, msg_length);
brw_inst_set_rlen(brw, inst, response_length);
brw_inst_set_eot(brw, inst, end_of_thread);
-- 
2.0.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev