From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.h | 2 +-
src/gallium/drivers/radeon/r600_streamout.c | 2 +-
src/gallium/include/pipe/p_state.h | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
b/src/gallium/drivers/radeon/r600_pipe_common.h
index 70b2836..fbd0ac7 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -479,21 +479,21 @@ struct r600_streamout {
unsigned enabled_mask;
unsigned num_targets;
struct r600_so_target *targets[PIPE_MAX_SO_BUFFERS];
unsigned append_bitmask;
bool suspended;
/* External state which comes from the vertex shader,
* it must be set explicitly when binding a shader. */
- unsigned *stride_in_dw;
+ uint16_t *stride_in_dw;
unsigned enabled_stream_buffers_mask; /* stream0
buffers0-3 in 4 LSB */
/* The state of VGT_STRMOUT_BUFFER_(CONFIG|EN). */
unsigned hw_enabled_mask;
/* The state of VGT_STRMOUT_(CONFIG|EN). */
struct r600_atom enable_atom;
bool streamout_enabled;
bool prims_gen_query_enabled;
int num_prims_gen_queries;
diff --git a/src/gallium/drivers/radeon/r600_streamout.c
b/src/gallium/drivers/radeon/r600_streamout.c
index b5296aa..a18089a 100644
--- a/src/gallium/drivers/radeon/r600_streamout.c
+++ b/src/gallium/drivers/radeon/r600_streamout.c
@@ -180,21 +180,21 @@ static void r600_flush_vgt_streamout(struct
r600_common_context *rctx)
radeon_emit(cs, 0);
radeon_emit(cs, S_008490_OFFSET_UPDATE_DONE(1)); /* reference value */
radeon_emit(cs, S_008490_OFFSET_UPDATE_DONE(1)); /* mask */
radeon_emit(cs, 4); /* poll interval */
}
static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct
r600_atom *atom)
{
struct radeon_winsys_cs *cs = rctx->gfx.cs;
struct r600_so_target **t = rctx->streamout.targets;
- unsigned *stride_in_dw = rctx->streamout.stride_in_dw;
+ uint16_t *stride_in_dw = rctx->streamout.stride_in_dw;
unsigned i, update_flags = 0;
r600_flush_vgt_streamout(rctx);
for (i = 0; i < rctx->streamout.num_targets; i++) {
if (!t[i])
continue;
t[i]->stride_in_dw = stride_in_dw[i];
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
index 5d995dc..54bcf07 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -199,36 +199,36 @@ struct pipe_scissor_state
struct pipe_clip_state
{
float ucp[PIPE_MAX_CLIP_PLANES][4];
};
/**
* A single output for vertex transform feedback.
*/
struct pipe_stream_output
{
- unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */
+ unsigned register_index:6; /**< 0 to 63 (OUT index) */
unsigned start_component:2; /** 0 to 3 */
unsigned num_components:3; /** 1 to 4 */
unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
unsigned dst_offset:16; /**< offset into the buffer in dwords */
unsigned stream:2; /**< 0 to 3 */
};
/**
* Stream output for vertex transform feedback.
*/
struct pipe_stream_output_info
{
unsigned num_outputs;
/** stride for an entire vertex for each buffer in dwords */
- unsigned stride[PIPE_MAX_SO_BUFFERS];
+ uint16_t stride[PIPE_MAX_SO_BUFFERS];
/**
* Array of stream outputs, in the order they are to be written in.
* Selected components are tightly packed into the output buffer.
*/
struct pipe_stream_output output[PIPE_MAX_SO_OUTPUTS];
};
/**
* The 'type' parameter identifies whether the shader state contains TGSI
--
2.7.4
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