Re: [Mesa-dev] [PATCH 4/5] radeonsi: fix register count calculation
On 31.07.2012 15:32, Michel Dänzer wrote: On Mit, 2012-07-25 at 19:58 +0200, Christian König wrote: Signed-off-by: Christian König --- src/gallium/drivers/radeonsi/si_state_draw.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 0d9f009..74ed01f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -86,8 +86,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs <= 104); si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, - S_00B128_VGPRS((shader->num_vgprs - 1) / 4) | - S_00B128_SGPRS((num_sgprs - 1) / 8)); + S_00B128_VGPRS((align(shader->num_vgprs,4) / 4) - 1) | + S_00B128_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, S_00B12C_USER_SGPR(num_user_sgprs)); @@ -192,8 +192,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs <= 104); si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, - S_00B028_VGPRS((shader->num_vgprs - 1) / 4) | - S_00B028_SGPRS((num_sgprs - 1) / 8)); + S_00B028_VGPRS((align(shader->num_vgprs, 4) / 4) - 1) | + S_00B028_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, S_00B02C_USER_SGPR(num_user_sgprs)); The previous code was correct according to my reading of the register spec: 0 means 4/8 V/SGPRs, 63/15 means 256/128. Came to the same conclusion after sleeping a night over it. So I removed the patch from my patchset. Sorry for the noise, Christian. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] radeonsi: fix register count calculation
On Mit, 2012-07-25 at 19:58 +0200, Christian König wrote: > Signed-off-by: Christian König > --- > src/gallium/drivers/radeonsi/si_state_draw.c |8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c > b/src/gallium/drivers/radeonsi/si_state_draw.c > index 0d9f009..74ed01f 100644 > --- a/src/gallium/drivers/radeonsi/si_state_draw.c > +++ b/src/gallium/drivers/radeonsi/si_state_draw.c > @@ -86,8 +86,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, > struct si_pipe_shader *s > assert(num_sgprs <= 104); > > si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, > -S_00B128_VGPRS((shader->num_vgprs - 1) / 4) | > -S_00B128_SGPRS((num_sgprs - 1) / 8)); > +S_00B128_VGPRS((align(shader->num_vgprs,4) / 4) - 1) | > +S_00B128_SGPRS((align(num_sgprs, 8) / 8) - 1)); > si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, > S_00B12C_USER_SGPR(num_user_sgprs)); > > @@ -192,8 +192,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, > struct si_pipe_shader *s > assert(num_sgprs <= 104); > > si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, > -S_00B028_VGPRS((shader->num_vgprs - 1) / 4) | > -S_00B028_SGPRS((num_sgprs - 1) / 8)); > +S_00B028_VGPRS((align(shader->num_vgprs, 4) / 4) - 1) | > +S_00B028_SGPRS((align(num_sgprs, 8) / 8) - 1)); > si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, > S_00B02C_USER_SGPR(num_user_sgprs)); > The previous code was correct according to my reading of the register spec: 0 means 4/8 V/SGPRs, 63/15 means 256/128. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Debian, X and DRI developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/5] radeonsi: fix register count calculation
Signed-off-by: Christian König --- src/gallium/drivers/radeonsi/si_state_draw.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 0d9f009..74ed01f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -86,8 +86,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs <= 104); si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, - S_00B128_VGPRS((shader->num_vgprs - 1) / 4) | - S_00B128_SGPRS((num_sgprs - 1) / 8)); + S_00B128_VGPRS((align(shader->num_vgprs,4) / 4) - 1) | + S_00B128_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, S_00B12C_USER_SGPR(num_user_sgprs)); @@ -192,8 +192,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs <= 104); si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, - S_00B028_VGPRS((shader->num_vgprs - 1) / 4) | - S_00B028_SGPRS((num_sgprs - 1) / 8)); + S_00B028_VGPRS((align(shader->num_vgprs, 4) / 4) - 1) | + S_00B028_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, S_00B02C_USER_SGPR(num_user_sgprs)); -- 1.7.9.5 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
