Re: [Mesa-dev] [PATCH 4/7] i965: Add support for Z16 depth formats.

2011-11-28 Thread Chad Versace
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On 11/23/2011 12:37 PM, Eric Anholt wrote:
> This is required by GL 3.0's Required Texture Formats section.  All
> the other code for this format in hardware was already in place.
> ---
>  src/mesa/drivers/dri/i965/brw_vtbl.c |3 ++-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |1 +
>  2 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c 
> b/src/mesa/drivers/dri/i965/brw_vtbl.c
> index dd2e05a..a3a8d09 100644
> --- a/src/mesa/drivers/dri/i965/brw_vtbl.c
> +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
> @@ -215,7 +215,8 @@ static bool brw_is_hiz_depth_format(struct intel_context 
> *intel,
>  gl_format format)
>  {
> /* In the future, this will support Z_FLOAT32. */
> -   return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
> +   return intel->has_hiz && (format == MESA_FORMAT_X8_Z24 ||
> +  format == MESA_FORMAT_Z16);
>  }

This will break applications that use a GLX visual with 16 depth bits because 
the
horrid DRI2 handshake expects that only X8_Z24 buffers will have HiZ. That's a 
bug
with the DRI2 handshake, however, and not this patch.

Yet another reason that piglit_init() needs to be restructured so that 
differenct GLX
visuals can be used.

>  void brwInitVtbl( struct brw_context *brw )
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 0f6abe2..d51fdac 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -547,6 +547,7 @@ brw_init_surface_formats(struct brw_context *brw)
>  */
> ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true;
> ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
> +   ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true;
>  }
>  
>  bool

I grepped around, and it looks like this is really all that is needed.

Reviewed-by: Chad Versace 

- 
Chad Versace
chad.vers...@linux.intel.com
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[Mesa-dev] [PATCH 4/7] i965: Add support for Z16 depth formats.

2011-11-23 Thread Eric Anholt
This is required by GL 3.0's Required Texture Formats section.  All
the other code for this format in hardware was already in place.
---
 src/mesa/drivers/dri/i965/brw_vtbl.c |3 ++-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |1 +
 2 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c 
b/src/mesa/drivers/dri/i965/brw_vtbl.c
index dd2e05a..a3a8d09 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -215,7 +215,8 @@ static bool brw_is_hiz_depth_format(struct intel_context 
*intel,
 gl_format format)
 {
/* In the future, this will support Z_FLOAT32. */
-   return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
+   return intel->has_hiz && (format == MESA_FORMAT_X8_Z24 ||
+format == MESA_FORMAT_Z16);
 }
 
 void brwInitVtbl( struct brw_context *brw )
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0f6abe2..d51fdac 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -547,6 +547,7 @@ brw_init_surface_formats(struct brw_context *brw)
 */
ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true;
ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true;
 }
 
 bool
-- 
1.7.7.3

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