Re: [Mesa-dev] [PATCH 5/7] gallium: addPIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S, _BUFFERS}

Erik Faye-Lund Mon, 03 Sep 2018 09:17:38 -0700

On fr., aug. 31, 2018 at 7:44 PM, Gurchetan Singh<gurchetansi...@chromium.org> wrote:

On Thu, Aug 30, 2018 at 6:41 AM Erik Faye-Lund
<erik.faye-l...@collabora.com> wrote:


 This moves the evergreen-specific max-sizes out as a driver-cap, so
 other drivers with less strict requirements also can use hw-atomics.

 Remove ssbo_atomic as it's no longer needed.

 We should now be able to use hw-atomics for some stages and not for
 other, if needed.

 Signed-off-by: Erik Faye-Lund <erik.faye-l...@collabora.com>
 ---
  src/gallium/drivers/etnaviv/etnaviv_screen.c  |  5 +++++
  .../drivers/freedreno/freedreno_screen.c      |  5 +++++
  .../drivers/nouveau/nv30/nv30_screen.c        |  2 ++
  .../drivers/nouveau/nv50/nv50_screen.c        |  2 ++
  .../drivers/nouveau/nvc0/nvc0_screen.c        |  2 ++
  src/gallium/drivers/r300/r300_screen.c        |  2 ++
  src/gallium/drivers/r600/r600_pipe.c          |  9 +++++++++
  src/gallium/drivers/radeonsi/si_get.c         |  2 ++
  src/gallium/drivers/svga/svga_screen.c        |  2 ++
  src/gallium/drivers/v3d/v3d_screen.c          |  2 ++
  src/gallium/drivers/vc4/vc4_screen.c          |  2 ++
  src/gallium/drivers/virgl/virgl_screen.c      |  2 ++
  src/gallium/include/pipe/p_defines.h          |  2 ++

src/mesa/state_tracker/st_extensions.c | 20+++++++++----------

  14 files changed, 49 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.cb/src/gallium/drivers/etnaviv/etnaviv_screen.c

 index 108b97d35c..95166a2db1 100644
 --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
 +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c

@@ -372,6 +372,11 @@ etna_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

        return 0;
     case PIPE_CAP_UMA:
        return 1;
 +
 +   /* hw atomic counters */
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 +      return 0;
     }

     debug_printf("unknown param %d", param);

diff --git a/src/gallium/drivers/freedreno/freedreno_screen.cb/src/gallium/drivers/freedreno/freedreno_screen.c

 index af44ab698e..e6dfc2e48e 100644
 --- a/src/gallium/drivers/freedreno/freedreno_screen.c
 +++ b/src/gallium/drivers/freedreno/freedreno_screen.c

@@ -491,6 +491,11 @@ fd_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

                 return 1;
         case PIPE_CAP_NATIVE_FENCE_FD:

return fd_device_version(screen->dev) >=FD_VERSION_FENCE_FD;

 +
 +       /* hw atomic counters */
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 +               return 0;
         }
         debug_printf("unknown param %d\n", param);
         return 0;

diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.cb/src/gallium/drivers/nouveau/nv30/nv30_screen.c

 index d52d8f3988..3fdbadb6c6 100644
 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
 +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c

@@ -239,6 +239,8 @@ nv30_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

     case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
     case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
     case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
        return 0;

     case PIPE_CAP_MAX_GS_INVOCATIONS:

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.cb/src/gallium/drivers/nouveau/nv50/nv50_screen.c

 index cd36795e56..a6dda5dfa0 100644
 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
 +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c

@@ -293,6 +293,8 @@ nv50_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

     case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
     case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
     case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
        return 0;

     case PIPE_CAP_MAX_GS_INVOCATIONS:

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.cb/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c

 index 446e30dcc8..b628b24d76 100644
 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
 +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c

@@ -322,6 +322,8 @@ nvc0_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

     case PIPE_CAP_CONSTBUF0_FLAGS:
     case PIPE_CAP_PACKED_UNIFORMS:
     case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
        return 0;

     case PIPE_CAP_VENDOR_ID:

diff --git a/src/gallium/drivers/r300/r300_screen.cb/src/gallium/drivers/r300/r300_screen.c

 index d27c2b8f1d..f29d5244ff 100644
 --- a/src/gallium/drivers/r300/r300_screen.c
 +++ b/src/gallium/drivers/r300/r300_screen.c

@@ -261,6 +261,8 @@ static int r300_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

          case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:

casePIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:

          case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
              return 0;

          case PIPE_CAP_MAX_GS_INVOCATIONS:

diff --git a/src/gallium/drivers/r600/r600_pipe.cb/src/gallium/drivers/r600/r600_pipe.c

 index cbebf748b7..226e714ffb 100644
 --- a/src/gallium/drivers/r600/r600_pipe.c
 +++ b/src/gallium/drivers/r600/r600_pipe.c

@@ -548,6 +548,15 @@ static int r600_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

                 return rscreen->b.info.pci_dev;
         case PIPE_CAP_PCI_FUNCTION:
                 return rscreen->b.info.pci_func;
 +
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:

+ if (rscreen->b.family >= CHIP_CEDAR &&rscreen->has_atomics)

 +                       return 8;
 +               return 0;
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:

+ if (rscreen->b.family >= CHIP_CEDAR &&rscreen->has_atomics)

 +                       return EG_MAX_ATOMIC_BUFFERS;
 +               return 0;
         }
         return 0;
  }

diff --git a/src/gallium/drivers/radeonsi/si_get.cb/src/gallium/drivers/radeonsi/si_get.c

 index d8fc6447b4..39cf2a0524 100644
 --- a/src/gallium/drivers/radeonsi/si_get.c
 +++ b/src/gallium/drivers/radeonsi/si_get.c

@@ -231,6 +231,8 @@ static int si_get_param(struct pipe_screen*pscreen, enum pipe_cap param)

         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:

casePIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:

         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
                 return 0;

         case PIPE_CAP_FENCE_SIGNAL:

diff --git a/src/gallium/drivers/svga/svga_screen.cb/src/gallium/drivers/svga/svga_screen.c

 index 8cc1980f3a..a7f461f631 100644
 --- a/src/gallium/drivers/svga/svga_screen.c
 +++ b/src/gallium/drivers/svga/svga_screen.c

@@ -471,6 +471,8 @@ svga_get_param(struct pipe_screen *screen, enumpipe_cap param)

     case PIPE_CAP_CONSTBUF0_FLAGS:
     case PIPE_CAP_PACKED_UNIFORMS:
     case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
        return 0;
     case PIPE_CAP_MAX_GS_INVOCATIONS:
        return 32;

diff --git a/src/gallium/drivers/v3d/v3d_screen.cb/src/gallium/drivers/v3d/v3d_screen.c

 index 14a40cb5b7..9bad4f40cf 100644
 --- a/src/gallium/drivers/v3d/v3d_screen.c
 +++ b/src/gallium/drivers/v3d/v3d_screen.c

@@ -273,6 +273,8 @@ v3d_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)casePIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:

          case PIPE_CAP_PACKED_UNIFORMS:
          case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
                  return 0;

                  /* Geometry shader output, unsupported. */

diff --git a/src/gallium/drivers/vc4/vc4_screen.cb/src/gallium/drivers/vc4/vc4_screen.c

 index e22ec6754a..a000742207 100644
 --- a/src/gallium/drivers/vc4/vc4_screen.c
 +++ b/src/gallium/drivers/vc4/vc4_screen.c

@@ -301,6 +301,8 @@ vc4_screen_get_param(struct pipe_screen*pscreen, enum pipe_cap param)casePIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:

          case PIPE_CAP_PACKED_UNIFORMS:
          case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +        case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
                  return 0;

                  /* Stream output. */

diff --git a/src/gallium/drivers/virgl/virgl_screen.cb/src/gallium/drivers/virgl/virgl_screen.c

 index 4fe57611cf..1a9e4bc383 100644
 --- a/src/gallium/drivers/virgl/virgl_screen.c
 +++ b/src/gallium/drivers/virgl/virgl_screen.c

@@ -316,6 +316,8 @@ virgl_get_param(struct pipe_screen *screen,enum pipe_cap param)

     case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
     case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
     case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 +   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
        return 0;
     case PIPE_CAP_MAX_GS_INVOCATIONS:
        return 32;

diff --git a/src/gallium/include/pipe/p_defines.hb/src/gallium/include/pipe/p_defines.h

 index b7c7d8fcbd..bdd3f4680f 100644
 --- a/src/gallium/include/pipe/p_defines.h
 +++ b/src/gallium/include/pipe/p_defines.h
 @@ -819,6 +819,8 @@ enum pipe_cap
     PIPE_CAP_MAX_SHADER_BUFFER_SIZE,
     PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE,
     PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
 +   PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS,
 +   PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
  };

  /**

diff --git a/src/mesa/state_tracker/st_extensions.cb/src/mesa/state_tracker/st_extensions.c

 index d5aad2d748..1c1182d0b0 100644
 --- a/src/mesa/state_tracker/st_extensions.c
 +++ b/src/mesa/state_tracker/st_extensions.c
 @@ -83,7 +83,6 @@ void st_init_limits(struct pipe_screen *screen,
     unsigned sh;
     bool can_ubo = true;
     int temp;
 -   bool ssbo_atomic = true;

     c->MaxTextureLevels

= _min(screen->get_param(screen,PIPE_CAP_MAX_TEXTURE_2D_LEVELS),

 @@ -251,7 +250,6 @@ void st_init_limits(struct pipe_screen *screen,
            * for separate atomic counters get the actual hw limits
            * per stage on atomic counters and buffers
            */
 -         ssbo_atomic = false;
           pc->MaxAtomicCounters = temp;

pc->MaxAtomicBuffers = screen->get_shader_param(screen,sh, PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS);

        } else {

@@ -445,21 +443,23 @@ void st_init_limits(struct pipe_screen*screen,

     c->MaxAtomicBufferSize =

c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters *ATOMIC_COUNTER_SIZE;


 -   if (!ssbo_atomic) {
 -      /* on all HW with separate atomic (evergreen) the following

- lines are true. not sure it's worth adding CAPs for thisat this

 -         stage. */

- c->MaxCombinedAtomicCounters =c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters;- c->MaxCombinedAtomicBuffers =c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;

 -   } else {
 +   c->MaxCombinedAtomicBuffers =
 +      screen->get_param(screen,

+PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS);

 +   if (!c->MaxCombinedAtomicBuffers) {
        c->MaxCombinedAtomicBuffers =
           c->Program[MESA_SHADER_VERTEX].MaxAtomicBuffers +
           c->Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers +
           c->Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers +
           c->Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers +
           c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;

- assert(c->MaxCombinedAtomicBuffers <=MAX_COMBINED_ATOMIC_BUFFERS);

+ assert(c->MaxCombinedAtomicBuffers <=MAX_COMBINED_ATOMIC_BUFFERS);

 +
 +   c->MaxCombinedAtomicCounters =

+ screen->get_param(screen,PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS);

 +   if (!c->MaxCombinedAtomicCounters)
 +      c->MaxCombinedAtomicCounters = MAX_ATOMIC_COUNTERS;


For the fallback, why aren't we adding the separate stages?  We set
pc->MaxAtomicCounters in all cases earlier.


I don't think I understand what you're asking for.

The fallback is here to behave like before; MaxCombinedAtomicCounterswas never set to the sum here, only MaxCombinedAtomicBuffers was. Andit still is, unless the driver has an explicit value.


     if (c->MaxCombinedAtomicBuffers > 0) {
        extensions->ARB_shader_atomic_counters = GL_TRUE;
 --
 2.17.1

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Re: [Mesa-dev] [PATCH 5/7] gallium: addPIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S, _BUFFERS}

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