Re: [Mesa-dev] [PATCH v02 20/37] i965: Port Gen8+ 3DSTATE_RASTER state to genxml.

[Kenneth Graunke]

On Monday, April 24, 2017 3:19:15 PM PDT Rafael Antognolli wrote:
> Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from
> genxml.
> 
> Signed-off-by: Rafael Antognolli 
> ---
>  src/mesa/drivers/dri/i965/brw_state.h |   1 +-
>  src/mesa/drivers/dri/i965/gen8_sf_state.c | 125 +---
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 125 ++-
>  3 files changed, 124 insertions(+), 127 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
> b/src/mesa/drivers/dri/i965/brw_state.h
> index c26be41..3a10a8a 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -156,7 +156,6 @@ extern const struct brw_tracked_state gen8_ps_blend;
>  extern const struct brw_tracked_state gen8_ps_extra;
>  extern const struct brw_tracked_state gen8_ps_state;
>  extern const struct brw_tracked_state gen8_wm_state;
> -extern const struct brw_tracked_state gen8_raster_state;
>  extern const struct brw_tracked_state gen8_sbe_state;
>  extern const struct brw_tracked_state gen8_sf_state;
>  extern const struct brw_tracked_state gen8_sf_clip_viewport;
> diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c 
> b/src/mesa/drivers/dri/i965/gen8_sf_state.c
> index 41e94fb..d47adcd 100644
> --- a/src/mesa/drivers/dri/i965/gen8_sf_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c
> @@ -224,128 +224,3 @@ const struct brw_tracked_state gen8_sf_state = {
> },
> .emit = upload_sf,
>  };
> -
> -static void
> -upload_raster(struct brw_context *brw)
> -{
> -   struct gl_context *ctx = >ctx;
> -   uint32_t dw1 = 0;
> -
> -   /* _NEW_BUFFERS */
> -   bool render_to_fbo = _mesa_is_user_fbo(brw->ctx.DrawBuffer);
> -
> -   /* _NEW_POLYGON */
> -   if (ctx->Polygon._FrontBit == render_to_fbo)
> -  dw1 |= GEN8_RASTER_FRONT_WINDING_CCW;
> -
> -   if (ctx->Polygon.CullFlag) {
> -  switch (ctx->Polygon.CullFaceMode) {
> -  case GL_FRONT:
> - dw1 |= GEN8_RASTER_CULL_FRONT;
> - break;
> -  case GL_BACK:
> - dw1 |= GEN8_RASTER_CULL_BACK;
> - break;
> -  case GL_FRONT_AND_BACK:
> - dw1 |= GEN8_RASTER_CULL_BOTH;
> - break;
> -  default:
> - unreachable("not reached");
> -  }
> -   } else {
> -  dw1 |= GEN8_RASTER_CULL_NONE;
> -   }
> -
> -   /* _NEW_POINT */
> -   if (ctx->Point.SmoothFlag)
> -  dw1 |= GEN8_RASTER_SMOOTH_POINT_ENABLE;
> -
> -   if (_mesa_is_multisample_enabled(ctx))
> -  dw1 |= GEN8_RASTER_API_MULTISAMPLE_ENABLE;
> -
> -   if (ctx->Polygon.OffsetFill)
> -  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
> -
> -   if (ctx->Polygon.OffsetLine)
> -  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
> -
> -   if (ctx->Polygon.OffsetPoint)
> -  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
> -
> -   switch (ctx->Polygon.FrontMode) {
> -   case GL_FILL:
> -  dw1 |= GEN6_SF_FRONT_SOLID;
> -  break;
> -   case GL_LINE:
> -  dw1 |= GEN6_SF_FRONT_WIREFRAME;
> -  break;
> -   case GL_POINT:
> -  dw1 |= GEN6_SF_FRONT_POINT;
> -  break;
> -
> -   default:
> -  unreachable("not reached");
> -   }
> -
> -   switch (ctx->Polygon.BackMode) {
> -   case GL_FILL:
> -  dw1 |= GEN6_SF_BACK_SOLID;
> -  break;
> -   case GL_LINE:
> -  dw1 |= GEN6_SF_BACK_WIREFRAME;
> -  break;
> -   case GL_POINT:
> -  dw1 |= GEN6_SF_BACK_POINT;
> -  break;
> -   default:
> -  unreachable("not reached");
> -   }
> -
> -   /* _NEW_LINE */
> -   if (ctx->Line.SmoothFlag)
> -  dw1 |= GEN8_RASTER_LINE_AA_ENABLE;
> -
> -   /* _NEW_SCISSOR */
> -   if (ctx->Scissor.EnableFlags)
> -  dw1 |= GEN8_RASTER_SCISSOR_ENABLE;
> -
> -   /* _NEW_TRANSFORM */
> -   if (!ctx->Transform.DepthClamp) {
> -  if (brw->gen >= 9) {
> - dw1 |= GEN9_RASTER_VIEWPORT_Z_NEAR_CLIP_TEST_ENABLE |
> -GEN9_RASTER_VIEWPORT_Z_FAR_CLIP_TEST_ENABLE;
> -  } else {
> - dw1 |= GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE;
> -  }
> -   }
> -
> -   /* BRW_NEW_CONSERVATIVE_RASTERIZATION */
> -   if (ctx->IntelConservativeRasterization) {
> -  if (brw->gen >= 9)
> - dw1 |= GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE;
> -   }
> -
> -   BEGIN_BATCH(5);
> -   OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2));
> -   OUT_BATCH(dw1);
> -   OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 
> */
> -   OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
> -   OUT_BATCH_F(ctx->Polygon.OffsetClamp); /* global depth offset clamp */
> -   ADVANCE_BATCH();
> -}
> -
> -const struct brw_tracked_state gen8_raster_state = {
> -   .dirty = {
> -  .mesa  = _NEW_BUFFERS |
> -   _NEW_LINE |
> -   _NEW_MULTISAMPLE |
> -   _NEW_POINT |
> -   _NEW_POLYGON |
> -   _NEW_SCISSOR |
> -   _NEW_TRANSFORM,
> -  .brw   = BRW_NEW_BLORP |
> -   BRW_NEW_CONTEXT |
> -   

[Mesa-dev] [PATCH v02 20/37] i965: Port Gen8+ 3DSTATE_RASTER state to genxml.

[Rafael Antognolli]

Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from
genxml.

Signed-off-by: Rafael Antognolli 
---
 src/mesa/drivers/dri/i965/brw_state.h |   1 +-
 src/mesa/drivers/dri/i965/gen8_sf_state.c | 125 +---
 src/mesa/drivers/dri/i965/genX_state_upload.c | 125 ++-
 3 files changed, 124 insertions(+), 127 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
b/src/mesa/drivers/dri/i965/brw_state.h
index c26be41..3a10a8a 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -156,7 +156,6 @@ extern const struct brw_tracked_state gen8_ps_blend;
 extern const struct brw_tracked_state gen8_ps_extra;
 extern const struct brw_tracked_state gen8_ps_state;
 extern const struct brw_tracked_state gen8_wm_state;
-extern const struct brw_tracked_state gen8_raster_state;
 extern const struct brw_tracked_state gen8_sbe_state;
 extern const struct brw_tracked_state gen8_sf_state;
 extern const struct brw_tracked_state gen8_sf_clip_viewport;
diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c 
b/src/mesa/drivers/dri/i965/gen8_sf_state.c
index 41e94fb..d47adcd 100644
--- a/src/mesa/drivers/dri/i965/gen8_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c
@@ -224,128 +224,3 @@ const struct brw_tracked_state gen8_sf_state = {
},
.emit = upload_sf,
 };
-
-static void
-upload_raster(struct brw_context *brw)
-{
-   struct gl_context *ctx = >ctx;
-   uint32_t dw1 = 0;
-
-   /* _NEW_BUFFERS */
-   bool render_to_fbo = _mesa_is_user_fbo(brw->ctx.DrawBuffer);
-
-   /* _NEW_POLYGON */
-   if (ctx->Polygon._FrontBit == render_to_fbo)
-  dw1 |= GEN8_RASTER_FRONT_WINDING_CCW;
-
-   if (ctx->Polygon.CullFlag) {
-  switch (ctx->Polygon.CullFaceMode) {
-  case GL_FRONT:
- dw1 |= GEN8_RASTER_CULL_FRONT;
- break;
-  case GL_BACK:
- dw1 |= GEN8_RASTER_CULL_BACK;
- break;
-  case GL_FRONT_AND_BACK:
- dw1 |= GEN8_RASTER_CULL_BOTH;
- break;
-  default:
- unreachable("not reached");
-  }
-   } else {
-  dw1 |= GEN8_RASTER_CULL_NONE;
-   }
-
-   /* _NEW_POINT */
-   if (ctx->Point.SmoothFlag)
-  dw1 |= GEN8_RASTER_SMOOTH_POINT_ENABLE;
-
-   if (_mesa_is_multisample_enabled(ctx))
-  dw1 |= GEN8_RASTER_API_MULTISAMPLE_ENABLE;
-
-   if (ctx->Polygon.OffsetFill)
-  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
-
-   if (ctx->Polygon.OffsetLine)
-  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
-
-   if (ctx->Polygon.OffsetPoint)
-  dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
-
-   switch (ctx->Polygon.FrontMode) {
-   case GL_FILL:
-  dw1 |= GEN6_SF_FRONT_SOLID;
-  break;
-   case GL_LINE:
-  dw1 |= GEN6_SF_FRONT_WIREFRAME;
-  break;
-   case GL_POINT:
-  dw1 |= GEN6_SF_FRONT_POINT;
-  break;
-
-   default:
-  unreachable("not reached");
-   }
-
-   switch (ctx->Polygon.BackMode) {
-   case GL_FILL:
-  dw1 |= GEN6_SF_BACK_SOLID;
-  break;
-   case GL_LINE:
-  dw1 |= GEN6_SF_BACK_WIREFRAME;
-  break;
-   case GL_POINT:
-  dw1 |= GEN6_SF_BACK_POINT;
-  break;
-   default:
-  unreachable("not reached");
-   }
-
-   /* _NEW_LINE */
-   if (ctx->Line.SmoothFlag)
-  dw1 |= GEN8_RASTER_LINE_AA_ENABLE;
-
-   /* _NEW_SCISSOR */
-   if (ctx->Scissor.EnableFlags)
-  dw1 |= GEN8_RASTER_SCISSOR_ENABLE;
-
-   /* _NEW_TRANSFORM */
-   if (!ctx->Transform.DepthClamp) {
-  if (brw->gen >= 9) {
- dw1 |= GEN9_RASTER_VIEWPORT_Z_NEAR_CLIP_TEST_ENABLE |
-GEN9_RASTER_VIEWPORT_Z_FAR_CLIP_TEST_ENABLE;
-  } else {
- dw1 |= GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE;
-  }
-   }
-
-   /* BRW_NEW_CONSERVATIVE_RASTERIZATION */
-   if (ctx->IntelConservativeRasterization) {
-  if (brw->gen >= 9)
- dw1 |= GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE;
-   }
-
-   BEGIN_BATCH(5);
-   OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2));
-   OUT_BATCH(dw1);
-   OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
-   OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
-   OUT_BATCH_F(ctx->Polygon.OffsetClamp); /* global depth offset clamp */
-   ADVANCE_BATCH();
-}
-
-const struct brw_tracked_state gen8_raster_state = {
-   .dirty = {
-  .mesa  = _NEW_BUFFERS |
-   _NEW_LINE |
-   _NEW_MULTISAMPLE |
-   _NEW_POINT |
-   _NEW_POLYGON |
-   _NEW_SCISSOR |
-   _NEW_TRANSFORM,
-  .brw   = BRW_NEW_BLORP |
-   BRW_NEW_CONTEXT |
-   BRW_NEW_CONSERVATIVE_RASTERIZATION,
-   },
-   .emit = upload_raster,
-};
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 7532085..948782a 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -343,10 +343,133 @@ static const struct brw_tracked_state