The main difference for this one is that it includes the changes based on the
review by Kenneth.
Current version here:
https://github.com/rantogno/mesa/commits/review/genxml-v03
Kenneth Graunke (4):
genxml: Make "Reorder Mode" fields consistent.
i965: Add genxml related plumbing in a new genX_state_upload.c file.
i965: Get real per-gen atom lists
i965: Port Gen6+ DEPTH_STENCIL state to genxml.
Louis-Francis Ratté-Boulianne (1):
genxml: Fill out Gen4, Gen45 and Gen5 XML
Rafael Antognolli (33):
genxml: Rename clip enable property.
genxml: Update xml for 3DSTATE_SF.
genxml: Add missing field values to 3DSTATE_SBE.
genxml: Add alias for MOCS.
genxml: 3DSTATE_VS rename Function Enable to Enable.
genxml: Clip guardbands are float, not int.
genxml: Rename "Function Enable" to "Enable".
genxml: Normalize xml for 3DSTATE_MULTISAMPLE.
genxml: Normalize xml for 3DSTATE_CC_STATE_POINTERS.
i965: Split out enum from brw_eu_defines.h
anv: Use BRW_BARYCENTRIC_NONPERSPECTIVE_BITS from common header.
i965: Move MOCS macros to brw_context.h.
genxml: Add rules to build gen4, gen45 and ge5.
i965: Port Gen6+ 3DSTATE_CLIP state to genxml.
i965: Port Gen8+ 3DSTATE_RASTER state to genxml.
i965: Add brw_get_line_width_float.
i965: Port gen6+ 3DSTATE_SF to genxml.
i965: Port Gen7+ 3DSTATE_SBE state to genxml.
i965: Remove calculate_attr_overrides.
i965: Port gen7+ 3DSTATE_SOL to genxml.
i965: Port gen7+ 3DSTATE_PS to genxml.
i965: Port gen6+ 3DSTATE_WM to genxml.
i965: Port gen8+ 3DSTATE_PS_EXTRA to genxml.
i965: Port gen6+ 3DSTATE_VS to genxml.
i965: Port gen6+ state emitting code to genxml.
i965: Port gen6+ blend state code to genxml.
i965: Port gen7+ 3DSTATE_TE to genxml.
i965: Port gen6+ 3DSTATE_SCISSOR_STATE_POINTERS to use genxml.
i965: Port push constant code to genxml.
i965: Port gen4+ emit vertices code to genxml.
i965: Port gen6+ multisample state emitting code to genxml.
i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.
i965: Port gen4+ state emitting code to genxml.
src/intel/Makefile.sources |1 +-
src/intel/blorp/blorp_genX_exec.h | 10 +-
src/intel/compiler/brw_defines_common.h| 46 +-
src/intel/compiler/brw_eu_defines.h| 22 +-
src/intel/genxml/gen4.xml | 1121 ++--
src/intel/genxml/gen45.xml | 1174 ++--
src/intel/genxml/gen5.xml | 1287 +++-
src/intel/genxml/gen6.xml | 42 +-
src/intel/genxml/gen7.xml | 25 +-
src/intel/genxml/gen75.xml | 13 +-
src/intel/genxml/gen8.xml | 11 +-
src/intel/genxml/gen9.xml | 16 +-
src/intel/vulkan/gen8_cmd_buffer.c |2 +-
src/intel/vulkan/genX_pipeline.c | 19 +-
src/mesa/drivers/dri/i965/Makefile.am | 12 +-
src/mesa/drivers/dri/i965/Makefile.sources | 49 +-
src/mesa/drivers/dri/i965/brw_context.h| 50 +-
src/mesa/drivers/dri/i965/brw_defines.h| 42 +-
src/mesa/drivers/dri/i965/brw_draw_upload.c| 454 +-
src/mesa/drivers/dri/i965/brw_misc_state.c | 147 +-
src/mesa/drivers/dri/i965/brw_state.h | 101 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 385 +-
src/mesa/drivers/dri/i965/brw_util.h | 25 +-
src/mesa/drivers/dri/i965/gen6_cc.c| 306 +-
src/mesa/drivers/dri/i965/gen6_clip_state.c| 139 +-
src/mesa/drivers/dri/i965/gen6_depthstencil.c | 114 +-
src/mesa/drivers/dri/i965/gen6_gs_state.c | 162 +-
src/mesa/drivers/dri/i965/gen6_multisample_state.c | 103 +-
src/mesa/drivers/dri/i965/gen6_scissor_state.c | 111 +-
src/mesa/drivers/dri/i965/gen6_sf_state.c | 454 +-
src/mesa/drivers/dri/i965/gen6_viewport_state.c| 207 +-
src/mesa/drivers/dri/i965/gen6_vs_state.c | 183 +-
src/mesa/drivers/dri/i965/gen6_wm_state.c | 291 +-
src/mesa/drivers/dri/i965/gen7_ds_state.c | 125 +-
src/mesa/drivers/dri/i965/gen7_gs_state.c | 167 +-
src/mesa/drivers/dri/i965/gen7_hs_state.c | 123 +-
src/mesa/drivers/dri/i965/gen7_sf_state.c | 265 +-
src/mesa/drivers/dri/i965/gen7_sol_state.c | 307 +-
src/mesa/drivers/dri/i965/gen7_te_state.c | 67 +-
src/mesa/drivers/dri/i965/gen7_viewport_state.c| 100 +-
src/mesa/drivers/dri/i965/gen7_vs_state.c | 87 +-
src/mesa/drivers/dri/i965/gen7_wm_state.c | 284 +-
src/mesa/drivers/dri/i965/gen8_blend_state.c | 298 +-
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 330 +-
src/mesa/drivers/dri/i965/gen8_ds_state.c | 116 +-
src/mesa/drivers/dri/i965/gen8_gs_state.c | 146 +-
src/mesa/drivers/dri/i965/gen8_hs_state.c | 93 +-
s
