From: Ben Widawsky <b...@bwidawsk.net> This patch provides the support (and comments) for allocating the BO with space for the CCS buffer just underneath it.
This patch was originally titled: "i965: Create correctly sized mcs for an image" In order to make things more bisectable, reviewable, and to have the CCS_MODIFIER token saved for the last patch, this patch now does less so it was renamed. v2: Leave "image+mod" (Topi) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Acked-by: Daniel Stone <dani...@collabora.com> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/mesa/drivers/dri/i965/intel_screen.c | 35 ++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index bf723f6..9509ba2 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -627,6 +627,7 @@ intel_create_image_common(__DRIscreen *dri_screen, uint32_t tiling; uint64_t modifier = DRM_FORMAT_MOD_INVALID; unsigned tiled_height; + unsigned ccs_height = 0; int cpp; /* Callers of this may specify a modifier, or a dri usage, but not both. The @@ -664,10 +665,33 @@ intel_create_image_common(__DRIscreen *dri_screen, if (image == NULL) return NULL; + /* + * CCS width is always going to be less than or equal to the image's width. + * All we need to do is make sure we add extra rows (height) for the CCS. + * + * A pair of CCS bits correspond to 8x4 pixels, and must be cacheline + * granularity. Each CCS tile is laid out in 8b strips, which corresponds to + * 1024x512 pixel region. In memory, it looks like the following: + * + * ┌─────────────────┐ + * │ │ + * │ │ + * │ │ + * │ Image │ + * │ │ + * │ │ + * │xxxxxxxxxxxxxxxxx│ + * ├─────┬───────────┘ + * │ │ | + * │ccs │ unused | + * └─────┘-----------┘ + * <------pitch------> + */ cpp = _mesa_get_format_bytes(image->format); - image->bo = brw_bo_alloc_tiled(screen->bufmgr, "image", - width, tiled_height, cpp, tiling, - &image->pitch, 0); + image->bo = brw_bo_alloc_tiled(screen->bufmgr, + ccs_height ? "image+ccs" : "image+mod", + width, tiled_height + ccs_height, + cpp, tiling, &image->pitch, 0); if (image->bo == NULL) { free(image); return NULL; @@ -676,7 +700,10 @@ intel_create_image_common(__DRIscreen *dri_screen, image->height = height; image->modifier = modifier; - image->aux_offset = 0; /* y_tiled_height * pitch */ + if (ccs_height) + image->aux_offset = tiled_height * image->pitch /* + mt->offset */; + else + image->aux_offset = 0; return image; } -- 2.10.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev