Re: [Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On 03/19/2015 01:23 PM, Marius Predut wrote:
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use ._Enabled flag insteed .Enabled.
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Signed-off-by: Marius Predut marius.pre...@intel.com
---
src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index f9d8d27..91b46d9 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw)
float line_width =
roundf(CLAMP(ctx-Line.Width, 0.0, ctx-Const.MaxLineWidth));
uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
- /* TODO: line width of 0 is not allowed when MSAA enabled */
- if (line_width_u3_7 == 0)
- line_width_u3_7 = 1;
+
+ /* Line width of 0 is not allowed when MSAA enabled */
+ if (ctx-Multisample._Enabled) {
+ if (line_width_u3_7 == 0)
+ line_width_u3_7 = 1;
+ } else if (ctx-Line.SmoothFlag ctx-Line.Width = 1.49) {
Based on the previous version of the patch, isn't that supposed to be
1.0? Does this really not cause any piglit regressions?
+ /* For lines less than 1 pixel thick, the general
+ * anti-aliasing algorithm gives up, and a garbage line is
+ * generated. Setting a Line Width of 0.0 specifies the
+ * rasterization of the thinnest (one-pixel-wide),
+ * non-antialiased lines.
+ *
+ * Lines rendered with zero Line Width are rasterized using
+ * Grid Intersection Quantization rules as specified by
+ * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
+ * Rasterization.
+ */
+ line_width_u3_7 = 0;
+ }
dw3 |= line_width_u3_7 GEN6_SF_LINE_WIDTH_SHIFT;
}
if (ctx-Line.SmoothFlag) {
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Re: [Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
-Original Message-
From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of
Ian Romanick
Sent: Thursday, March 19, 2015 9:35 PM
To: Predut, Marius; mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for
thinnest width lines - GEN6
On 03/19/2015 01:23 PM, Marius Predut wrote:
On SNB and IVB hw, for 1 pixel line thickness or less, the general
anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of the
“thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using Grid
Intersection Quantization rules as specified by bspec section 6.3.12.1
Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use ._Enabled flag insteed .Enabled.
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Signed-off-by: Marius Predut marius.pre...@intel.com
---
src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index f9d8d27..91b46d9 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw)
float line_width =
roundf(CLAMP(ctx-Line.Width, 0.0, ctx-Const.MaxLineWidth));
uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
- /* TODO: line width of 0 is not allowed when MSAA enabled */
- if (line_width_u3_7 == 0)
- line_width_u3_7 = 1;
+
+ /* Line width of 0 is not allowed when MSAA enabled */
+ if (ctx-Multisample._Enabled) {
+ if (line_width_u3_7 == 0)
+ line_width_u3_7 = 1;
+ } else if (ctx-Line.SmoothFlag ctx-Line.Width = 1.49) {
Based on
the previous version of the patch, isn't that supposed to be 1.0? Does this
really not cause any piglit regressions?
No I don’t detected regression here.
(for line greater than this value we have the same situation like before and
for lines thickness than 1.49 we are on the bugs)
+ /* For lines less than 1 pixel thick, the general
+ * anti-aliasing algorithm gives up, and a garbage line is
+ * generated. Setting a Line Width of 0.0 specifies the
+ * rasterization of the thinnest (one-pixel-wide),
+ * non-antialiased lines.
+ *
+ * Lines rendered with zero Line Width are rasterized using
+ * Grid Intersection Quantization rules as specified by
+ * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
+ * Rasterization.
+ */
+ line_width_u3_7 = 0;
+ }
dw3 |= line_width_u3_7 GEN6_SF_LINE_WIDTH_SHIFT;
}
if (ctx-Line.SmoothFlag) {
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[Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use ._Enabled flag insteed .Enabled.
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Signed-off-by: Marius Predut marius.pre...@intel.com
---
src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index f9d8d27..91b46d9 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw)
float line_width =
roundf(CLAMP(ctx-Line.Width, 0.0, ctx-Const.MaxLineWidth));
uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
- /* TODO: line width of 0 is not allowed when MSAA enabled */
- if (line_width_u3_7 == 0)
- line_width_u3_7 = 1;
+
+ /* Line width of 0 is not allowed when MSAA enabled */
+ if (ctx-Multisample._Enabled) {
+ if (line_width_u3_7 == 0)
+ line_width_u3_7 = 1;
+ } else if (ctx-Line.SmoothFlag ctx-Line.Width = 1.49) {
+ /* For lines less than 1 pixel thick, the general
+ * anti-aliasing algorithm gives up, and a garbage line is
+ * generated. Setting a Line Width of 0.0 specifies the
+ * rasterization of the thinnest (one-pixel-wide),
+ * non-antialiased lines.
+ *
+ * Lines rendered with zero Line Width are rasterized using
+ * Grid Intersection Quantization rules as specified by
+ * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
+ * Rasterization.
+ */
+ line_width_u3_7 = 0;
+ }
dw3 |= line_width_u3_7 GEN6_SF_LINE_WIDTH_SHIFT;
}
if (ctx-Line.SmoothFlag) {
--
1.7.9.5
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