Re: [Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

2015-04-30 Thread Predut, Marius
Thanks guys for review !.

 -Original Message-
 From: Kenneth Graunke [mailto:kenn...@whitecape.org]
 Sent: Wednesday, April 29, 2015 1:11 AM
 To: Matt Turner
 Cc: Predut, Marius; mesa-dev@lists.freedesktop.org; Ian Romanick; Eric Anholt
 Subject: Re: [Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for
 thinnest width lines - GEN6
 
 On Tuesday, April 28, 2015 01:16:14 PM Matt Turner wrote:
  Could anyone spare a minute to take a look at this patch? It seems
  fine to me... but line rasterization rules are not something I really
  claim to understand. FWIW, it does fix Eric's line-aa-width piglit
  test.
 
  I'm inclined to commit it (and the Gen7 patch).
 
 I don't understand them either - I'd always hoped to figure out what the
 Windows driver does at some point and implement what they do.
 
 That said, the current behavior is clearly broken and this appears to be
 better, so I think we should commit it, too.
 
 Acked-by: Kenneth Graunke kenn...@whitecape.org
 
 Thanks Marius!
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Re: [Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

2015-04-28 Thread Kenneth Graunke
On Tuesday, April 28, 2015 01:16:14 PM Matt Turner wrote:
 Could anyone spare a minute to take a look at this patch? It seems
 fine to me... but line rasterization rules are not something I really
 claim to understand. FWIW, it does fix Eric's line-aa-width piglit
 test.
 
 I'm inclined to commit it (and the Gen7 patch).

I don't understand them either - I'd always hoped to figure out what the
Windows driver does at some point and implement what they do.

That said, the current behavior is clearly broken and this appears to be
better, so I think we should commit it, too.

Acked-by: Kenneth Graunke kenn...@whitecape.org

Thanks Marius!


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Re: [Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

2015-04-28 Thread Matt Turner
Could anyone spare a minute to take a look at this patch? It seems
fine to me... but line rasterization rules are not something I really
claim to understand. FWIW, it does fix Eric's line-aa-width piglit
test.

I'm inclined to commit it (and the Gen7 patch).
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Re: [Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

2015-04-28 Thread Chris Forbes
Have an:

Acked-by: Chris Forbes chr...@ijw.co.nz

On Fri, Apr 24, 2015 at 3:41 AM, Marius Predut marius.pre...@intel.com wrote:
 On SNB and IVB hw, for 1 pixel line thickness or less,
 the general anti-aliasing algorithm give up - garbage line is generated.
 Setting a Line Width of 0.0 specifies the rasterization of
 the “thinnest” (one-pixel-wide), non-antialiased lines.
 Lines rendered with zero Line Width are rasterized using
 Grid Intersection Quantization rules as specified
 by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

 v2: Daniel Stone: Fix = used instead of == in an if-statement.
 v3: Ian Romanick: Use ._Enabled flag insteed .Enabled.
 Add code comments. re-word wrap the commit message.
 Add a complete bugzillia list.
 Improve the hardcoded values to produce better results.
 v4: Matt Turner: typo fixes and adjust = 1.49 to become  1.5

 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

 Signed-off-by: Marius Predut marius.pre...@intel.com
 ---
  src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 +++---
  1 file changed, 19 insertions(+), 3 deletions(-)

 diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c 
 b/src/mesa/drivers/dri/i965/gen6_sf_state.c
 index ea5c47a..e445ce2 100644
 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
 +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
 @@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw)
float line_width =
   roundf(CLAMP(ctx-Line.Width, 0.0, ctx-Const.MaxLineWidth));
uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
 -  /* TODO: line width of 0 is not allowed when MSAA enabled */
 -  if (line_width_u3_7 == 0)
 - line_width_u3_7 = 1;
 +
 +  /* Line width of 0 is not allowed when MSAA enabled */
 +  if (ctx-Multisample._Enabled) {
 + if (line_width_u3_7 == 0)
 + line_width_u3_7 = 1;
 +  } else if (ctx-Line.SmoothFlag  ctx-Line.Width  1.5) {
 + /* For 1 pixel line thickness or less, the general
 +  * anti-aliasing algorithm gives up, and a garbage line is
 +  * generated.  Setting a Line Width of 0.0 specifies the
 +  * rasterization of the thinnest (one-pixel-wide),
 +  * non-antialiased lines.
 +  *
 +  * Lines rendered with zero Line Width are rasterized using
 +  * Grid Intersection Quantization rules as specified by
 +  * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
 +  * Rasterization.
 +  */
 + line_width_u3_7 = 0;
 +  }
dw3 |= line_width_u3_7  GEN6_SF_LINE_WIDTH_SHIFT;
 }
 if (ctx-Line.SmoothFlag) {
 --
 1.9.1

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[Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

2015-04-23 Thread Marius Predut
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use ._Enabled flag insteed .Enabled.
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust = 1.49 to become  1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Signed-off-by: Marius Predut marius.pre...@intel.com
---
 src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 +++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c 
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index ea5c47a..e445ce2 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw)
   float line_width =
  roundf(CLAMP(ctx-Line.Width, 0.0, ctx-Const.MaxLineWidth));
   uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
-  /* TODO: line width of 0 is not allowed when MSAA enabled */
-  if (line_width_u3_7 == 0)
- line_width_u3_7 = 1;
+
+  /* Line width of 0 is not allowed when MSAA enabled */
+  if (ctx-Multisample._Enabled) {
+ if (line_width_u3_7 == 0)
+ line_width_u3_7 = 1;
+  } else if (ctx-Line.SmoothFlag  ctx-Line.Width  1.5) {
+ /* For 1 pixel line thickness or less, the general
+  * anti-aliasing algorithm gives up, and a garbage line is
+  * generated.  Setting a Line Width of 0.0 specifies the
+  * rasterization of the thinnest (one-pixel-wide),
+  * non-antialiased lines.
+  *
+  * Lines rendered with zero Line Width are rasterized using
+  * Grid Intersection Quantization rules as specified by
+  * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
+  * Rasterization.
+  */
+ line_width_u3_7 = 0;
+  }
   dw3 |= line_width_u3_7  GEN6_SF_LINE_WIDTH_SHIFT;
}
if (ctx-Line.SmoothFlag) {
-- 
1.9.1

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