Re: [Mesa-dev] [PATCHv2 6/7] i965: Implement nir_intrinsic_shader_clock

[Connor Abbott]

On Tue, Oct 20, 2015 at 1:02 PM, Emil Velikov  wrote:
> v2:
>  - Add a few const qualifiers for good measure.
>  - Drop unneeded retype()s (Matt)
>  - Convert timestamp to SIMD8/16, as fs_visitor::get_timestamp() returns
> SIMD4 (Connor)
>
> Signed-off-by: Emil Velikov 
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp   | 11 +++
>  src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++
>  2 files changed, 21 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 792663f..976b4fd 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1309,6 +1309,17 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
> nir_intrinsic_instr *instr
>break;
> }
>
> +   case nir_intrinsic_shader_clock: {
> +  /* We cannot do anything if there is an event, so ignore it for now */
> +  fs_reg shader_clock = get_timestamp(bld);
> +  const fs_reg srcs[] = { shader_clock.set_smear(0), 
> shader_clock.set_smear(1) };
> +  const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, ARRAY_SIZE(srcs));

No need to create a temporary here -- you can just do

bld.LOAD_PAYLOAD(dest, srcs, ARRAY_SIZE(srcs), 0);

with that, this is

Reviewed-by: Connor Abbott 

> +
> +  bld.LOAD_PAYLOAD(tmp, srcs, ARRAY_SIZE(srcs), 0);
> +  bld.MOV(dest, tmp);
> +  break;
> +   }
> +
> case nir_intrinsic_image_size: {
>/* Get the referenced image variable and type. */
>const nir_variable *var = instr->variables[0]->var;
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index ea1e3e7..c401212 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -806,6 +806,16 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr 
> *instr)
>break;
> }
>
> +   case nir_intrinsic_shader_clock: {
> +  /* We cannot do anything if there is an event, so ignore it for now */
> +  const src_reg shader_clock = get_timestamp();
> +  const enum brw_reg_type type = 
> brw_type_for_base_type(glsl_type::uvec2_type);
> +
> +  dest = get_nir_dest(instr->dest, type);
> +  emit(MOV(dest, shader_clock));
> +  break;
> +   }
> +
> default:
>unreachable("Unknown intrinsic");
> }
> --
> 2.6.1
>
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[Mesa-dev] [PATCHv2 6/7] i965: Implement nir_intrinsic_shader_clock

[Emil Velikov]

v2:
 - Add a few const qualifiers for good measure.
 - Drop unneeded retype()s (Matt)
 - Convert timestamp to SIMD8/16, as fs_visitor::get_timestamp() returns
SIMD4 (Connor)

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp   | 11 +++
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++
 2 files changed, 21 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 792663f..976b4fd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1309,6 +1309,17 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
nir_intrinsic_instr *instr
   break;
}
 
+   case nir_intrinsic_shader_clock: {
+  /* We cannot do anything if there is an event, so ignore it for now */
+  fs_reg shader_clock = get_timestamp(bld);
+  const fs_reg srcs[] = { shader_clock.set_smear(0), 
shader_clock.set_smear(1) };
+  const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, ARRAY_SIZE(srcs));
+
+  bld.LOAD_PAYLOAD(tmp, srcs, ARRAY_SIZE(srcs), 0);
+  bld.MOV(dest, tmp);
+  break;
+   }
+
case nir_intrinsic_image_size: {
   /* Get the referenced image variable and type. */
   const nir_variable *var = instr->variables[0]->var;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index ea1e3e7..c401212 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -806,6 +806,16 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr 
*instr)
   break;
}
 
+   case nir_intrinsic_shader_clock: {
+  /* We cannot do anything if there is an event, so ignore it for now */
+  const src_reg shader_clock = get_timestamp();
+  const enum brw_reg_type type = 
brw_type_for_base_type(glsl_type::uvec2_type);
+
+  dest = get_nir_dest(instr->dest, type);
+  emit(MOV(dest, shader_clock));
+  break;
+   }
+
default:
   unreachable("Unknown intrinsic");
}
-- 
2.6.1

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