Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-15 Thread Samuel Pitoiset 



On 04/15/2016 09:41 AM, Hans de Goede wrote:

Hi,

On 15-04-16 00:01, Samuel Pitoiset wrote:



On 04/14/2016 08:03 PM, Pierre Moreau wrote:

On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:

Similar to surfaces validation for compute shaders.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26
-
  2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index ced8130..8e73227 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program
*prog, uint16_t chipset,
 } else {
if (chipset >= NVISA_GK104_CHIPSET) {
   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
+ info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
+  } else {
+ info->io.suInfoBase = 0; /* TODO */
}
info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.msInfoCBSlot = 15;
info->io.msInfoBase = 0; /* TODO */
-  info->io.suInfoBase = 0; /* TODO */
 }

 info->assignSlots = nvc0_program_assign_varying_slots;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 585b1e5..7cac31d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct
nvc0_context *nvc0)
  static inline void
  nve4_update_surface_bindings(struct nvc0_context *nvc0)
  {
-   /* TODO */
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_screen *screen = nvc0->screen;
+   int i, j, s;
+
+   for (s = 0; s < 5; s++) {


Similar to my comment on patch 1, shouldn’t you have `s < 6` here?
(Except if
you follow Ilia’s suggestion.)


No, because s = 5 is for compute shaders and they are bound in
nve4_compute_validate_surfaces().


Maybe add a comment explaining this to the code ? So that we do not
end up wondering later why things are as they are ?


Well, such a loop is used at many places in the driver. If you trace 
down where nve4_update_surface_bindings() is called, you will see that 
it's for 3D only. I don't think adding a comment will be really relevant 
here.




Regards,

Ha\ns






Pierre


+  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+  PUSH_DATA (push, 2048);
+  PUSH_DATAh(push, screen->uniform_bo->offset +
NVC0_CB_AUX_INFO(s));
+  PUSH_DATA (push, screen->uniform_bo->offset +
NVC0_CB_AUX_INFO(s));
+  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
+  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
+
+  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+ struct pipe_image_view *view = >images[s][i];
+ if (view->resource) {
+struct nv04_resource *res = nv04_resource(view->resource);
+
+nve4_set_surface_info(push, view, screen);
+BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
+ } else {
+for (j = 0; j < 16; j++)
+   PUSH_DATA(push, 0);
+ }
+  }
+   }
  }

  void
--
2.8.0

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--
-Samuel
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Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-15 Thread Hans de Goede 

Hi,

On 15-04-16 00:01, Samuel Pitoiset wrote:



On 04/14/2016 08:03 PM, Pierre Moreau wrote:

On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:

Similar to surfaces validation for compute shaders.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 -
  2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index ced8130..8e73227 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
uint16_t chipset,
 } else {
if (chipset >= NVISA_GK104_CHIPSET) {
   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
+ info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
+  } else {
+ info->io.suInfoBase = 0; /* TODO */
}
info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.msInfoCBSlot = 15;
info->io.msInfoBase = 0; /* TODO */
-  info->io.suInfoBase = 0; /* TODO */
 }

 info->assignSlots = nvc0_program_assign_varying_slots;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 585b1e5..7cac31d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
  static inline void
  nve4_update_surface_bindings(struct nvc0_context *nvc0)
  {
-   /* TODO */
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_screen *screen = nvc0->screen;
+   int i, j, s;
+
+   for (s = 0; s < 5; s++) {


Similar to my comment on patch 1, shouldn’t you have `s < 6` here? (Except if
you follow Ilia’s suggestion.)


No, because s = 5 is for compute shaders and they are bound in 
nve4_compute_validate_surfaces().


Maybe add a comment explaining this to the code ? So that we do not
end up wondering later why things are as they are ?

Regards,

Ha\ns






Pierre


+  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+  PUSH_DATA (push, 2048);
+  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
+  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
+
+  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+ struct pipe_image_view *view = >images[s][i];
+ if (view->resource) {
+struct nv04_resource *res = nv04_resource(view->resource);
+
+nve4_set_surface_info(push, view, screen);
+BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
+ } else {
+for (j = 0; j < 16; j++)
+   PUSH_DATA(push, 0);
+ }
+  }
+   }
  }

  void
--
2.8.0

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Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-14 Thread Samuel Pitoiset 



On 04/14/2016 08:03 PM, Pierre Moreau wrote:

On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:

Similar to surfaces validation for compute shaders.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 -
  2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index ced8130..8e73227 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
uint16_t chipset,
 } else {
if (chipset >= NVISA_GK104_CHIPSET) {
   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
+ info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
+  } else {
+ info->io.suInfoBase = 0; /* TODO */
}
info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.msInfoCBSlot = 15;
info->io.msInfoBase = 0; /* TODO */
-  info->io.suInfoBase = 0; /* TODO */
 }

 info->assignSlots = nvc0_program_assign_varying_slots;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 585b1e5..7cac31d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
  static inline void
  nve4_update_surface_bindings(struct nvc0_context *nvc0)
  {
-   /* TODO */
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_screen *screen = nvc0->screen;
+   int i, j, s;
+
+   for (s = 0; s < 5; s++) {


Similar to my comment on patch 1, shouldn’t you have `s < 6` here? (Except if
you follow Ilia’s suggestion.)


No, because s = 5 is for compute shaders and they are bound in 
nve4_compute_validate_surfaces().




Pierre


+  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+  PUSH_DATA (push, 2048);
+  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
+  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
+
+  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+ struct pipe_image_view *view = >images[s][i];
+ if (view->resource) {
+struct nv04_resource *res = nv04_resource(view->resource);
+
+nve4_set_surface_info(push, view, screen);
+BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
+ } else {
+for (j = 0; j < 16; j++)
+   PUSH_DATA(push, 0);
+ }
+  }
+   }
  }

  void
--
2.8.0

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Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-14 Thread Samuel Pitoiset 



On 04/13/2016 10:14 PM, Ilia Mirkin wrote:

On Tue, Apr 12, 2016 at 7:56 PM, Samuel Pitoiset
 wrote:

Similar to surfaces validation for compute shaders.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 -
  2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index ced8130..8e73227 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
uint16_t chipset,
 } else {
if (chipset >= NVISA_GK104_CHIPSET) {
   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
+ info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
+  } else {
+ info->io.suInfoBase = 0; /* TODO */
}
info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.msInfoCBSlot = 15;
info->io.msInfoBase = 0; /* TODO */
-  info->io.suInfoBase = 0; /* TODO */
 }

 info->assignSlots = nvc0_program_assign_varying_slots;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 585b1e5..7cac31d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
  static inline void
  nve4_update_surface_bindings(struct nvc0_context *nvc0)
  {
-   /* TODO */
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_screen *screen = nvc0->screen;
+   int i, j, s;
+
+   for (s = 0; s < 5; s++) {


Probably only do this if nvc0->images_dirty[s] != 0?


Yes, forgot to do that.



Either way,

Reviewed-by: Ilia Mirkin 


+  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+  PUSH_DATA (push, 2048);
+  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
+  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
+
+  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+ struct pipe_image_view *view = >images[s][i];
+ if (view->resource) {
+struct nv04_resource *res = nv04_resource(view->resource);
+
+nve4_set_surface_info(push, view, screen);
+BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
+ } else {
+for (j = 0; j < 16; j++)
+   PUSH_DATA(push, 0);
+ }
+  }
+   }
  }

  void
--
2.8.0

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Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-14 Thread Pierre Moreau 
On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:
> Similar to surfaces validation for compute shaders.
> 
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
>  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 
> -
>  2 files changed, 28 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> index ced8130..8e73227 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
> uint16_t chipset,
> } else {
>if (chipset >= NVISA_GK104_CHIPSET) {
>   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
> + info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
> +  } else {
> + info->io.suInfoBase = 0; /* TODO */
>}
>info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
>info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
>info->io.msInfoCBSlot = 15;
>info->io.msInfoBase = 0; /* TODO */
> -  info->io.suInfoBase = 0; /* TODO */
> }
>  
> info->assignSlots = nvc0_program_assign_varying_slots;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> index 585b1e5..7cac31d 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> @@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
>  static inline void
>  nve4_update_surface_bindings(struct nvc0_context *nvc0)
>  {
> -   /* TODO */
> +   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
> +   struct nvc0_screen *screen = nvc0->screen;
> +   int i, j, s;
> +
> +   for (s = 0; s < 5; s++) {

Similar to my comment on patch 1, shouldn’t you have `s < 6` here? (Except if
you follow Ilia’s suggestion.)

Pierre

> +  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
> +  PUSH_DATA (push, 2048);
> +  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
> +  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
> +  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
> +  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
> +
> +  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
> + struct pipe_image_view *view = >images[s][i];
> + if (view->resource) {
> +struct nv04_resource *res = nv04_resource(view->resource);
> +
> +nve4_set_surface_info(push, view, screen);
> +BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
> + } else {
> +for (j = 0; j < 16; j++)
> +   PUSH_DATA(push, 0);
> + }
> +  }
> +   }
>  }
>  
>  void
> -- 
> 2.8.0
> 
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Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-13 Thread Ilia Mirkin 
On Tue, Apr 12, 2016 at 7:56 PM, Samuel Pitoiset
 wrote:
> Similar to surfaces validation for compute shaders.
>
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
>  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 
> -
>  2 files changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> index ced8130..8e73227 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
> uint16_t chipset,
> } else {
>if (chipset >= NVISA_GK104_CHIPSET) {
>   info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
> + info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
> +  } else {
> + info->io.suInfoBase = 0; /* TODO */
>}
>info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
>info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
>info->io.msInfoCBSlot = 15;
>info->io.msInfoBase = 0; /* TODO */
> -  info->io.suInfoBase = 0; /* TODO */
> }
>
> info->assignSlots = nvc0_program_assign_varying_slots;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> index 585b1e5..7cac31d 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> @@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
>  static inline void
>  nve4_update_surface_bindings(struct nvc0_context *nvc0)
>  {
> -   /* TODO */
> +   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
> +   struct nvc0_screen *screen = nvc0->screen;
> +   int i, j, s;
> +
> +   for (s = 0; s < 5; s++) {

Probably only do this if nvc0->images_dirty[s] != 0?

Either way,

Reviewed-by: Ilia Mirkin 

> +  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
> +  PUSH_DATA (push, 2048);
> +  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
> +  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
> +  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
> +  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
> +
> +  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
> + struct pipe_image_view *view = >images[s][i];
> + if (view->resource) {
> +struct nv04_resource *res = nv04_resource(view->resource);
> +
> +nve4_set_surface_info(push, view, screen);
> +BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
> + } else {
> +for (j = 0; j < 16; j++)
> +   PUSH_DATA(push, 0);
> + }
> +  }
> +   }
>  }
>
>  void
> --
> 2.8.0
>
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[Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

2016-04-12 Thread Samuel Pitoiset 
Similar to surfaces validation for compute shaders.

Signed-off-by: Samuel Pitoiset 
---
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c |  4 +++-
 src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26 -
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index ced8130..8e73227 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -561,12 +561,14 @@ nvc0_program_translate(struct nvc0_program *prog, 
uint16_t chipset,
} else {
   if (chipset >= NVISA_GK104_CHIPSET) {
  info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
+ info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
+  } else {
+ info->io.suInfoBase = 0; /* TODO */
   }
   info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
   info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
   info->io.msInfoCBSlot = 15;
   info->io.msInfoBase = 0; /* TODO */
-  info->io.suInfoBase = 0; /* TODO */
}
 
info->assignSlots = nvc0_program_assign_varying_slots;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 585b1e5..7cac31d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -875,7 +875,31 @@ nvc0_update_surface_bindings(struct nvc0_context *nvc0)
 static inline void
 nve4_update_surface_bindings(struct nvc0_context *nvc0)
 {
-   /* TODO */
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_screen *screen = nvc0->screen;
+   int i, j, s;
+
+   for (s = 0; s < 5; s++) {
+  BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+  PUSH_DATA (push, 2048);
+  PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
+  BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES);
+  PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0));
+
+  for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+ struct pipe_image_view *view = >images[s][i];
+ if (view->resource) {
+struct nv04_resource *res = nv04_resource(view->resource);
+
+nve4_set_surface_info(push, view, screen);
+BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR);
+ } else {
+for (j = 0; j < 16; j++)
+   PUSH_DATA(push, 0);
+ }
+  }
+   }
 }
 
 void
-- 
2.8.0

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