Re: [Mesa-dev] [v2 04/17] i965: Provide slice details to color resolver

2016-11-24 Thread Pohjolainen, Topi 
On Wed, Nov 23, 2016 at 09:26:29AM -0800, Jason Ekstrand wrote:
>General comment: Does it make sense to squash this with the previous
>patch?  I'm fine either way.
>On Wed, Nov 23, 2016 at 1:16 AM, Topi Pohjolainen
><[1]topi.pohjolai...@gmail.com> wrote:
> 
>  Signed-off-by: Topi Pohjolainen <[2]topi.pohjolai...@intel.com>
>  ---
>   src/mesa/drivers/dri/i965/brw_blorp.c | 15 +--
>   src/mesa/drivers/dri/i965/brw_blorp.h |  3 ++-
>   src/mesa/drivers/dri/i965/brw_context.c   | 14 +-
>   src/mesa/drivers/dri/i965/intel_blit.c|  4 ++--
>   src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27
>  +--
>   src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  1 +
>   6 files changed, 48 insertions(+), 16 deletions(-)
>  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
>  b/src/mesa/drivers/dri/i965/brw_blorp.c
>  index 9a849f5..99df21e 100644
>  --- a/src/mesa/drivers/dri/i965/brw_blorp.c
>  +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
>  @@ -213,7 +213,10 @@ blorp_surf_for_miptree(struct brw_context *brw,
>if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E))
>   flags |= INTEL_MIPTREE_IGNORE_CCS_E;
>  - intel_miptree_resolve_color(brw, mt, flags);
>  + for (unsigned i = 0; i < num_layers; i++) {
>  +intel_miptree_resolve_color(brw, mt,
>  +*level, start_layer + i,
>  flags);
>  + }
>assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_
>  RESOLVED);
>surf->aux_usage = ISL_AUX_USAGE_NONE;
>  @@ -942,19 +945,19 @@ brw_blorp_clear_color(struct brw_context *brw,
>  struct gl_framebuffer *fb,
>   }
>   void
>  -brw_blorp_resolve_color(struct brw_context *brw, struct
>  intel_mipmap_tree *mt)
>  +brw_blorp_resolve_color(struct brw_context *brw, struct
>  intel_mipmap_tree *mt,
>  +unsigned level, unsigned layer)
>   {
>  -   DBG("%s to mt %p\n", __FUNCTION__, mt);
>  +   DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level,
>  layer);
>  const mesa_format format = _mesa_get_srgb_format_linear(
>  mt->format);
>  struct isl_surf isl_tmp[2];
>  struct blorp_surf surf;
>  -   unsigned level = 0;
>  blorp_surf_for_miptree(brw, , mt, true,
> (1 << ISL_AUX_USAGE_CCS_E) |
> (1 << ISL_AUX_USAGE_CCS_D),
>  -  , 0 /* start_layer */, 1 /*
>  num_layers */,
>  +  , layer, 1 /* num_layers */,
> isl_tmp);
>  enum blorp_fast_clear_op resolve_op;
>  @@ -971,7 +974,7 @@ brw_blorp_resolve_color(struct brw_context *brw,
>  struct intel_mipmap_tree *mt)
>  struct blorp_batch batch;
>  blorp_batch_init(>blorp, , brw, 0);
>  -   blorp_ccs_resolve(, , 0 /* level */, 0 /* layer */,
>  +   blorp_ccs_resolve(, , level, layer,
>brw_blorp_to_isl_format(brw, format, true),
>resolve_op);
>  blorp_batch_finish();
>  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
>  b/src/mesa/drivers/dri/i965/brw_blorp.h
>  index abf3956..277b00e 100644
>  --- a/src/mesa/drivers/dri/i965/brw_blorp.h
>  +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
>  @@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw,
>  struct gl_framebuffer *fb,
>   void
>   brw_blorp_resolve_color(struct brw_context *brw,
>  -struct intel_mipmap_tree *mt);
>  +struct intel_mipmap_tree *mt,
>  +unsigned level, unsigned layer);
> 
>Would it be better to make this start_layer and num_layers and do the
>looping in blorp?

Well, intel_miptree_resolve_color() is the only caller and it needs to
consider each level/layer if resolve is needed. Having blorp to do the loop
would require the resolve map check logic to be moved there. To me it seems
cleaner in intel_miptree_resolve_color(). Thoughts?

> 
>   void
>   intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree
>  *mt,
>  diff --git a/src/mesa/drivers/dri/i965/brw_context.c
>  b/src/mesa/drivers/dri/i965/brw_context.c
>  index 3f88f7f..b0e762b 100644
>  --- a/src/mesa/drivers/dri/i965/brw_context.c
>  +++ b/src/mesa/drivers/dri/i965/brw_context.c
>  @@ -316,8 +316,9 @@ intel_update_state(struct gl_context * ctx,
>  GLuint new_state)
>   intel_renderbuffer(fb->_ColorDrawBuffers[i]);
>if (irb &&
>  - intel_miptree_resolve_color(brw, irb->mt,
>  -
>  INTEL_MIPTREE_IGNORE_CCS_E))
>  +

Re: [Mesa-dev] [v2 04/17] i965: Provide slice details to color resolver

2016-11-23 Thread Jason Ekstrand 
On Wed, Nov 23, 2016 at 10:13 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:

> On Wed, Nov 23, 2016 at 09:26:29AM -0800, Jason Ekstrand wrote:
> >General comment: Does it make sense to squash this with the previous
> >patch?  I'm fine either way.
> >On Wed, Nov 23, 2016 at 1:16 AM, Topi Pohjolainen
> ><[1]topi.pohjolai...@gmail.com> wrote:
> >
> >  Signed-off-by: Topi Pohjolainen <[2]topi.pohjolai...@intel.com>
> >  ---
> >   src/mesa/drivers/dri/i965/brw_blorp.c | 15 +--
> >   src/mesa/drivers/dri/i965/brw_blorp.h |  3 ++-
> >   src/mesa/drivers/dri/i965/brw_context.c   | 14 +-
> >   src/mesa/drivers/dri/i965/intel_blit.c|  4 ++--
> >   src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27
> >  +--
> >   src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  1 +
> >   6 files changed, 48 insertions(+), 16 deletions(-)
> >  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> >  b/src/mesa/drivers/dri/i965/brw_blorp.c
> >  index 9a849f5..99df21e 100644
> >  --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> >  +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> >  @@ -213,7 +213,10 @@ blorp_surf_for_miptree(struct brw_context *brw,
> >if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E))
> >   flags |= INTEL_MIPTREE_IGNORE_CCS_E;
> >  - intel_miptree_resolve_color(brw, mt, flags);
> >  + for (unsigned i = 0; i < num_layers; i++) {
> >  +intel_miptree_resolve_color(brw, mt,
> >  +*level, start_layer + i,
> >  flags);
> >  + }
> >assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_
> >  RESOLVED);
> >surf->aux_usage = ISL_AUX_USAGE_NONE;
> >  @@ -942,19 +945,19 @@ brw_blorp_clear_color(struct brw_context *brw,
> >  struct gl_framebuffer *fb,
> >   }
> >   void
> >  -brw_blorp_resolve_color(struct brw_context *brw, struct
> >  intel_mipmap_tree *mt)
> >  +brw_blorp_resolve_color(struct brw_context *brw, struct
> >  intel_mipmap_tree *mt,
> >  +unsigned level, unsigned layer)
> >   {
> >  -   DBG("%s to mt %p\n", __FUNCTION__, mt);
> >  +   DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level,
> >  layer);
> >  const mesa_format format = _mesa_get_srgb_format_linear(
> >  mt->format);
> >  struct isl_surf isl_tmp[2];
> >  struct blorp_surf surf;
> >  -   unsigned level = 0;
> >  blorp_surf_for_miptree(brw, , mt, true,
> > (1 << ISL_AUX_USAGE_CCS_E) |
> > (1 << ISL_AUX_USAGE_CCS_D),
> >  -  , 0 /* start_layer */, 1 /*
> >  num_layers */,
> >  +  , layer, 1 /* num_layers */,
> > isl_tmp);
> >  enum blorp_fast_clear_op resolve_op;
> >  @@ -971,7 +974,7 @@ brw_blorp_resolve_color(struct brw_context *brw,
> >  struct intel_mipmap_tree *mt)
> >  struct blorp_batch batch;
> >  blorp_batch_init(>blorp, , brw, 0);
> >  -   blorp_ccs_resolve(, , 0 /* level */, 0 /* layer */,
> >  +   blorp_ccs_resolve(, , level, layer,
> >brw_blorp_to_isl_format(brw, format, true),
> >resolve_op);
> >  blorp_batch_finish();
> >  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
> >  b/src/mesa/drivers/dri/i965/brw_blorp.h
> >  index abf3956..277b00e 100644
> >  --- a/src/mesa/drivers/dri/i965/brw_blorp.h
> >  +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
> >  @@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw,
> >  struct gl_framebuffer *fb,
> >   void
> >   brw_blorp_resolve_color(struct brw_context *brw,
> >  -struct intel_mipmap_tree *mt);
> >  +struct intel_mipmap_tree *mt,
> >  +unsigned level, unsigned layer);
> >
> >Would it be better to make this start_layer and num_layers and do the
> >looping in blorp?
>
> Sounds good to me.
>
> >
> >   void
> >   intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree
> >  *mt,
> >  diff --git a/src/mesa/drivers/dri/i965/brw_context.c
> >  b/src/mesa/drivers/dri/i965/brw_context.c
> >  index 3f88f7f..b0e762b 100644
> >  --- a/src/mesa/drivers/dri/i965/brw_context.c
> >  +++ b/src/mesa/drivers/dri/i965/brw_context.c
> >  @@ -316,8 +316,9 @@ intel_update_state(struct gl_context * ctx,
> >  GLuint new_state)
> >   intel_renderbuffer(fb->_ColorDrawBuffers[i]);
> >if (irb &&
> >  - intel_miptree_resolve_color(brw, irb->mt,
> >  -
> >  INTEL_MIPTREE_IGNORE_CCS_E))
> >

Re: [Mesa-dev] [v2 04/17] i965: Provide slice details to color resolver

2016-11-23 Thread Pohjolainen, Topi 
On Wed, Nov 23, 2016 at 09:26:29AM -0800, Jason Ekstrand wrote:
>General comment: Does it make sense to squash this with the previous
>patch?  I'm fine either way.
>On Wed, Nov 23, 2016 at 1:16 AM, Topi Pohjolainen
><[1]topi.pohjolai...@gmail.com> wrote:
> 
>  Signed-off-by: Topi Pohjolainen <[2]topi.pohjolai...@intel.com>
>  ---
>   src/mesa/drivers/dri/i965/brw_blorp.c | 15 +--
>   src/mesa/drivers/dri/i965/brw_blorp.h |  3 ++-
>   src/mesa/drivers/dri/i965/brw_context.c   | 14 +-
>   src/mesa/drivers/dri/i965/intel_blit.c|  4 ++--
>   src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27
>  +--
>   src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  1 +
>   6 files changed, 48 insertions(+), 16 deletions(-)
>  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
>  b/src/mesa/drivers/dri/i965/brw_blorp.c
>  index 9a849f5..99df21e 100644
>  --- a/src/mesa/drivers/dri/i965/brw_blorp.c
>  +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
>  @@ -213,7 +213,10 @@ blorp_surf_for_miptree(struct brw_context *brw,
>if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E))
>   flags |= INTEL_MIPTREE_IGNORE_CCS_E;
>  - intel_miptree_resolve_color(brw, mt, flags);
>  + for (unsigned i = 0; i < num_layers; i++) {
>  +intel_miptree_resolve_color(brw, mt,
>  +*level, start_layer + i,
>  flags);
>  + }
>assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_
>  RESOLVED);
>surf->aux_usage = ISL_AUX_USAGE_NONE;
>  @@ -942,19 +945,19 @@ brw_blorp_clear_color(struct brw_context *brw,
>  struct gl_framebuffer *fb,
>   }
>   void
>  -brw_blorp_resolve_color(struct brw_context *brw, struct
>  intel_mipmap_tree *mt)
>  +brw_blorp_resolve_color(struct brw_context *brw, struct
>  intel_mipmap_tree *mt,
>  +unsigned level, unsigned layer)
>   {
>  -   DBG("%s to mt %p\n", __FUNCTION__, mt);
>  +   DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level,
>  layer);
>  const mesa_format format = _mesa_get_srgb_format_linear(
>  mt->format);
>  struct isl_surf isl_tmp[2];
>  struct blorp_surf surf;
>  -   unsigned level = 0;
>  blorp_surf_for_miptree(brw, , mt, true,
> (1 << ISL_AUX_USAGE_CCS_E) |
> (1 << ISL_AUX_USAGE_CCS_D),
>  -  , 0 /* start_layer */, 1 /*
>  num_layers */,
>  +  , layer, 1 /* num_layers */,
> isl_tmp);
>  enum blorp_fast_clear_op resolve_op;
>  @@ -971,7 +974,7 @@ brw_blorp_resolve_color(struct brw_context *brw,
>  struct intel_mipmap_tree *mt)
>  struct blorp_batch batch;
>  blorp_batch_init(>blorp, , brw, 0);
>  -   blorp_ccs_resolve(, , 0 /* level */, 0 /* layer */,
>  +   blorp_ccs_resolve(, , level, layer,
>brw_blorp_to_isl_format(brw, format, true),
>resolve_op);
>  blorp_batch_finish();
>  diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
>  b/src/mesa/drivers/dri/i965/brw_blorp.h
>  index abf3956..277b00e 100644
>  --- a/src/mesa/drivers/dri/i965/brw_blorp.h
>  +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
>  @@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw,
>  struct gl_framebuffer *fb,
>   void
>   brw_blorp_resolve_color(struct brw_context *brw,
>  -struct intel_mipmap_tree *mt);
>  +struct intel_mipmap_tree *mt,
>  +unsigned level, unsigned layer);
> 
>Would it be better to make this start_layer and num_layers and do the
>looping in blorp?

Sounds good to me.

> 
>   void
>   intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree
>  *mt,
>  diff --git a/src/mesa/drivers/dri/i965/brw_context.c
>  b/src/mesa/drivers/dri/i965/brw_context.c
>  index 3f88f7f..b0e762b 100644
>  --- a/src/mesa/drivers/dri/i965/brw_context.c
>  +++ b/src/mesa/drivers/dri/i965/brw_context.c
>  @@ -316,8 +316,9 @@ intel_update_state(struct gl_context * ctx,
>  GLuint new_state)
>   intel_renderbuffer(fb->_ColorDrawBuffers[i]);
>if (irb &&
>  - intel_miptree_resolve_color(brw, irb->mt,
>  -
>  INTEL_MIPTREE_IGNORE_CCS_E))
>  + intel_miptree_resolve_color(
>  +brw, irb->mt, irb->mt_level, irb->mt_layer,
>  +INTEL_MIPTREE_IGNORE_CCS_E))
> 
>Do you need to loop here?

Let me check, I think you might be right.

> 
>

Re: [Mesa-dev] [v2 04/17] i965: Provide slice details to color resolver

2016-11-23 Thread Jason Ekstrand 
General comment: Does it make sense to squash this with the previous
patch?  I'm fine either way.

On Wed, Nov 23, 2016 at 1:16 AM, Topi Pohjolainen <
topi.pohjolai...@gmail.com> wrote:

> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c | 15 +--
>  src/mesa/drivers/dri/i965/brw_blorp.h |  3 ++-
>  src/mesa/drivers/dri/i965/brw_context.c   | 14 +-
>  src/mesa/drivers/dri/i965/intel_blit.c|  4 ++--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27
> +--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  1 +
>  6 files changed, 48 insertions(+), 16 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 9a849f5..99df21e 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -213,7 +213,10 @@ blorp_surf_for_miptree(struct brw_context *brw,
>   if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E))
>  flags |= INTEL_MIPTREE_IGNORE_CCS_E;
>
> - intel_miptree_resolve_color(brw, mt, flags);
> + for (unsigned i = 0; i < num_layers; i++) {
> +intel_miptree_resolve_color(brw, mt,
> +*level, start_layer + i, flags);
> + }
>
>   assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED);
>   surf->aux_usage = ISL_AUX_USAGE_NONE;
> @@ -942,19 +945,19 @@ brw_blorp_clear_color(struct brw_context *brw,
> struct gl_framebuffer *fb,
>  }
>
>  void
> -brw_blorp_resolve_color(struct brw_context *brw, struct
> intel_mipmap_tree *mt)
> +brw_blorp_resolve_color(struct brw_context *brw, struct
> intel_mipmap_tree *mt,
> +unsigned level, unsigned layer)
>  {
> -   DBG("%s to mt %p\n", __FUNCTION__, mt);
> +   DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer);
>
> const mesa_format format = _mesa_get_srgb_format_linear(mt->format);
>
> struct isl_surf isl_tmp[2];
> struct blorp_surf surf;
> -   unsigned level = 0;
> blorp_surf_for_miptree(brw, , mt, true,
>(1 << ISL_AUX_USAGE_CCS_E) |
>(1 << ISL_AUX_USAGE_CCS_D),
> -  , 0 /* start_layer */, 1 /* num_layers */,
> +  , layer, 1 /* num_layers */,
>isl_tmp);
>
> enum blorp_fast_clear_op resolve_op;
> @@ -971,7 +974,7 @@ brw_blorp_resolve_color(struct brw_context *brw,
> struct intel_mipmap_tree *mt)
>
> struct blorp_batch batch;
> blorp_batch_init(>blorp, , brw, 0);
> -   blorp_ccs_resolve(, , 0 /* level */, 0 /* layer */,
> +   blorp_ccs_resolve(, , level, layer,
>   brw_blorp_to_isl_format(brw, format, true),
>   resolve_op);
> blorp_batch_finish();
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
> b/src/mesa/drivers/dri/i965/brw_blorp.h
> index abf3956..277b00e 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.h
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
> @@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw, struct
> gl_framebuffer *fb,
>
>  void
>  brw_blorp_resolve_color(struct brw_context *brw,
> -struct intel_mipmap_tree *mt);
> +struct intel_mipmap_tree *mt,
> +unsigned level, unsigned layer);
>

Would it be better to make this start_layer and num_layers and do the
looping in blorp?


>
>  void
>  intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c
> b/src/mesa/drivers/dri/i965/brw_context.c
> index 3f88f7f..b0e762b 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -316,8 +316,9 @@ intel_update_state(struct gl_context * ctx, GLuint
> new_state)
>  intel_renderbuffer(fb->_ColorDrawBuffers[i]);
>
>   if (irb &&
> - intel_miptree_resolve_color(brw, irb->mt,
> - INTEL_MIPTREE_IGNORE_CCS_E))
> + intel_miptree_resolve_color(
> +brw, irb->mt, irb->mt_level, irb->mt_layer,
> +INTEL_MIPTREE_IGNORE_CCS_E))
>

Do you need to loop here?


>  brw_render_cache_set_check_flush(brw, irb->mt->bo);
>}
> }
> @@ -1349,10 +1350,13 @@ intel_resolve_for_dri2_flush(struct brw_context
> *brw,
>rb = intel_get_renderbuffer(fb, buffers[i]);
>if (rb == NULL || rb->mt == NULL)
>   continue;
> -  if (rb->mt->num_samples <= 1)
> - intel_miptree_resolve_color(brw, rb->mt, 0);
> -  else
> +  if (rb->mt->num_samples <= 1) {
> + assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
> +rb->layer_count == 1);
> + intel_miptree_resolve_color(brw, rb->mt, 0, 0, 0);
> +  } else {
>

[Mesa-dev] [v2 04/17] i965: Provide slice details to color resolver

2016-11-23 Thread Topi Pohjolainen 
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_blorp.c | 15 +--
 src/mesa/drivers/dri/i965/brw_blorp.h |  3 ++-
 src/mesa/drivers/dri/i965/brw_context.c   | 14 +-
 src/mesa/drivers/dri/i965/intel_blit.c|  4 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27 +--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  1 +
 6 files changed, 48 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 9a849f5..99df21e 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -213,7 +213,10 @@ blorp_surf_for_miptree(struct brw_context *brw,
  if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E))
 flags |= INTEL_MIPTREE_IGNORE_CCS_E;
 
- intel_miptree_resolve_color(brw, mt, flags);
+ for (unsigned i = 0; i < num_layers; i++) {
+intel_miptree_resolve_color(brw, mt,
+*level, start_layer + i, flags);
+ }
 
  assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED);
  surf->aux_usage = ISL_AUX_USAGE_NONE;
@@ -942,19 +945,19 @@ brw_blorp_clear_color(struct brw_context *brw, struct 
gl_framebuffer *fb,
 }
 
 void
-brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt)
+brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,
+unsigned level, unsigned layer)
 {
-   DBG("%s to mt %p\n", __FUNCTION__, mt);
+   DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer);
 
const mesa_format format = _mesa_get_srgb_format_linear(mt->format);
 
struct isl_surf isl_tmp[2];
struct blorp_surf surf;
-   unsigned level = 0;
blorp_surf_for_miptree(brw, , mt, true,
   (1 << ISL_AUX_USAGE_CCS_E) |
   (1 << ISL_AUX_USAGE_CCS_D),
-  , 0 /* start_layer */, 1 /* num_layers */,
+  , layer, 1 /* num_layers */,
   isl_tmp);
 
enum blorp_fast_clear_op resolve_op;
@@ -971,7 +974,7 @@ brw_blorp_resolve_color(struct brw_context *brw, struct 
intel_mipmap_tree *mt)
 
struct blorp_batch batch;
blorp_batch_init(>blorp, , brw, 0);
-   blorp_ccs_resolve(, , 0 /* level */, 0 /* layer */,
+   blorp_ccs_resolve(, , level, layer,
  brw_blorp_to_isl_format(brw, format, true),
  resolve_op);
blorp_batch_finish();
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h 
b/src/mesa/drivers/dri/i965/brw_blorp.h
index abf3956..277b00e 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw, struct 
gl_framebuffer *fb,
 
 void
 brw_blorp_resolve_color(struct brw_context *brw,
-struct intel_mipmap_tree *mt);
+struct intel_mipmap_tree *mt,
+unsigned level, unsigned layer);
 
 void
 intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index 3f88f7f..b0e762b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -316,8 +316,9 @@ intel_update_state(struct gl_context * ctx, GLuint 
new_state)
 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
 
  if (irb &&
- intel_miptree_resolve_color(brw, irb->mt,
- INTEL_MIPTREE_IGNORE_CCS_E))
+ intel_miptree_resolve_color(
+brw, irb->mt, irb->mt_level, irb->mt_layer,
+INTEL_MIPTREE_IGNORE_CCS_E))
 brw_render_cache_set_check_flush(brw, irb->mt->bo);
   }
}
@@ -1349,10 +1350,13 @@ intel_resolve_for_dri2_flush(struct brw_context *brw,
   rb = intel_get_renderbuffer(fb, buffers[i]);
   if (rb == NULL || rb->mt == NULL)
  continue;
-  if (rb->mt->num_samples <= 1)
- intel_miptree_resolve_color(brw, rb->mt, 0);
-  else
+  if (rb->mt->num_samples <= 1) {
+ assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
+rb->layer_count == 1);
+ intel_miptree_resolve_color(brw, rb->mt, 0, 0, 0);
+  } else {
  intel_renderbuffer_downsample(brw, rb);
+  }
}
 }
 
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c 
b/src/mesa/drivers/dri/i965/intel_blit.c
index 7e97fbc..a4e1216 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -294,8 +294,8 @@ intel_miptree_blit(struct brw_context *brw,
 */
intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
-