Re: [Mesa-dev] i965: Transition depth and stencil surfaces to isl

2017-07-18 Thread Jason Ekstrand
I've read through the whole thing and given reviews on about 75% of it.  I
did have some questions though.

On Tue, Jul 18, 2017 at 1:46 AM, Topi Pohjolainen <
topi.pohjolai...@gmail.com> wrote:

> First four patches are mechanical replacing intel_mipmap_tree native
> members with equivalent found in intel_mipmap_tree::surf. This helps
> to reduce back and forth churn, i.e., helps to avoid number of
> "if (mt->surf.size > 0)"-conditionals that would get dropped in the
> end. Assumption is that this mixed used of intel_mipmap_tree::surf
> and native would be short lived.
>
> Patch number five is of the same nature - it helps to re-use current
> logic without checks for isl. Once all surfaces are transitioned it
> is pretty easy to drop intel_mipmap_tree::cpp (we might even decide
> to keep it instead of calculating it on-demand).
>
> Patches 6-15, 18 and 19 in turn introduce conditional
> "if (mt->surf.size)" blocks that can't be trivially avoided. I
> considered using isl_surf::logical_level0_px/phys_level0_sa instead
> of native intel_mipmap_tree equivalent but that gets a lot more
> complicated than simply introducing the conditional blocks that one
> removes in the end.
> These patches pave the way quite a bit also for color surfaces.
>
> Patches 16 and 17 switch stencil surfaces to isl and finally the last
> does the same for depth surfaces.
>
> Topi Pohjolainen (22):
>   i965/miptree: Switch to isl_surf::msaa_layout
>   i965/miptree: Switch to isl_surf::samples
>   i965/miptree: Switch to isl_surf::tiling
>   i965/miptree: Switch to isl_surf::row_pitch
>   i965/miptree: Store chars-per-pixel even for isl based
>   i965: Prepare blit engine for isl based miptrees
>   i965/miptree: Prepare intel_miptree_copy() for isl based
>   i965/wm: Prepare image surfaces for isl based
>   i965: Prepare tex (sub)image for isl based
>   i965: Refactor miptree to isl converter and adjustment
>   i965: Prepare tex, img and rt state emission for isl based miptrees
>   i965: Prepare image setup from miptree for isl based
>   i965/fbo: Add support for isl-based miptrees in rb wrapper
>   i965/miptree: Add support for imported bo offsets for isl based
>   i965/miptree: Prepare compressed offsets for isl based
>   i965/miptree: Represent w-tiled stencil surfaces with isl
>   i965/miptree: Represent y-tiled stencil copies with isl
>   i965/miptree: Prepare aux state map for isl based
>   i965/miptree: Prepare 3D surfaces with physical 2D layout
>   intel/isl/gen4: Represent cube maps with 3D layout
>   i965: Drop redundant check for non-tiled depth buffer
>   i965: Represent depth surfaces with isl
>
>  src/intel/isl/isl.c  |  40 +-
>  src/mesa/drivers/dri/i965/brw_blorp.c|  19 +-
>  src/mesa/drivers/dri/i965/brw_clear.c|   5 +-
>  src/mesa/drivers/dri/i965/brw_context.c  |   2 +-
>  src/mesa/drivers/dri/i965/brw_meta_util.c|   2 +-
>  src/mesa/drivers/dri/i965/brw_misc_state.c   |  11 +-
>  src/mesa/drivers/dri/i965/brw_tex_layout.c   |  41 +-
>  src/mesa/drivers/dri/i965/brw_wm.c   |   6 +-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 154 ---
>  src/mesa/drivers/dri/i965/gen6_depth_state.c |   5 +-
>  src/mesa/drivers/dri/i965/gen7_misc_state.c  |  22 +-
>  src/mesa/drivers/dri/i965/gen8_depth_state.c |  31 +-
>  src/mesa/drivers/dri/i965/intel_blit.c   | 107 +++--
>  src/mesa/drivers/dri/i965/intel_blit.h   |  21 +-
>  src/mesa/drivers/dri/i965/intel_fbo.c|  19 +-
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 505
> +--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h|  81 +---
>  src/mesa/drivers/dri/i965/intel_pixel_bitmap.c   |   4 +-
>  src/mesa/drivers/dri/i965/intel_pixel_copy.c |   2 +-
>  src/mesa/drivers/dri/i965/intel_pixel_read.c |  10 +-
>  src/mesa/drivers/dri/i965/intel_screen.c |  22 +-
>  src/mesa/drivers/dri/i965/intel_tex_image.c  |  36 +-
>  src/mesa/drivers/dri/i965/intel_tex_subimage.c   |  18 +-
>  src/mesa/drivers/dri/i965/intel_tiled_memcpy.c   |  12 +-
>  src/mesa/drivers/dri/i965/intel_tiled_memcpy.h   |   4 +-
>  25 files changed, 637 insertions(+), 542 deletions(-)
>
> --
> 2.11.0
>
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[Mesa-dev] i965: Transition depth and stencil surfaces to isl

2017-07-18 Thread Topi Pohjolainen
First four patches are mechanical replacing intel_mipmap_tree native
members with equivalent found in intel_mipmap_tree::surf. This helps
to reduce back and forth churn, i.e., helps to avoid number of
"if (mt->surf.size > 0)"-conditionals that would get dropped in the
end. Assumption is that this mixed used of intel_mipmap_tree::surf
and native would be short lived.

Patch number five is of the same nature - it helps to re-use current
logic without checks for isl. Once all surfaces are transitioned it
is pretty easy to drop intel_mipmap_tree::cpp (we might even decide
to keep it instead of calculating it on-demand).

Patches 6-15, 18 and 19 in turn introduce conditional
"if (mt->surf.size)" blocks that can't be trivially avoided. I
considered using isl_surf::logical_level0_px/phys_level0_sa instead
of native intel_mipmap_tree equivalent but that gets a lot more
complicated than simply introducing the conditional blocks that one
removes in the end.
These patches pave the way quite a bit also for color surfaces.

Patches 16 and 17 switch stencil surfaces to isl and finally the last
does the same for depth surfaces.

Topi Pohjolainen (22):
  i965/miptree: Switch to isl_surf::msaa_layout
  i965/miptree: Switch to isl_surf::samples
  i965/miptree: Switch to isl_surf::tiling
  i965/miptree: Switch to isl_surf::row_pitch
  i965/miptree: Store chars-per-pixel even for isl based
  i965: Prepare blit engine for isl based miptrees
  i965/miptree: Prepare intel_miptree_copy() for isl based
  i965/wm: Prepare image surfaces for isl based
  i965: Prepare tex (sub)image for isl based
  i965: Refactor miptree to isl converter and adjustment
  i965: Prepare tex, img and rt state emission for isl based miptrees
  i965: Prepare image setup from miptree for isl based
  i965/fbo: Add support for isl-based miptrees in rb wrapper
  i965/miptree: Add support for imported bo offsets for isl based
  i965/miptree: Prepare compressed offsets for isl based
  i965/miptree: Represent w-tiled stencil surfaces with isl
  i965/miptree: Represent y-tiled stencil copies with isl
  i965/miptree: Prepare aux state map for isl based
  i965/miptree: Prepare 3D surfaces with physical 2D layout
  intel/isl/gen4: Represent cube maps with 3D layout
  i965: Drop redundant check for non-tiled depth buffer
  i965: Represent depth surfaces with isl

 src/intel/isl/isl.c  |  40 +-
 src/mesa/drivers/dri/i965/brw_blorp.c|  19 +-
 src/mesa/drivers/dri/i965/brw_clear.c|   5 +-
 src/mesa/drivers/dri/i965/brw_context.c  |   2 +-
 src/mesa/drivers/dri/i965/brw_meta_util.c|   2 +-
 src/mesa/drivers/dri/i965/brw_misc_state.c   |  11 +-
 src/mesa/drivers/dri/i965/brw_tex_layout.c   |  41 +-
 src/mesa/drivers/dri/i965/brw_wm.c   |   6 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 154 ---
 src/mesa/drivers/dri/i965/gen6_depth_state.c |   5 +-
 src/mesa/drivers/dri/i965/gen7_misc_state.c  |  22 +-
 src/mesa/drivers/dri/i965/gen8_depth_state.c |  31 +-
 src/mesa/drivers/dri/i965/intel_blit.c   | 107 +++--
 src/mesa/drivers/dri/i965/intel_blit.h   |  21 +-
 src/mesa/drivers/dri/i965/intel_fbo.c|  19 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 505 +--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h|  81 +---
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c   |   4 +-
 src/mesa/drivers/dri/i965/intel_pixel_copy.c |   2 +-
 src/mesa/drivers/dri/i965/intel_pixel_read.c |  10 +-
 src/mesa/drivers/dri/i965/intel_screen.c |  22 +-
 src/mesa/drivers/dri/i965/intel_tex_image.c  |  36 +-
 src/mesa/drivers/dri/i965/intel_tex_subimage.c   |  18 +-
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.c   |  12 +-
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.h   |   4 +-
 25 files changed, 637 insertions(+), 542 deletions(-)

-- 
2.11.0

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