ok sorry for sending you broken code
this patch is a modified version of the last one (i attached a diff
between the two patches)
the old version might create invalid instruction groups in certain
situations
Regards,
Stephan Schmid
Am 25.07.2010 11:43, schrieb Stephan Schmid:
Am 25.07.2010 06:45, schrieb Jerome Glisse:
On 07/24/2010 09:46 AM, Stephan Schmid wrote:
Hello,
i've created a patch that implements the LIT instuction in r600g
Cheers,
Stephan Schmid
Avoid the // for comment otherwise looks good will test
on monday.
Please resend using git format-patch and make sure you
use proper GIT AUTHOR, COMMIT env variable so patch
is properly attributed to you.
Thanks,
Jerome
ok, it now uses /*...*/-style-comments
Regards,
Stephan Schmid
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From 3e3193cdbb084ddd62b04d57b6a6826416c037f4 Mon Sep 17 00:00:00 2001
From: Stephan Schmid stephan_2...@gmx.de
Date: Mon, 26 Jul 2010 07:52:12 +0200
Subject: [PATCH] r600g: implememt the LIT instruction
---
src/gallium/drivers/r600/r600_shader.c | 120 +++-
1 files changed, 119 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index e865f01..1529192 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -583,6 +583,124 @@ static int tgsi_slt(struct r600_shader_ctx *ctx)
return 0;
}
+static int tgsi_lit(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = ctx-parse.FullToken.FullInstruction;
+ struct r600_bc_alu alu;
+
+ int r;
+
+
+ if (inst-Dst[0].Register.WriteMask (1 0))
+ {
+ /* dst.x, - 1.0 */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.src[0].sel = 249; /*1.0*/
+ alu.src[0].chan = 0;
+ r = tgsi_dst(ctx, inst-Dst[0], 0, alu.dst);
+ if (r)
+ return r;
+ if ((inst-Dst[0].Register.WriteMask 0xe) == 0)
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+
+ if (inst-Dst[0].Register.WriteMask (1 1))
+ {
+ /* dst.y = max(src.x, 0.0) */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX;
+ r = tgsi_src(ctx, inst-Src[0], 0, alu.src[0]);
+ if (r)
+ return r;
+ alu.src[1].sel = 248; /*0.0*/
+ alu.src[1].chan = 0;
+ r = tgsi_dst(ctx, inst-Dst[0], 1, alu.dst);
+ if (r)
+ return r;
+ if ((inst-Dst[0].Register.WriteMask 0xa) == 0)
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ if (inst-Dst[0].Register.WriteMask (1 3))
+ {
+ /* dst.w, - 1.0 */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.src[0].sel = 249;
+ alu.src[0].chan = 0;
+ r = tgsi_dst(ctx, inst-Dst[0], 3, alu.dst);
+ if (r)
+ return r;
+ if ((inst-Dst[0].Register.WriteMask 0x4) == 0)
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+
+ if (inst-Dst[0].Register.WriteMask (1 2))
+ {
+ /* dst.z = log(src.y) */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED;
+ r = tgsi_src(ctx, inst-Src[0], 1, alu.src[0]);
+ if (r)
+ return r;
+ r = tgsi_dst(ctx, inst-Dst[0], 2, alu.dst);
+ if (r)
+ return r;
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+
+ int chan = alu.dst.chan;
+ int sel = alu.dst.sel;
+
+ /* tmp.x = amd MUL_LIT(src.w, dst.z, src.x ) */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
+ r = tgsi_src(ctx, inst-Src[0], 3, alu.src[0]);
+ if (r)
+ return r;
+ alu.src[1].sel = sel;
+ alu.src[1].chan = chan;
+ r = tgsi_src(ctx, inst-Src[0], 0, alu.src[2]);
+ if (r)
+ return r;
+ alu.dst.sel = ctx-temp_reg;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+ alu.is_op3 = 1;
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+
+ /* dst.z = exp(tmp.x) */
+ memset(alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE;
+ alu.src[0].sel = ctx-temp_reg;
+ alu.src[0].chan = 0;
+ r = tgsi_dst(ctx, inst-Dst[0], 2, alu.dst);
+ if (r)
+ return r;
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx-bc, alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
static int tgsi_trans(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = ctx-parse.FullToken.FullInstruction;
@@ -735,7 +853,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_ARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_MOV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2},
- {TGSI_OPCODE_LIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP,
