Re: My MSX project + protect mode

1999-02-10 Thread shevek

On Sat, 28 Nov 1998, Jun-Sung Kim wrote:

> Date: Sat, 28 Nov 1998 10:33:42 +0900 (KST)
> From: Jun-Sung Kim <[EMAIL PROTECTED]>
> Reply-To: [EMAIL PROTECTED]
> To: [EMAIL PROTECTED]
> Subject: Re: My MSX project + protect mode
> 
> 
> Hi,
> 
>  Lately about the protected mode...
> 
>  If you want to implement it, minimize it.
> The reason that I like MSX, is the full controllability. MSX is a
> PERSONAL Computer, so all results are responsible to the user.
> 
>  Well, it may be also good to prevent the important system area
> being crushed in another point of view. Then I suggest that
> just some memory space can be protected optionally. In AHDL style :),
> 
>  mem_protect = ( A[31] == b"1" ) and not(super);
> 
>  The simplest way! ( I like always "simple" :)
> 
>  By the way, did you fix the memory usage(physical/logical memory
> configurations) and the slot pin assignment? 
> 
>  - Jun.

If you want to make a new memory-configuration, and it should be
multitasking (please, make it linux-like and not windows-like), I have a
tip for you that most pc-programmers will not agree with:
Make it possible to use segments. What I mean is you can set some register
outside the cpu on a value rg and if an address ad is asked by the cpu,
the address that is actually read out is ad+mf*rg, where mf is a
multiplying factor, prefferibly smaller than 64 (use a power of 2 of
course, so you don't actually have to multiply). This makes it possible to
load a program into just about any address, and start it from wherever you
want the origin to be. If you would use standard msx-memory configuration
for multitasking, you would have to use at least 16kB for every task, no
matter how small. It's not too hard to implement, but it makes life much
easier for programmers. (I don't know why pc-programmers always say
segments are the worst thing ever invented...)

Bye,
shevek




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Re: My MSX project + protect mode

1999-02-10 Thread M . K . t . Huurne


> Make it possible to use segments. What I mean is you can set some register
> outside the cpu on a value rg and if an address ad is asked by the cpu,
> the address that is actually read out is ad+mf*rg, where mf is a
> multiplying factor, prefferibly smaller than 64 (use a power of 2 of
> course, so you don't actually have to multiply).

Why a small value like 64? A Z380 based system will probably have a 
memory size in the order of megabytes, so a value like 64K will be 
acceptable as well.
Ofcourse, if a value of 1 is possible, that would be ideal, but maybe 
that will make hardware implementation too complex.

> It's not too hard to implement, but it makes life much
> easier for programmers.

Implementation may be simple, but it may have drastic impact on de 
speed of the system. Memory accesses are very important for how fast 
a system runs (every instruction must be fetched from memory). If the 
adding of a segment offset takes additional clockticks for every 
memory access, it will seriously slow down the system.

There are other ways of solving problems with relocation:
- Using relative addressing most of the time. For example JR and 
DJNZ, but also using IX and IY registers. Z380 has stackpointer 
relative addressing, which makes building compilers much easier.
- Filling in the right absolute addresses after loading an executable. If a 
standardized mechanism is used for this, it is only a small burden.

> (I don't know why pc-programmers always say
> segments are the worst thing ever invented...)

The decision of 16 bytes increments for segments was wrong. That 
decision is the reason x86 real mode can only address 1024K, so 
indirectly it is responsible for the hated 640K boundary.

Bye,
Maarten


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Re: My MSX project + protect mode

1999-02-10 Thread Patriek Lesparre

Shevek wrote:
>If you want to make a new memory-configuration, and it should be
>multitasking (please, make it linux-like and not windows-like), 

I agree with this.

>I have a
>tip for you that most pc-programmers will not agree with:
>Make it possible to use segments. 

N!! Not segments!!! :(

>(I don't know why pc-programmers always say
>segments are the worst thing ever invented...)

Well, maybe because they KNOW WHAT THEY'RE TALKING ABOUT!? Segments are
about the crappiest thing you can imagine...

Z380 allows fully relocatable programs, it has JR and CALR (CALL relative!)
that can jump 8MB in either direction!

Greetz,

Patriek

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|  '--.|   __   \  \__/ www.xs4all.nl/~newimage/  / human, but to really
|   __||  |  |  |  ,--. E-mail:   \ fuck things up, you
|  |   |  |  |  |  |  | [EMAIL PROTECTED]/ need a computer."
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\_|  || The New Image -since 1991-/  Secret Agent W7


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Re: My MSX project + protect mode

1999-02-10 Thread Valery

Hi All

I do not  answer on Your letters. Because they have no any questions. Indeed
I attentively read them.
Thank you very mutch For  help :-)

Valery



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Re: My MSX project + protect mode

1999-02-10 Thread Valery



>I have a slightly different idea. Allow write protect option for a part of
>the RAM. Just like turbo R BIOS in DRAM, or ESE-SCC in ROM mode.
>


Can You Write me about details?
Valery




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Re: My MSX project

1999-02-10 Thread Valery


Hi 

> There are several I/O controller chips for PC. I consider to use 
>PC87309 of National Semiconductor. It includes keyboard/mouse
>controller, floppy disk controller, parallel and serial ports.
>

How about hardware compatibility. PC87.. have own i/o adress space.
KBD is it problem  too. RS232 must +-12V. ( I like more RS422 )

Valery



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Re: My MSX project + protect mode

1999-02-10 Thread Jun-Sung Kim


Hi,

 Lately about the protected mode...

 If you want to implement it, minimize it.
The reason that I like MSX, is the full controllability. MSX is a
PERSONAL Computer, so all results are responsible to the user.

 Well, it may be also good to prevent the important system area
being crushed in another point of view. Then I suggest that
just some memory space can be protected optionally. In AHDL style :),

 mem_protect = ( A[31] == b"1" ) and not(super);

 The simplest way! ( I like always "simple" :)

 By the way, did you fix the memory usage(physical/logical memory
configurations) and the slot pin assignment? 

 - Jun.



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Re: My MSX project + protect mode

1999-02-10 Thread Maarten ter Huurne

At 10:35 AM 11/25/98 +0600, you wrote:

>As possible do protected mode?
>
>Why? For raising system reliability.
>
>Processor Must have 2 modes system and user. Bit "super"
>In the field of memories is conducted place which is only read in mode
>"user".
>If processor causes function of system that super=on. Access To registers of
>governing protection of memory possible in this mode only.
>Preceding mode returns When leaving

I have a slightly different idea. Allow write protect option for a part of
the RAM. Just like turbo R BIOS in DRAM, or ESE-SCC in ROM mode.

Advantages:
- not only system code can be protected, but all code (incl user code)
- probably simpler to implement,
  because mode switching is not necessary for every system call
Disadvantages:
- system data is not protected

>Be
>also possibility to lengthen mapper before 16 bits of command Z80 will be
>able to change only younger byte, Z380 both using OUTW

If a programmer wants to use more than 4MB of memory (limit of 8-bit mapper
port), I don't think he'll want anything else than linear memory. In other
words, 16-bit mapper port has a low practical value.

Bye,
Maarten



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Re: My MSX project + protect mode

1999-02-10 Thread Valery


Hi,


> If you want to implement it, minimize it.
>The reason that I like MSX, is the full controllability. MSX is a
>PERSONAL Computer, so all results are responsible to the user.


I want to make protect mode not for user. It will be for crash-programm.
User can free to change "super" bit.

>
>
> mem_protect = ( A[31] == b"1" ) and not(super);
>

If will be crash a programm. She can write to area Where A31 == 0. I wilI be
to make it ease.

>
> By the way, did you fix the memory usage(physical/logical memory
>configurations) and the slot pin assignment?


Not at all.  More MSX users offer using PCI. I can not to dare. It will be
dearly.
On the other hand this minimum current standard. And can be we emergency its
use.
Presently we do mother-board but we will come to do and graphic card.
v9990 this not that needed me. But I sees difficulties in use PC-graph-card.
Inconsistency with each other one of them. On this PCI not it is necessary


Valery



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Re: My MSX project

1999-02-10 Thread Jun-Sung Kim


Hi MSXers,

> 
> > Do you mean that 00-3F can be used both for linear addressing
> >and memory mapping (MSX2 standard)?
> 
> 
> Yes
> 
> Do You think on other?
> 
 I, myself, thought to make two separate memories.
 When access below 64KB space, memory module A(4MB, memory mapper,
MSX2 standard) is accessed. Otherwise, memory module B(16MB or more
for Z380) is accessed. In other words, same physical memory location
is not accessed via two different address.

 My approach wastes 64KB of memory module B. But it's possible to
use the space as usefull system memory.

 Just one suggestion.

> 
> > How about to use super I/O controller chip for PC?
> >
> 
> Where to take a specification and chips themselves?
> That this gives?
> 
 There are several I/O controller chips for PC. I consider to use 
PC87309 of National Semiconductor. It includes keyboard/mouse
controller, floppy disk controller, parallel and serial ports.

> Yes This is one variant. The Second variant when Z8 itself as PPI, it is
> more better.
> 
 OK. The second one is better. Complete compatibility to both side,
PPI and KBD.

Greetings,

   - Jun.



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Re: My MSX project + protect mode

1999-02-10 Thread shevek

On Tue, 1 Dec 1998, Patriek Lesparre wrote:

> Date: Tue, 01 Dec 1998 04:54:43 +0100
> From: Patriek Lesparre <[EMAIL PROTECTED]>
> Reply-To: [EMAIL PROTECTED]
> To: [EMAIL PROTECTED]
> Subject: Re: My MSX project + protect mode
> 
> Shevek wrote:
> >If you want to make a new memory-configuration, and it should be
> >multitasking (please, make it linux-like and not windows-like), 
> 
> I agree with this.
> 
> >I have a
> >tip for you that most pc-programmers will not agree with:
> >Make it possible to use segments. 
> 
> N!! Not segments!!! :(
> 
> >(I don't know why pc-programmers always say
> >segments are the worst thing ever invented...)
> 
> Well, maybe because they KNOW WHAT THEY'RE TALKING ABOUT!? Segments are
> about the crappiest thing you can imagine...
I still don't see why...

> Z380 allows fully relocatable programs, it has JR and CALR (CALL relative!)
> that can jump 8MB in either direction!
In that case, I agree, you don't need segments.

> Greetz,
> 
>   Patriek

Bye,
shevek



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Re: My MSX project + protect mode

1999-02-10 Thread Maarten ter Huurne

At 08:46 PM 11/26/98 +0600, you wrote:

>>I have a slightly different idea. Allow write protect option for a part of
>>the RAM. Just like turbo R BIOS in DRAM, or ESE-SCC in ROM mode.
>
>Can You Write me about details?

Using write protect:
Let's say you have a Z380 system with 4MB RAM, at addresses 00-3F.
System software code is 256K in size, system software data is another 256K.
The code is placed at 00-03, the data at 04-07.
You can choose to write protect only 00-03, giving low protection
but less overhead, or write protect entire 00-07 area, giving
better protection but demanding the system software to turn off write
protect before modifying its data and turning write protect on afterwards.

Implementing write protect:
You could use a address mask, allowing only sizes that are a power of 2 to
be write protected (..., 01, 02, 04, ...). I think you
suggested something like that in your previous message, but I'm not sure I
understood all of it.
A more flexible way is to make segments of a fixed size, and decide per
segment wether it can be written or not. Segment size could be 64K for
example. This would be very flexible:
- you can protect variable sizes of memory (not just powers of 2)
- in a multitasking system, you could write protect memory of idle tasks
But the costs are also high: you have to do a table lookup for every memory
access. Unless you can implement this very fast in hardware, it would bring
down system performance a lot.

How to handle an illegal memory write:
I see two options:
- Ignore the write attempt. This can be done by not sending the memory IC
the write enable signal. Advantage: simple to implement. Disadvantage: the
user won't know a program is behaving badly.
- Generate some kind of exception. For example, generate an interrupt and
use a certain flag to incidate a write violation. The operating system can
act upon this, for example by shutting down the offending program.

If you have more questions, please ask them.

Bye,
Maarten



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My MSX project + protect mode

1999-02-10 Thread Valery

Hi

As possible do protected mode?

Why? For raising system reliability.

Processor Must have 2 modes system and user. Bit "super"
In the field of memories is conducted place which is only read in mode
"user".
If processor causes function of system that super=on. Access To registers of
governing protection of memory possible in this mode only.
Preceding mode returns When leaving

That this for registers?

For example:

Mapper Mask Register MMR[7..0] Kernel will be able to select necessary
amount of pages for MSX & DOS2

MMR[].d=d[7..0];
MMR[].clk=/IOWR;
MMR[].ena=(A[7..0]==  {   adres of MMR  } );
MMR[].reset=reset;

IF  super THEN
mask[7..0]=B""
ELSE
mask[7..0]=MMR[7..0].q
END IF;

Cycle write to mapper
Mapper[7..0]=d[7..0] and not(mask[7..0]);
Cycle read to mapper
d[7..0]=Mapper[7..0] or mask[7..0];

Example two: Kernel can protect upper area memories by permit 16 kb ( pseudo
ROM )

MemoryProtectRegister MPR[7..0]

LoMem=(A[23..16]==0)

IF LoMem THEN
 IMA[21..14]=mapper[7..0];-- IMA is internel adress
ELSE
 IMA[21..14]=A[21..14];
END IF;

mem_protect=( IMA[21..14]=> MPR[7..0].q) and not(super);

Example3: Protect invalid -opcode vector

mem_protect=(A[23..2]==0) & not(super)

If think possible to do anything else. Main that this was not complex. Be
also possibility to lengthen mapper before 16 bits of command Z80 will be
able to change only younger byte, Z380 both using OUTW

But that will say you ? :)

Valery





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My MSX project - Protect mode

1999-02-10 Thread Valery

Hi

As possible do protected mode?

Why? For raising system reliability.

Processor Must have 2 modes system and user. Bit "super"
In the field of memories is conducted place which is only read in mode
"user".
If processor causes function of system that super=on. Access To registers of
governing protection of memory possible in this mode only.
Preceding mode returns When leaving

That this for registers?

For example:

Mapper Mask Register MMR[7..0] Kernel will be able to select necessary
amount of pages for MSX & DOS2

MMR[].d=d[7..0];
MMR[].clk=/IOWR;
MMR[].ena=(A[7..0]==  {   adres of MMR  } );
MMR[].reset=reset;

IF  super THEN
mask[7..0]=B""
ELSE
mask[7..0]=MMR[7..0].q
END IF;

Cycle write to mapper
Mapper[7..0]=d[7..0] and not(mask[7..0]);
Cycle read to mapper
d[7..0]=Mapper[7..0] or mask[7..0];

Example two: Kernel can protect upper area memories by permit 16 kb ( pseudo
ROM )

MemoryProtectRegister MPR[7..0]

LoMem=(A[23..16]==0)

IF LoMem THEN
 IMA[21..14]=mapper[7..0];-- IMA is internel adress
ELSE
 IMA[21..14]=A[21..14];
END IF;

mem_protect=( IMA[21..14]=> MPR[7..0].q) and not(super);

Example3: Protect invalid -opcode vector

mem_protect=(A[23..2]==0) & not(super)

If think possible to do anything else. Main that this was not complex. Be
also possibility to lengthen mapper before 16 bits of command Z80 will be
able to change only younger byte, Z380 both using OUTW

But that will say you ? :)

Valery




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Re: My MSX project

1999-02-10 Thread Jun-Sung Kim


Hi,

> 
> Hi
> I wrote I want build MSX-3 ( non  ASCII standart )
> I wrote FPGA-Mem memory controller for my MSX3 computer. It take
> EPM7128SLC84. I writing other FPGA-IO now.
> 
> FPGA-Mem specification:
> Using one or two 16Mbit 60-nc DRAM 1MbX16Bits
> 
> Z380 Memory map
> 
> 00-00MSX MEMORY
> 01-3FDRAM (2MB x 16Bit)
> 40-7FEXTENDED MSX SLOT 0
> 80-BFEXTENDED MSX SLOT2
> C0-FFINTERNAL MSX SLOT ( FOR FLASH ROM DISK)
> 
 What is the EXTENDED MSX SLOT and what's the difference between 40-
and 80- ?

 Also why INTERNAL MSX SLOT is needed?

 Hmm.. it is possible for me to misunderstand your SLOT concept.

> MSX MEMORY
> -0003ROM-BIOS -- for invalid opcode exeption
> 0004-3FFF   CS0
> 4000-7FFF   CS1
> 8000-BFFF  CS2
> C000- CS3
> 
 I think that the first 64KB should be same as MSX standard. So
we need not to discuss this address space. Right?

> CS[0..3] tru via port A8 & mapper. Y can using mapper for acces
> 00-3F DRAM
> 
 Do you mean that 00-3F can be used both for linear addressing
and memory mapping (MSX2 standard)?

> SLOT [A8] MAP control FLASH ROM 128KB
> 
> SLT0 CS0 BIOS
> SLT0 CS1BASIC
> SLT1 CS0XBIOS
>
 What's XBIOS? New BIOS for the new standard?

> SLT1 CS1BDOS
> SLT2 CS1DOS2  ( 64KB controll 4104H )
  ^^^
I'm sorry? What does it mean?

> SLT3 CS[0..3] MAPPER DRAMM ACCES
> 
> I want place into the FPGA-Mem  MEMORY and I/O acces-NMI trapper.
> 
> Other FPGA will has EPP , SLOTS ARBITR, I/O decoder for VDP, IDE, 85C30
> serial, CMOS, AY and KBD .
>
 How about to use super I/O controller chip for PC?

> KBD controller will use Z8 microcontroller for PC-KBD to MSX-KBD and
> MS-mouse to MSX-mouse convertions.
> 
 The problem of KBD is that MSX does not have KBD connector. Also
MSX controls KBD through PPI. How do you connect the converter to
PPI?

> Extended MSX slot it is my last problemm.  We want compatibility. And We can
> take 62pins ISA connector. Get out 51,52 pins and insert wall.
> 
> 1   2
>   
>   |   |
>   |   |
>   
> 
>   
>   |   |
>   |   |   49,50
>      wall
>   |   |   53,54 Extended MSX
>   |   |
>   |   |   61,62
>   
> 
> Extended MSX must has,
> A[16..23],D[8..15],/BLEN,/BHEN,/IORD,/IOWR,/MRD,/MWR,/MSIZE,/BREQ,/BACK (It
> is 25 pins) .But Extended part has 10 pins. MSX slot has two-spare , /rfsh
> ... it is all. May be We can use SW1,SW2,-12, +12, sound in  e.t.c
>
 Make another different slot for new standard. PC has several types of
slots (XT ISA, AT ISA, PCI, AGP, ... etc. )

> We can take PCI or PCMCIA conector or make PCMCIA slot. I do not know yet.
> We did want make PCI slot but It will hi-cost.
> 
 In my opinion, MSX should be simple. Should such slots be included?
To tell the truth, I hate PCI protocol. ;)

 Ok. Keep you project and I think we need a lot of discusstions to prevent
creating diffrent MSX standards.

Greetings,

- Jun.



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Re: My MSX project

1999-02-10 Thread Valery


Hi,


> What is the EXTENDED MSX SLOT and what's the difference between 40-
>and 80- ?
>


It is  different signals /SLTSL0 and /SLTSL1 ( as beside MSX )
connected to different connectors.
To avoid decoder of address on affiliated card

> Also why INTERNAL MSX SLOT is needed?
That which be divorced on maternal charge for instance FLASH ROM 1 or 2 or
4MB
Port À8 does not let to handle such sizes. Extended slots powerfully
slow a functioning (working) a system.


> I think that the first 64KB should be same as MSX standard. So
>we need not to discuss this address space. Right?


Except cells -0004 and extended slot. Cell 0-4 needed for
wrong-instruction trap. I want that, it will be available always.


> Do you mean that 00-3F can be used both for linear addressing
>and memory mapping (MSX2 standard)?


Yes

Do You think on other?

> What's XBIOS? New BIOS for the new standard?
>

No It is MSX2 extended BIOS.

>> SLT1 CS1BDOS
>> SLT2 CS1DOS2  ( 64KB controll 4104H )
>  ^^^
>I'm sorry? What does it mean?

>

DOS2 take 64 KB ROM. But All four 16KB pages are connected from address 4000
This controls a register 4104. Anyway that DOS2 which beside me.

> How about to use super I/O controller chip for PC?
>

Where to take a specification and chips themselves?
That this gives?

> The problem of KBD is that MSX does not have KBD connector. Also
>MSX controls KBD through PPI. How do you connect the converter to
>PPI?


Yes This is one variant. The Second variant when Z8 itself as PPI, it is
more better.


> Make another different slot for new standard. PC has several types of
>slots (XT ISA, AT ISA, PCI, AGP, ... etc. )


Certainly. But I wants to take a good concept. Beside MSX slot it was.
"Cheap controllers"
I wants its save and add " Upgrade cpu via slot connector"

> In my opinion, MSX should be simple. Should such slots be included?
>To tell the truth, I hate PCI protocol. ;)

I too.
Presently I consider;examin variant amba-bus ( ARM )

It has a separate address and data. ( vs PCI )
But fast  the whole will that that its

> Ok. Keep you project and I think we need a lot of discusstions to prevent
>creating diffrent MSX standards.


I this wanted :)

Soon open FTP for my lifelengths, all will be it is available gratis.
Presently goes preliminary part a writing FPGA. I use not expensive from
ALTERA that general prime cost was not more than 100$

Valery




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My MSX project & hardware MSX mail-list

1999-02-10 Thread Valery

Hi,


Who know about MSX-hardware mail list?. If such be
There is in view of hardware development.

It is Correct have on slot-connector the pins /TREFA,/TREFC,/TREFR ?

/TREFA Timing Reference A (output, active Low, tri-state).
This timing reference signal goes Low at the end of T2 and
returns High at the end of T4 during a memory read,
memory write or refresh transaction. It can be used to
control the address multiplexer for a DRAM interface or as
the /RAS signal at higher processor clock rates.

/TREFC Timing Reference C (output, active Low, tri-state).
This timing reference signal goes Low at the end of T3 and
returns High at the end of T4 during a memory read,
memory write or refresh transaction. It can be used as the
/CAS signal for DRAM accesses.

/TREFR Timing Reference R (output, active Low, tri-state).
This timing reference signal goes Low at the end of T1 and
returns High at the end of T4 during a memory read,
memory write or refresh transaction. It can be used as the
/RAS signal for DRAM accesses.

Wanted their use. But in the mode DMA affiliated charge must their form.
This complicates its contents.

/UMCS Upper Memory Chip Select (output, active Low, tri-state).
This signal is activated during a memory read,
memory write, or optionally a refresh transaction when
accessing the highest portion of the linear address space
within the first 16 Mbytes, but only if this chip select
function is enabled.

/LMCS Low Memory Chip Select (output, active Low, tri-state).
This signal is activated during a memory read or
memory write transaction when accessing the lower por-tion
of the linear address space within the first 16 Mbytes,
but only if this chip select function is enabled.

/MCS3-/MCS0 Mid-range Memory Chip Selects (output,
active Low, tri-state). These signals are individually active
during memory read or write transactions when accessing
the mid-range portions of the linear address space within the
first 16 Mbytes. These signals can be individually enabled
or disabled.

Too the most. Why Zilog did not do a possibility of shaping these signals in
DMA mode.
Z380 in mode of seizure of buses could read address and form signals /XMCSX
:)

Bye
Valery





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My MSX project

1999-02-10 Thread Valery

Hi
I wrote I want build MSX-3 ( non  ASCII standart )
I wrote FPGA-Mem memory controller for my MSX3 computer. It take
EPM7128SLC84. I writing other FPGA-IO now.

FPGA-Mem specification:
Using one or two 16Mbit 60-nc DRAM 1MbX16Bits

Z380 Memory map

00-00MSX MEMORY
01-3FDRAM (2MB x 16Bit)
40-7FEXTENDED MSX SLOT 0
80-BFEXTENDED MSX SLOT2
C0-FFINTERNAL MSX SLOT ( FOR FLASH ROM DISK)

MSX MEMORY
-0003ROM-BIOS -- for invalid opcode exeption
0004-3FFF   CS0
4000-7FFF   CS1
8000-BFFF  CS2
C000- CS3

CS[0..3] tru via port A8 & mapper. Y can using mapper for acces
00-3F DRAM

SLOT [A8] MAP control FLASH ROM 128KB

SLT0 CS0 BIOS
SLT0 CS1BASIC
SLT1 CS0XBIOS
SLT1 CS1BDOS
SLT2 CS1DOS2  ( 64KB controll 4104H )
SLT3 CS[0..3] MAPPER DRAMM ACCES

I want place into the FPGA-Mem  MEMORY and I/O acces-NMI trapper.

Other FPGA will has EPP , SLOTS ARBITR, I/O decoder for VDP, IDE, 85C30
serial, CMOS, AY and KBD .
KBD controller will use Z8 microcontroller for PC-KBD to MSX-KBD and
MS-mouse to MSX-mouse convertions.

Extended MSX slot it is my last problemm.  We want compatibility. And We can
take 62pins ISA connector. Get out 51,52 pins and insert wall.

1   2
  
  |   |
  |   |
  

  
  |   |
  |   |   49,50
     wall
  |   |   53,54 Extended MSX
  |   |
  |   |   61,62
  

Extended MSX must has,
A[16..23],D[8..15],/BLEN,/BHEN,/IORD,/IOWR,/MRD,/MWR,/MSIZE,/BREQ,/BACK (It
is 25 pins) .But Extended part has 10 pins. MSX slot has two-spare , /rfsh
... it is all. May be We can use SW1,SW2,-12, +12, sound in  e.t.c
We can take PCI or PCMCIA conector or make PCMCIA slot. I do not know yet.
We did want make PCI slot but It will hi-cost.

Bye
Valery




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RE: My MSX project + protect mode

1999-02-10 Thread Guillermo Gonzalez Talavan



-Mensaje original-
De: [EMAIL PROTECTED] [SMTP:[EMAIL PROTECTED]]
Enviado el: lunes 30 de noviembre de 1998 12:53
Para:   [EMAIL PROTECTED]
Asunto: Re: My MSX project + protect mode


> Make it possible to use segments. What I mean is you can set some register
> outside the cpu on a value rg and if an address ad is asked by the cpu,
> the address that is actually read out is ad+mf*rg, where mf is a
> multiplying factor, prefferibly smaller than 64 (use a power of 2 of
> course, so you don't actually have to multiply).

Why a small value like 64? A Z380 based system will probably have a 
memory size in the order of megabytes, so a value like 64K will be 
acceptable as well.
Ofcourse, if a value of 1 is possible, that would be ideal, but maybe 
that will make hardware implementation too complex.
[...] 
> (I don't know why pc-programmers always say
> segments are the worst thing ever invented...)

The decision of 16 bytes increments for segments was wrong. That 
decision is the reason x86 real mode can only address 1024K, so 
indirectly it is responsible for the hated 640K boundary.

Bye,
Maarten

[Isidoro González Márquez]  I would add that the wrong decision about
8086 PC segments, which made 
them so
hated by everybody, was their 
fixed length
(64K) and the absence (lack) 
of other mecha-
nisms associated to modern 
segmentation
(memory protection, read-only 
possibility,
 etc.).

[Isidoro González Márquez]  One of the worst aspects of Z80 is the lack of
the possibility of addressing 
relative to
PC. That would make programs 
capable of running
on whatever address. 6809 was 
much better
in this aspect. The right 
solution is al-
ready invented: virtual 
memory. All programs
are written as if they were 
running on the
same address and the hardware 
makes the
translation "on the fly".

   
 Gyermo.
 

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