date:20170106

[PATCH v2 00/12] net: ethernet: aquantia: Add AQtion 2.5/5 GB NIC driver

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

This series introduced the AQtion NIC driver for the aQuantia
AQC107/AQC108 network devices.

v1: Initial version
v2: o Make necessary drivers/net/ethernet changes to integrate software
o Drop intermediate atlantic directory
o Remove Makefile things only appropriate to out of tree module builidng

David VomLehn (12):
  net: ethernet: aquantia: Make and configuration files.
  net: ethernet: aquantia: Common functions and definitions
  net: ethernet: aquantia: Add ring support code
  net: ethernet: aquantia: Low-level hardware interfaces
  net: ethernet: aquantia: Support for NIC-specific code
  net: ethernet: aquantia: Atlantic A0 and B0 specific functions.
  net: ethernet: aquantia: Vector operations
  net: ethernet: aquantia: PCI operations
  net: ethernet: aquantia: Atlantic hardware abstraction layer
  net: ethernet: aquantia: Hardware interface and utility functions
  net: ethernet: aquantia: Ethtool support
  net: ethernet: aquantia: Receive side scaling

 drivers/net/ethernet/Kconfig   |1 +
 drivers/net/ethernet/Makefile  |1 +
 drivers/net/ethernet/aquantia/Kconfig  |   24 +
 drivers/net/ethernet/aquantia/Makefile |   43 +
 drivers/net/ethernet/aquantia/aq_cfg.h |   81 +
 drivers/net/ethernet/aquantia/aq_common.h  |   22 +
 drivers/net/ethernet/aquantia/aq_ethtool.c |  250 +++
 drivers/net/ethernet/aquantia/aq_ethtool.h |   19 +
 drivers/net/ethernet/aquantia/aq_hw.h  |  169 ++
 drivers/net/ethernet/aquantia/aq_hw_utils.c|   68 +
 drivers/net/ethernet/aquantia/aq_hw_utils.h|   47 +
 drivers/net/ethernet/aquantia/aq_main.c|  298 +++
 drivers/net/ethernet/aquantia/aq_main.h|   17 +
 drivers/net/ethernet/aquantia/aq_nic.c |  964 
 drivers/net/ethernet/aquantia/aq_nic.h |  108 +
 drivers/net/ethernet/aquantia/aq_nic_internal.h|   46 +
 drivers/net/ethernet/aquantia/aq_pci_func.c|  354 +++
 drivers/net/ethernet/aquantia/aq_pci_func.h|   34 +
 drivers/net/ethernet/aquantia/aq_ring.c|  380 
 drivers/net/ethernet/aquantia/aq_ring.h|  147 ++
 drivers/net/ethernet/aquantia/aq_rss.h |   26 +
 drivers/net/ethernet/aquantia/aq_utils.h   |   53 +
 drivers/net/ethernet/aquantia/aq_vec.c |  373 +++
 drivers/net/ethernet/aquantia/aq_vec.h |   37 +
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c   |  909 
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.h   |   34 +
 .../ethernet/aquantia/hw_atl/hw_atl_a0_internal.h  |  153 ++
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.c   |  967 
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.h   |   34 +
 .../ethernet/aquantia/hw_atl/hw_atl_b0_internal.h  |  206 ++
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_llh.c  | 1395 
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_llh.h  |  677 ++
 .../ethernet/aquantia/hw_atl/hw_atl_llh_internal.h | 2375 
 .../net/ethernet/aquantia/hw_atl/hw_atl_utils.c|  544 +
 .../net/ethernet/aquantia/hw_atl/hw_atl_utils.h|  210 ++
 drivers/net/ethernet/aquantia/ver.h|   18 +
 36 files changed, 11084 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/Kconfig
 create mode 100644 drivers/net/ethernet/aquantia/Makefile
 create mode 100644 drivers/net/ethernet/aquantia/aq_cfg.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_common.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_ethtool.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_ethtool.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw_utils.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw_utils.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_main.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_main.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic_internal.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_pci_func.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_pci_func.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_ring.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_ring.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_rss.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_utils.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_vec.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_vec.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0_internal.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.c
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl

[PATCH v2 07/12] net: ethernet: aquantia: Vector operations

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add functions to manululate the vector of receive and transmit rings.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel.Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_vec.c | 373 +
 drivers/net/ethernet/aquantia/aq_vec.h |  37 
 2 files changed, 410 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_vec.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_vec.h

diff --git a/drivers/net/ethernet/aquantia/aq_vec.c 
b/drivers/net/ethernet/aquantia/aq_vec.c
new file mode 100644
index 000..a0169fe
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_vec.c
@@ -0,0 +1,373 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_vec.c: Definition of common structure for vector of Rx and Tx rings.
+ * Definition of functions for Rx and Tx rings. Friendly module for aq_nic.
+ */
+
+#include "aq_vec.h"
+#include "aq_nic.h"
+#include "aq_ring.h"
+#include "aq_hw.h"
+
+#include 
+
+struct aq_vec_s {
+   AQ_OBJ_HEADER;
+   struct aq_hw_ops *aq_hw_ops;
+   struct aq_hw_s *aq_hw;
+   struct aq_nic_s *aq_nic;
+   unsigned int tx_rings;
+   unsigned int rx_rings;
+   struct aq_ring_param_s aq_ring_param;
+   struct napi_struct napi;
+   struct aq_ring_s ring[AQ_CFG_TCS_MAX][2];
+};
+
+#define AQ_VEC_TX_ID 0
+#define AQ_VEC_RX_ID 1
+
+static int aq_vec_poll(struct napi_struct *napi, int budget)
+{
+   struct aq_vec_s *self = container_of(napi, struct aq_vec_s, napi);
+   struct aq_ring_s *ring = NULL;
+   int work_done = 0;
+   int err = 0;
+   unsigned int i = 0U;
+   unsigned int sw_tail_old = 0U;
+   bool was_tx_cleaned = false;
+   bool is_locked = false;
+
+   if (!self) {
+   err = -EINVAL;
+   goto err_exit;
+   }
+
+   is_locked = spin_trylock(&self->lock);
+   if (!is_locked) {
+   err = -EBUSY;
+   goto err_exit;
+   }
+
+   for (i = 0U, ring = self->ring[0];
+   self->tx_rings > i; ++i, ring = self->ring[i]) {
+   if (self->aq_hw_ops->hw_ring_tx_head_update) {
+   err = self->aq_hw_ops->hw_ring_tx_head_update(
+   self->aq_hw,
+   &ring[AQ_VEC_TX_ID]);
+   if (err < 0)
+   goto err_exit;
+   }
+
+   if (ring[AQ_VEC_TX_ID].sw_head != ring[AQ_VEC_TX_ID].hw_head) {
+   err = aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
+   if (err < 0)
+   goto err_exit;
+   was_tx_cleaned = true;
+   }
+
+   err = self->aq_hw_ops->hw_ring_rx_receive(self->aq_hw,
+   &ring[AQ_VEC_RX_ID]);
+   if (err < 0)
+   goto err_exit;
+
+   if (ring[AQ_VEC_RX_ID].sw_head != ring[AQ_VEC_RX_ID].hw_head) {
+   err = aq_ring_rx_clean(&ring[AQ_VEC_RX_ID], &work_done,
+  budget - work_done);
+   if (err < 0)
+   goto err_exit;
+
+   sw_tail_old = ring[AQ_VEC_RX_ID].sw_tail;
+
+   err = aq_ring_rx_fill(&ring[AQ_VEC_RX_ID]);
+   if (err < 0)
+   goto err_exit;
+
+   err = self->aq_hw_ops->hw_ring_rx_fill(self->aq_hw,
+   &ring[AQ_VEC_RX_ID], sw_tail_old);
+   if (err < 0)
+   goto err_exit;
+   }
+   }
+
+   spin_unlock(&self->lock);
+   is_locked = false;
+
+   if (was_tx_cleaned)
+   work_done = budget;
+
+   if (work_done < budget) {
+   napi_complete(napi);
+   self->aq_hw_ops->hw_irq_enable(self->aq_hw,
+ 1U << self->aq_ring_param.vec_idx);
+   }
+
+err_exit:
+   if (is_locked)
+   spin_unlock(&self->lock);
+   return work_done;
+}
+
+struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,
+ struct aq_nic_cfg_s *aq_nic_cfg)
+{
+   struct aq_vec_s *self = NULL;
+   struct aq_ring_s *ring = NULL;
+   unsigned int i = 0U;
+   int err = 0;
+
+   self = kzalloc(sizeof(*self), GFP_KERNEL);
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+
+   self->aq_nic = aq_nic;
+

[PATCH v2 11/12] net: ethernet: aquantia: Ethtool support

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add the driver interfaces required for support by the ethtool utility.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_ethtool.c | 250 +
 drivers/net/ethernet/aquantia/aq_ethtool.h |  19 +++
 2 files changed, 269 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_ethtool.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_ethtool.h

diff --git a/drivers/net/ethernet/aquantia/aq_ethtool.c 
b/drivers/net/ethernet/aquantia/aq_ethtool.c
new file mode 100644
index 000..740c9c8
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_ethtool.c
@@ -0,0 +1,250 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_ethtool.c: Definition of ethertool related functions. */
+
+#include "aq_ethtool.h"
+#include "aq_nic.h"
+
+static void aq_ethtool_get_regs(struct net_device *ndev,
+   struct ethtool_regs *regs, void *p)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   u32 regs_count = aq_nic_get_regs_count(aq_nic);
+
+   memset(p, 0, regs_count * sizeof(u32));
+   aq_nic_get_regs(aq_nic, regs, p);
+}
+
+static int aq_ethtool_get_regs_len(struct net_device *ndev)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   u32 regs_count = aq_nic_get_regs_count(aq_nic);
+
+   return regs_count * sizeof(u32);
+}
+
+static u32 aq_ethtool_get_link(struct net_device *ndev)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+
+   return aq_nic_get_link_speed(aq_nic) ? 1U : 0U;
+}
+
+static int aq_ethtool_get_settings(struct net_device *ndev,
+  struct ethtool_cmd *cmd)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+
+   cmd->port = PORT_TP;
+   cmd->transceiver = XCVR_EXTERNAL;
+
+   ethtool_cmd_speed_set(cmd, netif_carrier_ok(ndev) ?
+   aq_nic_get_link_speed(aq_nic) : 0U);
+
+   cmd->duplex = DUPLEX_FULL;
+   aq_nic_get_link_settings(aq_nic, cmd);
+   return 0;
+}
+
+static int aq_ethtool_set_settings(struct net_device *ndev,
+  struct ethtool_cmd *cmd)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+
+   return aq_nic_set_link_settings(aq_nic, cmd);
+}
+
+static const char aq_ethtool_stat_names[][ETH_GSTRING_LEN] = {
+   "InPackets",
+   "InUCast",
+   "InMCast",
+   "InBCast",
+   "InErrors",
+   "OutPackets",
+   "OutUCast",
+   "OutMCast",
+   "OutBCast",
+   "InUCastOctects",
+   "OutUCastOctects",
+   "InMCastOctects",
+   "OutMCastOctects",
+   "InBCastOctects",
+   "OutBCastOctects",
+   "InOctects",
+   "OutOctects",
+   "InPacketsDma",
+   "OutPacketsDma",
+   "InOctetsDma",
+   "OutOctetsDma",
+   "InDroppedDma",
+   "Queue[0] InPackets",
+   "Queue[0] OutPackets",
+   "Queue[0] InJumboPackets",
+   "Queue[0] InLroPackets",
+   "Queue[0] InErrors",
+#if 1 < AQ_CFG_VECS_DEF
+   "Queue[1] InPackets",
+   "Queue[1] OutPackets",
+   "Queue[1] InJumboPackets",
+   "Queue[1] InLroPackets",
+   "Queue[1] InErrors",
+#endif
+#if 2 < AQ_CFG_VECS_DEF
+   "Queue[2] InPackets",
+   "Queue[2] OutPackets",
+   "Queue[2] InJumboPackets",
+   "Queue[2] InLroPackets",
+   "Queue[2] InErrors",
+#endif
+#if 3 < AQ_CFG_VECS_DEF
+   "Queue[3] InPackets",
+   "Queue[3] OutPackets",
+   "Queue[3] InJumboPackets",
+   "Queue[3] InLroPackets",
+   "Queue[3] InErrors",
+#endif
+#if 4 < AQ_CFG_VECS_DEF
+   "Queue[4] InPackets",
+   "Queue[4] OutPackets",
+   "Queue[4] InJumboPackets",
+   "Queue[4] InLroPackets",
+   "Queue[4] InErrors",
+#endif
+#if 5 < AQ_CFG_VECS_DEF
+   "Queue[5] InPackets",
+   "Queue[5] OutPackets",
+   "Queue[5] InJumboPackets",
+   "Queue[5] InLroPackets",
+   "Queue[5] InErrors",
+#endif
+#if 6 < AQ_CFG_VECS_DEF
+   "Queue[6] InPackets",
+   "Queue[6] OutPackets",
+   "Queue[6] InJumboPackets",
+   "Queue[6] InLroPackets",
+   "Queue[6] InErrors",
+#endif
+#if 7 < AQ_CFG_VECS_DEF
+   "Queue[7] InPackets",
+   "Queue[7] OutPackets",
+   "Queue[7] InJumboPackets",
+   "Queue[7] InLroPackets",
+   "Queue[7] InErrors",
+#endif
+};
+
+static void aq_ethtool_stats(struct net_device *ndev,
+struct ethtool_stats *stats, u64 *data)
+{
+   struct aq_nic_s *aq_nic = (struct aq_ni

[PATCH v2 08/12] net: ethernet: aquantia: PCI operations

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add functions that handle the PCI bus interface.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_pci_func.c | 354 
 drivers/net/ethernet/aquantia/aq_pci_func.h |  34 +++
 2 files changed, 388 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_pci_func.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_pci_func.h

diff --git a/drivers/net/ethernet/aquantia/aq_pci_func.c 
b/drivers/net/ethernet/aquantia/aq_pci_func.c
new file mode 100644
index 000..cbbcc61
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_pci_func.c
@@ -0,0 +1,354 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_pci_func.c: Definition of PCI functions. */
+
+#include "aq_pci_func.h"
+#include "aq_nic.h"
+#include "aq_vec.h"
+#include "aq_hw.h"
+
+#include 
+#include 
+
+struct aq_pci_func_s {
+   struct pci_dev *pdev;
+   struct aq_nic_s *port[AQ_CFG_PCI_FUNC_PORTS];
+   void __iomem *mmio;
+   void *aq_vec[AQ_CFG_PCI_FUNC_MSIX_IRQS];
+   resource_size_t mmio_pa;
+   unsigned int msix_entry_mask;
+   unsigned int irq_type;
+   unsigned int ports;
+   bool is_pci_enabled;
+   bool is_regions;
+   bool is_pci_using_dac;
+   struct aq_hw_caps_s aq_hw_caps;
+   struct msix_entry msix_entry[AQ_CFG_PCI_FUNC_MSIX_IRQS];
+};
+
+struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *aq_hw_ops,
+   struct pci_dev *pdev,
+   const struct net_device_ops *ndev_ops,
+   const struct ethtool_ops *eth_ops)
+{
+   struct aq_pci_func_s *self = NULL;
+   int err = 0;
+   unsigned int port = 0U;
+
+   if (!aq_hw_ops) {
+   err = -EFAULT;
+   goto err_exit;
+   }
+   self = kzalloc(sizeof(*self), GFP_KERNEL);
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+
+   pci_set_drvdata(pdev, self);
+   self->pdev = pdev;
+
+   err = aq_hw_ops->get_hw_caps(NULL, &self->aq_hw_caps);
+   if (err < 0)
+   goto err_exit;
+
+   self->ports = self->aq_hw_caps.ports;
+
+   for (port = 0; port < self->ports; ++port) {
+   struct aq_nic_s *aq_nic = aq_nic_alloc_cold(ndev_ops, eth_ops,
+   &pdev->dev, self,
+   port, aq_hw_ops);
+
+   if (!aq_nic) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->port[port] = aq_nic;
+   }
+
+err_exit:
+   if (err < 0) {
+   if (self)
+   aq_pci_func_free(self);
+   self = NULL;
+   }
+
+   (void)err;
+   return self;
+}
+
+int aq_pci_func_init(struct aq_pci_func_s *self)
+{
+   int err = 0;
+   unsigned int bar = 0U;
+   unsigned int port = 0U;
+   unsigned int i = 0U;
+
+   err = pci_enable_device(self->pdev);
+   if (err < 0)
+   goto err_exit;
+
+   self->is_pci_enabled = true;
+
+   err = pci_set_dma_mask(self->pdev, DMA_BIT_MASK(64));
+   if (!err) {
+   err = pci_set_consistent_dma_mask(self->pdev, DMA_BIT_MASK(64));
+   self->is_pci_using_dac = 1;
+   }
+   if (err) {
+   err = pci_set_dma_mask(self->pdev, DMA_BIT_MASK(32));
+   if (!err)
+   err = pci_set_consistent_dma_mask(self->pdev,
+ DMA_BIT_MASK(32));
+   self->is_pci_using_dac = 0;
+   }
+   if (err != 0) {
+   err = -ENOSR;
+   goto err_exit;
+   }
+
+   err = pci_request_regions(self->pdev, AQ_CFG_DRV_NAME "_mmio");
+   if (err < 0)
+   goto err_exit;
+
+   self->is_regions = true;
+
+   pci_set_master(self->pdev);
+
+   for (bar = 0; bar < 4; ++bar) {
+   if (IORESOURCE_MEM & pci_resource_flags(self->pdev, bar)) {
+   resource_size_t reg_sz;
+
+   self->mmio_pa = pci_resource_start(self->pdev, bar);
+   if (self->mmio_pa == 0U) {
+   err = -EIO;
+   goto err_exit;
+   }
+
+   reg_sz = pci_resource_len(self->pdev, bar);
+   if ((reg_sz <= 24 /*ATL_REGS_SIZE*/)) {
+   err =

[PATCH v2 01/12] net: ethernet: aquantia: Make and configuration files.

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Patches to create the make and configuration files.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/Kconfig   |  1 +
 drivers/net/ethernet/Makefile  |  1 +
 drivers/net/ethernet/aquantia/Kconfig  | 24 +++
 drivers/net/ethernet/aquantia/Makefile | 43 ++
 drivers/net/ethernet/aquantia/ver.h| 18 ++
 5 files changed, 87 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/Kconfig
 create mode 100644 drivers/net/ethernet/aquantia/Makefile
 create mode 100644 drivers/net/ethernet/aquantia/ver.h

diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 8cc7467..d467c8b 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -28,6 +28,7 @@ source "drivers/net/ethernet/amazon/Kconfig"
 source "drivers/net/ethernet/amd/Kconfig"
 source "drivers/net/ethernet/apm/Kconfig"
 source "drivers/net/ethernet/apple/Kconfig"
+source "drivers/net/ethernet/aquantia/Kconfig"
 source "drivers/net/ethernet/arc/Kconfig"
 source "drivers/net/ethernet/atheros/Kconfig"
 source "drivers/net/ethernet/aurora/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index a09423d..123ef8e 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_NET_VENDOR_AMAZON) += amazon/
 obj-$(CONFIG_NET_VENDOR_AMD) += amd/
 obj-$(CONFIG_NET_XGENE) += apm/
 obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
+obj-$(CONFIG_NET_VENDOR_AQUANTIA) += aquantia/
 obj-$(CONFIG_NET_VENDOR_ARC) += arc/
 obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
 obj-$(CONFIG_NET_VENDOR_AURORA) += aurora/
diff --git a/drivers/net/ethernet/aquantia/Kconfig 
b/drivers/net/ethernet/aquantia/Kconfig
new file mode 100644
index 000..a74a4c0
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/Kconfig
@@ -0,0 +1,24 @@
+#
+# aQuantia device configuration
+#
+
+config NET_VENDOR_AQUANTIA
+   bool "aQuantia devices"
+   default y
+   ---help---
+ Set this to y if you have an Ethernet network cards that uses the 
aQuantia
+ chipset.
+
+ This option does not build any drivers; it casues the aQuantia
+ drivers that can be built to appear in the list of Ethernet drivers.
+
+
+if NET_VENDOR_AQUANTIA
+
+config AQTION
+   tristate "aQuantia AQtion Support"
+   depends on PCI
+   ---help---
+ This enables the support for the aQuantia AQtion Ethernet card.
+
+endif # NET_VENDOR_AQUANTIA
diff --git a/drivers/net/ethernet/aquantia/Makefile 
b/drivers/net/ethernet/aquantia/Makefile
new file mode 100644
index 000..412ac3b
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/Makefile
@@ -0,0 +1,43 @@
+
+#
+# aQuantia Ethernet Controller AQtion Linux Driver
+# Copyright(c) 2014-2016 aQuantia Corporation.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms and conditions of the GNU General Public License,
+# version 2, as published by the Free Software Foundation.
+#
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see .
+#
+# The full GNU General Public License is included in this distribution in
+# the file called "COPYING".
+#
+# Contact Information: 
+# aQuantia Corporation, 105 E. Tasman Dr. San Jose, CA 95134, USA
+#
+
+
+#
+# Makefile for the AQtion(tm) Ethernet driver
+#
+
+obj-$(CONFIG_AQTION) += atlantic.o
+
+atlantic-objs := aq_main.o \
+   aq_nic.o \
+   aq_pci_func.o \
+   aq_nic.o \
+   aq_vec.o \
+   aq_ring.o \
+   aq_hw_utils.o \
+   aq_ethtool.o \
+   hw_atl/hw_atl_a0.o \
+   hw_atl/hw_atl_b0.o \
+   hw_atl/hw_atl_utils.o \
+   hw_atl/hw_atl_llh.o
diff --git a/drivers/net/ethernet/aquantia/ver.h 
b/drivers/net/ethernet/aquantia/ver.h
new file mode 100644
index 000..1d414c5
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/ver.h
@@ -0,0 +1,18 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef VER_H
+#define VER_H
+
+#define NIC_MAJOR_DRIVER_VERSION   1
+#define NIC_MINOR_DRIVER_VERSION   5
+#define NIC_BUILD_DRIVER

[PATCH v2 02/12] net: ethernet: aquantia: Common functions and definitions

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add files containing the functions and definitions used in common in
different functional areas.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_cfg.h| 81 +++
 drivers/net/ethernet/aquantia/aq_common.h | 22 +
 drivers/net/ethernet/aquantia/aq_utils.h  | 53 
 3 files changed, 156 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_cfg.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_common.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_utils.h

diff --git a/drivers/net/ethernet/aquantia/aq_cfg.h 
b/drivers/net/ethernet/aquantia/aq_cfg.h
new file mode 100644
index 000..581fa27
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_cfg.h
@@ -0,0 +1,81 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_cfg.h: Definition of configuration parameters and constants. */
+
+#ifndef AQ_CFG_H
+#define AQ_CFG_H
+
+#define AQ_CFG_VECS_DEF   4U
+#define AQ_CFG_TCS_DEF1U
+
+#define AQ_CFG_TXDS_DEF4096U
+#define AQ_CFG_RXDS_DEF1024U
+
+#define AQ_CFG_IS_POLLING_DEF 0U
+
+#define AQ_CFG_FORCE_LEGACY_INT 0U
+
+#define AQ_CFG_IS_INTERRUPT_MODERATION_DEF   1U
+#define AQ_CFG_INTERRUPT_MODERATION_RATE_DEF 0xU
+#define AQ_CFG_IRQ_MASK  0x1FFU
+
+#define AQ_CFG_VECS_MAX   8U
+#define AQ_CFG_TCS_MAX8U
+
+#define AQ_CFG_TX_FRAME_MAX  (16U * 1024U)
+#define AQ_CFG_RX_FRAME_MAX  (4U * 1024U)
+
+/* LRO */
+#define AQ_CFG_IS_LRO_DEF   1U
+
+/* RSS */
+#define AQ_CFG_RSS_INDIRECTION_TABLE_MAX  128U
+#define AQ_CFG_RSS_HASHKEY_SIZE   320U
+
+#define AQ_CFG_IS_RSS_DEF   1U
+#define AQ_CFG_NUM_RSS_QUEUES_DEF   AQ_CFG_VECS_DEF
+#define AQ_CFG_RSS_BASE_CPU_NUM_DEF 0U
+
+#define AQ_CFG_PCI_FUNC_MSIX_IRQS   9U
+#define AQ_CFG_PCI_FUNC_PORTS   2U
+
+#define AQ_CFG_SERVICE_TIMER_INTERVAL(2 * HZ)
+#define AQ_CFG_POLLING_TIMER_INTERVAL   ((unsigned int)(2 * HZ))
+
+#define AQ_CFG_SKB_FRAGS_MAX   32U
+#define AQ_CFG_IP_ALIGN 0U
+
+#define AQ_CFG_NAPI_WEIGHT 64U
+
+#define AQ_CFG_MULTICAST_ADDRESS_MAX 32U
+
+/*#define AQ_CFG_MAC_ADDR_PERMANENT {0x30, 0x0E, 0xE3, 0x12, 0x34, 0x56}*/
+
+#define AQ_CFG_FC_MODE 3U
+
+#define AQ_CFG_SPEED_MSK  0xU  /* 0xU==auto_neg */
+
+#define AQ_CFG_IS_AUTONEG_DEF   1U
+#define AQ_CFG_MTU_DEF  1514U
+
+#define AQ_CFG_LOCK_TRYS   100U
+
+#define TXT(_T_) #_T_
+#define TXTTXT(_T_) TXT(_T_)
+
+#define AQ_CFG_DRV_AUTHOR  "aQuantia"
+#define AQ_CFG_DRV_DESC"aQuantia Corporation(R) Network Driver"
+#define AQ_CFG_DRV_NAME"aquantia"
+#define AQ_CFG_DRV_VERSION TXTTXT(NIC_MAJOR_DRIVER_VERSION)"."\
+   TXTTXT(NIC_MINOR_DRIVER_VERSION)"."\
+   TXTTXT(NIC_BUILD_DRIVER_VERSION)"."\
+   TXTTXT(NIC_REVISION_DRIVER_VERSION)
+
+#endif /* AQ_CFG_H */
diff --git a/drivers/net/ethernet/aquantia/aq_common.h 
b/drivers/net/ethernet/aquantia/aq_common.h
new file mode 100644
index 000..3622b4f
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_common.h
@@ -0,0 +1,22 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_common.h: Basic includes for all files in project. */
+
+#ifndef AQ_COMMON_H
+#define AQ_COMMON_H
+
+#include 
+
+#include "ver.h"
+#include "aq_nic.h"
+#include "aq_cfg.h"
+#include "aq_utils.h"
+
+#endif /* AQ_COMMON_H */
diff --git a/drivers/net/ethernet/aquantia/aq_utils.h 
b/drivers/net/ethernet/aquantia/aq_utils.h
new file mode 100644
index 000..97ffd7c
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_utils.h
@@ -0,0 +1,53 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_utils.h: Useful macro and structures used in all layers of driver. 
*/
+
+#ifndef AQ_UTILS_H
+#define AQ_UTILS_H
+
+#include "aq_common.h"
+
+#ifndef MBIT
+#define MBIT ((u64)100U)
+#define GBIT ((u64)10U)
+#endif
+
+#define AQ_IRQ_INVALID 0U
+#define AQ_IRQ_LEGACY  1U
+#define AQ_IRQ_MSI 2U
+#define AQ

[PATCH v2 12/12] net: ethernet: aquantia: Receive side scaling

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add definitions that support receive side scaling.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_rss.h | 26 ++
 1 file changed, 26 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_rss.h

diff --git a/drivers/net/ethernet/aquantia/aq_rss.h 
b/drivers/net/ethernet/aquantia/aq_rss.h
new file mode 100644
index 000..250fce5
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_rss.h
@@ -0,0 +1,26 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_rss.h: Receive Side Scaling definitions. */
+
+#ifndef AQ_RSS_H
+#define AQ_RSS_H
+
+#include "aq_common.h"
+#include "aq_cfg.h"
+
+struct aq_rss_parameters {
+   u16 base_cpu_number;
+   u16 indirection_table_size;
+   u16 hash_secret_key_size;
+   u32 hash_secret_key[AQ_CFG_RSS_HASHKEY_SIZE / sizeof(u32)];
+   u8 indirection_table[AQ_CFG_RSS_INDIRECTION_TABLE_MAX];
+};
+
+#endif /* AQ_RSS_H */
-- 
2.7.4

[PATCH v2 06/12] net: ethernet: aquantia: Atlantic A0 and B0 specific functions.

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add Atlantic A0 and B0 specific functions.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c   | 909 +++
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.h   |  34 +
 .../ethernet/aquantia/hw_atl/hw_atl_a0_internal.h  | 153 
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.c   | 967 +
 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.h   |  34 +
 .../ethernet/aquantia/hw_atl/hw_atl_b0_internal.h  | 206 +
 6 files changed, 2303 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0_internal.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.c
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0.h
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_b0_internal.h

diff --git a/drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c 
b/drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c
new file mode 100644
index 000..e6b5e30
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/hw_atl/hw_atl_a0.c
@@ -0,0 +1,909 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File hw_atl_a0.c: Definition of Atlantic hardware specific functions. */
+
+#include "../aq_hw.h"
+#include "../aq_hw_utils.h"
+#include "../aq_ring.h"
+#include "hw_atl_a0.h"
+#include "hw_atl_utils.h"
+#include "hw_atl_llh.h"
+#include "hw_atl_a0_internal.h"
+
+#include 
+
+static int hw_atl_a0_get_hw_caps(struct aq_hw_s *self,
+struct aq_hw_caps_s *aq_hw_caps)
+{
+   memcpy(aq_hw_caps, &hw_atl_a0_hw_caps_, sizeof(*aq_hw_caps));
+   return 0;
+}
+
+static struct aq_hw_s *hw_atl_a0_create(struct aq_pci_func_s *aq_pci_func,
+   unsigned int port,
+   struct aq_hw_ops *ops)
+{
+   struct hw_atl_s *self = NULL;
+   int err = 0;
+
+   self = kzalloc(sizeof(*self), GFP_KERNEL);
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->base.aq_pci_func = aq_pci_func;
+
+   self->base.not_ff_addr = 0x10U;
+
+err_exit:
+   return (struct aq_hw_s *)self;
+}
+
+static void hw_atl_a0_destroy(struct aq_hw_s *self)
+{
+   kfree(self);
+}
+
+static int hw_atl_a0_hw_reset(struct aq_hw_s *self)
+{
+   int err = 0;
+
+   glb_glb_reg_res_dis_set(self, 1U);
+   pci_pci_reg_res_dis_set(self, 0U);
+   rx_rx_reg_res_dis_set(self, 0U);
+   tx_tx_reg_res_dis_set(self, 0U);
+
+   HW_ATL_FLUSH();
+   glb_soft_res_set(self, 1);
+
+   /* check 10 times by 1ms */
+   AQ_HW_WAIT_FOR(glb_soft_res_get(self) == 0, 1000U, 10U);
+   if (err < 0)
+   goto err_exit;
+
+   itr_irq_reg_res_dis_set(self, 0U);
+   itr_res_irq_set(self, 1U);
+
+   /* check 10 times by 1ms */
+   AQ_HW_WAIT_FOR(itr_res_irq_get(self) == 0, 1000U, 10U);
+   if (err < 0)
+   goto err_exit;
+
+   hw_atl_utils_mpi_set(self, MPI_RESET, 0x0U);
+
+   err = aq_hw_err_from_flags(self);
+
+err_exit:
+   return err;
+}
+
+static int hw_atl_a0_hw_qos_set(struct aq_hw_s *self)
+{
+   u32 tc = 0U;
+   u32 buff_size = 0U;
+   unsigned int i_priority = 0U;
+   bool is_rx_flow_control = false;
+
+   /* TPS Descriptor rate init */
+   tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);
+   tps_tx_pkt_shed_desc_rate_lim_set(self, 0xA);
+
+   /* TPS VM init */
+   tps_tx_pkt_shed_desc_vm_arb_mode_set(self, 0U);
+
+   /* TPS TC credits init */
+   tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);
+   tps_tx_pkt_shed_data_arb_mode_set(self, 0U);
+
+   tps_tx_pkt_shed_tc_data_max_credit_set(self, 0xFFF, 0U);
+   tps_tx_pkt_shed_tc_data_weight_set(self, 0x64, 0U);
+   tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0x50, 0U);
+   tps_tx_pkt_shed_desc_tc_weight_set(self, 0x1E, 0U);
+
+   /* Tx buf size */
+   buff_size = HW_ATL_A0_TXBUF_MAX;
+
+   tpb_tx_pkt_buff_size_per_tc_set(self, buff_size, tc);
+   tpb_tx_buff_hi_threshold_per_tc_set(self,
+   (buff_size * (1024 / 32U) * 66U) /
+   100U, tc);
+   tpb_tx_buff_lo_threshold_per_tc_set(self,
+   (buff_size * (1024 / 32U) * 50U) /
+   100U, tc);
+
+   /* QoS Rx buf size per TC */
+   tc = 0

[PATCH v2 10/12] net: ethernet: aquantia: Hardware interface and utility functions

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add functions to interface with the hardware and some utility functions.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_hw.h   | 169 
 drivers/net/ethernet/aquantia/aq_hw_utils.c |  68 +++
 drivers/net/ethernet/aquantia/aq_hw_utils.h |  47 
 3 files changed, 284 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw_utils.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_hw_utils.h

diff --git a/drivers/net/ethernet/aquantia/aq_hw.h 
b/drivers/net/ethernet/aquantia/aq_hw.h
new file mode 100644
index 000..21e3553
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_hw.h
@@ -0,0 +1,169 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_hw.h: Declaraion of abstract interface for NIC hardware specific
+ * functions.
+ */
+
+#ifndef AQ_HW_H
+#define AQ_HW_H
+
+#include "aq_common.h"
+
+/* NIC H/W capabilities */
+struct aq_hw_caps_s {
+   u64 hw_features;
+   u64 link_speed_msk;
+   unsigned int hw_priv_flags;
+   u32 rxds;
+   u32 txds;
+   u32 txhwb_alignment;
+   u32 irq_mask;
+   u32 vecs;
+   u32 mtu;
+   u32 mac_regs_count;
+   u8 ports;
+   u8 msix_irqs;
+   u8 tcs;
+   u8 rxd_alignment;
+   u8 rxd_size;
+   u8 txd_alignment;
+   u8 txd_size;
+   u8 tx_rings;
+   u8 rx_rings;
+   bool flow_control;
+   bool is_64_dma;
+};
+
+struct aq_hw_link_status_s {
+   u64 bps;
+};
+
+#define AQ_HW_POWER_STATE_D0   0U
+#define AQ_HW_POWER_STATE_D3   3U
+
+#define AQ_HW_FLAG_STARTED 0x0004U
+#define AQ_HW_FLAG_STOPPING0x0008U
+#define AQ_HW_FLAG_RESETTING   0x0010U
+#define AQ_HW_FLAG_CLOSING 0x0020U
+#define AQ_HW_LINK_DOWN0x0400U
+#define AQ_HW_FLAG_ERR_UNPLUG  0x4000U
+#define AQ_HW_FLAG_ERR_HW  0x8000U
+
+#define AQ_HW_FLAG_ERRORS  (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG)
+
+struct aq_hw_s {
+   AQ_OBJ_HEADER;
+   struct aq_nic_cfg_s *aq_nic_cfg;
+   struct aq_pci_func_s *aq_pci_func;
+   void __iomem *mmio;
+   unsigned int not_ff_addr;
+   struct aq_hw_link_status_s aq_link_status;
+};
+
+struct aq_ring_s;
+struct aq_ring_param_s;
+struct aq_nic_cfg_s;
+struct sk_buff;
+
+struct aq_hw_ops {
+   struct aq_hw_s *(*create)(struct aq_pci_func_s *aq_pci_func,
+ unsigned int port, struct aq_hw_ops *ops);
+
+   void (*destroy)(struct aq_hw_s *self);
+
+   int (*get_hw_caps)(struct aq_hw_s *self,
+  struct aq_hw_caps_s *aq_hw_caps);
+
+   int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
+  unsigned int frags);
+
+   int (*hw_ring_rx_receive)(struct aq_hw_s *self,
+ struct aq_ring_s *aq_ring);
+
+   int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
+  unsigned int sw_tail_old);
+
+   int (*hw_ring_tx_head_update)(struct aq_hw_s *self,
+ struct aq_ring_s *aq_ring);
+
+   int (*hw_get_mac_permanent)(struct aq_hw_s *self, u8 *mac);
+
+   int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr);
+
+   int (*hw_get_link_status)(struct aq_hw_s *self,
+ struct aq_hw_link_status_s *link_status);
+
+   int (*hw_set_link_speed)(struct aq_hw_s *self, u32 speed);
+
+   int (*hw_reset)(struct aq_hw_s *self);
+
+   int (*hw_init)(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg,
+  u8 *mac_addr);
+
+   int (*hw_start)(struct aq_hw_s *self);
+
+   int (*hw_stop)(struct aq_hw_s *self);
+
+   int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
+  struct aq_ring_param_s *aq_ring_param);
+
+   int (*hw_ring_tx_start)(struct aq_hw_s *self,
+   struct aq_ring_s *aq_ring);
+
+   int (*hw_ring_tx_stop)(struct aq_hw_s *self,
+  struct aq_ring_s *aq_ring);
+
+   int (*hw_ring_rx_init)(struct aq_hw_s *self,
+  struct aq_ring_s *aq_ring,
+  struct aq_ring_param_s *aq_ring_param);
+
+   int (*hw_ring_rx_start)(struct aq_hw_s *self,
+   struct aq_ring_s *aq_ring);
+
+   int (*hw_ring_rx_stop)(struct aq_hw_s *self,
+  struct aq_ring_s *aq_ring);

[PATCH v2 09/12] net: ethernet: aquantia: Atlantic hardware abstraction layer

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add common functions for Atlantic hardware abstraction layer.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 .../net/ethernet/aquantia/hw_atl/hw_atl_utils.c| 544 +
 .../net/ethernet/aquantia/hw_atl/hw_atl_utils.h| 210 
 2 files changed, 754 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_utils.c
 create mode 100644 drivers/net/ethernet/aquantia/hw_atl/hw_atl_utils.h

diff --git a/drivers/net/ethernet/aquantia/hw_atl/hw_atl_utils.c 
b/drivers/net/ethernet/aquantia/hw_atl/hw_atl_utils.c
new file mode 100644
index 000..388ac34
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/hw_atl/hw_atl_utils.c
@@ -0,0 +1,544 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File hw_atl_utils.c: Definition of common functions for Atlantic hardware
+ * abstraction layer.
+ */
+
+#include "../aq_hw.h"
+#include "../aq_hw_utils.h"
+#include "../aq_pci_func.h"
+#include "../aq_ring.h"
+#include "../aq_vec.h"
+#include "hw_atl_utils.h"
+#include "hw_atl_llh.h"
+
+#include 
+
+#define HW_ATL_UCP_0X370_REG0x0370U
+
+#define HW_ATL_FW_SM_RAM0x2U
+#define HW_ATL_MPI_CONTROL_ADR  0x0368U
+#define HW_ATL_MPI_STATE_ADR0x036CU
+
+#define HW_ATL_MPI_STATE_MSK0x00FFU
+#define HW_ATL_MPI_STATE_SHIFT  0U
+#define HW_ATL_MPI_SPEED_MSK0xU
+#define HW_ATL_MPI_SPEED_SHIFT  16U
+
+int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, u32 *p, u32 cnt)
+{
+   int err = 0;
+
+   AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(self,
+  HW_ATL_FW_SM_RAM) == 1U, 1U, 1000U);
+
+   if (err < 0) {
+   bool is_locked;
+
+   reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
+   is_locked = reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);
+   if (!is_locked) {
+   err = ETIME;
+   goto err_exit;
+   }
+   }
+
+   aq_hw_write_reg(self, 0x0208U, a);
+
+   for (++cnt; --cnt;) {
+   u32 i = 0U;
+
+   aq_hw_write_reg(self, 0x0200U, 0x8000U);
+
+   for (i = 1024U;
+   (0x100U & aq_hw_read_reg(self, 0x0200U)) && --i;) {
+   }
+
+   *(p++) = aq_hw_read_reg(self, 0x020CU);
+   }
+
+   reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
+
+err_exit:
+   return err;
+}
+
+void hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p,
+  u32 cnt)
+{
+   int err = 0;
+   bool is_locked;
+
+   is_locked = reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);
+   if (!is_locked) {
+   err = ETIME;
+   goto err_exit;
+   }
+
+   aq_hw_write_reg(self, 0x0208U, a);
+
+   for (++cnt; --cnt;) {
+   u32 i = 0U;
+
+   aq_hw_write_reg(self, 0x020CU, *(p++));
+   aq_hw_write_reg(self, 0x0200U, 0xC000U);
+
+   for (i = 1024U;
+   (0x100U & aq_hw_read_reg(self, 0x0200U)) && --i;) {
+   }
+   }
+
+   reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);
+
+err_exit:;
+   (void)err;
+}
+
+int hw_atl_utils_init_ucp(struct aq_hw_s *self)
+{
+   int err = 0;
+
+   if (!aq_hw_read_reg(self, 0x370U)) {
+   unsigned int rnd = 0U;
+   unsigned int ucp_0x370 = 0U;
+
+   get_random_bytes(&rnd, sizeof(unsigned int));
+
+   ucp_0x370 = 0x02020202U | (0xFEFEFEFEU & rnd);
+   aq_hw_write_reg(self, HW_ATL_UCP_0X370_REG, ucp_0x370);
+   }
+
+   reg_glb_cpu_scratch_scp_set(self, 0xU, 25U);
+
+   /* check 10 times by 1ms */
+   AQ_HW_WAIT_FOR(0U != (PHAL_ATLANTIC_A0->mbox_addr =
+   aq_hw_read_reg(self, 0x360U)), 1000U, 10U);
+
+   return err;
+}
+
+#define HW_ATL_RPC_CONTROL_ADR 0x0338U
+#define HW_ATL_RPC_STATE_ADR   0x033CU
+
+struct aq_hw_atl_utils_fw_rpc_tid_s {
+   union {
+   u32 val;
+   struct {
+   u16 tid;
+   u16 len;
+   };
+   };
+};
+
+#define hw_atl_utils_fw_rpc_init(_H_) hw_atl_utils_fw_rpc_wait(_H_, NULL)
+
+int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)
+{
+   int err = 0;
+   struct aq_hw_atl_utils_fw_rpc_tid_s sw;
+
+   if (!IS_CHIP_FEATURE(MIPS)) {
+   err = -1;
+   goto err_exit;
+   }
+   hw_atl_utils_fw_upload_dwords(self, PHAL_ATLANTIC->rpc_addr,
+

[PATCH v2 03/12] net: ethernet: aquantia: Add ring support code

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add code to support the transmit and receive ring buffers.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_ring.c | 380 
 drivers/net/ethernet/aquantia/aq_ring.h | 147 
 2 files changed, 527 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_ring.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_ring.h

diff --git a/drivers/net/ethernet/aquantia/aq_ring.c 
b/drivers/net/ethernet/aquantia/aq_ring.c
new file mode 100644
index 000..a7ef6aa
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_ring.c
@@ -0,0 +1,380 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_pci_ring.c: Definition of functions for Rx/Tx rings. */
+
+#include "aq_ring.h"
+#include "aq_nic.h"
+#include "aq_hw.h"
+
+#include 
+#include 
+
+static struct aq_ring_s *aq_ring_alloc(struct aq_ring_s *self,
+  struct aq_nic_s *aq_nic,
+  struct aq_nic_cfg_s *aq_nic_cfg)
+{
+   int err = 0;
+
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->buff_ring = (struct aq_ring_buff_s *)
+   kzalloc(sizeof(struct aq_ring_buff_s) * self->size, GFP_KERNEL);
+
+   if (!self->buff_ring) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->dx_ring = dma_alloc_coherent(aq_nic_get_dev(aq_nic),
+   self->size * self->dx_size,
+   &self->dx_ring_pa, GFP_KERNEL);
+   if (!self->dx_ring) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+
+err_exit:
+   if (err < 0) {
+   aq_ring_free(self);
+   self = NULL;
+   }
+   return self;
+}
+
+struct aq_ring_s *aq_ring_tx_alloc(struct aq_ring_s *self,
+  struct aq_nic_s *aq_nic,
+  unsigned int idx,
+  struct aq_nic_cfg_s *aq_nic_cfg)
+{
+   int err = 0;
+
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->aq_nic = aq_nic;
+   self->idx = idx;
+   self->size = aq_nic_cfg->txds;
+   self->dx_size = aq_nic_cfg->aq_hw_caps->txd_size;
+
+   self = aq_ring_alloc(self, aq_nic, aq_nic_cfg);
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+
+err_exit:
+   if (err < 0) {
+   aq_ring_free(self);
+   self = NULL;
+   }
+   return self;
+}
+
+struct aq_ring_s *aq_ring_rx_alloc(struct aq_ring_s *self,
+  struct aq_nic_s *aq_nic,
+  unsigned int idx,
+  struct aq_nic_cfg_s *aq_nic_cfg)
+{
+   int err = 0;
+
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   self->aq_nic = aq_nic;
+   self->idx = idx;
+   self->size = aq_nic_cfg->rxds;
+   self->dx_size = aq_nic_cfg->aq_hw_caps->rxd_size;
+
+   self = aq_ring_alloc(self, aq_nic, aq_nic_cfg);
+   if (!self) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+
+err_exit:
+   if (err < 0) {
+   aq_ring_free(self);
+   self = NULL;
+   }
+   return self;
+}
+
+int aq_ring_init(struct aq_ring_s *self)
+{
+   self->hw_head = 0;
+   self->sw_head = 0;
+   self->sw_tail = 0;
+   return 0;
+}
+
+int aq_ring_deinit(struct aq_ring_s *self)
+{
+   return 0;
+}
+
+void aq_ring_free(struct aq_ring_s *self)
+{
+   if (!self)
+   goto err_exit;
+
+   kfree(self->buff_ring);
+
+   if (self->dx_ring)
+   dma_free_coherent(aq_nic_get_dev(self->aq_nic),
+ self->size * self->dx_size, self->dx_ring,
+ self->dx_ring_pa);
+
+err_exit:;
+}
+
+void aq_ring_tx_append_buffs(struct aq_ring_s *self,
+struct aq_ring_buff_s *buffer,
+unsigned int buffers)
+{
+   if (likely(self->sw_tail + buffers < self->size)) {
+   memcpy(&self->buff_ring[self->sw_tail], buffer,
+  sizeof(buffer[0]) * buffers);
+   } else {
+   unsigned int first_part = self->size - self->sw_tail;
+   unsigned int second_part = buffers - first_part;
+
+   memcpy(&self->buff_ring[self->sw_tail], buffer,

[PATCH v2 05/12] net: ethernet: aquantia: Support for NIC-specific code

2017-01-06 Thread Alexander Loktionov

From: David VomLehn 

Add support for code specific to the Atlantic NIC.

Signed-off-by: Alexander Loktionov 
Signed-off-by: Dmitrii Tarakanov 
Signed-off-by: Pavel Belous 
Signed-off-by: David M. VomLehn 
---
 drivers/net/ethernet/aquantia/aq_main.c | 298 
 drivers/net/ethernet/aquantia/aq_main.h |  17 +
 drivers/net/ethernet/aquantia/aq_nic.c  | 964 
 drivers/net/ethernet/aquantia/aq_nic.h  | 108 +++
 drivers/net/ethernet/aquantia/aq_nic_internal.h |  46 ++
 5 files changed, 1433 insertions(+)
 create mode 100644 drivers/net/ethernet/aquantia/aq_main.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_main.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic.c
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic.h
 create mode 100644 drivers/net/ethernet/aquantia/aq_nic_internal.h

diff --git a/drivers/net/ethernet/aquantia/aq_main.c 
b/drivers/net/ethernet/aquantia/aq_main.c
new file mode 100644
index 000..bb459ea
--- /dev/null
+++ b/drivers/net/ethernet/aquantia/aq_main.c
@@ -0,0 +1,298 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2016 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+/* File aq_main.c: Main file for aQuantia Linux driver. */
+
+#include "aq_main.h"
+#include "aq_nic.h"
+#include "aq_pci_func.h"
+#include "aq_ethtool.h"
+#include "hw_atl/hw_atl_a0.h"
+#include "hw_atl/hw_atl_b0.h"
+
+#include 
+#include 
+#include 
+
+static const struct pci_device_id aq_pci_tbl[] = {
+   { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_0001), },
+   { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D100), },
+   { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D107), },
+   { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D108), },
+   { PCI_VDEVICE(AQUANTIA, HW_ATL_DEVICE_ID_D109), },
+   {}
+};
+
+MODULE_DEVICE_TABLE(pci, aq_pci_tbl);
+
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION(AQ_CFG_DRV_VERSION);
+MODULE_AUTHOR(AQ_CFG_DRV_AUTHOR);
+MODULE_DESCRIPTION(AQ_CFG_DRV_DESC);
+
+static struct aq_hw_ops *aq_pci_probe_get_hw_ops_by_id(struct pci_dev *pdev)
+{
+   struct aq_hw_ops *ops = NULL;
+   int err = 0;
+
+   ops = hw_atl_a0_get_ops_by_id(pdev);
+   if (ops) {
+   err = 0;
+   goto err_exit;
+   }
+
+   ops = hw_atl_b0_get_ops_by_id(pdev);
+   if (ops) {
+   err = 0;
+   goto err_exit;
+   }
+
+/* the H/W was not recognized */
+   err = -EFAULT;
+
+err_exit:
+   return ops;
+}
+
+static int aq_ndev_open(struct net_device *ndev)
+{
+   struct aq_nic_s *aq_nic = NULL;
+   int err = 0;
+
+   aq_nic = aq_nic_alloc_hot(ndev);
+   if (!aq_nic) {
+   err = -ENOMEM;
+   goto err_exit;
+   }
+   err = aq_nic_init(aq_nic);
+   if (err < 0)
+   goto err_exit;
+   err = aq_nic_start(aq_nic);
+   if (err < 0)
+   goto err_exit;
+
+err_exit:
+   if (err < 0) {
+   if (aq_nic)
+   aq_nic_deinit(aq_nic);
+   }
+   return err;
+}
+
+static int aq_ndev_close(struct net_device *ndev)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   int err = 0;
+
+   err = aq_nic_stop(aq_nic);
+   if (err < 0)
+   goto err_exit;
+   err = aq_nic_deinit(aq_nic);
+   if (err < 0)
+   goto err_exit;
+   aq_nic_free_hot_resources(aq_nic);
+
+err_exit:
+   return err;
+}
+
+static int aq_ndev_start_xmit(struct sk_buff *skb, struct net_device *ndev)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   int err = 0;
+
+   err = aq_nic_xmit(aq_nic, skb);
+   if (err < 0)
+   goto err_exit;
+
+err_exit:
+   return err;
+}
+
+static int aq_ndev_change_mtu(struct net_device *ndev, int new_mtu)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   int err = 0;
+
+   if (new_mtu == ndev->mtu) {
+   err = 0;
+   goto err_exit;
+   }
+   if (new_mtu < 68) {
+   err = -EINVAL;
+   goto err_exit;
+   }
+   err = aq_nic_set_mtu(aq_nic, new_mtu + ETH_HLEN);
+   if (err < 0)
+   goto err_exit;
+   ndev->mtu = new_mtu;
+
+   if (netif_running(ndev)) {
+   aq_ndev_close(ndev);
+   aq_ndev_open(ndev);
+   }
+
+err_exit:
+   return err;
+}
+
+static int aq_ndev_set_features(struct net_device *ndev,
+   netdev_features_t features)
+{
+   struct aq_nic_s *aq_nic = (struct aq_nic_s *)netdev_priv(ndev);
+   struct aq_nic_cfg_s *aq_cfg = aq_nic_get_cfg(aq_nic);
+   bool is_lro = false;
+
+   if (aq_cfg->hw_features & NETIF_F

Re: [PATCH v4 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread kbuild test robot

Hi Joao,

[auto build test ERROR on net-next/master]
[also build test ERROR on next-20170105]
[cannot apply to v4.10-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Joao-Pinto/adding-new-glue-driver-dwmac-dwc-qos-eth/20170106-154152
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 6.2.0
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=ia64 

All errors (new ones prefixed by >>):

   drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c: In function 
'dwc_eth_dwmac_probe':
>> drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:116:9: error: 
>> incompatible type for argument 1 of 'memset'
 memset(stmmac_res, 0, sizeof(struct stmmac_resources));
^~
   In file included from include/linux/string.h:18:0,
from include/linux/bitmap.h:8,
from include/linux/cpumask.h:11,
from include/linux/rcupdate.h:40,
from include/linux/srcu.h:33,
from include/linux/notifier.h:15,
from include/linux/clk.h:17,
from 
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:14:
   arch/ia64/include/asm/string.h:19:14: note: expected 'void *' but argument 
is of type 'struct stmmac_resources'
extern void *memset (void *, int, __kernel_size_t);
 ^~

vim +/memset +116 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

   110  {
   111  struct plat_stmmacenet_data *plat_dat;
   112  struct stmmac_resources stmmac_res;
   113  struct resource *res;
   114  int ret;
   115  
 > 116  memset(stmmac_res, 0, sizeof(struct stmmac_resources));
   117  
   118  /**
   119   * Since stmmac_platform supports name IRQ only, basic platform

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

[PATCH v1 4/8] crypto:chcr- Use cipher instead of Block Cipher in gcm setkey

2017-01-06 Thread Harsh Jain

1 Block of encrption can be done with aes-generic. no need of
cbc(aes). This patch replaces cbc(aes-generic) with aes-generic.

Signed-off-by: Harsh Jain 
---
 drivers/crypto/chelsio/chcr_algo.c | 20 +---
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_algo.c 
b/drivers/crypto/chelsio/chcr_algo.c
index 6c2dea3..d335943 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -2189,8 +2189,7 @@ static int chcr_gcm_setkey(struct crypto_aead *aead, 
const u8 *key,
struct chcr_context *ctx = crypto_aead_ctx(aead);
struct chcr_aead_ctx *aeadctx = AEAD_CTX(ctx);
struct chcr_gcm_ctx *gctx = GCM_CTX(aeadctx);
-   struct blkcipher_desc h_desc;
-   struct scatterlist src[1];
+   struct crypto_cipher *cipher;
unsigned int ck_size;
int ret = 0, key_ctx_size = 0;
 
@@ -2223,27 +,26 @@ static int chcr_gcm_setkey(struct crypto_aead *aead, 
const u8 *key,
CHCR_KEYCTX_MAC_KEY_SIZE_128,
0, 0,
key_ctx_size >> 4);
-   /* Calculate the H = CIPH(K, 0 repeated 16 times) using sync aes
-* blkcipher It will go on key context
+   /* Calculate the H = CIPH(K, 0 repeated 16 times).
+* It will go in key context
 */
-   h_desc.tfm = crypto_alloc_blkcipher("cbc(aes-generic)", 0, 0);
-   if (IS_ERR(h_desc.tfm)) {
+   cipher = crypto_alloc_cipher("aes-generic", 0, 0);
+   if (IS_ERR(cipher)) {
aeadctx->enckey_len = 0;
ret = -ENOMEM;
goto out;
}
-   h_desc.flags = 0;
-   ret = crypto_blkcipher_setkey(h_desc.tfm, key, keylen);
+
+   ret = crypto_cipher_setkey(cipher, key, keylen);
if (ret) {
aeadctx->enckey_len = 0;
goto out1;
}
memset(gctx->ghash_h, 0, AEAD_H_SIZE);
-   sg_init_one(&src[0], gctx->ghash_h, AEAD_H_SIZE);
-   ret = crypto_blkcipher_encrypt(&h_desc, &src[0], &src[0], AEAD_H_SIZE);
+   crypto_cipher_encrypt_one(cipher, gctx->ghash_h, gctx->ghash_h);
 
 out1:
-   crypto_free_blkcipher(h_desc.tfm);
+   crypto_free_cipher(cipher);
 out:
return ret;
 }
-- 
1.8.2.3

[PATCH v1 7/8] crypto:chcr- Check device is allocated before use

2017-01-06 Thread Harsh Jain

Ensure dev is allocated for crypto uld context before using the device
for crypto operations.

Signed-off-by: Atul Gupta 
---
 drivers/crypto/chelsio/chcr_core.c | 18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_core.c 
b/drivers/crypto/chelsio/chcr_core.c
index 918da8e..1c65f07 100644
--- a/drivers/crypto/chelsio/chcr_core.c
+++ b/drivers/crypto/chelsio/chcr_core.c
@@ -52,6 +52,7 @@
 int assign_chcr_device(struct chcr_dev **dev)
 {
struct uld_ctx *u_ctx;
+   int ret = -ENXIO;
 
/*
 * Which device to use if multiple devices are available TODO
@@ -59,15 +60,14 @@ int assign_chcr_device(struct chcr_dev **dev)
 * must go to the same device to maintain the ordering.
 */
mutex_lock(&dev_mutex); /* TODO ? */
-   u_ctx = list_first_entry(&uld_ctx_list, struct uld_ctx, entry);
-   if (!u_ctx) {
-   mutex_unlock(&dev_mutex);
-   return -ENXIO;
+   list_for_each_entry(u_ctx, &uld_ctx_list, entry)
+   if (u_ctx && u_ctx->dev) {
+   *dev = u_ctx->dev;
+   ret = 0;
+   break;
}
-
-   *dev = u_ctx->dev;
mutex_unlock(&dev_mutex);
-   return 0;
+   return ret;
 }
 
 static int chcr_dev_add(struct uld_ctx *u_ctx)
@@ -202,10 +202,8 @@ static int chcr_uld_state_change(void *handle, enum 
cxgb4_state state)
 
 static int __init chcr_crypto_init(void)
 {
-   if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info)) {
+   if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info))
pr_err("ULD register fail: No chcr crypto support in cxgb4");
-   return -1;
-   }
 
return 0;
 }
-- 
1.8.2.3

[PATCH v1 5/8] crypto:chcr: Change cra_flags for cipher algos

2017-01-06 Thread Harsh Jain

Change cipher algos flags to CRYPTO_ALG_TYPE_ABLKCIPHER.

Signed-off-by: Harsh Jain 
---
 drivers/crypto/chelsio/chcr_algo.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_algo.c 
b/drivers/crypto/chelsio/chcr_algo.c
index d335943..21fc04c 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -171,7 +171,7 @@ int chcr_handle_resp(struct crypto_async_request *req, 
unsigned char *input,
}
break;
 
-   case CRYPTO_ALG_TYPE_BLKCIPHER:
+   case CRYPTO_ALG_TYPE_ABLKCIPHER:
ctx_req.req.ablk_req = (struct ablkcipher_request *)req;
ctx_req.ctx.ablk_ctx =
ablkcipher_request_ctx(ctx_req.req.ablk_req);
@@ -2492,7 +2492,7 @@ static int chcr_aead_op(struct aead_request *req,
.cra_name   = "cbc(aes)",
.cra_driver_name= "cbc-aes-chcr",
.cra_priority   = CHCR_CRA_PRIORITY,
-   .cra_flags  = CRYPTO_ALG_TYPE_BLKCIPHER |
+   .cra_flags  = CRYPTO_ALG_TYPE_ABLKCIPHER |
CRYPTO_ALG_ASYNC,
.cra_blocksize  = AES_BLOCK_SIZE,
.cra_ctxsize= sizeof(struct chcr_context)
@@ -2519,7 +2519,7 @@ static int chcr_aead_op(struct aead_request *req,
.cra_name   = "xts(aes)",
.cra_driver_name= "xts-aes-chcr",
.cra_priority   = CHCR_CRA_PRIORITY,
-   .cra_flags  = CRYPTO_ALG_TYPE_BLKCIPHER |
+   .cra_flags  = CRYPTO_ALG_TYPE_ABLKCIPHER |
CRYPTO_ALG_ASYNC,
.cra_blocksize  = AES_BLOCK_SIZE,
.cra_ctxsize= sizeof(struct chcr_context) +
-- 
1.8.2.3

Re: [PATCH v4 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread kbuild test robot

Hi Joao,

[auto build test ERROR on net-next/master]
[also build test ERROR on next-20170105]
[cannot apply to v4.10-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Joao-Pinto/adding-new-glue-driver-dwmac-dwc-qos-eth/20170106-154152
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   In file included from arch/x86/include/asm/string.h:2:0,
from include/linux/string.h:18,
from arch/x86/include/asm/page_32.h:34,
from arch/x86/include/asm/page.h:13,
from arch/x86/include/asm/processor.h:17,
from include/linux/mutex.h:19,
from include/linux/notifier.h:13,
from include/linux/clk.h:17,
from 
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:14:
   drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c: In function 
'dwc_eth_dwmac_probe':
>> drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:116:9: error: 
>> incompatible type for argument 1 of '__builtin_memset'
 memset(stmmac_res, 0, sizeof(struct stmmac_resources));
^
   arch/x86/include/asm/string_32.h:325:46: note: in definition of macro 
'memset'
#define memset(s, c, count) __builtin_memset(s, c, count)
 ^
   drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:116:9: note: 
expected 'void *' but argument is of type 'struct stmmac_resources'
 memset(stmmac_res, 0, sizeof(struct stmmac_resources));
^
   arch/x86/include/asm/string_32.h:325:46: note: in definition of macro 
'memset'
#define memset(s, c, count) __builtin_memset(s, c, count)
 ^

vim +/__builtin_memset +116 
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

 8   * published by the Free Software Foundation.
 9   *
10   * You should have received a copy of the GNU General Public License
11   * along with this program. If not, see <http://www.gnu.org/licenses/>.
12   */
13  
  > 14  #include 
15  #include 
16  #include 
17  #include 
18  #include 
19  #include 
20  #include 
21  #include 
22  #include 
23  #include 
24  #include 
25  
26  #include "stmmac_platform.h"
27  
28  static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
29 struct plat_stmmacenet_data 
*plat_dat)
30  {
31  struct device_node *np = pdev->dev.of_node;
32  u32 burst_map = 0;
33  u32 bit_index = 0;
34  u32 a_index = 0;
35  
36  if (!plat_dat->axi) {
37  plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), 
GFP_KERNEL);
38  
39  if (!plat_dat->axi)
40  return -ENOMEM;
41  }
42  
43  plat_dat->axi->axi_lpi_en = of_property_read_bool(np, 
"snps,en-lpi");
44  if (of_property_read_u32(np, "snps,write-requests",
45   &plat_dat->axi->axi_wr_osr_lmt)) {
46  /**
47   * Since the register has a reset value of 1, if 
property
48   * is missing, default to 1.
49   */
50  plat_dat->axi->axi_wr_osr_lmt = 1;
51  } else {
52  /**
53   * If property exists, to keep the behavior from 
dwc_eth_qos,
54   * subtract one after parsing.
55   */
56  plat_dat->axi->axi_wr_osr_lmt--;
57  }
58  
59  if (of_property_read_u32(np, "read,read-requests",
60   &plat_dat->axi->axi_rd_osr_lmt)) {
61  /**
62   * Since the register has a reset value of 1, if 
property
63   * is missing, default to 1.
64   */
65  plat_dat->axi->axi_rd_osr_lmt = 1;
66  } else {
67  /**
68   * If property exists, to keep the behavior from 
dwc_eth_qos,
69   * subtract one after parsing.
70   */
71  plat_dat->axi->axi_rd_osr_lmt--;
72  }
73  of_property_read_u32(np, "snps,burst-map", &burst_map);
74  
75  /* converts burst-map bitmask

[PATCH v1 0/8] crypto:chcr- Bug fixes

2017-01-06 Thread Harsh Jain

The patch series is based on Herbert's cryptodev-2.6 tree.
It include bug fixes.

Atul Gupta (4):
  crypto:chcr-Change flow IDs
  crypto:chcr- Fix panic on dma_unmap_sg
  crypto:chcr- Check device is allocated before use
  crypto:chcr- Fix wrong typecasting
Harsh Jain (4):
  crypto:chcr- Fix key length for RFC4106
  crypto:chcr- Use cipher instead of Block Cipher in gcm setkey
  crypto:chcr: Change cra_flags for cipher algos
  crypto:chcr- Change algo priority


 drivers/crypto/chelsio/chcr_algo.c| 97 ++-
 drivers/crypto/chelsio/chcr_algo.h|  9 +--
 drivers/crypto/chelsio/chcr_core.c| 27 
 drivers/crypto/chelsio/chcr_core.h|  1 +
 drivers/crypto/chelsio/chcr_crypto.h  |  5 +-
 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h |  8 +++
 6 files changed, 80 insertions(+), 67 deletions(-)

-- 
1.8.2.3

[PATCH v1 3/8] crypto:chcr- Fix key length for RFC4106

2017-01-06 Thread Harsh Jain

Check keylen before copying salt to avoid wrap around of Integer.

Signed-off-by: Harsh Jain 
---
 drivers/crypto/chelsio/chcr_algo.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_algo.c 
b/drivers/crypto/chelsio/chcr_algo.c
index deec7c0..6c2dea3 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -2194,8 +2194,8 @@ static int chcr_gcm_setkey(struct crypto_aead *aead, 
const u8 *key,
unsigned int ck_size;
int ret = 0, key_ctx_size = 0;
 
-   if (get_aead_subtype(aead) ==
-   CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106) {
+   if (get_aead_subtype(aead) == CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 &&
+   keylen > 3) {
keylen -= 4;  /* nonce/salt is present in the last 4 bytes */
memcpy(aeadctx->salt, key + keylen, 4);
}
-- 
1.8.2.3

[PATCH v1 8/8] crypto:chcr- Fix wrong typecasting

2017-01-06 Thread Harsh Jain

Typecast the pointer with correct structure.

Signed-off-by: Atul Gupta 
---
 drivers/crypto/chelsio/chcr_core.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_core.c 
b/drivers/crypto/chelsio/chcr_core.c
index 1c65f07..aec3562 100644
--- a/drivers/crypto/chelsio/chcr_core.c
+++ b/drivers/crypto/chelsio/chcr_core.c
@@ -151,18 +151,17 @@ int chcr_uld_rx_handler(void *handle, const __be64 *rsp,
 {
struct uld_ctx *u_ctx = (struct uld_ctx *)handle;
struct chcr_dev *dev = u_ctx->dev;
-   const struct cpl_act_establish *rpl = (struct cpl_act_establish
-  *)rsp;
+   const struct cpl_fw6_pld *rpl = (struct cpl_fw6_pld *)rsp;
 
-   if (rpl->ot.opcode != CPL_FW6_PLD) {
+   if (rpl->opcode != CPL_FW6_PLD) {
pr_err("Unsupported opcode\n");
return 0;
}
 
if (!pgl)
-   work_handlers[rpl->ot.opcode](dev, (unsigned char *)&rsp[1]);
+   work_handlers[rpl->opcode](dev, (unsigned char *)&rsp[1]);
else
-   work_handlers[rpl->ot.opcode](dev, pgl->va);
+   work_handlers[rpl->opcode](dev, pgl->va);
return 0;
 }
 
-- 
1.8.2.3

[PATCH v1 2/8] crypto:chcr- Fix panic on dma_unmap_sg

2017-01-06 Thread Harsh Jain

Save DMA mapped sg list addresses to request context buffer.

Signed-off-by: Atul Gupta 
---
 drivers/crypto/chelsio/chcr_algo.c   | 49 +++-
 drivers/crypto/chelsio/chcr_crypto.h |  3 +++
 2 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_algo.c 
b/drivers/crypto/chelsio/chcr_algo.c
index 1d7dfcf..deec7c0 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -158,7 +158,7 @@ int chcr_handle_resp(struct crypto_async_request *req, 
unsigned char *input,
case CRYPTO_ALG_TYPE_AEAD:
ctx_req.req.aead_req = (struct aead_request *)req;
ctx_req.ctx.reqctx = aead_request_ctx(ctx_req.req.aead_req);
-   dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.req.aead_req->dst,
+   dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.ctx.reqctx->dst,
 ctx_req.ctx.reqctx->dst_nents, DMA_FROM_DEVICE);
if (ctx_req.ctx.reqctx->skb) {
kfree_skb(ctx_req.ctx.reqctx->skb);
@@ -1364,8 +1364,7 @@ static struct sk_buff *create_authenc_wr(struct 
aead_request *req,
struct chcr_wr *chcr_req;
struct cpl_rx_phys_dsgl *phys_cpl;
struct phys_sge_parm sg_param;
-   struct scatterlist *src, *dst;
-   struct scatterlist src_sg[2], dst_sg[2];
+   struct scatterlist *src;
unsigned int frags = 0, transhdr_len;
unsigned int ivsize = crypto_aead_ivsize(tfm), dst_size = 0;
unsigned int   kctx_len = 0;
@@ -1385,19 +1384,21 @@ static struct sk_buff *create_authenc_wr(struct 
aead_request *req,
 
if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0)
goto err;
-   src = scatterwalk_ffwd(src_sg, req->src, req->assoclen);
-   dst = src;
+   src = scatterwalk_ffwd(reqctx->srcffwd, req->src, req->assoclen);
+   reqctx->dst = src;
+
if (req->src != req->dst) {
err = chcr_copy_assoc(req, aeadctx);
if (err)
return ERR_PTR(err);
-   dst = scatterwalk_ffwd(dst_sg, req->dst, req->assoclen);
+   reqctx->dst = scatterwalk_ffwd(reqctx->dstffwd, req->dst,
+  req->assoclen);
}
if (get_aead_subtype(tfm) == CRYPTO_ALG_SUB_TYPE_AEAD_NULL) {
null = 1;
assoclen = 0;
}
-   reqctx->dst_nents = sg_nents_for_len(dst, req->cryptlen +
+   reqctx->dst_nents = sg_nents_for_len(reqctx->dst, req->cryptlen +
 (op_type ? -authsize : authsize));
if (reqctx->dst_nents <= 0) {
pr_err("AUTHENC:Invalid Destination sg entries\n");
@@ -1462,7 +1463,7 @@ static struct sk_buff *create_authenc_wr(struct 
aead_request *req,
sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize);
sg_param.qid = qid;
sg_param.align = 0;
-   if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, dst,
+   if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, reqctx->dst,
  &sg_param))
goto dstmap_fail;
 
@@ -1713,8 +1714,7 @@ static struct sk_buff *create_aead_ccm_wr(struct 
aead_request *req,
struct chcr_wr *chcr_req;
struct cpl_rx_phys_dsgl *phys_cpl;
struct phys_sge_parm sg_param;
-   struct scatterlist *src, *dst;
-   struct scatterlist src_sg[2], dst_sg[2];
+   struct scatterlist *src;
unsigned int frags = 0, transhdr_len, ivsize = AES_BLOCK_SIZE;
unsigned int dst_size = 0, kctx_len;
unsigned int sub_type;
@@ -1730,17 +1730,19 @@ static struct sk_buff *create_aead_ccm_wr(struct 
aead_request *req,
if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0)
goto err;
sub_type = get_aead_subtype(tfm);
-   src = scatterwalk_ffwd(src_sg, req->src, req->assoclen);
-   dst = src;
+   src = scatterwalk_ffwd(reqctx->srcffwd, req->src, req->assoclen);
+   reqctx->dst = src;
+
if (req->src != req->dst) {
err = chcr_copy_assoc(req, aeadctx);
if (err) {
pr_err("AAD copy to destination buffer fails\n");
return ERR_PTR(err);
}
-   dst = scatterwalk_ffwd(dst_sg, req->dst, req->assoclen);
+   reqctx->dst = scatterwalk_ffwd(reqctx->dstffwd, req->dst,
+  req->assoclen);
}
-   reqctx->dst_nents = sg_nents_for_len(dst, req->cryptlen +
+   reqctx->dst_nents = sg_nents_for_len(reqctx->dst, req->cryptlen +
 (op_type ? -authsize : authsize));
if (reqctx->dst_nents <= 0) {
pr_err("CCM:Invalid Destination sg entries\n");
@@ -1779,7 +1781,7 @@ static struct sk_buff *create_aead_

[PATCH v1 6/8] crypto:chcr- Change algo priority

2017-01-06 Thread Harsh Jain

Update priorities to 3000

Signed-off-by: Harsh Jain 
---
 drivers/crypto/chelsio/chcr_crypto.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/chelsio/chcr_crypto.h 
b/drivers/crypto/chelsio/chcr_crypto.h
index 7ec0a8f..81cfd0b 100644
--- a/drivers/crypto/chelsio/chcr_crypto.h
+++ b/drivers/crypto/chelsio/chcr_crypto.h
@@ -48,7 +48,7 @@
  * giving the processed data
  */
 
-#define CHCR_CRA_PRIORITY 300
+#define CHCR_CRA_PRIORITY 3000
 
 #define CHCR_AES_MAX_KEY_LEN  (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
 #define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
-- 
1.8.2.3

[PATCH v1 1/8] crypto:chcr-Change flow IDs

2017-01-06 Thread Harsh Jain

Change assign flowc id to each outgoing request.Firmware use flowc id
to schedule each request onto HW.

Reviewed-by: Hariprasad Shenai 
Signed-off-by: Atul Gupta 
---
 drivers/crypto/chelsio/chcr_algo.c| 18 ++
 drivers/crypto/chelsio/chcr_algo.h|  9 +
 drivers/crypto/chelsio/chcr_core.h|  1 +
 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h |  8 
 4 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/chelsio/chcr_algo.c 
b/drivers/crypto/chelsio/chcr_algo.c
index 2ed1e24..1d7dfcf 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -542,10 +542,11 @@ static inline void create_wreq(struct chcr_context *ctx,
(calc_tx_flits_ofld(skb) * 8), 16)));
chcr_req->wreq.cookie = cpu_to_be64((uintptr_t)req);
chcr_req->wreq.rx_chid_to_rx_q_id =
-   FILL_WR_RX_Q_ID(ctx->dev->tx_channel_id, qid,
-   is_iv ? iv_loc : IV_NOP);
+   FILL_WR_RX_Q_ID(ctx->dev->rx_channel_id, qid,
+   is_iv ? iv_loc : IV_NOP, ctx->tx_channel_id);
 
-   chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id);
+   chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id,
+  qid);
chcr_req->ulptx.len = htonl((DIV_ROUND_UP((calc_tx_flits_ofld(skb) * 8),
16) - ((sizeof(chcr_req->wreq)) >> 4)));
 
@@ -606,7 +607,7 @@ static inline void create_wreq(struct chcr_context *ctx,
chcr_req = (struct chcr_wr *)__skb_put(skb, transhdr_len);
memset(chcr_req, 0, transhdr_len);
chcr_req->sec_cpl.op_ivinsrtofst =
-   FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 1);
+   FILL_SEC_CPL_OP_IVINSR(ctx->dev->rx_channel_id, 2, 1);
 
chcr_req->sec_cpl.pldlen = htonl(ivsize + req->nbytes);
chcr_req->sec_cpl.aadstart_cipherstop_hi =
@@ -782,6 +783,7 @@ static int chcr_device_init(struct chcr_context *ctx)
spin_lock(&ctx->dev->lock_chcr_dev);
ctx->tx_channel_id = rxq_idx;
ctx->dev->tx_channel_id = !ctx->dev->tx_channel_id;
+   ctx->dev->rx_channel_id = 0;
spin_unlock(&ctx->dev->lock_chcr_dev);
}
 out:
@@ -874,7 +876,7 @@ static struct sk_buff *create_hash_wr(struct ahash_request 
*req,
memset(chcr_req, 0, transhdr_len);
 
chcr_req->sec_cpl.op_ivinsrtofst =
-   FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 0);
+   FILL_SEC_CPL_OP_IVINSR(ctx->dev->rx_channel_id, 2, 0);
chcr_req->sec_cpl.pldlen = htonl(param->bfr_len + param->sg_len);
 
chcr_req->sec_cpl.aadstart_cipherstop_hi =
@@ -1424,7 +1426,7 @@ static struct sk_buff *create_authenc_wr(struct 
aead_request *req,
 * to the hardware spec
 */
chcr_req->sec_cpl.op_ivinsrtofst =
-   FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2,
+   FILL_SEC_CPL_OP_IVINSR(ctx->dev->rx_channel_id, 2,
   (ivsize ? (assoclen + 1) : 0));
chcr_req->sec_cpl.pldlen = htonl(assoclen + ivsize + req->cryptlen);
chcr_req->sec_cpl.aadstart_cipherstop_hi = FILL_SEC_CPL_CIPHERSTOP_HI(
@@ -1600,7 +1602,7 @@ static void fill_sec_cpl_for_aead(struct cpl_tx_sec_pdu 
*sec_cpl,
unsigned int ivsize = AES_BLOCK_SIZE;
unsigned int cipher_mode = CHCR_SCMD_CIPHER_MODE_AES_CCM;
unsigned int mac_mode = CHCR_SCMD_AUTH_MODE_CBCMAC;
-   unsigned int c_id = chcrctx->dev->tx_channel_id;
+   unsigned int c_id = chcrctx->dev->rx_channel_id;
unsigned int ccm_xtra;
unsigned char tag_offset = 0, auth_offset = 0;
unsigned char hmac_ctrl = get_hmac(crypto_aead_authsize(tfm));
@@ -1875,7 +1877,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request 
*req,
 
tag_offset = (op_type == CHCR_ENCRYPT_OP) ? 0 : authsize;
chcr_req->sec_cpl.op_ivinsrtofst = FILL_SEC_CPL_OP_IVINSR(
-   ctx->dev->tx_channel_id, 2, (ivsize ?
+   ctx->dev->rx_channel_id, 2, (ivsize ?
(req->assoclen + 1) : 0));
chcr_req->sec_cpl.pldlen = htonl(req->assoclen + ivsize + crypt_len);
chcr_req->sec_cpl.aadstart_cipherstop_hi = FILL_SEC_CPL_CIPHERSTOP_HI(
diff --git a/drivers/crypto/chelsio/chcr_algo.h 
b/drivers/crypto/chelsio/chcr_algo.h
index 3c7c51f..ba38bae 100644
--- a/drivers/crypto/chelsio/chcr_algo.h
+++ b/drivers/crypto/chelsio/chcr_algo.h
@@ -185,20 +185,21 @@
FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_V(1) | \
FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_V((ctx_len)))
 
-#define FILL_WR_RX_Q_ID(cid, qid, wr_iv) \
+#define FILL_WR_RX_Q_ID(cid, qid, wr_iv, fid) \

Re: [PATCH net-next] net: make ndo_get_stats64 a void function

2017-01-06 Thread kbuild test robot

Hi Stephen,

[auto build test WARNING on net-next/master]

url:
https://github.com/0day-ci/linux/commits/Stephen-Hemminger/net-make-ndo_get_stats64-a-void-function/20170106-160123
config: x86_64-acpi-redef (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All warnings (new ones prefixed by >>):

   drivers/net/ethernet/broadcom/bnx2.c: In function 'bnx2_get_stats64':
>> drivers/net/ethernet/broadcom/bnx2.c:6830:10: warning: 'return' with a 
>> value, in function returning void
  return net_stats;
 ^
   drivers/net/ethernet/broadcom/bnx2.c:6825:1: note: declared here
bnx2_get_stats64(struct net_device *dev, struct rtnl_link_stats64 
*net_stats)
^~~~

vim +/return +6830 drivers/net/ethernet/broadcom/bnx2.c

5d07bf26 drivers/net/bnx2.c   Eric Dumazet  2010-07-08  
6814(((u64) (ctr##_hi) << 32) + (u64) (ctr##_lo))
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6815  
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6816  #define GET_64BIT_NET_STATS(ctr)  \
354fcd77 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6817GET_64BIT_NET_STATS64(bp->stats_blk->ctr) + \
354fcd77 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6818GET_64BIT_NET_STATS64(bp->temp_stats_blk->ctr)
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6819  
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6820  #define GET_32BIT_NET_STATS(ctr)  \
354fcd77 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6821(unsigned long) (bp->stats_blk->ctr +   \
354fcd77 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6822 bp->temp_stats_blk->ctr)
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6823  
1e665d95 drivers/net/ethernet/broadcom/bnx2.c Stephen Hemminger 2017-01-05  
6824  static void
5d07bf26 drivers/net/bnx2.c   Eric Dumazet  2010-07-08  
6825  bnx2_get_stats64(struct net_device *dev, struct rtnl_link_stats64 
*net_stats)
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6826  {
972ec0d4 drivers/net/bnx2.c   Michael Chan  2006-01-23  
6827struct bnx2 *bp = netdev_priv(dev);
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6828  
5d07bf26 drivers/net/bnx2.c   Eric Dumazet  2010-07-08  
6829if (bp->stats_blk == NULL)
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26 
@6830return net_stats;
5d07bf26 drivers/net/bnx2.c   Eric Dumazet  2010-07-08  
6831  
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6832net_stats->rx_packets =
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6833GET_64BIT_NET_STATS(stat_IfHCInUcastPkts) +
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6834GET_64BIT_NET_STATS(stat_IfHCInMulticastPkts) +
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6835GET_64BIT_NET_STATS(stat_IfHCInBroadcastPkts);
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6836  
b6016b76 drivers/net/bnx2.c   Michael Chan  2005-05-26  
6837net_stats->tx_packets =
a4743058 drivers/net/bnx2.c   Michael Chan  2010-01-17  
6838GET_64BIT_NET_STATS(stat_IfHCOutUcastPkts) +

:: The code at line 6830 was first introduced by commit
:: b6016b767397258b58163494a869f8f1199e6897 [BNX2]: New Broadcom gigabit 
network driver.

:: TO: Michael Chan 
:: CC: David S. Miller 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH net-next] net: make ndo_get_stats64 a void function

2017-01-06 Thread kbuild test robot

Hi Stephen,

[auto build test WARNING on net-next/master]

url:
https://github.com/0day-ci/linux/commits/Stephen-Hemminger/net-make-ndo_get_stats64-a-void-function/20170106-160123
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=xtensa 

All warnings (new ones prefixed by >>):

   drivers/net/macsec.c: In function 'macsec_get_stats64':
>> drivers/net/macsec.c:2897:3: warning: 'return' with a value, in function 
>> returning void
  return s;
  ^

vim +/return +2897 drivers/net/macsec.c

c09440f7 Sabrina Dubroca   2016-03-11  2881 unsigned int extra = 
macsec->secy.icv_len + macsec_extra_len(true);
c09440f7 Sabrina Dubroca   2016-03-11  2882  
c09440f7 Sabrina Dubroca   2016-03-11  2883 if (macsec->real_dev->mtu - 
extra < new_mtu)
c09440f7 Sabrina Dubroca   2016-03-11  2884 return -ERANGE;
c09440f7 Sabrina Dubroca   2016-03-11  2885  
c09440f7 Sabrina Dubroca   2016-03-11  2886 dev->mtu = new_mtu;
c09440f7 Sabrina Dubroca   2016-03-11  2887  
c09440f7 Sabrina Dubroca   2016-03-11  2888 return 0;
c09440f7 Sabrina Dubroca   2016-03-11  2889  }
c09440f7 Sabrina Dubroca   2016-03-11  2890  
1e665d95 Stephen Hemminger 2017-01-05  2891  static void 
macsec_get_stats64(struct net_device *dev,
c09440f7 Sabrina Dubroca   2016-03-11  2892struct 
rtnl_link_stats64 *s)
c09440f7 Sabrina Dubroca   2016-03-11  2893  {
c09440f7 Sabrina Dubroca   2016-03-11  2894 int cpu;
c09440f7 Sabrina Dubroca   2016-03-11  2895  
c09440f7 Sabrina Dubroca   2016-03-11  2896 if (!dev->tstats)
c09440f7 Sabrina Dubroca   2016-03-11 @2897 return s;
c09440f7 Sabrina Dubroca   2016-03-11  2898  
c09440f7 Sabrina Dubroca   2016-03-11  2899 for_each_possible_cpu(cpu) {
c09440f7 Sabrina Dubroca   2016-03-11  2900 struct pcpu_sw_netstats 
*stats;
c09440f7 Sabrina Dubroca   2016-03-11  2901 struct pcpu_sw_netstats 
tmp;
c09440f7 Sabrina Dubroca   2016-03-11  2902 int start;
c09440f7 Sabrina Dubroca   2016-03-11  2903  
c09440f7 Sabrina Dubroca   2016-03-11  2904 stats = 
per_cpu_ptr(dev->tstats, cpu);
c09440f7 Sabrina Dubroca   2016-03-11  2905 do {

:: The code at line 2897 was first introduced by commit
:: c09440f7dcb304002dfced8c0fea289eb25f2da0 macsec: introduce IEEE 802.1AE 
driver

:: TO: Sabrina Dubroca 
:: CC: David S. Miller 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH net-next 2/2] net/sched: act_csum: compute crc32c on SCTP packets

2017-01-06 Thread Nicolas Dichtel

Le 05/01/2017 à 17:59, Davide Caratti a écrit :
> modify act_csum to compute crc32c on IPv4/IPv6 packets having SCTP in
> their payload, and extend UAPI definitions accordingly.
> 
> Signed-off-by: Davide Caratti 
> ---
>  include/uapi/linux/tc_act/tc_csum.h |  3 ++-
>  net/sched/act_csum.c| 32 
>  2 files changed, 34 insertions(+), 1 deletion(-)
> 
> diff --git a/include/uapi/linux/tc_act/tc_csum.h 
> b/include/uapi/linux/tc_act/tc_csum.h
> index 8ac8041..58d457f 100644
> --- a/include/uapi/linux/tc_act/tc_csum.h
> +++ b/include/uapi/linux/tc_act/tc_csum.h
> @@ -21,7 +21,8 @@ enum {
>   TCA_CSUM_UPDATE_FLAG_IGMP= 4,
>   TCA_CSUM_UPDATE_FLAG_TCP = 8,
>   TCA_CSUM_UPDATE_FLAG_UDP = 16,
> - TCA_CSUM_UPDATE_FLAG_UDPLITE = 32
> + TCA_CSUM_UPDATE_FLAG_UDPLITE = 32,
> + TCA_CSUM_UPDATE_FLAG_SCTP= 64
nit: please put a comma after the '64' so that the next person who adds a flag
will not have to touch that line.

>  };
>  
>  struct tc_csum {
> diff --git a/net/sched/act_csum.c b/net/sched/act_csum.c
> index a0edd80..620ac9b 100644
> --- a/net/sched/act_csum.c
> +++ b/net/sched/act_csum.c
[snip]
> @@ -365,6 +385,12 @@ static int tcf_csum_ipv4(struct sk_buff *skb, u32 
> update_flags)
>  ntohs(iph->tot_len), 1))
>   goto fail;
>   break;
> + case IPPROTO_SCTP:
> + if (update_flags & TCA_CSUM_UPDATE_FLAG_SCTP)
> + if (!tcf_csum_sctp(skb, iph->ihl * 4,
> +ntohs(iph->tot_len)))
nit: one 'if' only?
if (update_flags & TCA_CSUM_UPDATE_FLAG_SCTP &&
!tcf_csum_sctp(skb, iph->ihl * 4, ntohs(iph->tot_len))

> + goto fail;
> + break;
>   }
>  
>   if (update_flags & TCA_CSUM_UPDATE_FLAG_IPV4HDR) {
> @@ -481,6 +507,12 @@ static int tcf_csum_ipv6(struct sk_buff *skb, u32 
> update_flags)
>  pl + sizeof(*ip6h), 1))
>   goto fail;
>   goto done;
> + case IPPROTO_SCTP:
> + if (update_flags & TCA_CSUM_UPDATE_FLAG_SCTP)
> + if (!tcf_csum_sctp(skb, hl,
> +pl + sizeof(*ip6h)))
Same here.


Regards,
Nicolas

Re: [net-next PATCH 5/6] i40e: Add TX and RX support in switchdev mode.

2017-01-06 Thread Or Gerlitz

On Fri, Jan 6, 2017 at 12:32 AM, Samudrala, Sridhar
 wrote:
> On 1/5/2017 3:50 AM, Or Gerlitz wrote:

> It looks like you are returning the VF port number as phys_port_name() for a
> VF rep in en_rep.c. Is this correct?

yeah, correct, what we all call the VF rep actually represents the
eswitch vport the VF is connected to. The most flexible input for user
space would be just to get this port number along with the switchdev
ID which tells them to which switch this port belongs.

> By default i am creating VFPR netdev with name as _VF
> For ex; if enp5s0f0 is the pf name, VFPR netdev for VF0 will be enp5s0f0_vf0
>
> If we want udev to follow this syntax should i return '_vf0'  as
> get_phys_port_name() for VF rep 0?

just return a number. Typically the PF is vport #0, so for vf0 you
would return 1, this is aligned with the kernel switchdev
documentation [1]

Or.

[1] 
http://lxr.free-electrons.com/source/Documentation/networking/switchdev.txt#L104

[PATCH v2 0/7] uapi: export all headers under uapi directories

2017-01-06 Thread Nicolas Dichtel


Here is the v2 of this series. The first 5 patches are just cleanup: some
exported headers were still under a non-uapi directory.
The patch 6 was spotted by code review: there is no in-tree user of this
functionality.
The last patch remove the use of header-y. Now all files under an uapi
directory are exported.

asm is a bit special, most of architectures export asm//include/uapi/asm
only, but there is two exceptions:
 - cris which exports arch/cris/include/uapi/arch-v[10|32];
 - tile which exports arch/tile/include/uapi/arch.
Because I don't know if the output of 'make headers_install_all' can be changed,
I introduce subdir-y in Kbuild file. The headers_install_all target copies all
asm//include/uapi/asm to usr/include/asm- but
arch/cris/include/uapi/arch-v[10|32] and arch/tile/include/uapi/arch are not
prefixed (they are put asis in usr/include/). If it's acceptable to modify the
output of 'make headers_install_all' to export asm headers in
usr/include/asm-/asm, then I could remove this new subdir-y and exports
everything under arch//include/uapi/.

Note also that exported files for asm are a mix of files listed by:
 - include/uapi/asm-generic/Kbuild.asm;
 - arch/x86/include/uapi/asm/Kbuild;
 - arch/x86/include/asm/Kbuild.
This complicates a lot the processing (arch/x86/include/asm/Kbuild is also
used by scripts/Makefile.asm-generic).

This series has been tested with a 'make headers_install' on x86 and a
'make headers_install_all'. I've checked the result of both commands.

This patch is built against linus tree. I don't know if it should be
made against antoher tree.

Comments are welcomed,
Nicolas

[PATCH v2 2/7] h8300: put bitsperlong.h in uapi

2017-01-06 Thread Nicolas Dichtel

This header file is exported, thus move it to uapi.

Signed-off-by: Nicolas Dichtel 
---
 arch/h8300/include/asm/bitsperlong.h  | 10 +-
 arch/h8300/include/uapi/asm/bitsperlong.h | 14 ++
 2 files changed, 15 insertions(+), 9 deletions(-)
 create mode 100644 arch/h8300/include/uapi/asm/bitsperlong.h

diff --git a/arch/h8300/include/asm/bitsperlong.h 
b/arch/h8300/include/asm/bitsperlong.h
index e140e46729ac..c0a8e2ee531e 100644
--- a/arch/h8300/include/asm/bitsperlong.h
+++ b/arch/h8300/include/asm/bitsperlong.h
@@ -1,14 +1,6 @@
 #ifndef __ASM_H8300_BITS_PER_LONG
 #define __ASM_H8300_BITS_PER_LONG
 
-#include 
-
-#if !defined(__ASSEMBLY__)
-/* h8300-unknown-linux required long */
-#define __kernel_size_t __kernel_size_t
-typedef unsigned long  __kernel_size_t;
-typedef long   __kernel_ssize_t;
-typedef long   __kernel_ptrdiff_t;
-#endif
+#include 
 
 #endif /* __ASM_H8300_BITS_PER_LONG */
diff --git a/arch/h8300/include/uapi/asm/bitsperlong.h 
b/arch/h8300/include/uapi/asm/bitsperlong.h
new file mode 100644
index ..e56cf72369b6
--- /dev/null
+++ b/arch/h8300/include/uapi/asm/bitsperlong.h
@@ -0,0 +1,14 @@
+#ifndef _UAPI_ASM_H8300_BITS_PER_LONG
+#define _UAPI_ASM_H8300_BITS_PER_LONG
+
+#include 
+
+#if !defined(__ASSEMBLY__)
+/* h8300-unknown-linux required long */
+#define __kernel_size_t __kernel_size_t
+typedef unsigned long  __kernel_size_t;
+typedef long   __kernel_ssize_t;
+typedef long   __kernel_ptrdiff_t;
+#endif
+
+#endif /* _UAPI_ASM_H8300_BITS_PER_LONG */
-- 
2.8.1

[PATCH v2 3/7] nios2: put setup.h in uapi

2017-01-06 Thread Nicolas Dichtel

This header file is exported, thus move it to uapi.

Signed-off-by: Nicolas Dichtel 
---
 arch/nios2/include/asm/setup.h  | 2 +-
 arch/nios2/include/uapi/asm/setup.h | 6 ++
 2 files changed, 7 insertions(+), 1 deletion(-)
 create mode 100644 arch/nios2/include/uapi/asm/setup.h

diff --git a/arch/nios2/include/asm/setup.h b/arch/nios2/include/asm/setup.h
index dcbf8cf1a344..d49e9e91bf55 100644
--- a/arch/nios2/include/asm/setup.h
+++ b/arch/nios2/include/asm/setup.h
@@ -19,7 +19,7 @@
 #ifndef _ASM_NIOS2_SETUP_H
 #define _ASM_NIOS2_SETUP_H
 
-#include 
+#include 
 
 #ifndef __ASSEMBLY__
 #ifdef __KERNEL__
diff --git a/arch/nios2/include/uapi/asm/setup.h 
b/arch/nios2/include/uapi/asm/setup.h
new file mode 100644
index ..8d8285997ba8
--- /dev/null
+++ b/arch/nios2/include/uapi/asm/setup.h
@@ -0,0 +1,6 @@
+#ifndef _UAPI_ASM_NIOS2_SETUP_H
+#define _UAPI_ASM_NIOS2_SETUP_H
+
+#include 
+
+#endif /* _UAPI_ASM_NIOS2_SETUP_H */
-- 
2.8.1

[PATCH v2 4/7] x86: put msr-index.h in uapi

2017-01-06 Thread Nicolas Dichtel

This header file is exported, thus move it to uapi.

Signed-off-by: Nicolas Dichtel 
---
 arch/x86/include/asm/msr-index.h  | 694 +
 arch/x86/include/uapi/asm/msr-index.h | 698 ++
 2 files changed, 699 insertions(+), 693 deletions(-)
 create mode 100644 arch/x86/include/uapi/asm/msr-index.h

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 710273c617b8..1baa0628da74 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1,698 +1,6 @@
 #ifndef _ASM_X86_MSR_INDEX_H
 #define _ASM_X86_MSR_INDEX_H
 
-/*
- * CPU model specific register (MSR) numbers.
- *
- * Do not add new entries to this file unless the definitions are shared
- * between multiple compilation units.
- */
-
-/* x86-64 specific MSRs */
-#define MSR_EFER   0xc080 /* extended feature register */
-#define MSR_STAR   0xc081 /* legacy mode SYSCALL target */
-#define MSR_LSTAR  0xc082 /* long mode SYSCALL target */
-#define MSR_CSTAR  0xc083 /* compat mode SYSCALL target */
-#define MSR_SYSCALL_MASK   0xc084 /* EFLAGS mask for syscall */
-#define MSR_FS_BASE0xc100 /* 64bit FS base */
-#define MSR_GS_BASE0xc101 /* 64bit GS base */
-#define MSR_KERNEL_GS_BASE 0xc102 /* SwapGS GS shadow */
-#define MSR_TSC_AUX0xc103 /* Auxiliary TSC */
-
-/* EFER bits: */
-#define _EFER_SCE  0  /* SYSCALL/SYSRET */
-#define _EFER_LME  8  /* Long mode enable */
-#define _EFER_LMA  10 /* Long mode active (read-only) */
-#define _EFER_NX   11 /* No execute enable */
-#define _EFER_SVME 12 /* Enable virtualization */
-#define _EFER_LMSLE13 /* Long Mode Segment Limit Enable */
-#define _EFER_FFXSR14 /* Enable Fast FXSAVE/FXRSTOR */
-
-#define EFER_SCE   (1<<_EFER_SCE)
-#define EFER_LME   (1<<_EFER_LME)
-#define EFER_LMA   (1<<_EFER_LMA)
-#define EFER_NX(1<<_EFER_NX)
-#define EFER_SVME  (1<<_EFER_SVME)
-#define EFER_LMSLE (1<<_EFER_LMSLE)
-#define EFER_FFXSR (1<<_EFER_FFXSR)
-
-/* Intel MSRs. Some also available on other CPUs */
-
-#define MSR_PPIN_CTL   0x004e
-#define MSR_PPIN   0x004f
-
-#define MSR_IA32_PERFCTR0  0x00c1
-#define MSR_IA32_PERFCTR1  0x00c2
-#define MSR_FSB_FREQ   0x00cd
-#define MSR_PLATFORM_INFO  0x00ce
-
-#define MSR_NHM_SNB_PKG_CST_CFG_CTL0x00e2
-#define NHM_C3_AUTO_DEMOTE (1UL << 25)
-#define NHM_C1_AUTO_DEMOTE (1UL << 26)
-#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
-#define SNB_C1_AUTO_UNDEMOTE   (1UL << 27)
-#define SNB_C3_AUTO_UNDEMOTE   (1UL << 28)
-
-#define MSR_MTRRcap0x00fe
-#define MSR_IA32_BBL_CR_CTL0x0119
-#define MSR_IA32_BBL_CR_CTL3   0x011e
-
-#define MSR_IA32_SYSENTER_CS   0x0174
-#define MSR_IA32_SYSENTER_ESP  0x0175
-#define MSR_IA32_SYSENTER_EIP  0x0176
-
-#define MSR_IA32_MCG_CAP   0x0179
-#define MSR_IA32_MCG_STATUS0x017a
-#define MSR_IA32_MCG_CTL   0x017b
-#define MSR_IA32_MCG_EXT_CTL   0x04d0
-
-#define MSR_OFFCORE_RSP_0  0x01a6
-#define MSR_OFFCORE_RSP_1  0x01a7
-#define MSR_TURBO_RATIO_LIMIT  0x01ad
-#define MSR_TURBO_RATIO_LIMIT1 0x01ae
-#define MSR_TURBO_RATIO_LIMIT2 0x01af
-
-#define MSR_LBR_SELECT 0x01c8
-#define MSR_LBR_TOS0x01c9
-#define MSR_LBR_NHM_FROM   0x0680
-#define MSR_LBR_NHM_TO 0x06c0
-#define MSR_LBR_CORE_FROM  0x0040
-#define MSR_LBR_CORE_TO0x0060
-
-#define MSR_LBR_INFO_0 0x0dc0 /* ... 0xddf for _31 */
-#define LBR_INFO_MISPRED   BIT_ULL(63)
-#define LBR_INFO_IN_TX BIT_ULL(62)
-#define LBR_INFO_ABORT BIT_ULL(61)
-#define LBR_INFO_CYCLES0x
-
-#define MSR_IA32_PEBS_ENABLE   0x03f1
-#define MSR_IA32_DS_AREA   0x0600
-#define MSR_IA32_PERF_CAPABILITIES 0x0345
-#define MSR_PEBS_LD_LAT_THRESHOLD  0x03f6
-
-#define MSR_IA32_RTIT_CTL  0x0570
-#define MSR_IA32_RTIT_STATUS   0x0571
-#define MSR_IA32_RTIT_ADDR0_A  0x0580
-#define MSR_IA32_RTIT_ADDR0_B  0x0581
-#define MSR_IA32_RTIT_ADDR1_A  0x0582
-#define MSR_IA32_RTIT_ADDR1_B  0x0583
-#define MSR_IA32_RTIT_ADDR2_A  0x0584
-#define MSR_IA32_RTIT_ADDR2_B  0x0585
-#define MSR_IA32_RTIT_ADDR3_A  0x

Re: [PATCH iproute2 2/3] ip vrf: Improve cgroup2 error messages

2017-01-06 Thread Sergei Shtylyov


Hello!

On 1/6/2017 3:22 AM, David Ahern wrote:


Currently, if a non-root user attempts to run ip vrf exec a non-helpful
error is returned:

$ ip vrf exec mgmt bash
Failed to mount cgroup2. Are CGROUPS enabled in your kernel?

Only show the CGROUPS kernel hint for the ENODEV error and for the
rest show the strerror for the errno. So now:

$ ip/ip vrf exec mgmt bash
Failed to mount cgroup2: Operation not permitted

Signed-off-by: David Ahern 
---
 lib/fs.c | 14 +++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/lib/fs.c b/lib/fs.c
index 644bb486ae8e..12a4657a0bc9 100644
--- a/lib/fs.c
+++ b/lib/fs.c
@@ -80,13 +80,21 @@ char *find_cgroup2_mount(void)

if (mount("none", mnt, CGROUP2_FS_NAME, 0, NULL)) {
/* EBUSY means already mounted */
-   if (errno != EBUSY) {
+   if (errno == EBUSY)
+   goto out;
+
+   if (errno == ENODEV) {
fprintf(stderr,
"Failed to mount cgroup2. Are CGROUPS enabled in 
your kernel?\n");
-   free(mnt);
-   return NULL;
+   } else {
+   fprintf(stderr,
+   "Failed to mount cgroup2: %s\n",
+   strerror(errno));
}


   How about a *switch* instead?


+   free(mnt);
+   return NULL;
}
+out:
return mnt;
 }



MBR, Sergei

[PATCH v2 5/7] Makefile.headersinst: cleanup input files

2017-01-06 Thread Nicolas Dichtel

After the last four patches, all exported headers are under uapi/, thus
input-files2 are not needed anymore.
The side effect is that input-files1-name is exactly header-y.

Note also that unput-files3-name is genhdr-y.

Signed-off-by: Nicolas Dichtel 
---
 scripts/Makefile.headersinst | 34 +++---
 1 file changed, 11 insertions(+), 23 deletions(-)

diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst
index 1106d6ca3a38..3e20d03432d2 100644
--- a/scripts/Makefile.headersinst
+++ b/scripts/Makefile.headersinst
@@ -40,31 +40,20 @@ wrapper-files := $(filter $(header-y), $(generic-y))
 srcdir:= $(srctree)/$(obj)
 gendir:= $(objtree)/$(gen)
 
-oldsrcdir := $(srctree)/$(subst /uapi,,$(obj))
-
 # all headers files for this dir
 header-y  := $(filter-out $(generic-y), $(header-y))
 all-files := $(header-y) $(genhdr-y) $(wrapper-files)
 output-files  := $(addprefix $(installdir)/, $(all-files))
 
-input-files1  := $(foreach hdr, $(header-y), \
-  $(if $(wildcard $(srcdir)/$(hdr)), \
-   $(wildcard $(srcdir)/$(hdr))) \
-  )
-input-files1-name := $(notdir $(input-files1))
-input-files2  := $(foreach hdr, $(header-y), \
-  $(if  $(wildcard $(srcdir)/$(hdr)),, \
-   $(if $(wildcard $(oldsrcdir)/$(hdr)), \
-   $(wildcard $(oldsrcdir)/$(hdr)), \
-   $(error Missing UAPI file $(srcdir)/$(hdr))) \
-  ))
-input-files2-name := $(notdir $(input-files2))
-input-files3  := $(foreach hdr, $(genhdr-y), \
-  $(if $(wildcard $(gendir)/$(hdr)), \
-   $(wildcard $(gendir)/$(hdr)), \
-   $(error Missing generated UAPI file $(gendir)/$(hdr)) \
-  ))
-input-files3-name := $(notdir $(input-files3))
+# Check that all expected files exist
+$(foreach hdr, $(header-y), \
+  $(if $(wildcard $(srcdir)/$(hdr)),, \
+   $(error Missing UAPI file $(srcdir)/$(hdr)) \
+   ))
+$(foreach hdr, $(genhdr-y), \
+  $(if $(wildcard $(gendir)/$(hdr)),, \
+   $(error Missing generated UAPI file $(gendir)/$(hdr)) \
+  ))
 
 # Work out what needs to be removed
 oldheaders:= $(patsubst $(installdir)/%,%,$(wildcard $(installdir)/*.h))
@@ -78,9 +67,8 @@ printdir = $(patsubst $(INSTALL_HDR_PATH)/%/,%,$(dir $@))
 quiet_cmd_install = INSTALL $(printdir) ($(words $(all-files))\
 file$(if $(word 2, $(all-files)),s))
   cmd_install = \
-$(CONFIG_SHELL) $< $(installdir) $(srcdir) $(input-files1-name); \
-$(CONFIG_SHELL) $< $(installdir) $(oldsrcdir) $(input-files2-name); \
-$(CONFIG_SHELL) $< $(installdir) $(gendir) $(input-files3-name); \
+$(CONFIG_SHELL) $< $(installdir) $(srcdir) $(header-y); \
+$(CONFIG_SHELL) $< $(installdir) $(gendir) $(genhdr-y); \
 for F in $(wrapper-files); do   \
 echo "\#include " > $(installdir)/$$F;\
 done;   \
-- 
2.8.1

[PATCH v2 1/7] arm: put types.h in uapi

2017-01-06 Thread Nicolas Dichtel

This header file is exported, thus move it to uapi.

Signed-off-by: Nicolas Dichtel 
---
 arch/arm/include/asm/types.h  | 36 +--
 arch/arm/include/uapi/asm/types.h | 40 +++
 2 files changed, 41 insertions(+), 35 deletions(-)
 create mode 100644 arch/arm/include/uapi/asm/types.h

diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index a53cdb8f068c..c48fee3d7b3b 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -1,40 +1,6 @@
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-#include 
-
-/*
- * The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
- * unambiguous on ARM as you would expect. For the types below, there is a
- * difference on ARM between GCC built for bare metal ARM, GCC built for glibc
- * and the kernel itself, which results in build errors if you try to build 
with
- * -ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h'
- * in order to use NEON intrinsics)
- *
- * As the typedefs for these types in 'stdint.h' are based on builtin defines
- * supplied by GCC, we can tweak these to align with the kernel's idea of those
- * types, so 'linux/types.h' and 'stdint.h' can be safely included from the 
same
- * source file (provided that -ffreestanding is used).
- *
- *int32_t uint32_t   uintptr_t
- * bare metal GCC longunsigned long  unsigned int
- * glibc GCC  int unsigned int   unsigned int
- * kernel int unsigned int   unsigned long
- */
-
-#ifdef __INT32_TYPE__
-#undef __INT32_TYPE__
-#define __INT32_TYPE__ int
-#endif
-
-#ifdef __UINT32_TYPE__
-#undef __UINT32_TYPE__
-#define __UINT32_TYPE__unsigned int
-#endif
-
-#ifdef __UINTPTR_TYPE__
-#undef __UINTPTR_TYPE__
-#define __UINTPTR_TYPE__   unsigned long
-#endif
+#include 
 
 #endif /* _ASM_TYPES_H */
diff --git a/arch/arm/include/uapi/asm/types.h 
b/arch/arm/include/uapi/asm/types.h
new file mode 100644
index ..9435a42f575e
--- /dev/null
+++ b/arch/arm/include/uapi/asm/types.h
@@ -0,0 +1,40 @@
+#ifndef _UAPI_ASM_TYPES_H
+#define _UAPI_ASM_TYPES_H
+
+#include 
+
+/*
+ * The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
+ * unambiguous on ARM as you would expect. For the types below, there is a
+ * difference on ARM between GCC built for bare metal ARM, GCC built for glibc
+ * and the kernel itself, which results in build errors if you try to build 
with
+ * -ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h'
+ * in order to use NEON intrinsics)
+ *
+ * As the typedefs for these types in 'stdint.h' are based on builtin defines
+ * supplied by GCC, we can tweak these to align with the kernel's idea of those
+ * types, so 'linux/types.h' and 'stdint.h' can be safely included from the 
same
+ * source file (provided that -ffreestanding is used).
+ *
+ *int32_t uint32_t   uintptr_t
+ * bare metal GCC longunsigned long  unsigned int
+ * glibc GCC  int unsigned int   unsigned int
+ * kernel int unsigned int   unsigned long
+ */
+
+#ifdef __INT32_TYPE__
+#undef __INT32_TYPE__
+#define __INT32_TYPE__ int
+#endif
+
+#ifdef __UINT32_TYPE__
+#undef __UINT32_TYPE__
+#define __UINT32_TYPE__unsigned int
+#endif
+
+#ifdef __UINTPTR_TYPE__
+#undef __UINTPTR_TYPE__
+#define __UINTPTR_TYPE__   unsigned long
+#endif
+
+#endif /* _UAPI_ASM_TYPES_H */
-- 
2.8.1

[PATCH v2 6/7] Makefile.headersinst: remove destination-y option

2017-01-06 Thread Nicolas Dichtel

This option was added in commit c7bb349e7c25 ("kbuild: introduce destination-y
for exported headers") but never used in-tree.

Signed-off-by: Nicolas Dichtel 
---
 Documentation/kbuild/makefiles.txt | 23 ---
 scripts/Makefile.headersinst   |  2 +-
 2 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/Documentation/kbuild/makefiles.txt 
b/Documentation/kbuild/makefiles.txt
index 9b9c4797fc55..37b525d329ae 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -46,9 +46,8 @@ This document describes the Linux kernel Makefiles.
=== 7 Kbuild syntax for exported headers
--- 7.1 header-y
--- 7.2 genhdr-y
-   --- 7.3 destination-y
-   --- 7.4 generic-y
-   --- 7.5 generated-y
+   --- 7.3 generic-y
+   --- 7.4 generated-y
 
=== 8 Kbuild Variables
=== 9 Makefile language
@@ -1295,21 +1294,7 @@ See subsequent chapter for the syntax of the Kbuild file.
#include/linux/Kbuild
genhdr-y += version.h
 
-   --- 7.3 destination-y
-
-   When an architecture has a set of exported headers that needs to be
-   exported to a different directory destination-y is used.
-   destination-y specifies the destination directory for all exported
-   headers in the file where it is present.
-
-   Example:
-   #arch/xtensa/platforms/s6105/include/platform/Kbuild
-   destination-y := include/linux
-
-   In the example above all exported headers in the Kbuild file
-   will be located in the directory "include/linux" when exported.
-
-   --- 7.4 generic-y
+   --- 7.3 generic-y
 
If an architecture uses a verbatim copy of a header from
include/asm-generic then this is listed in the file
@@ -1336,7 +1321,7 @@ See subsequent chapter for the syntax of the Kbuild file.
Example: termios.h
#include 
 
-   --- 7.5 generated-y
+   --- 7.4 generated-y
 
If an architecture generates other header files alongside generic-y
wrappers, and not included in genhdr-y, then generated-y specifies
diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst
index 3e20d03432d2..876b42cfede4 100644
--- a/scripts/Makefile.headersinst
+++ b/scripts/Makefile.headersinst
@@ -14,7 +14,7 @@ kbuild-file := $(srctree)/$(obj)/Kbuild
 include $(kbuild-file)
 
 # called may set destination dir (when installing to asm/)
-_dst := $(if $(destination-y),$(destination-y),$(if $(dst),$(dst),$(obj)))
+_dst := $(if $(dst),$(dst),$(obj))
 
 old-kbuild-file := $(srctree)/$(subst uapi/,,$(obj))/Kbuild
 ifneq ($(wildcard $(old-kbuild-file)),)
-- 
2.8.1

[PATCH v2 7/7] uapi: export all headers under uapi directories

2017-01-06 Thread Nicolas Dichtel

Regularly, when a new header is created in include/uapi/, the developer
forgets to add it in the corresponding Kbuild file. This error is usually
detected after the release is out.

In fact, all headers under uapi directories should be exported, thus it's
useless to have an exhaustive list.

After this patch, the following files, which were not exported, are now
exported (with make headers_install_all):
asm-unicore32/shmparam.h
asm-unicore32/ucontext.h
asm-hexagon/shmparam.h
asm-mips/ucontext.h
asm-mips/hwcap.h
asm-mips/reg.h
drm/vgem_drm.h
drm/armada_drm.h
drm/omap_drm.h
drm/etnaviv_drm.h
asm-tile/shmparam.h
asm-blackfin/shmparam.h
asm-blackfin/ucontext.h
asm-powerpc/perf_regs.h
rdma/qedr-abi.h
asm-parisc/kvm_para.h
asm-openrisc/shmparam.h
asm-nios2/kvm_para.h
asm-nios2/ucontext.h
asm-sh/kvm_para.h
asm-sh/ucontext.h
asm-xtensa/kvm_para.h
asm-avr32/kvm_para.h
asm-m32r/kvm_para.h
asm-h8300/shmparam.h
asm-h8300/ucontext.h
asm-metag/kvm_para.h
asm-metag/shmparam.h
asm-metag/ucontext.h
asm-m68k/kvm_para.h
asm-m68k/shmparam.h
linux/bcache.h
linux/kvm.h
linux/kvm_para.h
linux/kfd_ioctl.h
linux/cryptouser.h
linux/kcm.h
linux/kcov.h
linux/seg6_iptunnel.h
linux/stm.h
linux/genwqe
linux/genwqe/.install
linux/genwqe/genwqe_card.h
linux/genwqe/..install.cmd
linux/seg6.h
linux/cifs
linux/cifs/.install
linux/cifs/cifs_mount.h
linux/cifs/..install.cmd
linux/auto_dev-ioctl.h

Thanks to Julien Floret  for the tip to get all
subdirs with a pure makefile command.

Signed-off-by: Nicolas Dichtel 
---
 Documentation/kbuild/makefiles.txt  |  41 ++-
 arch/alpha/include/uapi/asm/Kbuild  |  41 ---
 arch/arc/include/uapi/asm/Kbuild|   3 -
 arch/arm/include/uapi/asm/Kbuild|  17 -
 arch/arm64/include/uapi/asm/Kbuild  |  18 --
 arch/avr32/include/uapi/asm/Kbuild  |  20 --
 arch/blackfin/include/uapi/asm/Kbuild   |  17 -
 arch/c6x/include/uapi/asm/Kbuild|   8 -
 arch/cris/include/uapi/arch-v10/arch/Kbuild |   5 -
 arch/cris/include/uapi/arch-v32/arch/Kbuild |   3 -
 arch/cris/include/uapi/asm/Kbuild   |  43 +--
 arch/frv/include/uapi/asm/Kbuild|  33 --
 arch/h8300/include/uapi/asm/Kbuild  |  28 --
 arch/hexagon/include/asm/Kbuild |   3 -
 arch/hexagon/include/uapi/asm/Kbuild|  13 -
 arch/ia64/include/uapi/asm/Kbuild   |  45 ---
 arch/m32r/include/uapi/asm/Kbuild   |  31 --
 arch/m68k/include/uapi/asm/Kbuild   |  24 --
 arch/metag/include/uapi/asm/Kbuild  |   8 -
 arch/microblaze/include/uapi/asm/Kbuild |  32 --
 arch/mips/include/uapi/asm/Kbuild   |  37 ---
 arch/mn10300/include/uapi/asm/Kbuild|  32 --
 arch/nios2/include/uapi/asm/Kbuild  |   4 +-
 arch/openrisc/include/asm/Kbuild|   3 -
 arch/openrisc/include/uapi/asm/Kbuild   |   8 -
 arch/parisc/include/uapi/asm/Kbuild |  28 --
 arch/powerpc/include/uapi/asm/Kbuild|  45 ---
 arch/s390/include/uapi/asm/Kbuild   |  52 ---
 arch/score/include/asm/Kbuild   |   4 -
 arch/score/include/uapi/asm/Kbuild  |  32 --
 arch/sh/include/uapi/asm/Kbuild |  23 --
 arch/sparc/include/uapi/asm/Kbuild  |  48 ---
 arch/tile/include/asm/Kbuild|   3 -
 arch/tile/include/uapi/arch/Kbuild  |  17 -
 arch/tile/include/uapi/asm/Kbuild   |  19 +-
 arch/unicore32/include/uapi/asm/Kbuild  |   6 -
 arch/x86/include/uapi/asm/Kbuild|  59 
 arch/xtensa/include/uapi/asm/Kbuild |  23 --
 include/Kbuild  |   2 -
 include/asm-generic/Kbuild.asm  |   1 -
 include/scsi/fc/Kbuild  |   0
 include/uapi/Kbuild |  15 -
 include/uapi/asm-generic/Kbuild |  36 ---
 include/uapi/asm-generic/Kbuild.asm |  62 ++--
 include/uapi/drm/Kbuild |  22 --
 include/uapi/linux/Kbuild   | 482 
 include/uapi/linux/android/Kbuild   |   2 -
 include/uapi/linux/byteorder/Kbuild |   3 -
 include/uapi/linux/caif/Kbuild  |   3 -
 include/uapi/linux/can/Kbuild   |   6 -
 include/uapi/linux/dvb/Kbuild   |   9 -
 include/uapi/linux/hdlc/Kbuild  |   2 -
 include/uapi/linux/hsi/Kbuild   |   2 -
 include/uapi/linux/iio/Kbuild   |   3 -
 include/uapi/linux/isdn/Kbuild  |   2 -
 include/uapi/linux/mmc/Kbuild   |   2 -
 include/uapi/linux/netfilter/Kbuild |  89 -
 include/uapi/linux/netfilter/ipset/Kbuild   |   5 -
 include/uapi/linux/netfilter_arp/Kbuild |   3 -
 include/uapi/linux/netfilter_bridge/Kbuild  |  18 --
 include/uapi/linux/netfilter_ipv4/Kbuild|  10 -
 include/uapi/linux/netfilter_ipv6/Kbuild|  13 -
 include/uapi/linux/nfsd/Kbuild  |   6 -
 include/uapi/linux/raid/Kbuild  |   3 -
 include/uapi/linux/spi/Kbuild

[PATCH net-next] net:add one common config ARCH_WANT_RELAX_ORDER to support relax ordering.

2017-01-06 Thread Mao Wenan

Relax ordering(RO) is one feature of 82599 NIC, to enable this feature can
enhance the performance for some cpu architecure, such as SPARC and so on.
Currently it only supports one special cpu architecture(SPARC) in 82599
driver to enable RO feature, this is not very common for other cpu architecture
which really needs RO feature.
This patch add one common config CONFIG_ARCH_WANT_RELAX_ORDER to set RO feature,
and should define CONFIG_ARCH_WANT_RELAX_ORDER in sparc Kconfig firstly.

Signed-off-by: Mao Wenan 
---
 arch/sparc/Kconfig  | 1 +
 drivers/net/ethernet/intel/ixgbe/ixgbe_common.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index cf4034c..68ac5c7 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -44,6 +44,7 @@ config SPARC
select CPU_NO_EFFICIENT_FFS
select HAVE_ARCH_HARDENED_USERCOPY
select PROVE_LOCKING_SMALL if PROVE_LOCKING
+   select ARCH_WANT_RELAX_ORDER
 
 config SPARC32
def_bool !64BIT
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 094e1d6..c38d50c 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -350,7 +350,7 @@ s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw)
}
IXGBE_WRITE_FLUSH(hw);
 
-#ifndef CONFIG_SPARC
+#ifndef CONFIG_ARCH_WANT_RELAX_ORDER
/* Disable relaxed ordering */
for (i = 0; i < hw->mac.max_tx_queues; i++) {
u32 regval;
-- 
2.7.0

Re: [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue

2017-01-06 Thread Jerome Brunet

On Thu, 2017-01-05 at 23:25 +, Russell King - ARM Linux wrote:
> On Mon, Nov 28, 2016 at 09:54:28AM -0800, Florian Fainelli wrote:
> > 
> > If we start supporting generic "enable", "disable" type of
> > properties
> > with values that map directly to register definitions of the HW, we
> > leave too much room for these properties to be utilized to
> > implement a
> > specific policy, and this is not acceptable.
> 
> Another concern with this patch is that the existing phylib "set_eee"
> code is horribly buggy - it just translates the modes from userspace
> into the register value and writes them directly to the register with
> no validation.  So it's possible to set modes in the register that
> the
> hardware doesn't support, and have them advertised to the link
> partner.

Hi Russell,

The purpose of this patch is to provide a way to mark as broken a
particular eee mode. At first, it had nothing to do with "set_eee" but,
as Florian rightly pointed out, users shouldn't be able to re-enable a
broken mode.

At first, I was thinking about returning -ENOSUP if a broken mode was
requested. Then I noticed the behavior you just described: A user can
request anything of "set_eee", he won't necessarily get what he asked
but won't get an error either.

To avoid mixing different topic in a single patch, I kept the same
behavior, not returning an error, just silently discarding broken modes

I agree with you, we should probably validate a bit more what we asked
of the hardware in set_eee.

I wonder if we should return an error though. With the current
implementation, user space application could simply ask to activate
everything, excepting the kernel to sort it out and return an error
only if something horribly wrong happened. If we start returning an
error for unsupported modes, we could break things. I guess we should
just silently filter the requested modes.

> 
> I have a patch which fixes that, restricting (as we do elsewhere) the
> advert according to the EEE supported capabilities retrieved from the
> PCS

Could be interesting :)

>  - maybe the problem here is that the PCS doesn't support support
> EEE in 1000baseT mode?

It does, and that's kind of the problem. EEE in ON for 100Tx and 1000T
by default with this PHY. I have several platform with the same MAC-PHY 
combination. Only the OdroidC2 shows this particular issue with 1000T-
EEE

As explained in other mails in this thread. The problem does not come
from the MAC entering LPI. It actually comes from the link partner
entering LPI on the Rx path under significant Tx transfer. For some
reason, this completely mess up our PHY.

> 
> Out of interest, which PHY is used on this platform?

The PHY is the Realtek RTL8211F

> 
> On the SolidRun boards, they're using AR8035, and have suffered this
> occasional link drop problem.  What has been found is that it seems
> to
> be to do with the timing parameters, and it seemed to only be 1000bT
> that was affected.  I don't remember off hand exactly which or what
> the change was they made to stabilise it though, but I can probabily
> find out tomorrow.
> 

Since the same combination of MAC-PHY works well on other designs, it
is also my feeling that is has something to do with some timing
parameter, maybe related to this particular PCB.

While debugging this issue, we tried to play with all the parameters we
could think of but never found anything worth mentioning.

If you have any ideas, I'd be happy to try.

Jerome

Re: [PATCH v1 1/2] bpf: add a longest prefix match trie map implementation

2017-01-06 Thread Daniel Borkmann


On 01/05/2017 09:14 PM, Daniel Mack wrote:
[...]

In my use case, the actual value of a node is in fact ignored, all that
matters is whether a node exists in a trie or not. The test code uses
u64 for its tests.

I can change it around so that the value size can be defined by
userspace, but ideally it would also support 0-byte lengths then. The
bpf map syscall handler should handle the latter just fine if I read the
code correctly?


Right now no map is allowed to have value size of 0, but since kmalloc()
would return ZERO_SIZE_PTR in such case, it looks like it should
work^tm, although I haven't checked whether it's guaranteed that all
the copy_{from,to}_user() implementations work with 0 size as well
and whether ubsan would complain on the ZERO_SIZE_PTR for memcpy() etc.
Perhaps better to reject value size of 0 initially and later on follow
up with making the syscall code more robust for such cases (afaik, for
the htab this was also on todo.)?

Thanks,
Daniel

[net-next 08/10] igb: close/suspend race in netif_device_detach

2017-01-06 Thread Jeff Kirsher

From: Todd Fujinaka 

Similar to ixgbe, when an interface is part of a namespace it is
possible that igb_close() may be called while __igb_shutdown() is
running which ends up in a double free WARN and/or a BUG in
free_msi_irqs().

Extend the rtnl_lock() to protect the call to netif_device_detach() and
igb_clear_interrupt_scheme() in __igb_shutdown() and check for
netif_device_present() to avoid calling igb_clear_interrupt_scheme() a
second time in igb_close().

Also extend the rtnl lock in igb_resume() to netif_device_attach().

Signed-off-by: Todd Fujinaka 
Acked-by: Alexander Duyck 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/igb_main.c | 21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c 
b/drivers/net/ethernet/intel/igb/igb_main.c
index 82069bc..594604e 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -3275,7 +3275,9 @@ static int __igb_close(struct net_device *netdev, bool 
suspending)
 
 int igb_close(struct net_device *netdev)
 {
-   return __igb_close(netdev, false);
+   if (netif_device_present(netdev))
+   return __igb_close(netdev, false);
+   return 0;
 }
 
 /**
@@ -7564,6 +7566,7 @@ static int __igb_shutdown(struct pci_dev *pdev, bool 
*enable_wake,
int retval = 0;
 #endif
 
+   rtnl_lock();
netif_device_detach(netdev);
 
if (netif_running(netdev))
@@ -7572,6 +7575,7 @@ static int __igb_shutdown(struct pci_dev *pdev, bool 
*enable_wake,
igb_ptp_suspend(adapter);
 
igb_clear_interrupt_scheme(adapter);
+   rtnl_unlock();
 
 #ifdef CONFIG_PM
retval = pci_save_state(pdev);
@@ -7690,16 +7694,15 @@ static int igb_resume(struct device *dev)
 
wr32(E1000_WUS, ~0);
 
-   if (netdev->flags & IFF_UP) {
-   rtnl_lock();
+   rtnl_lock();
+   if (!err && netif_running(netdev))
err = __igb_open(netdev, true);
-   rtnl_unlock();
-   if (err)
-   return err;
-   }
 
-   netif_device_attach(netdev);
-   return 0;
+   if (!err)
+   netif_device_attach(netdev);
+   rtnl_unlock();
+
+   return err;
 }
 
 static int igb_runtime_idle(struct device *dev)
-- 
2.9.3

[net-next 04/10] igb: Workaround for igb i210 firmware issue

2017-01-06 Thread Jeff Kirsher

From: Chris J Arges 

Sometimes firmware may not properly initialize I347AT4_PAGE_SELECT causing
the probe of an igb i210 NIC to fail. This patch adds an addition zeroing
of this register during igb_get_phy_id to workaround this issue.

Thanks for Jochen Henneberg for the idea and original patch.

Signed-off-by: Chris J Arges 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_phy.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c 
b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 5b54254..569ee25 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -77,6 +77,10 @@ s32 igb_get_phy_id(struct e1000_hw *hw)
s32 ret_val = 0;
u16 phy_id;
 
+   /* ensure PHY page selection to fix misconfigured i210 */
+   if (hw->mac.type == e1000_i210)
+   phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0);
+
ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
if (ret_val)
goto out;
-- 
2.9.3

[net-next 06/10] igb: reset the PHY before reading the PHY ID

2017-01-06 Thread Jeff Kirsher

From: Aaron Sierra 

Several people have reported firmware leaving the I210/I211 PHY's page
select register set to something other than the default of zero. This
causes the first accesses, PHY_IDx register reads, to access something
else, resulting in device probe failure:

igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
igb: Copyright (c) 2007-2014 Intel Corporation.
igb: probe of :01:00.0 failed with error -2

This problem began for them after a previous patch I submitted was
applied:

commit 2a3cdead8b408351fa1e3079b220fa331480ffbc
Author: Aaron Sierra 
Date:   Tue Nov 3 12:37:09 2015 -0600

igb: Remove GS40G specific defines/functions

I personally experienced this problem after attempting to PXE boot from
I210 devices using this firmware:

Intel(R) Boot Agent GE v1.5.78
Copyright (C) 1997-2014, Intel Corporation

Resetting the PHY before reading from it, ensures the page select
register is in its default state and doesn't make assumptions about
the PHY's register set before the PHY has been probed.

Cc: Matwey V. Kornilov 
Cc: Chris Arges 
Cc: Jochen Henneberg 
Signed-off-by: Aaron Sierra 
Tested-by: Matwey V. Kornilov 
Tested-by: Chris J Arges 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_82575.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c 
b/drivers/net/ethernet/intel/igb/e1000_82575.c
index a61447f..ee44398 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -245,6 +245,17 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >>
E1000_STATUS_FUNC_SHIFT;
 
+   /* Make sure the PHY is in a good state. Several people have reported
+* firmware leaving the PHY's page select register set to something
+* other than the default of zero, which causes the PHY ID read to
+* access something other than the intended register.
+*/
+   ret_val = hw->phy.ops.reset(hw);
+   if (ret_val) {
+   hw_dbg("Error resetting the PHY.\n");
+   goto out;
+   }
+
/* Set phy->phy_addr and phy->id. */
ret_val = igb_get_phy_id_82575(hw);
if (ret_val)
-- 
2.9.3

[net-next 07/10] igb: re-assign hw address pointer on reset after PCI error

2017-01-06 Thread Jeff Kirsher

From: Guilherme G Piccoli 

Whenever the igb driver detects the result of a read operation returns
a value composed only by F's (like 0x), it will detach the
net_device, clear the hw_addr pointer and warn to the user that adapter's
link is lost - those steps happen on igb_rd32().

In case a PCI error happens on Power architecture, there's a recovery
mechanism called EEH, that will reset the PCI slot and call driver's
handlers to reset the adapter and network functionality as well.

We observed that once hw_addr is NULL after the error is detected on
igb_rd32(), it's never assigned back, so in the process of resetting
the network functionality we got a NULL pointer dereference in both
igb_configure_tx_ring() and igb_configure_rx_ring(). In order to avoid
such bug, this patch re-assigns the hw_addr value in the slot_reset
handler.

Reported-by: Anthony H Thai 
Reported-by: Harsha Thyagaraja 
Signed-off-by: Guilherme G Piccoli 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/igb_main.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c 
b/drivers/net/ethernet/intel/igb/igb_main.c
index 1e4bd84..82069bc 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -7898,6 +7898,11 @@ static pci_ers_result_t igb_io_slot_reset(struct pci_dev 
*pdev)
pci_enable_wake(pdev, PCI_D3hot, 0);
pci_enable_wake(pdev, PCI_D3cold, 0);
 
+   /* In case of PCI error, adapter lose its HW address
+* so we should re-assign it here.
+*/
+   hw->hw_addr = adapter->io_addr;
+
igb_reset(adapter);
wr32(E1000_WUS, ~0);
result = PCI_ERS_RESULT_RECOVERED;
-- 
2.9.3

[net-next 05/10] igb: use igb_adapter->io_addr instead of e1000_hw->hw_addr

2017-01-06 Thread Jeff Kirsher

From: Cao jin 

When running as guest, under certain condition, it will oops as following.
writel() in igb_configure_tx_ring() results in oops, because hw->hw_addr
is NULL. While other register access won't oops kernel because they use
wr32/rd32 which have a defense against NULL pointer.

[  141.225449] pcieport :00:1c.0: AER: Multiple Uncorrected (Fatal)
error received: id=0101
[  141.225523] igb :01:00.1: PCIe Bus Error:
severity=Uncorrected (Fatal), type=Unaccessible,
id=0101(Unregistered Agent ID)
[  141.299442] igb :01:00.1: broadcast error_detected message
[  141.300539] igb :01:00.0 enp1s0f0: PCIe link lost, device now
detached
[  141.351019] igb :01:00.1 enp1s0f1: PCIe link lost, device now
detached
[  143.465904] pcieport :00:1c.0: Root Port link has been reset
[  143.465994] igb :01:00.1: broadcast slot_reset message
[  143.466039] igb :01:00.0: enabling device ( -> 0002)
[  144.389078] igb :01:00.1: enabling device ( -> 0002)
[  145.312078] igb :01:00.1: broadcast resume message
[  145.322211] BUG: unable to handle kernel paging request at
3818
[  145.361275] IP: []
igb_configure_tx_ring+0x14d/0x280 [igb]
[  145.400048] PGD 0
[  145.438007] Oops: 0002 [#1] SMP

A similar issue & solution could be found at:
http://patchwork.ozlabs.org/patch/689592/

Signed-off-by: Cao jin 
Acked-by: Alexander Duyck 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/igb_main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c 
b/drivers/net/ethernet/intel/igb/igb_main.c
index a761001..1e4bd84 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -3394,7 +3394,7 @@ void igb_configure_tx_ring(struct igb_adapter *adapter,
 tdba & 0xULL);
wr32(E1000_TDBAH(reg_idx), tdba >> 32);
 
-   ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
+   ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
wr32(E1000_TDH(reg_idx), 0);
writel(0, ring->tail);
 
@@ -3733,7 +3733,7 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
 ring->count * sizeof(union e1000_adv_rx_desc));
 
/* initialize head and tail */
-   ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
+   ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
wr32(E1000_RDH(reg_idx), 0);
writel(0, ring->tail);
 
-- 
2.9.3

[net-next 01/10] igb: Realign bad indentation

2017-01-06 Thread Jeff Kirsher

From: Joe Perches 

Statements should start on tabstops.

Use a single statement and test instead of multiple tests.

Signed-off-by: Joe Perches 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_mac.c | 15 ++-
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c 
b/drivers/net/ethernet/intel/igb/e1000_mac.c
index 5010e22..5eff826 100644
--- a/drivers/net/ethernet/intel/igb/e1000_mac.c
+++ b/drivers/net/ethernet/intel/igb/e1000_mac.c
@@ -792,15 +792,13 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)
 * control setting, then the variable hw->fc will
 * be initialized based on a value in the EEPROM.
 */
-   if (hw->mac.type == e1000_i350) {
+   if (hw->mac.type == e1000_i350)
lan_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func);
-   ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG
-  + lan_offset, 1, &nvm_data);
-} else {
-   ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG,
-  1, &nvm_data);
-}
+   else
+   lan_offset = 0;
 
+   ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG + lan_offset,
+  1, &nvm_data);
if (ret_val) {
hw_dbg("NVM Read Error\n");
goto out;
@@ -808,8 +806,7 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)
 
if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
hw->fc.requested_mode = e1000_fc_none;
-   else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
-NVM_WORD0F_ASM_DIR)
+   else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR)
hw->fc.requested_mode = e1000_fc_tx_pause;
else
hw->fc.requested_mode = e1000_fc_full;
-- 
2.9.3

[net-next 09/10] igb: add i211 to i210 PHY workaround

2017-01-06 Thread Jeff Kirsher

From: Todd Fujinaka 

i210 and i211 share the same PHY but have different PCI IDs. Don't
forget i211 for any i210 workarounds.

Signed-off-by: Todd Fujinaka 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_phy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c 
b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 569ee25..2788a54 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -78,7 +78,7 @@ s32 igb_get_phy_id(struct e1000_hw *hw)
u16 phy_id;
 
/* ensure PHY page selection to fix misconfigured i210 */
-   if (hw->mac.type == e1000_i210)
+   if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0);
 
ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
-- 
2.9.3

[PATCH v5 1/3] stmmac: adding DT parameter for LPI tx clock gating

2017-01-06 Thread Joao Pinto

This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating.
It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock
gating is needed by stmmac users also.

Signed-off-by: Joao Pinto 
---
changes v1 -> v5:
- Nothing changed, just to keep up patch set version

 Documentation/devicetree/bindings/net/stmmac.txt  | 2 ++
 drivers/net/ethernet/stmicro/stmmac/common.h  | 3 ++-
 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c  | 5 -
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h  | 1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++-
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +++
 include/linux/stmmac.h| 1 +
 8 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 128da75..a0c749f 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -49,6 +49,8 @@ Optional properties:
 - snps,force_sf_dma_mode   Force DMA to use the Store and Forward
mode for both tx and rx. This flag is
ignored if force_thresh_dma_mode is set.
+- snps,en-tx-lpi-clockgating   Enable gating of the MAC TX clock during
+   TX low-power mode
 - snps,multicast-filter-bins:  Number of multicast filter hash bins
supported by this device instance
 - snps,perfect-filter-entries: Number of perfect filter entries supported
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 6c96291..75e2666 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -476,7 +476,8 @@ struct stmmac_ops {
  unsigned int reg_n);
void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
  unsigned int reg_n);
-   void (*set_eee_mode)(struct mac_device_info *hw);
+   void (*set_eee_mode)(struct mac_device_info *hw,
+bool en_tx_lpi_clockgating);
void (*reset_eee_mode)(struct mac_device_info *hw);
void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
void (*set_eee_pls)(struct mac_device_info *hw, int link);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index be3c91c..a5ffca1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info 
*hw,
return ret;
 }
 
-static void dwmac1000_set_eee_mode(struct mac_device_info *hw)
+static void dwmac1000_set_eee_mode(struct mac_device_info *hw,
+  bool en_tx_lpi_clockgating)
 {
void __iomem *ioaddr = hw->pcsr;
u32 value;
 
+   /*TODO - en_tx_lpi_clockgating treatment */
+
/* Enable the link status receive on RGMII, SGMII ore SMII
 * receive path and instruct the transmit to enter in LPI
 * state.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 73d1dab..db45134 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -98,6 +98,7 @@ enum power_event {
 #define GMAC4_LPI_TIMER_CTRL   0xd4
 
 /* LPI control and status defines */
+#define GMAC4_LPI_CTRL_STATUS_LPITCSE  BIT(21) /* LPI Tx Clock Stop Enable */
 #define GMAC4_LPI_CTRL_STATUS_LPITXA   BIT(19) /* Enable LPI TX Automate */
 #define GMAC4_LPI_CTRL_STATUS_PLS  BIT(17) /* PHY Link Status */
 #define GMAC4_LPI_CTRL_STATUS_LPIENBIT(16) /* LPI Enable */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 02eab79..834f40f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,
   GMAC_ADDR_LOW(reg_n));
 }
 
-static void dwmac4_set_eee_mode(struct mac_device_info *hw)
+static void dwmac4_set_eee_mode(struct mac_device_info *hw,
+   bool en_tx_lpi_clockgating)
 {
void __iomem *ioaddr = hw->pcsr;
u32 value;
@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw)
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
 
+   if (en_tx_lpi_clockgating)
+   value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;
+
writel(value, ioaddr + GMAC4_

[net-next 02/10] e1000e: driver trying to free already-free irq

2017-01-06 Thread Jeff Kirsher

From: khalidm 

During systemd reboot sequence network driver interface is shutdown
by e1000_close. The PCI driver interface is shut by e1000_shutdown.
The e1000_shutdown checks for netif_running status, if still up it
brings down driver. But it disables msi outside of this if statement,
regardless of netif status. All this is OK when e1000_close happens
after shutdown. However, by default, everything in systemd is done
in parallel. This creates a conditions where e1000_shutdown is called
after e1000_close, therefore hitting BUG_ON assert in free_msi_irqs.

CC: xe-ker...@external.cisco.com
Signed-off-by: khalidm 
Signed-off-by: David Singleton 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/e1000e/netdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c 
b/drivers/net/ethernet/intel/e1000e/netdev.c
index eccf1da..af39608 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -6276,8 +6276,8 @@ static int e1000e_pm_freeze(struct device *dev)
/* Quiesce the device without resetting the hardware */
e1000e_down(adapter, false);
e1000_free_irq(adapter);
+   e1000e_reset_interrupt_capability(adapter);
}
-   e1000e_reset_interrupt_capability(adapter);
 
/* Allow time for pending master requests to run */
e1000e_disable_pcie_master(&adapter->hw);
-- 
2.9.3

[net-next 03/10] igb: correct register comments

2017-01-06 Thread Jeff Kirsher

From: Cao jin 

Signed-off-by: Cao jin 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h 
b/drivers/net/ethernet/intel/igb/e1000_regs.h
index d84afdd..58adbf2 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -320,7 +320,7 @@
 #define E1000_VT_CTL   0x0581C  /* VMDq Control - RW */
 #define E1000_WUC  0x05800  /* Wakeup Control - RW */
 #define E1000_WUFC 0x05808  /* Wakeup Filter Control - RW */
-#define E1000_WUS  0x05810  /* Wakeup Status - RO */
+#define E1000_WUS  0x05810  /* Wakeup Status - R/W1C */
 #define E1000_MANC 0x05820  /* Management Control - RW */
 #define E1000_IPAV 0x05838  /* IP Address Valid - RW */
 #define E1000_WUPL 0x05900  /* Wakeup Packet Length - RW */
-- 
2.9.3

[net-next 10/10] igb: Fix hw_dbg logging in igb_update_flash_i210

2017-01-06 Thread Jeff Kirsher

From: Hannu Lounento 

Fix an if statement with hw_dbg lines where the logic was inverted with
regards to the corresponding return value used in the if statement.

Signed-off-by: Hannu Lounento 
Signed-off-by: Peter Senna Tschudin 
Tested-by: Aaron Brown 
Signed-off-by: Jeff Kirsher 
---
 drivers/net/ethernet/intel/igb/e1000_i210.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c 
b/drivers/net/ethernet/intel/igb/e1000_i210.c
index 8aa7987..07d48f2 100644
--- a/drivers/net/ethernet/intel/igb/e1000_i210.c
+++ b/drivers/net/ethernet/intel/igb/e1000_i210.c
@@ -699,9 +699,9 @@ static s32 igb_update_flash_i210(struct e1000_hw *hw)
 
ret_val = igb_pool_flash_update_done_i210(hw);
if (ret_val)
-   hw_dbg("Flash update complete\n");
-   else
hw_dbg("Flash update time out\n");
+   else
+   hw_dbg("Flash update complete\n");
 
 out:
return ret_val;
-- 
2.9.3

[PATCH v5 0/3] adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread Joao Pinto

This patch set contains the porting of the synopsys/dwc_eth_qos.c driver
to the stmmac structure. This operation resulted in the creation of a new
platform glue driver called dwmac-dwc-qos-eth which was based in the
dwc_eth_qos as is.

dwmac-dwc-qos-eth inherited dwc_eth_qos DT bindings, to assure that current
and old users can continue to use it as before. We can see this driver as
being deprecated, since all new development will be done in stmmac.

Please check each patch for implementation details.

Joao Pinto (3):
  stmmac: adding DT parameter for LPI tx clock gating
  stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform
structure
  stmmac: adding new glue driver dwmac-dwc-qos-eth

 .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
 Documentation/devicetree/bindings/net/stmmac.txt   |   2 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 drivers/net/ethernet/stmicro/stmmac/common.h   |   3 +-
 .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 202 +
 .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c|   2 +-
 .../net/ethernet/stmicro/stmmac/dwmac1000_core.c   |   5 +-
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c  |   6 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac.h   |   5 -
 .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c   |   4 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  |  85 ++---
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  65 ++-
 include/linux/stmmac.h |   6 +
 15 files changed, 317 insertions(+), 82 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

-- 
2.9.3

[PATCH v5 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread Joao Pinto

This patch adds a new glue driver called dwmac-dwc-qos-eth which
was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
tweak was also added to stmmac_platform.

Signed-off-by: Joao Pinto 
---
changes v4 -> v5:
- memset was not done properly
changes v3 -> v4:
- stmmac_res is now being initialized to 0
changes v2 -> v3:
- Nothing changed, just to keep up patch set version
changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)

 .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 202 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  15 +-
 5 files changed, 227 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt 
b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index d93f71c..21d27aa 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
@@ -1,5 +1,8 @@
 * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
 
+This binding is deprecated, but it continues to be supported, but new
+features should be preferably added to the stmmac binding document.
+
 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
 IP block. The IP supports multiple options for bus type, clocking and reset
 structure, and feature list. Consequently, a number of properties and list
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab66248..99594e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM
 
 if STMMAC_PLATFORM
 
+config DWMAC_DWC_QOS_ETH
+   tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
+   select PHYLIB
+   select CRC32
+   select MII
+   depends on OF && HAS_DMA
+   help
+ Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
+
 config DWMAC_GENERIC
tristate "Generic driver for DWMAC"
default STMMAC_PLATFORM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 8f83a86..700c603 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA)   += dwmac-altr-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)  += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)  += dwmac-sunxi.o
+obj-$(CONFIG_DWMAC_DWC_QOS_ETH)+= dwmac-dwc-qos-eth.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
 dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
new file mode 100644
index 000..7bdbc77
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -0,0 +1,202 @@
+/*
+ * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
+ *
+ * Copyright (C) 2016 Joao Pinto 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stmmac_platform.h"
+
+static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
+  struct plat_stmmacenet_data *plat_dat)
+{
+   struct device_node *np = pdev->dev.of_node;
+   u32 burst_map = 0;
+   u32 bit_index = 0;
+   u32 a_index = 0;
+
+   if (!plat_dat->axi) {
+   plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
+
+   if (!plat_dat->axi)
+   return -ENOMEM;
+   }
+
+   plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
+   if (of_property_read_u32(np, "snps,write-requests",
+&plat_dat->axi->axi_wr_osr_lmt)) {
+   /**
+* Since the register has a reset value of 1, if property
+* is missing, default to 1.
+*/
+   plat_dat->axi->axi_wr_osr_lmt = 1;
+   } else {
+   /**
+* If property exists, to keep the behavior from dwc_eth_qos,
+*

[net-next 00/10][pull request] 1GbE Intel Wired LAN Driver Updates 2017-01-06

2017-01-06 Thread Jeff Kirsher

This series contains updates/fixes to igb and e1000e.

Joe fixes indentation and improper line wrapping in igb.

David Singleton fixes an issue in e1000e where in systemd, where things
are done in parallel and can create a condition where e1000_shutdown is
called after e1000_close, hitting BUG_ON assert in free_msi_irqs.

Cao Jin fixes a code comment on the wakeup status register.  Also fixes
a possible NULL pointer dereference by using igb_adapter->io_addr
instead of e1000_hw->hw_addr in igb_configure_tx_ring().

Chris Arges works around a firmware issue, which can cause probe of i210
NIC to fail, so zero the page select register during igb_get_phy_id() to
workaround the issue.  Aaron Sierra adds also a check for this issue
during the initialization of PHY parameters to ensure that this same
issue happens after probe.

Todd fixes a possible race condition in close/suspend by extending
the rtnl_lock() to protect the call to netif_device_detach() and
igb_clear_interrupt_scheme().  Also adds i211 to a known i210/i211
workaround.

Hannu Lounento fixes inverted logic on a debug statement.

The following are changes since commit c1878f7a89efbbe1ac0082d09b2928782a6ceba1:
  tools: psock_tpacket: block Rx until socket filter has been added and socket 
has been bound to loopback.
and are available in the git repository at:
  git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue 1GbE

Aaron Sierra (1):
  igb: reset the PHY before reading the PHY ID

Cao jin (2):
  igb: correct register comments
  igb: use igb_adapter->io_addr instead of e1000_hw->hw_addr

Chris J Arges (1):
  igb: Workaround for igb i210 firmware issue

Guilherme G Piccoli (1):
  igb: re-assign hw address pointer on reset after PCI error

Hannu Lounento (1):
  igb: Fix hw_dbg logging in igb_update_flash_i210

Joe Perches (1):
  igb: Realign bad indentation

Todd Fujinaka (2):
  igb: close/suspend race in netif_device_detach
  igb: add i211 to i210 PHY workaround

khalidm (1):
  e1000e: driver trying to free already-free irq

 drivers/net/ethernet/intel/e1000e/netdev.c   |  2 +-
 drivers/net/ethernet/intel/igb/e1000_82575.c | 11 ++
 drivers/net/ethernet/intel/igb/e1000_i210.c  |  4 ++--
 drivers/net/ethernet/intel/igb/e1000_mac.c   | 15 ++
 drivers/net/ethernet/intel/igb/e1000_phy.c   |  4 
 drivers/net/ethernet/intel/igb/e1000_regs.h  |  2 +-
 drivers/net/ethernet/intel/igb/igb_main.c| 30 ++--
 7 files changed, 44 insertions(+), 24 deletions(-)

-- 
2.9.3

[PATCH v5 2/3] stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure

2017-01-06 Thread Joao Pinto

This patch moves stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to the
plat_stmmacenet_data structure. It also moves these platform variables
initialization to stmmac_platform. This was done for two reasons:

a) If PCI is used, platform related code is being executed in stmmac_main
resulting in warnings that have no sense and conceptually was not right

b) stmmac as a synopsys reference ethernet driver stack will be hosting
more and more drivers to its structure like synopsys/dwc_eth_qos.c.
These drivers have their own DT bindings that are not compatible with
stmmac's. One of the most important are the clock names, and so they need
to be parsed in the glue logic and initialized there, and that is the main
reason why the clocks were passed to the platform structure.

Signed-off-by: Joao Pinto 
---
changes v3 -> v5:
- Nothing changed, just to keep up patch set version
changes v2 -> v3:
- dwmac-socfpga glue driver was also using stmmac_rst from priv struct and
was causing a build error caught by kbuild robot
changes v1 -> v2:
- Nothing changed, just to keep up patch set version

 .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c|  2 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac.h   |  5 --
 .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c   |  4 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 82 --
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 47 +
 include/linux/stmmac.h |  5 ++
 6 files changed, 70 insertions(+), 75 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 1f99702..17d4bba 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)
 * mode. Create a copy of the core reset handle so it can be used by
 * the driver later.
 */
-   dwmac->stmmac_rst = stpriv->stmmac_rst;
+   dwmac->stmmac_rst = stpriv->plat->stmmac_rst;
 
ret = socfpga_dwmac_set_phy_mode(dwmac);
if (ret)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h 
b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index eab04ae..bf8a83e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -106,9 +106,6 @@ struct stmmac_priv {
u32 msg_enable;
int wolopts;
int wol_irq;
-   struct clk *stmmac_clk;
-   struct clk *pclk;
-   struct reset_control *stmmac_rst;
int clk_csr;
struct timer_list eee_ctrl_timer;
int lpi_irq;
@@ -120,8 +117,6 @@ struct stmmac_priv {
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_ops;
unsigned int default_addend;
-   struct clk *clk_ptp_ref;
-   unsigned int clk_ptp_rate;
u32 adv_ts;
int use_riwt;
int irq_wake;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 699ee1d..322e5c6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -712,7 +712,7 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,
 
 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
 {
-   unsigned long clk = clk_get_rate(priv->stmmac_clk);
+   unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 
if (!clk)
return 0;
@@ -722,7 +722,7 @@ static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv 
*priv)
 
 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
 {
-   unsigned long clk = clk_get_rate(priv->stmmac_clk);
+   unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 
if (!clk)
return 0;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index f1a0afc..6e6e9dc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -158,7 +158,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
 {
u32 clk_rate;
 
-   clk_rate = clk_get_rate(priv->stmmac_clk);
+   clk_rate = clk_get_rate(priv->plat->stmmac_clk);
 
/* Platform provided default clk_csr would be assumed valid
 * for all other cases except for the below mentioned ones.
@@ -607,7 +607,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, 
struct ifreq *ifr)
 
/* program Sub Second Increment reg */
sec_inc = priv->hw->ptp->config_sub_second_increment(
-   priv->ptpaddr, priv->clk_ptp_rate,
+   priv->ptpaddr, priv->plat->clk_ptp_rate,
priv->plat->has_gmac4);
temp = div_u64(10ULL, sec_inc);
 
@@ -617,7 +617,7 @@ static

[PATCH] vti6: fix device register to report IFLA_INFO_KIND

2017-01-06 Thread David Forster

vti6 interface is registered before the rtnl_link_ops block
is attached. As a result the resulting RTM_NEWLINK is missing
IFLA_INFO_KIND. Re-order attachment of rtnl_link_ops block to fix.

Signed-off-by: Dave Forster 
---
 net/ipv6/ip6_vti.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv6/ip6_vti.c b/net/ipv6/ip6_vti.c
index f4b4a4a..d82042c 100644
--- a/net/ipv6/ip6_vti.c
+++ b/net/ipv6/ip6_vti.c
@@ -189,12 +189,12 @@ static int vti6_tnl_create2(struct net_device *dev)
struct vti6_net *ip6n = net_generic(net, vti6_net_id);
int err;
 
+   dev->rtnl_link_ops = &vti6_link_ops;
err = register_netdevice(dev);
if (err < 0)
goto out;
 
strcpy(t->parms.name, dev->name);
-   dev->rtnl_link_ops = &vti6_link_ops;
 
dev_hold(dev);
vti6_tnl_link(ip6n, t);
-- 
2.1.4

[PATCH v2] phy state machine: failsafe leave invalid RUNNING state

2017-01-06 Thread Zefir Kurtisi

While in RUNNING state, phy_state_machine() checks for link changes by
comparing phydev->link before and after calling phy_read_status().
This works as long as it is guaranteed that phydev->link is never
changed outside the phy_state_machine().

If in some setups this happens, it causes the state machine to miss
a link loss and remain RUNNING despite phydev->link being 0.

This has been observed running a dsa setup with a process continuously
polling the link states over ethtool each second (SNMPD RFC-1213
agent). Disconnecting the link on a phy followed by a ETHTOOL_GSET
causes dsa_slave_get_settings() / dsa_slave_get_link_ksettings() to
call phy_read_status() and with that modify the link status - and
with that bricking the phy state machine.

This patch adds a fail-safe check while in RUNNING, which causes to
move to CHANGELINK when the link is gone and we are still RUNNING.

Signed-off-by: Zefir Kurtisi 
---
Changes to v1:
* fix kbuild test robot error: use phydev_err instead of dev_warn
  (adapt to changed struct phy_device after 4.4.21)
---
 drivers/net/phy/phy.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 25f93a9..48da6e9 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1065,6 +1065,15 @@ void phy_state_machine(struct work_struct *work)
if (old_link != phydev->link)
phydev->state = PHY_CHANGELINK;
}
+   /*
+* Failsafe: check that nobody set phydev->link=0 between two
+* poll cycles, otherwise we won't leave RUNNING state as long
+* as link remains down.
+*/
+   if (!phydev->link && phydev->state == PHY_RUNNING) {
+   phydev->state = PHY_CHANGELINK;
+   phydev_err(phydev, "no link in PHY_RUNNING\n");
+   }
break;
case PHY_CHANGELINK:
err = phy_read_status(phydev);
-- 
2.7.4

[net] bf7d953378: BUG:sleeping_function_called_from_invalid_context_at_kernel/locking/mutex.c

2017-01-06 Thread kernel test robot

FYI, we noticed the following commit:

commit: bf7d95337899f2e3ab5c14d6117fa7cd95a3d0d4 ("net: Fix inconsistent 
rtnl_lock usage on dev_get_stats().")
url: 
https://github.com/0day-ci/linux/commits/Michael-Chan/net-Fix-inconsistent-rtnl_lock-usage-on-dev_get_stats/20170106-144936


in testcase: boot

on test machine: qemu-system-x86_64 -enable-kvm -m 320M

caused below changes:


+-+++
| | 
71eae1ca77 | bf7d953378 |
+-+++
| boot_successes  | 
8  | 2  |
| boot_failures   | 
0  | 7  |
| BUG:sleeping_function_called_from_invalid_context_at_kernel/locking/mutex.c | 
0  | 7  |
| BUG:scheduling_while_atomic | 
0  | 7  |
| WARNING:at_arch/x86/lib/usercopy.c:#_copy_to_user   | 
0  | 7  |
+-+++



[8.959014] random: uci: uninitialized urandom read (6 bytes read)
[8.991559] random: uci: uninitialized urandom read (6 bytes read)
[9.004266] random: uci: uninitialized urandom read (6 bytes read)
[9.379490] BUG: sleeping function called from invalid context at 
kernel/locking/mutex.c:232
[9.383499] in_atomic(): 1, irqs_disabled(): 0, pid: 1816, name: dropbearkey
[9.386025] CPU: 0 PID: 1816 Comm: dropbearkey Not tainted 
4.10.0-rc1-00075-gbf7d953 #5
[9.389553] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 
1.9.3-20161025_171302-gandalf 04/01/2014
[9.393545] Call Trace:
[9.395029]  dump_stack+0x86/0xc0
[9.396698]  ___might_sleep+0x11a/0x129
[9.398482]  __might_sleep+0x77/0x7e


To reproduce:

git clone 
git://git.kernel.org/pub/scm/linux/kernel/git/wfg/lkp-tests.git
cd lkp-tests
bin/lkp qemu -k  job-script  # job-script is attached in this 
email



Thanks,
Kernel Test Robot
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86_64 4.10.0-rc1 Kernel Configuration
#
CONFIG_64BIT=y
CONFIG_X86_64=y
CONFIG_X86=y
CONFIG_INSTRUCTION_DECODER=y
CONFIG_OUTPUT_FORMAT="elf64-x86-64"
CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=28
CONFIG_ARCH_MMAP_RND_BITS_MAX=32
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ARCH_HAS_CPU_RELAX=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ZONE_DMA32=y
CONFIG_AUDIT_ARCH=y
CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_X86_64_SMP=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_DEBUG_RODATA=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
CONFIG_THREAD_INFO_IN_TASK=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
# CONFIG_AUDIT is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PENDING_IRQ=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y
CONFIG_GENERIC_TIME_VSYSCALL

Re: [PATCH ipsec-next] xfrm: state: do not acquire lock in get_mtu helpers

2017-01-06 Thread Steffen Klassert

On Thu, Jan 05, 2017 at 01:23:58PM +0100, Florian Westphal wrote:
> Once flow cache gets removed the mtu initialisation happens for every skb
> that gets an xfrm attached, so this lock starts to show up in perf.
> 
> It is not obvious why this lock is required -- the caller holds
> reference on the state struct, type->destructor is only called from the
> state gc worker (all state structs on gc list must have refcount 0).
> 
> xfrm_init_state already has been called (else private data accessed
> by type->get_mtu() would not be set up).
> 
> So just remove the lock -- the race on the state (DEAD?) doesn't
> matter (could change right after dropping the lock too).
> 
> Signed-off-by: Florian Westphal 

Applied to ipsec-next, thanks Florian!

Re: [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue

2017-01-06 Thread Russell King - ARM Linux

On Fri, Jan 06, 2017 at 11:11:36AM +0100, Jerome Brunet wrote:
> The purpose of this patch is to provide a way to mark as broken a
> particular eee mode. At first, it had nothing to do with "set_eee" but,
> as Florian rightly pointed out, users shouldn't be able to re-enable a
> broken mode.

I think something else has been missed - I don't see much point to
telling userspace that (eg) 1000baseT EEE is supported and then
ignore attempts to advertise it.

If it's broken, then arguably the hardware doesn't support the mode,
so we should really be masking those bits from the EEE supported mask
as well.

> I wonder if we should return an error though. With the current
> implementation, user space application could simply ask to activate
> everything, excepting the kernel to sort it out and return an error
> only if something horribly wrong happened. If we start returning an
> error for unsupported modes, we could break things. I guess we should
> just silently filter the requested modes.

The ethtool behaviour for advertisments is that errors are not returned
unless the attempted advert is really wrong.

So, for example, when setting an advertisment for link modes, we accept
the user's supplied mask, and bitwise AND it with the supported mask,
so unsupported link modes are cleared.  Only if the result is an empty
mask do we then return an error to userspace.

It's similar for forcing the link parameters - phylib attempts to find
the best phy setting mode which fuzzily matches the users request, but
doesn't error out if we can't do exactly what the user requested.

In the EEE case, an empty mask is acceptable (it means "EEE is supported
in no link modes") so it isn't appropriate to return errors there.

> >  - maybe the problem here is that the PCS doesn't support support
> > EEE in 1000baseT mode?
> 
> 
> It does, and that's kind of the problem. EEE in ON for 100Tx and 1000T
> by default with this PHY. I have several platform with the same MAC-PHY 
> combination. Only the OdroidC2 shows this particular issue with 1000T-
> EEE
> 
> As explained in other mails in this thread. The problem does not come
> from the MAC entering LPI. It actually comes from the link partner
> entering LPI on the Rx path under significant Tx transfer. For some
> reason, this completely mess up our PHY.

For a 1000baseT link to enter low power, both ends have to enter LPI
(see 802.3 78.1.3.3.1) - the Tx and Rx paths can't independently enter
LPI.

So, if you have a busy Tx link, the link itself can't be entering LPI.
Your link partner may be sending a request to enter LPI due to its own
Tx path being idle, which should then be forwarded to your MAC.

It's pretty hard to see what could be messed up with that - I'd have
expected the problems to occur when both ends were idle and the link
had entered low power mode.

> > On the SolidRun boards, they're using AR8035, and have suffered this
> > occasional link drop problem.  What has been found is that it seems
> > to
> > be to do with the timing parameters, and it seemed to only be 1000bT
> > that was affected.  I don't remember off hand exactly which or what
> > the change was they made to stabilise it though, but I can probabily
> > find out tomorrow.
> > 
> 
> Since the same combination of MAC-PHY works well on other designs, it
> is also my feeling that is has something to do with some timing
> parameter, maybe related to this particular PCB.

Maybe a different PHY interface?  Meson seems to use RGMII, maybe
others use SGMII - but then I'd expect 100base-Tx to also be broken.
So not really sure.

I was talking to Florian about that last night, because the mis-named
phy_init_eee() tests for various phy interface modes before proceeding,
which seems to be fairly rubbish as the list of interface modes is
gradually increasing since it was introduced (and I need to add SGMII
to it.)  The conclusion I've come to there is that the test should
never have been part of phylib, because if there are restrictions on
which phy interface modes are allowable for EEE, they're likely to be
either PHY or MAC specific.

The other problem that having the test there causes is that if the
existing users can't handle EEE over SGMII, then when I add SGMII to
support my hardware, they end up breaking - far from desirable.
There's no information on why the test is there, or even which PHYs
or MACs it's applicable to, which makes this unnecessarily more
difficult to now resolve.

My feeling is that the integration of EEE into phylib is fairly poor
at the moment, and we need to be a lot smarter about it.

BTW, one of the problems (not caused by your patch) is that changing
the EEE advertisment does not (on all PHY drivers) cause the link to
be renegotiated - there's no call to phy_start_aneg() when the advert
changes, and even if there was, there's no guarantee that
phy_start_aneg() will even set the AN restart bit in the control
register.

However, given that you're hooking into the set_eee function, I'm not
sure

Re: [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue

2017-01-06 Thread Russell King - ARM Linux

On Fri, Jan 06, 2017 at 06:42:24AM +0100, Yegor Yefremov wrote:
> On Fri, Jan 6, 2017 at 12:25 AM, Russell King - ARM Linux
>  wrote:
> > Another concern with this patch is that the existing phylib "set_eee"
> > code is horribly buggy - it just translates the modes from userspace
> > into the register value and writes them directly to the register with
> > no validation.  So it's possible to set modes in the register that the
> > hardware doesn't support, and have them advertised to the link partner.
> >
> > I have a patch which fixes that, restricting (as we do elsewhere) the
> > advert according to the EEE supported capabilities retrieved from the
> > PCS - maybe the problem here is that the PCS doesn't support support
> > EEE in 1000baseT mode?
> >
> > Out of interest, which PHY is used on this platform?
> >
> > On the SolidRun boards, they're using AR8035, and have suffered this
> > occasional link drop problem.  What has been found is that it seems to
> > be to do with the timing parameters, and it seemed to only be 1000bT
> > that was affected.  I don't remember off hand exactly which or what
> > the change was they made to stabilise it though, but I can probabily
> > find out tomorrow.
> 
> I have different boards with am335x and AR8035 and we had occasional
> link drop with both 100 and 1000 speeds.

AR8035 has "Smart EEE", which is a PHY specific thing... it's not
entirely 802.3 compliant as it doesn't involve the MAC.

The Smart EEE control registers are in the PCS MMD - some of this
is from people's memories:

- 0x805b is the TX wakeup timer.  Lower 8 bits for 100base-Tx and
  upper 8 bits for 1000base-T.

- 0x805c and 0x805d.
  The LPI timer is 24 bit, with the lower 16 bits in 0x805c and the
  upper 8 in 0x805d.  0x805d bit 8 appears to be the Smart EEE enable bit.

What was found was setting the 1000base-T wakeup timer to the same as
the 100base-Tx avoided the problems we were seeing, which was only
with 1000base-T.  (Whether that's because 100base-Tx hasn't been as well
tested, I don't know.)  SR ended up with 0x1717 in 0x805b.

I'd suggest playing around with that register to see if extending the
wakeup time has any beneficial effect.

Also, I suspect Smart EEE shouldn't be enabled if you have an EEE
capable MAC (in which case 0x805d bit 8 should be clear.)  I think,
however, it defaults to enabled.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Fixed link for 10G

2017-01-06 Thread Madalin-Cristian Bucur

Hi Florian,

I'm trying to add a fixed-link property that declares 10G speed
for a XGMII PHY and I'm encountering some issues as the fixed
link infrastructure does not seem to support this speed.

I'm using this device tree snippet (using the legacy format, but it
should not matter):

ethernet@f2000 { /* 10GEC2 */
fixed-link = <0 1 1 0 0>;
phy-connection-type = "xgmii";
};

and I get this error:

[0.464238] swphy: unknown speed
[0.467464] fsl_mac: probe of 1af2000.ethernet failed with error -22

Looking at the code, fixed_phy_register() seems to check for speeds up
to 1G and swphy only caters 1G and lower speeds, the swphy_decode_speed()
returning -EINVAL for 10G, triggering the error printed above in
swphy_validate_state().

What would be the proper way to add support for the 10G fixed link speed?

Thank you,
Madalin

[PATCH net-next] cxgb4/cxgb4vf: Display 25G and 100G link speed

2017-01-06 Thread Ganesh Goudar

Add support to report 25G and 100G links, which was missed
as part of commit "eb97ad99f9ed".

Signed-off-by: Ganesh Goudar 
---
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 20 +---
 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 21 -
 2 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c 
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 6f95187..db436ae 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -188,18 +188,24 @@ static void link_report(struct net_device *dev)
const struct port_info *p = netdev_priv(dev);
 
switch (p->link_cfg.speed) {
-   case 1:
-   s = "10Gbps";
+   case 100:
+   s = "100Mbps";
break;
case 1000:
-   s = "1000Mbps";
+   s = "1Gbps";
break;
-   case 100:
-   s = "100Mbps";
+   case 1:
+   s = "10Gbps";
+   break;
+   case 25000:
+   s = "25Gbps";
break;
case 4:
s = "40Gbps";
break;
+   case 10:
+   s = "100Gbps";
+   break;
default:
pr_info("%s: unsupported speed: %d\n",
dev->name, p->link_cfg.speed);
@@ -4397,9 +4403,9 @@ static void print_port_info(const struct net_device *dev)
spd = " 8 GT/s";
 
if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M)
-   bufp += sprintf(bufp, "100/");
+   bufp += sprintf(bufp, "100M/");
if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_1G)
-   bufp += sprintf(bufp, "1000/");
+   bufp += sprintf(bufp, "1G/");
if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G)
bufp += sprintf(bufp, "10G/");
if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_25G)
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c 
b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
index 0d1a134..ac7a150 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
@@ -158,20 +158,23 @@ void t4vf_os_link_changed(struct adapter *adapter, int 
pidx, int link_ok)
netif_carrier_on(dev);
 
switch (pi->link_cfg.speed) {
-   case 4:
-   s = "40Gbps";
+   case 100:
+   s = "100Mbps";
+   break;
+   case 1000:
+   s = "1Gbps";
break;
-
case 1:
s = "10Gbps";
break;
-
-   case 1000:
-   s = "1000Mbps";
+   case 25000:
+   s = "25Gbps";
break;
-
-   case 100:
-   s = "100Mbps";
+   case 4:
+   s = "40Gbps";
+   break;
+   case 10:
+   s = "100Gbps";
break;
 
default:
-- 
2.1.0

Re: [PATCH v2 4/7] x86: put msr-index.h in uapi

2017-01-06 Thread Borislav Petkov

On Fri, Jan 06, 2017 at 10:43:56AM +0100, Nicolas Dichtel wrote:
> This header file is exported, thus move it to uapi.

It should rather not be exported - please remove it from
arch/x86/include/uapi/asm/Kbuild instead.

Thanks.

-- 
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH v4] rfkill: Add rfkill-any LED trigger

2017-01-06 Thread Johannes Berg

On Fri, 2017-01-06 at 07:07 +0100, Michał Kępień wrote:
> Add a new "global" (i.e. not per-rfkill device) LED trigger, rfkill-
> any,
> which may be useful on laptops with a single "radio LED" and multiple
> radio transmitters.  The trigger is meant to turn a LED on whenever
> there is at least one radio transmitter active and turn it off
> otherwise.
> 
> Signed-off-by: Michał Kępień 
> ---
> Changes from v3:
> 
>   - Revert introducing a new bitfield and instead defer LED event
> firing
> to a work queue to prevent conditional locking and ensure the
> trigger can really be used from any context.  This also voids the
> need to take rfkill_global_mutex before calling
> rfkill_set_block()
> in rfkill_resume().

Looks better, but

> +static struct work_struct rfkill_any_work;

At least on module exit you need to cancel this work.

johannes

pull-request: mac80211 2017-01-06

2017-01-06 Thread Johannes Berg

Hi Dave,

Here's another fix for something I noticed while reviewing the code in
a new suggested patch that added another netlink socket destroy path.

Since the new patch would otherwise cause conflicts, it might be good
to pull net or Linus's next RC containing it into net-next, if you can.

Please pull and let me know if there's any problem.

Thanks,
johannes



The following changes since commit 35f432a03e41d3bf08c51ede917f94e2288fbe8c:

  mac80211: initialize fast-xmit 'info' later (2017-01-02 11:28:25 +0100)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git 
tags/mac80211-for-davem-2017-01-06

for you to fetch changes up to 753aacfd2e95df6a0caf23c03dc309020765bea9:

  nl80211: fix sched scan netlink socket owner destruction (2017-01-05 10:59:53 
+0100)


Another single fix, to correctly handle destruction of a
single netlink socket having ownership of multiple objects
(scheduled scan requests and interfaces.)


Johannes Berg (1):
  nl80211: fix sched scan netlink socket owner destruction

 net/wireless/nl80211.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

Re: [PATCH net-next] bridge: multicast to unicast

2017-01-06 Thread Johannes Berg

On Mon, 2017-01-02 at 20:32 +0100, Linus Lüssing wrote:
> Implements an optional, per bridge port flag and feature to deliver
> multicast packets to any host on the according port via unicast
> individually. This is done by copying the packet per host and
> changing the multicast destination MAC to a unicast one accordingly.

How does this compare and/or relate to the multicast-to-unicast feature
we were going to add to the wifi stack, particularly mac80211? Do we
perhaps not need that feature at all, if bridging will have it?

I suppose that the feature there could apply also to locally generated
traffic when the AP interface isn't in a bridge, but I think I could
live with requiring the AP to be put into a bridge to achieve a similar
configuration?

Additionally, on an unrelated note, this seems to apply generically to
all kinds of frames, losing information by replacing the address.
Shouldn't it have similar limitations as the wifi stack feature has
then, like only applying to ARP, IPv4, IPv6 and not general protocols?

Also, it should probably come with the same caveat as we documented for
the wifi feature:

Note that this may break certain expectations of the receiver,
such as the ability to drop unicast IP packets received within
multicast L2 frames, or the ability to not send ICMP destination
unreachable messages for packets received in L2 multicast (which
is required, but the receiver can't tell the difference if this
new option is enabled.)

I'll hold off sending my tree in until we see that we really need both
features, or decide that we want the wifi feature *instead* of the
bridge feature.

johannes

Re: [PATCHv2 net-next 02/11] net: mvpp2: handle too large value in mvpp2_rx_time_coal_set()

2017-01-06 Thread Russell King - ARM Linux

On Wed, Dec 28, 2016 at 05:45:58PM +0100, Thomas Petazzoni wrote:
> When configuring the MVPP2_ISR_RX_THRESHOLD_REG with the RX coalescing
> time threshold, we do not check for the maximum allowed value supported
> by the driver, which means we might overflow and use a bogus value. This
> commit adds a check for this situation, and if a value higher than what
> is supported by the hardware is provided, then we use the maximum value
> supported by the hardware.
> 
> Signed-off-by: Thomas Petazzoni 
> ---
>  drivers/net/ethernet/marvell/mvpp2.c | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/net/ethernet/marvell/mvpp2.c 
> b/drivers/net/ethernet/marvell/mvpp2.c
> index 02d91e4..a1ba89f 100644
> --- a/drivers/net/ethernet/marvell/mvpp2.c
> +++ b/drivers/net/ethernet/marvell/mvpp2.c
> @@ -154,6 +154,7 @@
>  
>  /* Interrupt Cause and Mask registers */
>  #define MVPP2_ISR_RX_THRESHOLD_REG(rxq)  (0x5200 + 4 * (rxq))
> +#define MVPP2_MAX_ISR_RX_THRESHOLD   0xf0
>  #define MVPP2_ISR_RXQ_GROUP_REG(rxq) (0x5400 + 4 * (rxq))
>  #define MVPP2_ISR_ENABLE_REG(port)   (0x5420 + 4 * (port))
>  #define MVPP2_ISR_ENABLE_INTERRUPT(mask) ((mask) & 0x)
> @@ -4397,6 +4398,12 @@ static void mvpp2_rx_time_coal_set(struct mvpp2_port 
> *port,
>   u32 val;
>  
>   val = (port->priv->tclk / USEC_PER_SEC) * usec;
> +
> + if (val > MVPP2_MAX_ISR_RX_THRESHOLD) {
> + val = MVPP2_MAX_ISR_RX_THRESHOLD;
> + usec = (val * USEC_PER_SEC) / port->priv->tclk;
> + }
> +

Beware of rounding and overflow errors.  usec and val are u32's.

MVPP2_MAX_ISR_RX_THRESHOLD = 16777200
USEC_PER_SEC = 100

This equates to 0xF423F0BDC00 for the multiplication, which is a little
larger than 32-bit.  Assuming tclk is 166.66MHz (as it was on Dove
- I don't know what it would be here) and 64-bit arithmetic, the maximum
value gives 100663us.

Passing that back into the function gives... 16710058, so the second time
around, we end up with a different setting (even though a change wasn't
requested.)

However, 100664 won't trigger your check, neither will values all the way
up to 101067 - the reason being that you're losing so much precision by
dividling the clock by USEC_PER_SEC first.  Only if it's a whole number
of MHz will you get away with that.

So, I'd suggest you switch to using 64 bit math here - it's not a fast
path.  Using bc to evaluate val = port->priv->tclk * usec / USEC_PER_SEC
gives:

(1 * 100663 / 100)
16777166

which is as close as you can come to the limit.

So, I'd suggest (these variants round down, which is acceptable for
this implementation):

static u32 usec_to_cycles(u32 usec, unsigned long clock_rate_hz)
{
u64 tmp = clock_rate_hz * usec;

do_div(tmp, USEC_PER_SEC);

return tmp > 0x ? 0x : tmp;
}

static u32 cycles_to_usec(u32 cycles, unsigned long clock_rate_hz)
{
u64 tmp = cycles * USEC_PER_SEC;

do_div(tmp, clock_rate_hz);

return tmp > 0x ? 0x : tmp;
}

and:
u32 val = usec_to_cycles(usec, port->priv->tclk);

if (val > MVPP2_MAX_ISR_RX_THRESHOLD) {
usec = cycles_to_usec(MVPP2_MAX_ISR_RX_THRESHOLD,
  port->priv->tclk);

/* re-evaluate to get actual register value for usec */
val = usec_to_cycles(usec, port->priv->tclk);
}

>   mvpp2_write(port->priv, MVPP2_ISR_RX_THRESHOLD_REG(rxq->id), val);
>  
>   rxq->time_coal = usec;

This function appears to be called from two places:

mvpp2_rxq_init():
mvpp2_rx_time_coal_set(port, rxq, rxq->time_coal);

mvpp2_ethtool_set_coalesce():
rxq->time_coal = c->rx_coalesce_usecs;
mvpp2_rx_time_coal_set(port, rxq, rxq->time_coal);

It seems rather pointless to pass in rxq->time_coal when you're also
passing in rxq.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCHv2 net-next 09/11] net: mvpp2: simplify MVPP2_PRS_RI_* definitions

2017-01-06 Thread Russell King - ARM Linux

On Wed, Dec 28, 2016 at 05:46:05PM +0100, Thomas Petazzoni wrote:
> Some of the MVPP2_PRS_RI_* definitions use the ~(value) syntax, which
> doesn't compile nicely on 64-bit. Moreover, those definitions are in
> fact unneeded, since they are always used in combination with a bit
> mask that ensures only the appropriate bits are modified.
> 
> Therefore, such definitions should just be set to 0x0. For example:
> 
>  #define MVPP2_PRS_RI_L2_CAST_MASK  0x600
>  #define MVPP2_PRS_RI_L2_UCAST  ~(BIT(9) | BIT(10))
>  #define MVPP2_PRS_RI_L2_MCAST  BIT(9)
>  #define MVPP2_PRS_RI_L2_BCAST  BIT(10)
> 
> becomes
> 
>  #define MVPP2_PRS_RI_L2_CAST_MASK  0x600
>  #define MVPP2_PRS_RI_L2_UCAST  0x0
>  #define MVPP2_PRS_RI_L2_MCAST  BIT(9)
>  #define MVPP2_PRS_RI_L2_BCAST  BIT(10)

So this is a two-bit field in a register with three defined states - I'm
not sure that using BIT() here is really a good idea.  BIT() is fine for
single-bit controls, but I think it adds an additional level of confusion
for multi-bit controls.

Also, the combination of the mask being defined as hex and the controls
using BIT() is particularly not nice.  I think either use one style or
the other, don't mix them.  So either:

  #define MVPP2_PRS_RI_L2_CAST_MASK  0x600
  #define MVPP2_PRS_RI_L2_UCAST  0x000
  #define MVPP2_PRS_RI_L2_MCAST  0x200
  #define MVPP2_PRS_RI_L2_BCAST  0x400

or:

  #define MVPP2_PRS_RI_L2_CAST_MASK  (BIT(10) | BIT(9))
  #define MVPP2_PRS_RI_L2_UCAST  0
  #define MVPP2_PRS_RI_L2_MCAST  BIT(9)
  #define MVPP2_PRS_RI_L2_BCAST  BIT(10)

It then becomes obvious that the mask and the settings are changing the
same bits.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread Alexandre Torgue


Hi Joao,

On 01/05/2017 06:49 PM, Joao Pinto wrote:

Hi Alex,

Às 5:19 PM de 1/5/2017, Alexandre Torgue escreveu:

Hi Joao,

On 01/04/2017 05:22 PM, Joao Pinto wrote:

This patch adds a new glue driver called dwmac-dwc-qos-eth which
was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
tweak was also added to stmmac_platform.


Sorry to come late in the review. I have a basic question. Why do you create a
glue driver for that ?
dwmac-glues are currently vendor specific, so why create one for IP ? Why not
continue to use stmmac_platform.c ?
(It is very basic, I assume I miss something)



If you check in the kernel tree there is a synopsys qos driver under
net/ethernet/synopsys/*.qos.c. At this moment Synopsys has the goal to support
QoS in the mainline kernel and so a discussion took place a month ago, about
what would be the best solution. At the time we (mailing-list folks) decided to
port the net/ethernet/synopsys/*.qos.c driver to stmmac and remove it. This way
we can have stmmac has a single synopsys ethernet software package.


Yes I saw a thread about that and also discussed with Peppe. It is a 
very good thing to do that ! so thanks for that.



For us to achieve this we agreed that stmmac would have

Lars the current synopsys/*.qos.c maintainer requested that stmmac be compatible
with the devicetree bindings that axis' customers were using in the driver. So
if you check the new glue driver, you will see it parses the legacy drivers DT
bindings and initiates stmmac. So you can see it like a legacy compatible glue
for the stmmac.


Ok if it is to keep compatibility to existing DT.

Acked-by: Alexandre TORGUE 



Thanks,
Joao


thanks
Alex





Signed-off-by: Joao Pinto 
---
changes v2 -> v3:
- Nothing changed, just to keep up patch set version
changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)

 .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 200 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  15 +-
 5 files changed, 225 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index d93f71c..21d27aa 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
@@ -1,5 +1,8 @@
 * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)

+This binding is deprecated, but it continues to be supported, but new
+features should be preferably added to the stmmac binding document.
+
 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
 IP block. The IP supports multiple options for bus type, clocking and reset
 structure, and feature list. Consequently, a number of properties and list
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab66248..99594e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM

 if STMMAC_PLATFORM

+config DWMAC_DWC_QOS_ETH
+tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
+select PHYLIB
+select CRC32
+select MII
+depends on OF && HAS_DMA
+help
+  Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
+
 config DWMAC_GENERIC
 tristate "Generic driver for DWMAC"
 default STMMAC_PLATFORM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 8f83a86..700c603 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-altr-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)+= dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)+= dwmac-sunxi.o
+obj-$(CONFIG_DWMAC_DWC_QOS_ETH)+= dwmac-dwc-qos-eth.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
 dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
new file mode 100644
index 000..4532a7c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -0,0 +1,200 @@
+/*
+ * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
+ *
+ * Copyright (C) 2016 Joao Pinto 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the

Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

2017-01-06 Thread Joao Pinto

Às 1:27 PM de 1/6/2017, Alexandre Torgue escreveu:
> Hi Joao,
> 
> On 01/05/2017 06:49 PM, Joao Pinto wrote:
>> Hi Alex,
>>
>> Às 5:19 PM de 1/5/2017, Alexandre Torgue escreveu:
>>> Hi Joao,
>>>
>>> On 01/04/2017 05:22 PM, Joao Pinto wrote:
 This patch adds a new glue driver called dwmac-dwc-qos-eth which
 was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
 tweak was also added to stmmac_platform.
>>>
>>> Sorry to come late in the review. I have a basic question. Why do you 
>>> create a
>>> glue driver for that ?
>>> dwmac-glues are currently vendor specific, so why create one for IP ? Why 
>>> not
>>> continue to use stmmac_platform.c ?
>>> (It is very basic, I assume I miss something)
>>>
>>
>> If you check in the kernel tree there is a synopsys qos driver under
>> net/ethernet/synopsys/*.qos.c. At this moment Synopsys has the goal to 
>> support
>> QoS in the mainline kernel and so a discussion took place a month ago, about
>> what would be the best solution. At the time we (mailing-list folks) decided 
>> to
>> port the net/ethernet/synopsys/*.qos.c driver to stmmac and remove it. This 
>> way
>> we can have stmmac has a single synopsys ethernet software package.
> 
> Yes I saw a thread about that and also discussed with Peppe. It is a very good
> thing to do that ! so thanks for that.

No problem! Glad to help!

Joao

> 
>> For us to achieve this we agreed that stmmac would have
>>
>> Lars the current synopsys/*.qos.c maintainer requested that stmmac be 
>> compatible
>> with the devicetree bindings that axis' customers were using in the driver. 
>> So
>> if you check the new glue driver, you will see it parses the legacy drivers 
>> DT
>> bindings and initiates stmmac. So you can see it like a legacy compatible 
>> glue
>> for the stmmac.
> 
> Ok if it is to keep compatibility to existing DT.
> 
> Acked-by: Alexandre TORGUE 
> 
>>
>> Thanks,
>> Joao
>>
>>> thanks
>>> Alex
>>>
>>>
>>>

 Signed-off-by: Joao Pinto 
 ---
 changes v2 -> v3:
 - Nothing changed, just to keep up patch set version
 changes v1 -> v2:
 - WOL was not declared in the new glue driver
 - clocks were switched and now fixed (apb_pclk and phy_ref_clk)

  .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
  drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
  drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
  .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 200 
 +
  .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  15 +-
  5 files changed, 225 insertions(+), 3 deletions(-)
  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

 diff --git 
 a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
 b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
 index d93f71c..21d27aa 100644
 --- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
 +++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
 @@ -1,5 +1,8 @@
  * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)

 +This binding is deprecated, but it continues to be supported, but new
 +features should be preferably added to the stmmac binding document.
 +
  This binding supports the Synopsys Designware Ethernet QoS (Quality Of
 Service)
  IP block. The IP supports multiple options for bus type, clocking and 
 reset
  structure, and feature list. Consequently, a number of properties and list
 diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig
 b/drivers/net/ethernet/stmicro/stmmac/Kconfig
 index ab66248..99594e3 100644
 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
 +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
 @@ -29,6 +29,15 @@ config STMMAC_PLATFORM

  if STMMAC_PLATFORM

 +config DWMAC_DWC_QOS_ETH
 +tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
 +select PHYLIB
 +select CRC32
 +select MII
 +depends on OF && HAS_DMA
 +help
 +  Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
 +
  config DWMAC_GENERIC
  tristate "Generic driver for DWMAC"
  default STMMAC_PLATFORM
 diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile
 b/drivers/net/ethernet/stmicro/stmmac/Makefile
 index 8f83a86..700c603 100644
 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
 +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
 @@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-altr-socfpga.o
  obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
  obj-$(CONFIG_DWMAC_STM32)+= dwmac-stm32.o
  obj-$(CONFIG_DWMAC_SUNXI)+= dwmac-sunxi.o
 +obj-$(CONFIG_DWMAC_DWC_QOS_ETH)+= dwmac-dwc-qos-eth.o
  obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
  stmmac-platform-objs:= stmmac_platform.o
>>>

Re: [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue

2017-01-06 Thread Jerome Brunet

On Fri, 2017-01-06 at 11:42 +, Russell King - ARM Linux wrote:
> On Fri, Jan 06, 2017 at 11:11:36AM +0100, Jerome Brunet wrote:
> > 
> > The purpose of this patch is to provide a way to mark as broken a
> > particular eee mode. At first, it had nothing to do with "set_eee"
> > but,
> > as Florian rightly pointed out, users shouldn't be able to re-
> > enable a
> > broken mode.
> 
> I think something else has been missed - I don't see much point to
> telling userspace that (eg) 1000baseT EEE is supported and then
> ignore attempts to advertise it.
> 
> If it's broken, then arguably the hardware doesn't support the mode,
> so we should really be masking those bits from the EEE supported mask
> as well.

indeed.

> 
> > 
[...]
> 
> > 
> > > 
> > >  - maybe the problem here is that the PCS doesn't support support
> > > EEE in 1000baseT mode?
> > 
> > 
> > It does, and that's kind of the problem. EEE in ON for 100Tx and
> > 1000T
> > by default with this PHY. I have several platform with the same
> > MAC-PHY 
> > combination. Only the OdroidC2 shows this particular issue with
> > 1000T-
> > EEE
> > 
> > As explained in other mails in this thread. The problem does not
> > come
> > from the MAC entering LPI. It actually comes from the link partner
> > entering LPI on the Rx path under significant Tx transfer. For some
> > reason, this completely mess up our PHY.
> 
> For a 1000baseT link to enter low power, both ends have to enter LPI
> (see 802.3 78.1.3.3.1) - the Tx and Rx paths can't independently
> enter
> LPI.
> 
> So, if you have a busy Tx link, the link itself can't be entering
> LPI.
> Your link partner may be sending a request to enter LPI due to its
> own
> Tx path being idle, which should then be forwarded to your MAC.
> 
> It's pretty hard to see what could be messed up with that - I'd have
> expected the problems to occur when both ends were idle and the link
> had entered low power mode.

Well, maybe I'm not explaining the issue very well. Here the test done
which led me to this conclusion:

The test are done using iperf. Receiving data works well, with the
expected performance. Sending data is the problem, and only under high
load:

Here are the lpi stats before starting the test:
     irq_tx_path_in_lpi_mode_n: 6
 irq_tx_path_exit_lpi_mode_n: 5
 irq_rx_path_in_lpi_mode_n: 76
 irq_rx_path_exit_lpi_mode_n: 75
 phy_eee_wakeup_error_n: 0

Sending data with iperf usually works for little while (between 0 and
10s)

# iperf3 -c 192.168.1.170 -p12345
Connecting to host 192.168.1.170, port 12345
local 192.168.1.30 port 54450 connected to 192.168.1.170 port 12345
Interval   Transfer Bandwidth   Retr  Cwnd
0.00-1.00   sec   112 MBytes   938 Mbits/sec0409 KBytes   
1.00-2.00   sec   112 MBytes   940 Mbits/sec0426 KBytes   
2.00-3.00   sec   112 MBytes   939 Mbits/sec0426 KBytes   
3.00-4.00   sec   112 MBytes   940 Mbits/sec0426 KBytes   
4.00-5.00   sec   112 MBytes   940 Mbits/sec0426 KBytes   
5.00-6.00   sec   112 MBytes   939 Mbits/sec0426 KBytes   
6.00-7.00   sec  9.26 MBytes  77.6 Mbits/sec2   1.41 KBytes <=Issue
   
7.00-8.00   sec  0.00 Bytes  0.00 bits/sec1   1.41 KBytes   
8.00-9.00   sec  0.00 Bytes  0.00 bits/sec0   1.41 KBytes   
^C10.00-13.58  sec  0.00 Bytes  0.00 bits/sec1   1.41 KBytes   
- - - - - - - - - - - - - - - - - - - - - - - - -
Interval   Transfer Bandwidth   Retr
0.00-13.58  sec   681 MBytes   421 Mbits/sec4 sender
0.00-13.58  sec  0.00 Bytes  0.00 bits/sec  receiver
iperf3: interrupt - the client has terminated

iperf3 does not exit ant the link seems completely broken. We cannot
send or receive until the interface is brought down then up again.

Here are the LPI related stats after the test:
 irq_tx_path_in_lpi_mode_n: 48
 irq_tx_path_exit_lpi_mode_n: 48
 irq_rx_path_in_lpi_mode_n: 325
 irq_rx_path_exit_lpi_mode_n: 325
 phy_eee_wakeup_error_n: 0


This happens with :
1) Default configuration: EEE enabled on the MAC, PHY with reset
settings (EEE advertised)
2) EEE disabled on the MAC, PHY still with reset settings (EEE
advertised). In such case there is no irq_tx_path_*_lpi_mode interrupts
at all but still a lot of irq_rx_path_*_lpi_mode interrupts. So even if
the mac does not drive anything EEE related, there is still something
happening between the PHY and the link partner regarding EEE.

3) Disabling EEE advertisement for 1000t: no irq_*_lpi_mode at all. The
feature is not negotiated and the Tx works well.

By the way, EEE work well for the 100tx on the same HW.

> 
> > 
> > > 
> > > On the SolidRun boards, they're using AR8035, and have suffered
> > > this
> > > occasional link drop problem.  What has been found is that it
> > > seems
> > > to
> > > be to do with the timing parameters, and it seemed to only be
> > > 1000bT
> > > that was affected.  I don't remember off hand

Re: [PATCH net-next] bridge: multicast to unicast

2017-01-06 Thread Felix Fietkau

On 2017-01-06 13:47, Johannes Berg wrote:
> On Mon, 2017-01-02 at 20:32 +0100, Linus Lüssing wrote:
>> Implements an optional, per bridge port flag and feature to deliver
>> multicast packets to any host on the according port via unicast
>> individually. This is done by copying the packet per host and
>> changing the multicast destination MAC to a unicast one accordingly.
> 
> How does this compare and/or relate to the multicast-to-unicast feature
> we were going to add to the wifi stack, particularly mac80211? Do we
> perhaps not need that feature at all, if bridging will have it?
> 
> I suppose that the feature there could apply also to locally generated
> traffic when the AP interface isn't in a bridge, but I think I could
> live with requiring the AP to be put into a bridge to achieve a similar
> configuration?
> 
> Additionally, on an unrelated note, this seems to apply generically to
> all kinds of frames, losing information by replacing the address.
> Shouldn't it have similar limitations as the wifi stack feature has
> then, like only applying to ARP, IPv4, IPv6 and not general protocols?
> 
> Also, it should probably come with the same caveat as we documented for
> the wifi feature:
> 
> Note that this may break certain expectations of the receiver,
> such as the ability to drop unicast IP packets received within
> multicast L2 frames, or the ability to not send ICMP destination
> unreachable messages for packets received in L2 multicast (which
> is required, but the receiver can't tell the difference if this
> new option is enabled.)
> 
> 
> I'll hold off sending my tree in until we see that we really need both
> features, or decide that we want the wifi feature *instead* of the
> bridge feature.
The bridge layer can use IGMP snooping to ensure that the multicast
stream is only transmitted to clients that are actually a member of the
group. Can the mac80211 feature do the same?

- Felix

Re: [PATCH net-next] bridge: multicast to unicast

2017-01-06 Thread Johannes Berg


> The bridge layer can use IGMP snooping to ensure that the multicast
> stream is only transmitted to clients that are actually a member of
> the group. Can the mac80211 feature do the same?

No, it'll convert the packet for all clients that are behind that
netdev. But that's an argument for dropping the mac80211 feature, which
hasn't been merged upstream yet, no?

johannes

[PATCH net-next] cxgb4: Add port description for new cards.

2017-01-06 Thread Ganesh Goudar

Add port description for 25G and 100G cards, and also
change few port descriptions in compliance with the new
naming convention.

Signed-off-by: Ganesh Goudar 
---
 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 30 ++
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 
b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index cd5f437..8862fbd 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -5382,22 +5382,28 @@ unsigned int t4_get_mps_bg_map(struct adapter *adap, 
int idx)
 const char *t4_get_port_type_description(enum fw_port_type port_type)
 {
static const char *const port_type_description[] = {
-   "R XFI",
-   "R XAUI",
-   "T SGMII",
-   "T XFI",
-   "T XAUI",
+   "Fiber_XFI",
+   "Fiber_XAUI",
+   "BT_SGMII",
+   "BT_XFI",
+   "BT_XAUI",
"KX4",
"CX4",
"KX",
"KR",
-   "R SFP+",
-   "KR/KX",
-   "KR/KX/KX4",
-   "R QSFP_10G",
-   "R QSA",
-   "R QSFP",
-   "R BP40_BA",
+   "SFP",
+   "BP_AP",
+   "BP4_AP",
+   "QSFP_10G",
+   "QSA",
+   "QSFP",
+   "BP40_BA",
+   "KR4_100G",
+   "CR4_QSFP",
+   "CR_QSFP",
+   "CR2_QSFP",
+   "SFP28",
+   "KR_SFP28",
};
 
if (port_type < ARRAY_SIZE(port_type_description))
-- 
2.1.0

Re: [PATCHv2 net-next 1/3] sctp: add stream arrays in asoc

2017-01-06 Thread Xin Long

On Wed, Jan 4, 2017 at 9:39 PM, Marcelo Ricardo Leitner
 wrote:
> On Tue, Jan 03, 2017 at 01:59:46PM +0800, Xin Long wrote:
>> This patch is to add streamout and streamin arrays in asoc, initialize
>> them in sctp_process_init and free them in sctp_association_free.
>>
>> Stream arrays are used to replace ssnmap to save more stream things in
>> the next patch.
>>
>> Signed-off-by: Xin Long 
>> ---
>>  include/net/sctp/structs.h | 18 ++
>>  net/sctp/associola.c   | 19 +++
>>  net/sctp/sm_make_chunk.c   | 17 -
>>  3 files changed, 53 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
>> index 87d56cc..549f17d 100644
>> --- a/include/net/sctp/structs.h
>> +++ b/include/net/sctp/structs.h
>> @@ -1331,6 +1331,18 @@ struct sctp_inithdr_host {
>>   __u32 initial_tsn;
>>  };
>>
>> +struct sctp_stream_out {
>> + __u16   ssn;
>> + __u8state;
>> +};
>> +
>> +struct sctp_stream_in {
>> + __u16   ssn;
>> +};
>> +
>> +#define SCTP_STREAM_CLOSED   0x00
>> +#define SCTP_STREAM_OPEN 0x01
>> +
>>  /* SCTP_GET_ASSOC_STATS counters */
>>  struct sctp_priv_assoc_stats {
>>   /* Maximum observed rto in the association during subsequent
>> @@ -1879,6 +1891,12 @@ struct sctp_association {
>>temp:1,/* Is it a temporary association? */
>>prsctp_enable:1;
>>
>> + /* stream arrays */
>> + struct sctp_stream_out *streamout;
>> + struct sctp_stream_in *streamin;
>> + __u16 streamoutcnt;
>> + __u16 streamincnt;
>> +
>>   struct sctp_priv_assoc_stats stats;
>>
>>   int sent_cnt_removable;
>> diff --git a/net/sctp/associola.c b/net/sctp/associola.c
>> index d3cc30c..290ec4d 100644
>> --- a/net/sctp/associola.c
>> +++ b/net/sctp/associola.c
>> @@ -361,6 +361,10 @@ void sctp_association_free(struct sctp_association 
>> *asoc)
>>   /* Free ssnmap storage. */
>>   sctp_ssnmap_free(asoc->ssnmap);
>>
>> + /* Free stream information. */
>> + kfree(asoc->streamout);
>> + kfree(asoc->streamin);
>> +
>>   /* Clean up the bound address list. */
>>   sctp_bind_addr_free(&asoc->base.bind_addr);
>>
>> @@ -1130,6 +1134,8 @@ void sctp_assoc_update(struct sctp_association *asoc,
>>* has been discarded and needs retransmission.
>>*/
>>   if (asoc->state >= SCTP_STATE_ESTABLISHED) {
>> + int i;
>> +
>>   asoc->next_tsn = new->next_tsn;
>>   asoc->ctsn_ack_point = new->ctsn_ack_point;
>>   asoc->adv_peer_ack_point = new->adv_peer_ack_point;
>> @@ -1139,6 +1145,12 @@ void sctp_assoc_update(struct sctp_association *asoc,
>>*/
>>   sctp_ssnmap_clear(asoc->ssnmap);
>>
>> + for (i = 0; i < asoc->streamoutcnt; i++)
>> + asoc->streamout[i].ssn = 0;
>> +
>> + for (i = 0; i < asoc->streamincnt; i++)
>> + asoc->streamin[i].ssn = 0;
>> +
>>   /* Flush the ULP reassembly and ordered queue.
>>* Any data there will now be stale and will
>>* cause problems.
>> @@ -1168,6 +1180,13 @@ void sctp_assoc_update(struct sctp_association *asoc,
>>   new->ssnmap = NULL;
>>   }
>>
>> + if (!asoc->streamin && !asoc->streamout) {
>> + asoc->streamout = new->streamout;
>> + asoc->streamin = new->streamin;
>> + new->streamout = NULL;
>> + new->streamin = NULL;
>> + }
>> +
>>   if (!asoc->assoc_id) {
>>   /* get a new association id since we don't have one
>>* yet.
>> diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c
>> index 9e9690b..eeadeef 100644
>> --- a/net/sctp/sm_make_chunk.c
>> +++ b/net/sctp/sm_make_chunk.c
>> @@ -2442,13 +2442,28 @@ int sctp_process_init(struct sctp_association *asoc, 
>> struct sctp_chunk *chunk,
>>* association.
>>*/
>>   if (!asoc->temp) {
>> - int error;
>> + int error, i;
>> +
>> + asoc->streamoutcnt = asoc->c.sinit_num_ostreams;
>> + asoc->streamincnt = asoc->c.sinit_max_instreams;
>>
>>   asoc->ssnmap = sctp_ssnmap_new(asoc->c.sinit_max_instreams,
>>  asoc->c.sinit_num_ostreams, 
>> gfp);
>>   if (!asoc->ssnmap)
>>   goto clean_up;
>>
>> + asoc->streamout = kcalloc(asoc->streamoutcnt,
>> +   sizeof(*asoc->streamout), gfp);
>> + if (!asoc->streamout)
>> + goto clean_up;
>> + for (i = 0; i < asoc->streamoutcnt; i++)
>> + asoc->streamout[i].state = SCTP_STREAM_OPEN;
>> +
>> + asoc->streamin = kcalloc(asoc->streamincnt,
>> +

[PATCHv3 net-next] sctp: prepare asoc stream for stream reconf

2017-01-06 Thread Xin Long

sctp stream reconf, described in RFC 6525, needs a structure to
save per stream information in assoc, like stream state.

In the future, sctp stream scheduler also needs it to save some
stream scheduler params and queues.

This patchset is to prepare the stream array in assoc for stream
reconf. It defines sctp_stream that includes stream arrays inside
to replace ssnmap.

Note that we use different structures for IN and OUT streams, as
the members in per OUT stream will get more and more different
from per IN stream.

v1->v2:
  - put these patches into a smaller group.
v2->v3:
  - define sctp_stream to contain stream arrays, and create stream.c
to put stream-related functions.
  - merge 3 patches into 1, as new sctp_stream has the same name
with before.

Signed-off-by: Xin Long 
---
 include/net/sctp/sctp.h|   1 -
 include/net/sctp/structs.h |  76 +++
 net/sctp/Makefile  |   2 +-
 net/sctp/associola.c   |  13 +++--
 net/sctp/objcnt.c  |   2 -
 net/sctp/sm_make_chunk.c   |  10 ++--
 net/sctp/sm_statefuns.c|   3 +-
 net/sctp/ssnmap.c  | 125 -
 net/sctp/stream.c  |  85 ++
 net/sctp/ulpqueue.c|  36 ++---
 10 files changed, 147 insertions(+), 206 deletions(-)
 delete mode 100644 net/sctp/ssnmap.c
 create mode 100644 net/sctp/stream.c

diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index d8833a8..598d938 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -283,7 +283,6 @@ extern atomic_t sctp_dbg_objcnt_chunk;
 extern atomic_t sctp_dbg_objcnt_bind_addr;
 extern atomic_t sctp_dbg_objcnt_bind_bucket;
 extern atomic_t sctp_dbg_objcnt_addr;
-extern atomic_t sctp_dbg_objcnt_ssnmap;
 extern atomic_t sctp_dbg_objcnt_datamsg;
 extern atomic_t sctp_dbg_objcnt_keys;
 
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 87d56cc..4741ec2 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -82,7 +82,6 @@ struct sctp_outq;
 struct sctp_bind_addr;
 struct sctp_ulpq;
 struct sctp_ep_common;
-struct sctp_ssnmap;
 struct crypto_shash;
 
 
@@ -377,54 +376,22 @@ typedef struct sctp_sender_hb_info {
__u64 hb_nonce;
 } __packed sctp_sender_hb_info_t;
 
-/*
- *  RFC 2960 1.3.2 Sequenced Delivery within Streams
- *
- *  The term "stream" is used in SCTP to refer to a sequence of user
- *  messages that are to be delivered to the upper-layer protocol in
- *  order with respect to other messages within the same stream.  This is
- *  in contrast to its usage in TCP, where it refers to a sequence of
- *  bytes (in this document a byte is assumed to be eight bits).
- *  ...
- *
- *  This is the structure we use to track both our outbound and inbound
- *  SSN, or Stream Sequence Numbers.
- */
-
-struct sctp_stream {
-   __u16 *ssn;
-   unsigned int len;
-};
-
-struct sctp_ssnmap {
-   struct sctp_stream in;
-   struct sctp_stream out;
-};
-
-struct sctp_ssnmap *sctp_ssnmap_new(__u16 in, __u16 out,
-   gfp_t gfp);
-void sctp_ssnmap_free(struct sctp_ssnmap *map);
-void sctp_ssnmap_clear(struct sctp_ssnmap *map);
+struct sctp_stream *sctp_stream_new(__u16 incnt, __u16 outcnt, gfp_t gfp);
+void sctp_stream_free(struct sctp_stream *stream);
+void sctp_stream_clear(struct sctp_stream *stream);
 
 /* What is the current SSN number for this stream? */
-static inline __u16 sctp_ssn_peek(struct sctp_stream *stream, __u16 id)
-{
-   return stream->ssn[id];
-}
+#define sctp_ssn_peek(stream, type, sid) \
+   ((stream)->type[sid].ssn)
 
 /* Return the next SSN number for this stream. */
-static inline __u16 sctp_ssn_next(struct sctp_stream *stream, __u16 id)
-{
-   return stream->ssn[id]++;
-}
+#define sctp_ssn_next(stream, type, sid) \
+   ((stream)->type[sid].ssn++)
 
 /* Skip over this ssn and all below. */
-static inline void sctp_ssn_skip(struct sctp_stream *stream, __u16 id, 
-__u16 ssn)
-{
-   stream->ssn[id] = ssn+1;
-}
-  
+#define sctp_ssn_skip(stream, type, sid, ssn) \
+   ((stream)->type[sid].ssn = ssn + 1)
+
 /*
  * Pointers to address related SCTP functions.
  * (i.e. things that depend on the address family.)
@@ -1331,6 +1298,25 @@ struct sctp_inithdr_host {
__u32 initial_tsn;
 };
 
+struct sctp_stream_out {
+   __u16   ssn;
+   __u8state;
+};
+
+struct sctp_stream_in {
+   __u16   ssn;
+};
+
+struct sctp_stream {
+   struct sctp_stream_out *out;
+   struct sctp_stream_in *in;
+   __u16 outcnt;
+   __u16 incnt;
+};
+
+#define SCTP_STREAM_CLOSED 0x00
+#define SCTP_STREAM_OPEN   0x01
+
 /* SCTP_GET_ASSOC_STATS counters */
 struct sctp_priv_assoc_stats {
/* Maximum observed rto in the association during subsequent
@@ -1746,8 +1732,8 @@ struct sctp_association {
/* Default receive parameters */
__

Re: [PATCHv2 net-next 05/16] net: mvpp2: introduce PPv2.2 HW descriptors and adapt accessors

2017-01-06 Thread Russell King - ARM Linux

On Wed, Dec 28, 2016 at 05:46:21PM +0100, Thomas Petazzoni wrote:
> This commit adds the definition of the PPv2.2 HW descriptors, adjusts
> the mvpp2_tx_desc and mvpp2_rx_desc structures accordingly, and adapts
> the accessors to work on both PPv2.1 and PPv2.2.
> 
> Signed-off-by: Thomas Petazzoni 
...
> + /* On PPv2.2, the situation is more complicated,
> +  * because there is only 40 bits to store the virtual
> +  * address, which is not sufficient. So on 64 bits
> +  * systems, we use phys_to_virt() to get the virtual
> +  * address from the physical address, which is fine
> +  * because the kernel linear mapping includes the
> +  * entire 40 bits physical address space. On 32 bits
> +  * systems however, we can't use phys_to_virt(), but
> +  * since virtual addresses are 32 bits only, there is
> +  * enough space in the RX descriptor for the full
> +  * virtual address.
> +  */
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> + dma_addr_t dma_addr =
> + rx_desc->pp22.buf_phys_addr_key_hash & DMA_BIT_MASK(40);
> + phys_addr_t phys_addr =
> + dma_to_phys(port->dev->dev.parent, dma_addr);
> +
> + return (unsigned long)phys_to_virt(phys_addr);
> +#else
> + return rx_desc->pp22.buf_cookie_misc & DMA_BIT_MASK(40);
> +#endif

I'm not sure that's the best way of selecting the difference.  It seems
that the issue here is the size of the virtual address, so why not test
the size of a virtual address pointer?

if (8 * sizeof(rx_desc) > 40) {
/* do phys addr dance */
} else {
return rx_desc->pp22.buf_cookie_misc & DMA_BIT_MASK(40);
}

It also means that we get compile coverage over both sides of the
conditional.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCH net-next] bridge: multicast to unicast

2017-01-06 Thread Felix Fietkau

On 2017-01-06 14:54, Johannes Berg wrote:
> 
>> The bridge layer can use IGMP snooping to ensure that the multicast
>> stream is only transmitted to clients that are actually a member of
>> the group. Can the mac80211 feature do the same?
> 
> No, it'll convert the packet for all clients that are behind that
> netdev. But that's an argument for dropping the mac80211 feature, which
> hasn't been merged upstream yet, no?
Right.

- Felix

Re: [PATCHv2 net-next 06/16] net: mvpp2: adjust the allocation/free of BM pools for PPv2.2

2017-01-06 Thread Russell King - ARM Linux

On Wed, Dec 28, 2016 at 05:46:22PM +0100, Thomas Petazzoni wrote:
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> + if (priv->hw_version == MVPP22) {

Maybe
if (sizeof(dma_addr_t) > sizeof(u32) && priv->hw_version == MVPP22) {

to get better compile coverage?

> + u32 val;
> + u32 paddr_highbits;
> +
> + val = mvpp2_read(priv, MVPP2_BM_ADDR_HIGH_ALLOC);
> + paddr_highbits = (val & MVPP2_BM_ADDR_HIGH_PHYS_MASK);
> +
> + *paddr |= (dma_addr_t)paddr_highbits << 32;
> + *vaddr = (unsigned long)phys_to_virt(dma_to_phys(dev, *paddr));
> + }
> +#endif
> +}
> +
>  /* Free all buffers from the pool */
>  static void mvpp2_bm_bufs_free(struct device *dev, struct mvpp2 *priv,
>  struct mvpp2_bm_pool *bm_pool)
> @@ -3616,10 +3671,8 @@ static void mvpp2_bm_bufs_free(struct device *dev, 
> struct mvpp2 *priv,
>   dma_addr_t buf_phys_addr;
>   unsigned long vaddr;
>  
> - /* Get buffer virtual address (indirect access) */
> - buf_phys_addr = mvpp2_read(priv,
> -MVPP2_BM_PHY_ALLOC_REG(bm_pool->id));
> - vaddr = mvpp2_read(priv, MVPP2_BM_VIRT_ALLOC_REG);
> + mvpp2_bm_bufs_get_addrs(dev, priv, bm_pool,
> + &buf_phys_addr, &vaddr);
>  
>   dma_unmap_single(dev, buf_phys_addr,
>bm_pool->buf_size, DMA_FROM_DEVICE);
> @@ -3651,7 +3704,7 @@ static int mvpp2_bm_pool_destroy(struct platform_device 
> *pdev,
>   val |= MVPP2_BM_STOP_MASK;
>   mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id), val);
>  
> - dma_free_coherent(&pdev->dev, sizeof(u32) * bm_pool->size,
> + dma_free_coherent(&pdev->dev, bm_pool->size_bytes,
> bm_pool->virt_addr,
> bm_pool->phys_addr);
>   return 0;
> @@ -3787,8 +3840,19 @@ static inline void mvpp2_bm_pool_put(struct mvpp2_port 
> *port, int pool,
>dma_addr_t buf_phys_addr,
>unsigned long buf_virt_addr)
>  {
> - mvpp2_write(port->priv, MVPP2_BM_VIRT_RLS_REG, buf_virt_addr);
> - mvpp2_write(port->priv, MVPP2_BM_PHY_RLS_REG(pool), buf_phys_addr);
> +#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT)
> + u32 val;
> +
> + val = upper_32_bits(buf_phys_addr) & MVPP22_BM_ADDR_HIGH_PHYS_RLS_MASK;
> + val |= (upper_32_bits(buf_virt_addr) &
> + MVPP22_BM_ADDR_HIGH_VIRT_RLS_MASK)
> + << MVPP22_BM_ADDR_HIGH_VIRT_RLS_SHIFT;
> + mvpp2_write(port->priv, MVPP22_BM_ADDR_HIGH_RLS_REG, val);
> +#endif

Similar compile-time conditional?

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCHv2 net-next 10/16] net: mvpp2: handle register mapping and access for PPv2.2

2017-01-06 Thread Russell King - ARM Linux

On Wed, Dec 28, 2016 at 05:46:26PM +0100, Thomas Petazzoni wrote:
> This commit adjusts the mvpp2 driver register mapping and access logic
> to support PPv2.2, to handle a number of differences.
> 
> Due to how the registers are laid out in memory, the Device Tree binding
> for the "reg" property is different:
> 
>  - On PPv2.1, we had a first area for the common registers, and then one
>area per port.
> 
>  - On PPv2.2, we have a first area for the common registers, and a
>second area for all the per-ports registers.
> 
> In addition, on PPv2.2, the area for the common registers is split into
> so-called "address spaces" of 64 KB each. They allow to access the same
> registers, but from different CPUs. Hence the introduction of cpu_base[]
> in 'struct mvpp2', and the modification of the mvpp2_write() and
> mvpp2_read() register accessors. For PPv2.1, the compatibility is
> preserved by using an "address space" size of 0.

I'm not entirely sure this is the best solution - every register access
will be wrapped with a preempt_disable() and preempt_enable().  At
every site, when preempt is enabled, we will end up with code to:

- get the thread info
- increment the preempt count
- access the register
- decrement the preempt count
- test resulting preempt count and branch to __preempt_schedule()

If tracing is enabled, it gets much worse, because the increment and
decrement happen out of line, and are even more expensive.

If a function is going to make several register accesses, it's going
to be much more efficient to do:

void __iomem *base = priv->cpu_base[get_cpu()];

...

put_cpu();

which means we don't end up with multiple instances of the preempt code
consecutive accesses.

I think this is an example where having driver-private accessors for
readl()/writel() is far from a good idea.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCHv2 net-next 05/16] net: mvpp2: introduce PPv2.2 HW descriptors and adapt accessors

2017-01-06 Thread Robin Murphy

On 06/01/17 14:29, Russell King - ARM Linux wrote:
> On Wed, Dec 28, 2016 at 05:46:21PM +0100, Thomas Petazzoni wrote:
>> This commit adds the definition of the PPv2.2 HW descriptors, adjusts
>> the mvpp2_tx_desc and mvpp2_rx_desc structures accordingly, and adapts
>> the accessors to work on both PPv2.1 and PPv2.2.
>>
>> Signed-off-by: Thomas Petazzoni 
> ...
>> +/* On PPv2.2, the situation is more complicated,
>> + * because there is only 40 bits to store the virtual
>> + * address, which is not sufficient. So on 64 bits
>> + * systems, we use phys_to_virt() to get the virtual
>> + * address from the physical address, which is fine
>> + * because the kernel linear mapping includes the
>> + * entire 40 bits physical address space. On 32 bits
>> + * systems however, we can't use phys_to_virt(), but
>> + * since virtual addresses are 32 bits only, there is
>> + * enough space in the RX descriptor for the full
>> + * virtual address.
>> + */
>> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
>> +dma_addr_t dma_addr =
>> +rx_desc->pp22.buf_phys_addr_key_hash & DMA_BIT_MASK(40);
>> +phys_addr_t phys_addr =
>> +dma_to_phys(port->dev->dev.parent, dma_addr);

Ugh, this looks bogus. dma_to_phys(), in the arm64 case at least, is
essentially a SWIOTLB internal helper function which has to be
implemented in architecture code because reasons. Calling it from a
driver is almost certainly wrong (it doesn't even exist on most
architectures). Besides, if this is really a genuine dma_addr_t obtained
from a DMA API call, you cannot infer it to be related to a CPU physical
address, or convertible to one at all.

>> +
>> +return (unsigned long)phys_to_virt(phys_addr);
>> +#else
>> +return rx_desc->pp22.buf_cookie_misc & DMA_BIT_MASK(40);
>> +#endif
> 
> I'm not sure that's the best way of selecting the difference.

Given that CONFIG_ARCH_DMA_ADDR_T_64BIT could be enabled on 32-bit LPAE
systems, indeed it definitely isn't.

Robin.

>  It seems
> that the issue here is the size of the virtual address, so why not test
> the size of a virtual address pointer?
> 
>   if (8 * sizeof(rx_desc) > 40) {
>   /* do phys addr dance */
>   } else {
>   return rx_desc->pp22.buf_cookie_misc & DMA_BIT_MASK(40);
>   }
> 
> It also means that we get compile coverage over both sides of the
> conditional.
>

Re: [PATCH iproute2 2/3] ip vrf: Improve cgroup2 error messages

2017-01-06 Thread David Ahern

>> @@ -80,13 +80,21 @@ char *find_cgroup2_mount(void)
>>
>>  if (mount("none", mnt, CGROUP2_FS_NAME, 0, NULL)) {
>>  /* EBUSY means already mounted */
>> -if (errno != EBUSY) {
>> +if (errno == EBUSY)
>> +goto out;
>> +
>> +if (errno == ENODEV) {
>>  fprintf(stderr,
>>  "Failed to mount cgroup2. Are CGROUPS enabled in your 
>> kernel?\n");
>> -free(mnt);
>> -return NULL;
>> +} else {
>> +fprintf(stderr,
>> +"Failed to mount cgroup2: %s\n",
>> +strerror(errno));
>>  }
> 
>How about a *switch* instead?

I did consider it. Did not make the code simpler or easier to read.

[PATCH 0/3] xen: optimize xenbus performance

2017-01-06 Thread Juergen Gross

The xenbus driver used for communication with Xenstore (all kernel
accesses to Xenstore and in case of Xenstore living in another domain
all accesses of the local domain to Xenstore) is rather simple
especially regarding multiple concurrent accesses: they are just being
serialized in spite of Xenstore being capable to handle multiple
parallel accesses.

Clean up the external interface(s) of xenbus and optimize its
performance by allowing multiple concurrent accesses to Xenstore.

Juergen Gross (3):
  xen: clean up xenbus internal headers
  xen: modify xenstore watch event interface
  xen: optimize xenbus driver for multiple concurrent xenstore accesses

 drivers/block/xen-blkback/xenbus.c |   6 +-
 drivers/net/xen-netback/xenbus.c   |   8 +-
 drivers/xen/cpu_hotplug.c  |   5 +-
 drivers/xen/manage.c   |   6 +-
 drivers/xen/xen-balloon.c  |   2 +-
 drivers/xen/xen-pciback/xenbus.c   |   2 +-
 drivers/xen/xenbus/xenbus.h| 134 
 drivers/xen/xenbus/xenbus_client.c |   6 +-
 drivers/xen/xenbus/xenbus_comms.c  | 319 +++--
 drivers/xen/xenbus/xenbus_comms.h  |  51 ---
 drivers/xen/xenbus/xenbus_dev_backend.c|   2 +-
 drivers/xen/xenbus/xenbus_dev_frontend.c   | 213 +++-
 drivers/xen/xenbus/xenbus_probe.c  |  14 +-
 drivers/xen/xenbus/xenbus_probe.h  |  88 -
 drivers/xen/xenbus/xenbus_probe_backend.c  |  11 +-
 drivers/xen/xenbus/xenbus_probe_frontend.c |  17 +-
 drivers/xen/xenbus/xenbus_xs.c | 535 +
 drivers/xen/xenfs/super.c  |   2 +-
 drivers/xen/xenfs/xenstored.c  |   2 +-
 include/xen/xenbus.h   |  18 +-
 20 files changed, 830 insertions(+), 611 deletions(-)
 create mode 100644 drivers/xen/xenbus/xenbus.h
 delete mode 100644 drivers/xen/xenbus/xenbus_comms.h
 delete mode 100644 drivers/xen/xenbus/xenbus_probe.h

Cc: konrad.w...@oracle.com
Cc: roger@citrix.com
Cc: wei.l...@citrix.com
Cc: paul.durr...@citrix.com
Cc: netdev@vger.kernel.org

-- 
2.10.2

Re: [PATCH net-next v4 0/4] Fix OdroidC2 Gigabit Tx link issue

2017-01-06 Thread Russell King - ARM Linux

(quick reply...)

On Fri, Jan 06, 2017 at 02:50:21PM +0100, Jerome Brunet wrote:
> So I'm not sure I understand, are you against EEE integration in phylib
> entirely, or specifically against the test I added in set_eee to filter
> out broken modes ?

I'm happy to see EEE integrated into phylib, but I think the current
implementation is very buggy and needs a rewrite.

> > BTW, one of the problems (not caused by your patch) is that changing
> > the EEE advertisment does not (on all PHY drivers) cause the link to
> > be renegotiated - there's no call to phy_start_aneg() when the advert
> > changes, and even if there was, there's no guarantee that
> > phy_start_aneg() will even set the AN restart bit in the control
> > register.
> > 
> > However, given that you're hooking into the set_eee function, I'm not
> > sure why you placed your EEE advertisment thing into config_aneg() -
> > isn't it more an initialisation thing (so should be in
> > config_init()?)
> 
> What I change is what the PHY advertise, so it seems logical to do it
> where "genphy_config_advert" was called. Just taking the existing code
> as an example

You need to adjust the adverisment in two places:

1. On initialisation, when you need to change the default value.
2. Whenever the user requests a different EEE advertisment.

You don't need to do it each time config_aneg() is called - nothing's
going to change the EEE advertisment in that path.  Hence, to check
it each and every time seems like a waste of CPU cycles.

However, there's another path that needs to be considered, which the
current EEE code fails to do, and that is the resume path.  Nothing
at present saves and restores the EEE settings, they are completely
lost if the PHY is powered down.  This is just another symptom of the
current poor quality EEE implementation in phylib, and another reason
why I say above that the EEE code is in need of a rewrite... which is
something I will be looking at.

If the EEE settings are properly saved and restored over suspend/
resume, then the previously programmed EEE advertisment would also
be restored.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

[PATCH 2/3] xen: modify xenstore watch event interface

2017-01-06 Thread Juergen Gross

Today a Xenstore watch event is delivered via a callback function
declared as:

void (*callback)(struct xenbus_watch *,
 const char **vec, unsigned int len);

As all watch events only ever come with two parameters (path and token)
changing the prototype to:

void (*callback)(struct xenbus_watch *,
 const char *path, const char *token);

is the natural thing to do.

Apply this change and adapt all users.

Cc: konrad.w...@oracle.com
Cc: roger@citrix.com
Cc: wei.l...@citrix.com
Cc: paul.durr...@citrix.com
Cc: netdev@vger.kernel.org

Signed-off-by: Juergen Gross 
---
 drivers/block/xen-blkback/xenbus.c |  6 +++---
 drivers/net/xen-netback/xenbus.c   |  8 
 drivers/xen/cpu_hotplug.c  |  5 ++---
 drivers/xen/manage.c   |  6 +++---
 drivers/xen/xen-balloon.c  |  2 +-
 drivers/xen/xen-pciback/xenbus.c   |  2 +-
 drivers/xen/xenbus/xenbus.h|  6 +++---
 drivers/xen/xenbus/xenbus_client.c |  4 ++--
 drivers/xen/xenbus/xenbus_dev_frontend.c   | 21 -
 drivers/xen/xenbus/xenbus_probe.c  | 11 ---
 drivers/xen/xenbus/xenbus_probe_backend.c  |  8 
 drivers/xen/xenbus/xenbus_probe_frontend.c | 14 +++---
 drivers/xen/xenbus/xenbus_xs.c | 29 ++---
 include/xen/xenbus.h   |  6 +++---
 14 files changed, 59 insertions(+), 69 deletions(-)

diff --git a/drivers/block/xen-blkback/xenbus.c 
b/drivers/block/xen-blkback/xenbus.c
index 415e79b..8fe61b5 100644
--- a/drivers/block/xen-blkback/xenbus.c
+++ b/drivers/block/xen-blkback/xenbus.c
@@ -38,8 +38,8 @@ struct backend_info {
 static struct kmem_cache *xen_blkif_cachep;
 static void connect(struct backend_info *);
 static int connect_ring(struct backend_info *);
-static void backend_changed(struct xenbus_watch *, const char **,
-   unsigned int);
+static void backend_changed(struct xenbus_watch *, const char *,
+   const char *);
 static void xen_blkif_free(struct xen_blkif *blkif);
 static void xen_vbd_free(struct xen_vbd *vbd);
 
@@ -661,7 +661,7 @@ static int xen_blkbk_probe(struct xenbus_device *dev,
  * ready, connect.
  */
 static void backend_changed(struct xenbus_watch *watch,
-   const char **vec, unsigned int len)
+   const char *path, const char *token)
 {
int err;
unsigned major;
diff --git a/drivers/net/xen-netback/xenbus.c b/drivers/net/xen-netback/xenbus.c
index 3124eae..d8a40fa 100644
--- a/drivers/net/xen-netback/xenbus.c
+++ b/drivers/net/xen-netback/xenbus.c
@@ -723,7 +723,7 @@ static int xen_net_read_mac(struct xenbus_device *dev, u8 
mac[])
 }
 
 static void xen_net_rate_changed(struct xenbus_watch *watch,
-   const char **vec, unsigned int len)
+const char *path, const char *token)
 {
struct xenvif *vif = container_of(watch, struct xenvif, credit_watch);
struct xenbus_device *dev = xenvif_to_xenbus_device(vif);
@@ -780,7 +780,7 @@ static void xen_unregister_credit_watch(struct xenvif *vif)
 }
 
 static void xen_mcast_ctrl_changed(struct xenbus_watch *watch,
-  const char **vec, unsigned int len)
+  const char *path, const char *token)
 {
struct xenvif *vif = container_of(watch, struct xenvif,
  mcast_ctrl_watch);
@@ -855,8 +855,8 @@ static void unregister_hotplug_status_watch(struct 
backend_info *be)
 }
 
 static void hotplug_status_changed(struct xenbus_watch *watch,
-  const char **vec,
-  unsigned int vec_size)
+  const char *path,
+  const char *token)
 {
struct backend_info *be = container_of(watch,
   struct backend_info,
diff --git a/drivers/xen/cpu_hotplug.c b/drivers/xen/cpu_hotplug.c
index 5676aef..7a4daa2 100644
--- a/drivers/xen/cpu_hotplug.c
+++ b/drivers/xen/cpu_hotplug.c
@@ -68,13 +68,12 @@ static void vcpu_hotplug(unsigned int cpu)
 }
 
 static void handle_vcpu_hotplug_event(struct xenbus_watch *watch,
-   const char **vec, unsigned int len)
+ const char *path, const char *token)
 {
unsigned int cpu;
char *cpustr;
-   const char *node = vec[XS_WATCH_PATH];
 
-   cpustr = strstr(node, "cpu/");
+   cpustr = strstr(path, "cpu/");
if (cpustr != NULL) {
sscanf(cpustr, "cpu/%u", &cpu);
vcpu_hotplug(cpu);
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c
index 26e5e85..ca62c09 100644
--- a/drivers/xen/manage.c
+++ b/drivers/xen/manage.c
@@ -218,7 +218,7 @@ static struct shutdown_handler sh

[PATCH net-next] net: ipv6: put autoconf routes into per-interface tables

2017-01-06 Thread Lorenzo Colitti

Currently, IPv6 router discovery always puts routes into
RT6_TABLE_MAIN. This makes it difficult to maintain and switch
between multiple simultaneous network connections (e.g., wifi
and wired).

To work around this connection managers typically either move
autoconfiguration to userspace entirely (e.g., dhcpcd) or take
the routes they want and re-add them to the main table as static
routes with low metrics (e.g., NetworkManager). This puts the
burden on the connection manager to watch netlink or listen to
RAs to see if the routes have changed, delete the routes when
their lifetime expires, etc. This is complex and often not
implemented correctly.

This patch adds a per-interface sysctl to have the kernel put
autoconf routes into different tables. This allows each interface
to have its own routing table if desired.  Choosing the default
interface, or using different interfaces at the same time on a
per-socket or per-packet basis) can be done using policy routing
mechanisms that use as SO_BINDTODEVICE / IPV6_PKTINFO, mark-based
routing, or UID-based routing to select specific routing tables.

The sysctl behaves as follows:

- = 0: default. Put routes into RT6_TABLE_MAIN if the interface
   is not in a VRF, or into the VRF table if it is.
- > 0: manual. Put routes into the specified table.
- < 0: automatic. Add the absolute value of the sysctl to the
   device's ifindex, and use that table.

The automatic mode is most useful in conjunction with
net.ipv6.conf.default.accept_ra_rt_table. A connection manager
or distribution can set this to, say, -1000 on boot, and
thereafter know that routes received on every interface will
always be in that interface's routing table, and that the mapping
between interfaces and routing tables is deterministic. It also
ensures that if an interface is created and immediately receives
an RA, the route will go into the correct routing table without
needing any intervention from userspace.

The automatic mode (with conf.default.accept_ra_rt_table = -1000)
has been used in Android since 5.0.

Tested: compiles allnoconfig, allyesconfig, allmodconfig
Tested: passes existing Android kernel unit tests
Signed-off-by: Lorenzo Colitti 
---
 Documentation/networking/ip-sysctl.txt | 13 +++
 include/linux/ipv6.h   |  1 +
 include/net/addrconf.h |  2 ++
 include/uapi/linux/ipv6.h  |  1 +
 net/ipv6/addrconf.c| 40 +++---
 net/ipv6/route.c   | 11 +-
 6 files changed, 59 insertions(+), 9 deletions(-)

diff --git a/Documentation/networking/ip-sysctl.txt 
b/Documentation/networking/ip-sysctl.txt
index 7dd65c9cf7..d1311d8f33 100644
--- a/Documentation/networking/ip-sysctl.txt
+++ b/Documentation/networking/ip-sysctl.txt
@@ -1471,6 +1471,19 @@ accept_ra_rt_info_max_plen - INTEGER
Functional default: 0 if accept_ra_rtr_pref is enabled.
-1 if accept_ra_rtr_pref is disabled.
 
+accept_ra_rt_table - INTEGER
+   Which table to put routes created by Router Advertisements into.
+
+   = 0: Use the main table if the device is not in a VRF, and the
+VRF table if it is.
+   > 0: Use the specified table.
+   < 0: Add the absolute value to the receiving interface index,
+and use that table. For example, if set to -1000, an RA
+received on interface index 4 will create routes in
+table 1004.
+
+   Default: 0
+
 accept_ra_rtr_pref - BOOLEAN
Accept Router Preference in RA.
 
diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h
index 671d014e64..55d75074aa 100644
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -69,6 +69,7 @@ struct ipv6_devconf {
__s32   seg6_require_hmac;
 #endif
__u32   enhanced_dad;
+   __s32   accept_ra_rt_table;
 
struct ctl_table_header *sysctl_header;
 };
diff --git a/include/net/addrconf.h b/include/net/addrconf.h
index 8f998afc13..e1bd2bc027 100644
--- a/include/net/addrconf.h
+++ b/include/net/addrconf.h
@@ -242,6 +242,8 @@ static inline bool ipv6_is_mld(struct sk_buff *skb, int 
nexthdr, int offset)
 void addrconf_prefix_rcv(struct net_device *dev,
 u8 *opt, int len, bool sllao);
 
+u32 addrconf_rt_table(const struct net_device *dev, u32 default_table);
+
 /*
  * anycast prototypes (anycast.c)
  */
diff --git a/include/uapi/linux/ipv6.h b/include/uapi/linux/ipv6.h
index eaf65dc82e..95c3553242 100644
--- a/include/uapi/linux/ipv6.h
+++ b/include/uapi/linux/ipv6.h
@@ -182,6 +182,7 @@ enum {
DEVCONF_SEG6_ENABLED,
DEVCONF_SEG6_REQUIRE_HMAC,
DEVCONF_ENHANCED_DAD,
+   DEVCONF_ACCEPT_RA_RT_TABLE,
DEVCONF_MAX
 };
 
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index c1e124bc8e..d4a6b877f8 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -243,6 +243,7 @@ static struct ipv6_devconf ipv6_devconf __read_mostly =

RE: [PATCH 2/3] xen: modify xenstore watch event interface

2017-01-06 Thread Paul Durrant

> -Original Message-
> From: Juergen Gross [mailto:jgr...@suse.com]
> Sent: 06 January 2017 15:06
> To: linux-ker...@vger.kernel.org; xen-de...@lists.xenproject.org
> Cc: boris.ostrov...@oracle.com; Juergen Gross ;
> konrad.w...@oracle.com; Roger Pau Monne ; Wei Liu
> ; Paul Durrant ;
> netdev@vger.kernel.org
> Subject: [PATCH 2/3] xen: modify xenstore watch event interface
> 
> Today a Xenstore watch event is delivered via a callback function
> declared as:
> 
> void (*callback)(struct xenbus_watch *,
>  const char **vec, unsigned int len);
> 
> As all watch events only ever come with two parameters (path and token)
> changing the prototype to:
> 
> void (*callback)(struct xenbus_watch *,
>  const char *path, const char *token);
> 
> is the natural thing to do.
> 
> Apply this change and adapt all users.
> 
> Cc: konrad.w...@oracle.com
> Cc: roger@citrix.com
> Cc: wei.l...@citrix.com
> Cc: paul.durr...@citrix.com
> Cc: netdev@vger.kernel.org
> 
> Signed-off-by: Juergen Gross 

xen-netback changes...

Reviewed-by: Paul Durrant 

> ---
>  drivers/block/xen-blkback/xenbus.c |  6 +++---
>  drivers/net/xen-netback/xenbus.c   |  8 
>  drivers/xen/cpu_hotplug.c  |  5 ++---
>  drivers/xen/manage.c   |  6 +++---
>  drivers/xen/xen-balloon.c  |  2 +-
>  drivers/xen/xen-pciback/xenbus.c   |  2 +-
>  drivers/xen/xenbus/xenbus.h|  6 +++---
>  drivers/xen/xenbus/xenbus_client.c |  4 ++--
>  drivers/xen/xenbus/xenbus_dev_frontend.c   | 21 -
>  drivers/xen/xenbus/xenbus_probe.c  | 11 ---
>  drivers/xen/xenbus/xenbus_probe_backend.c  |  8 
>  drivers/xen/xenbus/xenbus_probe_frontend.c | 14 +++---
>  drivers/xen/xenbus/xenbus_xs.c | 29 ++---
>  include/xen/xenbus.h   |  6 +++---
>  14 files changed, 59 insertions(+), 69 deletions(-)
> 
> diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-
> blkback/xenbus.c
> index 415e79b..8fe61b5 100644
> --- a/drivers/block/xen-blkback/xenbus.c
> +++ b/drivers/block/xen-blkback/xenbus.c
> @@ -38,8 +38,8 @@ struct backend_info {
>  static struct kmem_cache *xen_blkif_cachep;
>  static void connect(struct backend_info *);
>  static int connect_ring(struct backend_info *);
> -static void backend_changed(struct xenbus_watch *, const char **,
> - unsigned int);
> +static void backend_changed(struct xenbus_watch *, const char *,
> + const char *);
>  static void xen_blkif_free(struct xen_blkif *blkif);
>  static void xen_vbd_free(struct xen_vbd *vbd);
> 
> @@ -661,7 +661,7 @@ static int xen_blkbk_probe(struct xenbus_device
> *dev,
>   * ready, connect.
>   */
>  static void backend_changed(struct xenbus_watch *watch,
> - const char **vec, unsigned int len)
> + const char *path, const char *token)
>  {
>   int err;
>   unsigned major;
> diff --git a/drivers/net/xen-netback/xenbus.c b/drivers/net/xen-
> netback/xenbus.c
> index 3124eae..d8a40fa 100644
> --- a/drivers/net/xen-netback/xenbus.c
> +++ b/drivers/net/xen-netback/xenbus.c
> @@ -723,7 +723,7 @@ static int xen_net_read_mac(struct xenbus_device
> *dev, u8 mac[])
>  }
> 
>  static void xen_net_rate_changed(struct xenbus_watch *watch,
> - const char **vec, unsigned int len)
> +  const char *path, const char *token)
>  {
>   struct xenvif *vif = container_of(watch, struct xenvif, credit_watch);
>   struct xenbus_device *dev = xenvif_to_xenbus_device(vif);
> @@ -780,7 +780,7 @@ static void xen_unregister_credit_watch(struct xenvif
> *vif)
>  }
> 
>  static void xen_mcast_ctrl_changed(struct xenbus_watch *watch,
> -const char **vec, unsigned int len)
> +const char *path, const char *token)
>  {
>   struct xenvif *vif = container_of(watch, struct xenvif,
> mcast_ctrl_watch);
> @@ -855,8 +855,8 @@ static void unregister_hotplug_status_watch(struct
> backend_info *be)
>  }
> 
>  static void hotplug_status_changed(struct xenbus_watch *watch,
> -const char **vec,
> -unsigned int vec_size)
> +const char *path,
> +const char *token)
>  {
>   struct backend_info *be = container_of(watch,
>  struct backend_info,
> diff --git a/drivers/xen/cpu_hotplug.c b/drivers/xen/cpu_hotplug.c
> index 5676aef..7a4daa2 100644
> --- a/drivers/xen/cpu_hotplug.c
> +++ b/drivers/xen/cpu_hotplug.c
> @@ -68,13 +68,12 @@ static void vcpu_hotplug(unsigned int cpu)
>  }
> 
>  static void handle_vcpu_hotplug_event(struct xenbus_watch *watch,
> -

Re: [PATCH net-next] net:add one common config ARCH_WANT_RELAX_ORDER to support relax ordering.

2017-01-06 Thread Alexander Duyck

On Fri, Jan 6, 2017 at 1:52 AM, Mao Wenan  wrote:
> Relax ordering(RO) is one feature of 82599 NIC, to enable this feature can
> enhance the performance for some cpu architecure, such as SPARC and so on.
> Currently it only supports one special cpu architecture(SPARC) in 82599
> driver to enable RO feature, this is not very common for other cpu 
> architecture
> which really needs RO feature.
> This patch add one common config CONFIG_ARCH_WANT_RELAX_ORDER to set RO 
> feature,
> and should define CONFIG_ARCH_WANT_RELAX_ORDER in sparc Kconfig firstly.
>
> Signed-off-by: Mao Wenan 
> ---
>  arch/sparc/Kconfig  | 1 +
>  drivers/net/ethernet/intel/ixgbe/ixgbe_common.c | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
> index cf4034c..68ac5c7 100644
> --- a/arch/sparc/Kconfig
> +++ b/arch/sparc/Kconfig
> @@ -44,6 +44,7 @@ config SPARC
> select CPU_NO_EFFICIENT_FFS
> select HAVE_ARCH_HARDENED_USERCOPY
> select PROVE_LOCKING_SMALL if PROVE_LOCKING
> +   select ARCH_WANT_RELAX_ORDER
>
>  config SPARC32
> def_bool !64BIT


I'm pretty sure this is incomplete.  I think you need to add a couple
lines to arch/Kconfig so that the config option itself is listed
somewhere.  You might look at using something like HAVE_CMPXCHG_DOUBLE
as an example.

- Alex

RE: [PATCHv3 net-next] sctp: prepare asoc stream for stream reconf

2017-01-06 Thread David Laight

From: Xin Long
> Sent: 06 January 2017 14:19
> sctp stream reconf, described in RFC 6525, needs a structure to
> save per stream information in assoc, like stream state.
> 
> In the future, sctp stream scheduler also needs it to save some
> stream scheduler params and queues.
> 
> This patchset is to prepare the stream array in assoc for stream
> reconf. It defines sctp_stream that includes stream arrays inside
> to replace ssnmap.
> 
> Note that we use different structures for IN and OUT streams, as
> the members in per OUT stream will get more and more different
> from per IN stream.
...
>  /* What is the current SSN number for this stream? */
> -static inline __u16 sctp_ssn_peek(struct sctp_stream *stream, __u16 id)
> -{
> - return stream->ssn[id];
> -}
> +#define sctp_ssn_peek(stream, type, sid) \
> + ((stream)->type[sid].ssn)
> 
>  /* Return the next SSN number for this stream.   */
> -static inline __u16 sctp_ssn_next(struct sctp_stream *stream, __u16 id)
> -{
> - return stream->ssn[id]++;
> -}
> +#define sctp_ssn_next(stream, type, sid) \
> + ((stream)->type[sid].ssn++)
> 
>  /* Skip over this ssn and all below. */
> -static inline void sctp_ssn_skip(struct sctp_stream *stream, __u16 id,
> -  __u16 ssn)
> -{
> - stream->ssn[id] = ssn+1;
> -}
> -
> +#define sctp_ssn_skip(stream, type, sid, ssn) \
> + ((stream)->type[sid].ssn = ssn + 1)
...

Is there any reason to convert these from inline functions to #defines?
Inline functions give better type checking and are usually preferred.

David

RE: [PATCH v2] net: stmmac: fix maxmtu assignment to be within valid range

2017-01-06 Thread Kweh, Hock Leong

> -Original Message-
> From: Kweh, Hock Leong
> Sent: Friday, January 06, 2017 6:08 PM
> To: David S. Miller ; Joao Pinto
> ; Giuseppe CAVALLARO ;
> seraphin.bonna...@st.com; Jarod Wilson ; Andy
> Shevchenko 
> Cc: Alexandre TORGUE ; Joachim Eastwood
> ; Niklas Cassel ; Johan Hovold
> ; pa...@ucw.cz; Kweh, Hock Leong
> ; lars.pers...@axis.com; netdev
> ; LKML 
> Subject: [PATCH v2] net: stmmac: fix maxmtu assignment to be within valid
> range
> 
> From: "Kweh, Hock Leong" 
> 
> There is no checking valid value of maxmtu when getting it from device tree.
> This resolution added the checking condition to ensure the assignment is made
> within a valid range.
> 
> Signed-off-by: Kweh, Hock Leong 

I am going to submit V3.

> ---
>  drivers/net/ethernet/stmicro/stmmac/stmmac_main.c |8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 92ac006..4df555e 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -3345,8 +3345,14 @@ int stmmac_dvr_probe(struct device *device,
>   ndev->max_mtu = JUMBO_LEN;
>   else
>   ndev->max_mtu = SKB_MAX_HEAD(NET_SKB_PAD +
> NET_IP_ALIGN);
> - if (priv->plat->maxmtu < ndev->max_mtu)
> +
> + if ((priv->plat->maxmtu < ndev->max_mtu) &&
> + (priv->plat->maxmtu >= ndev->min_mtu))
>   ndev->max_mtu = priv->plat->maxmtu;
> + else if (priv->plat->maxmtu != 0)
> + netdev_warn(priv->dev,
> + "%s: warning: maxmtu having invalid value (%d)\n",
> + __func__, priv->plat->maxmtu);
> 
>   if (flow_ctrl)
>   priv->flow_ctrl = FLOW_AUTO;/* RX/TX pause on */
> --
> 1.7.9.5

Re: [PATCHv3 net-next] sctp: prepare asoc stream for stream reconf

2017-01-06 Thread Marcelo Ricardo Leitner

On Fri, Jan 06, 2017 at 03:50:36PM +, David Laight wrote:
> From: Xin Long
> > Sent: 06 January 2017 14:19
> > sctp stream reconf, described in RFC 6525, needs a structure to
> > save per stream information in assoc, like stream state.
> > 
> > In the future, sctp stream scheduler also needs it to save some
> > stream scheduler params and queues.
> > 
> > This patchset is to prepare the stream array in assoc for stream
> > reconf. It defines sctp_stream that includes stream arrays inside
> > to replace ssnmap.
> > 
> > Note that we use different structures for IN and OUT streams, as
> > the members in per OUT stream will get more and more different
> > from per IN stream.
> ...
> >  /* What is the current SSN number for this stream? */
> > -static inline __u16 sctp_ssn_peek(struct sctp_stream *stream, __u16 id)
> > -{
> > -   return stream->ssn[id];
> > -}
> > +#define sctp_ssn_peek(stream, type, sid) \
> > +   ((stream)->type[sid].ssn)
> > 
> >  /* Return the next SSN number for this stream. */
> > -static inline __u16 sctp_ssn_next(struct sctp_stream *stream, __u16 id)
> > -{
> > -   return stream->ssn[id]++;
> > -}
> > +#define sctp_ssn_next(stream, type, sid) \
> > +   ((stream)->type[sid].ssn++)
> > 
> >  /* Skip over this ssn and all below. */
> > -static inline void sctp_ssn_skip(struct sctp_stream *stream, __u16 id,
> > -__u16 ssn)
> > -{
> > -   stream->ssn[id] = ssn+1;
> > -}
> > -
> > +#define sctp_ssn_skip(stream, type, sid, ssn) \
> > +   ((stream)->type[sid].ssn = ssn + 1)
> ...
> 
> Is there any reason to convert these from inline functions to #defines?
> Inline functions give better type checking and are usually preferred.

Yes, it's to avoid specializing these and also avoid a condition in
them. Now inbound and outbound streams are handled by different structs.
Please see the new struct sctp_stream definition.

  Marcelo

[next PATCH 01/11] ixgbe: Add function for checking to see if we can reuse page

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

This patch consolidates the code for the ixgbe driver so that it is more
inline with what is already in igb.  The general idea is to just
consolidate functions that represent logical steps in the Rx process so we
can later update them more easily.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   70 +++--
 1 file changed, 41 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 3beadc8c7a0a..e80d885af4d3 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1947,6 +1947,41 @@ static inline bool ixgbe_page_is_reserved(struct page 
*page)
return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
 }
 
+static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer,
+   struct page *page,
+   const unsigned int truesize)
+{
+#if (PAGE_SIZE >= 8192)
+   unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
+  ixgbe_rx_bufsz(rx_ring);
+#endif
+   /* avoid re-using remote pages */
+   if (unlikely(ixgbe_page_is_reserved(page)))
+   return false;
+
+#if (PAGE_SIZE < 8192)
+   /* if we are only owner of page we can reuse it */
+   if (unlikely(page_count(page) != 1))
+   return false;
+
+   /* flip page offset to other buffer */
+   rx_buffer->page_offset ^= truesize;
+#else
+   /* move offset up to the next cache line */
+   rx_buffer->page_offset += truesize;
+
+   if (rx_buffer->page_offset > last_offset)
+   return false;
+#endif
+
+   /* Even if we own the page, we are not allowed to use atomic_set()
+* This would break get_page_unless_zero() users.
+*/
+   page_ref_inc(page);
+
+   return true;
+}
+
 /**
  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
  * @rx_ring: rx descriptor ring to transact packets on
@@ -1968,18 +2003,18 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring 
*rx_ring,
  struct sk_buff *skb)
 {
struct page *page = rx_buffer->page;
+   unsigned char *va = page_address(page) + rx_buffer->page_offset;
unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
 #if (PAGE_SIZE < 8192)
unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
 #else
unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
-   unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
-  ixgbe_rx_bufsz(rx_ring);
 #endif
 
-   if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
-   unsigned char *va = page_address(page) + rx_buffer->page_offset;
+   if (unlikely(skb_is_nonlinear(skb)))
+   goto add_tail_frag;
 
+   if (size <= IXGBE_RX_HDR_SIZE) {
memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
 
/* page is not reserved, we can reuse buffer as-is */
@@ -1991,34 +2026,11 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring 
*rx_ring,
return false;
}
 
+add_tail_frag:
skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
rx_buffer->page_offset, size, truesize);
 
-   /* avoid re-using remote pages */
-   if (unlikely(ixgbe_page_is_reserved(page)))
-   return false;
-
-#if (PAGE_SIZE < 8192)
-   /* if we are only owner of page we can reuse it */
-   if (unlikely(page_count(page) != 1))
-   return false;
-
-   /* flip page offset to other buffer */
-   rx_buffer->page_offset ^= truesize;
-#else
-   /* move offset up to the next cache line */
-   rx_buffer->page_offset += truesize;
-
-   if (rx_buffer->page_offset > last_offset)
-   return false;
-#endif
-
-   /* Even if we own the page, we are not allowed to use atomic_set()
-* This would break get_page_unless_zero() users.
-*/
-   page_ref_inc(page);
-
-   return true;
+   return ixgbe_can_reuse_rx_page(rx_buffer, page, truesize);
 }
 
 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,

[next PATCH 02/11] ixgbe: Only DMA sync frame length

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

On some platforms, syncing a buffer for DMA is expensive. Rather than
sync the whole 2K receive buffer, only synchronise the length of the
frame, which will typically be the MTU, or a much smaller TCP ACK.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index e80d885af4d3..dbbf5223ace2 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1858,7 +1858,7 @@ static void ixgbe_dma_sync_frag(struct ixgbe_ring 
*rx_ring,
dma_sync_single_range_for_cpu(rx_ring->dev,
  IXGBE_CB(skb)->dma,
  frag->page_offset,
- ixgbe_rx_bufsz(rx_ring),
+ skb_frag_size(frag),
  DMA_FROM_DEVICE);
}
IXGBE_CB(skb)->dma = 0;
@@ -1999,12 +1999,11 @@ static bool ixgbe_can_reuse_rx_page(struct 
ixgbe_rx_buffer *rx_buffer,
  **/
 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
  struct ixgbe_rx_buffer *rx_buffer,
- union ixgbe_adv_rx_desc *rx_desc,
+ unsigned int size,
  struct sk_buff *skb)
 {
struct page *page = rx_buffer->page;
unsigned char *va = page_address(page) + rx_buffer->page_offset;
-   unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
 #if (PAGE_SIZE < 8192)
unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
 #else
@@ -2036,6 +2035,7 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
 union ixgbe_adv_rx_desc *rx_desc)
 {
+   unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
struct ixgbe_rx_buffer *rx_buffer;
struct sk_buff *skb;
struct page *page;
@@ -2090,14 +2090,14 @@ static struct sk_buff *ixgbe_fetch_rx_buffer(struct 
ixgbe_ring *rx_ring,
dma_sync_single_range_for_cpu(rx_ring->dev,
  rx_buffer->dma,
  rx_buffer->page_offset,
- ixgbe_rx_bufsz(rx_ring),
+ size,
  DMA_FROM_DEVICE);
 
rx_buffer->skb = NULL;
}
 
/* pull page into skb */
-   if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
+   if (ixgbe_add_rx_frag(rx_ring, rx_buffer, size, skb)) {
/* hand second half of page back to the ring */
ixgbe_reuse_rx_page(rx_ring, rx_buffer);
} else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {

[next PATCH 00/11] ixgbe: Add support for writable pages and build_skb

2017-01-06 Thread Alexander Duyck

This patch set enables support for using the recent changes that allow for
unmapping pages without invalidating their contents via
DMA_ATTR_SKIP_CPU_SYNC.  With this change DMA pages should be writable and
as a result we should be able to make use of build_skb which can be used to
drop the skb->head memory allocation, header parsing, and memcpy from the
receive path which can greatly help to improve performance.

My main concern at this point is that there might be an architecture where
I didn't get DMA_ATTR_SKIP_CPU_SYNC implemented that might still need it.
For that reason I have also added a ethtool private flag called out as
"legacy-rx".  If a platform encounters an issue where the Rx can possibly
corrupt data it can be enbled by running:
ethtool --set-priv-flags DEVNAME legacy-rx on

The testing matrix for all of these patches is going to be pretty
extensive.  Basically we want to test these patches on as many platforms
and architectures as possible with as many features being toggled as
possible including RSC, FCoE, SR-IOV, and Jumbo Frames all while receiving
traffic.

Within the patches there is also some intialization changes.  Specifically
I have updated the code paths to defer clearing the rings until we are
about to initialize them and give them to hardware.  By doing this we are
able to avoid having to dirty memory we don't need to which should help to
improve suspend/resume times for when we start looking at possibly using
the suspend/resume approach for migration of interface in VMs.

---

Alexander Duyck (11):
  ixgbe: Add function for checking to see if we can reuse page
  ixgbe: Only DMA sync frame length
  ixgbe: Update driver to make use of DMA attributes in Rx path
  ixgbe: Update code to better handle incrementing page count
  ixgbe: Make use of order 1 pages and 3K buffers independent of FCoE
  ixgbe: Use length to determine if descriptor is done
  ixgbe: Break out Rx buffer page management
  ixgbe: Add support for padding packet
  ixgbe: Add private flag to control buffer mode
  ixgbe: Add support for build_skb
  ixgbe: Don't bother clearing buffer memory for descriptor rings


 drivers/net/ethernet/intel/ixgbe/ixgbe.h |   45 +-
 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c |   58 ++
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c|  584 ++
 3 files changed, 465 insertions(+), 222 deletions(-)

--

[next PATCH 05/11] ixgbe: Make use of order 1 pages and 3K buffers independent of FCoE

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

In order to support build_skb with jumbo frames it will be necessary to use
3K buffers for the Rx path with 8K pages backing them.  This is needed on
architectures that implement 4K pages because we can't support 2K buffers
plus padding in a 4K page.

In the case of systems that support page sizes larger than 4K the 3K
attribute will only be applied to FCoE as we can fall back to using just 2K
buffers and adding the padding.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe.h  |   20 +---
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   19 +--
 2 files changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h 
b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 717c65b0deb2..80328e657d6a 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -234,13 +234,14 @@ struct ixgbe_rx_queue_stats {
 #define IXGBE_TS_HDR_LEN 8
 
 enum ixgbe_ring_state_t {
+   __IXGBE_RX_3K_BUFFER,
+   __IXGBE_RX_RSC_ENABLED,
+   __IXGBE_RX_CSUM_UDP_ZERO_ERR,
+   __IXGBE_RX_FCOE,
__IXGBE_TX_FDIR_INIT_DONE,
__IXGBE_TX_XPS_INIT_DONE,
__IXGBE_TX_DETECT_HANG,
__IXGBE_HANG_CHECK_ARMED,
-   __IXGBE_RX_RSC_ENABLED,
-   __IXGBE_RX_CSUM_UDP_ZERO_ERR,
-   __IXGBE_RX_FCOE,
 };
 
 struct ixgbe_fwd_adapter {
@@ -352,19 +353,16 @@ struct ixgbe_ring_feature {
  */
 static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring)
 {
-#ifdef IXGBE_FCOE
-   if (test_bit(__IXGBE_RX_FCOE, &ring->state))
-   return (PAGE_SIZE < 8192) ? IXGBE_RXBUFFER_4K :
-   IXGBE_RXBUFFER_3K;
-#endif
+   if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
+   return IXGBE_RXBUFFER_3K;
return IXGBE_RXBUFFER_2K;
 }
 
 static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring)
 {
-#ifdef IXGBE_FCOE
-   if (test_bit(__IXGBE_RX_FCOE, &ring->state))
-   return (PAGE_SIZE < 8192) ? 1 : 0;
+#if (PAGE_SIZE < 8192)
+   if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
+   return 1;
 #endif
return 0;
 }
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 519b6a2b65c1..1b6f1f584044 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1617,6 +1617,7 @@ void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, 
u16 cleaned_count)
union ixgbe_adv_rx_desc *rx_desc;
struct ixgbe_rx_buffer *bi;
u16 i = rx_ring->next_to_use;
+   u16 bufsz;
 
/* nothing to do */
if (!cleaned_count)
@@ -1626,14 +1627,15 @@ void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, 
u16 cleaned_count)
bi = &rx_ring->rx_buffer_info[i];
i -= rx_ring->count;
 
+   bufsz = ixgbe_rx_bufsz(rx_ring);
+
do {
if (!ixgbe_alloc_mapped_page(rx_ring, bi))
break;
 
/* sync the buffer for use by the device */
dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
-bi->page_offset,
-ixgbe_rx_bufsz(rx_ring),
+bi->page_offset, bufsz,
 DMA_FROM_DEVICE);
 
/*
@@ -2016,9 +2018,9 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
struct page *page = rx_buffer->page;
unsigned char *va = page_address(page) + rx_buffer->page_offset;
 #if (PAGE_SIZE < 8192)
-   unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
+   unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
 #else
-   unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
+   unsigned int truesize = SKB_DATA_ALIGN(size);
 #endif
 
if (unlikely(skb_is_nonlinear(skb)))
@@ -3917,10 +3919,15 @@ static void ixgbe_set_rx_buffer_len(struct 
ixgbe_adapter *adapter)
 */
for (i = 0; i < adapter->num_rx_queues; i++) {
rx_ring = adapter->rx_ring[i];
+
+   clear_ring_rsc_enabled(rx_ring);
+   clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
+
if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
set_ring_rsc_enabled(rx_ring);
-   else
-   clear_ring_rsc_enabled(rx_ring);
+
+   if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
+   set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
}
 }

[next PATCH 11/11] ixgbe: Don't bother clearing buffer memory for descriptor rings

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

This patch makes it so that we don't need to bother with clearing the
memory out for the descriptor rings.  The general idea is to only free
buffers associated with buffers in use which are located between the
next_to_clean and next_to_use or next_to_alloc values.  Everything outside
of those regions can be safely ignored since they should have no buffers
associated with them.

The advantage to doing things this way is that is should speed up bring-up
and tear-down of the rings.  Specifically we can avoid the 512 or more
cycles required to memset the rings in tear-down.  In the bring-up phase we
then clear the memory as a part of initialization.  The general idea is
that the clearing in initialization can act as a prefetch of sorts for the
buffer info structures so they are in the local CPU when we go to populate
them.  This should help to improve overall time needed to perform a
suspend/resume.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c |   11 +-
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c|  158 --
 2 files changed, 98 insertions(+), 71 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index 6466d828bc6f..8c6f40d4db6f 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -1945,7 +1945,16 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring 
*rx_ring,
 
/* unmap buffer on Tx side */
tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
-   ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
+
+   /* Free all the Tx ring sk_buffs */
+   dev_kfree_skb_any(tx_buffer->skb);
+
+   /* unmap skb header data */
+   dma_unmap_single(tx_ring->dev,
+dma_unmap_addr(tx_buffer, dma),
+dma_unmap_len(tx_buffer, len),
+DMA_TO_DEVICE);
+   dma_unmap_len_set(tx_buffer, len, 0);
 
/* increment Rx/Tx next to clean counters */
rx_ntc++;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index dd04b76ae0bd..6ec0ebf7f174 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -958,28 +958,6 @@ static inline void ixgbe_irq_rearm_queues(struct 
ixgbe_adapter *adapter,
}
 }
 
-void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
- struct ixgbe_tx_buffer *tx_buffer)
-{
-   if (tx_buffer->skb) {
-   dev_kfree_skb_any(tx_buffer->skb);
-   if (dma_unmap_len(tx_buffer, len))
-   dma_unmap_single(ring->dev,
-dma_unmap_addr(tx_buffer, dma),
-dma_unmap_len(tx_buffer, len),
-DMA_TO_DEVICE);
-   } else if (dma_unmap_len(tx_buffer, len)) {
-   dma_unmap_page(ring->dev,
-  dma_unmap_addr(tx_buffer, dma),
-  dma_unmap_len(tx_buffer, len),
-  DMA_TO_DEVICE);
-   }
-   tx_buffer->next_to_watch = NULL;
-   tx_buffer->skb = NULL;
-   dma_unmap_len_set(tx_buffer, len, 0);
-   /* tx_buffer must be completely set up in the transmit path */
-}
-
 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 {
struct ixgbe_hw *hw = &adapter->hw;
@@ -1211,7 +1189,6 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector 
*q_vector,
 DMA_TO_DEVICE);
 
/* clear tx_buffer data */
-   tx_buffer->skb = NULL;
dma_unmap_len_set(tx_buffer, len, 0);
 
/* unmap remaining buffers */
@@ -3345,6 +3322,10 @@ void ixgbe_configure_tx_ring(struct ixgbe_adapter 
*adapter,
 
clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
 
+   /* reinitialize tx_buffer_info */
+   memset(ring->tx_buffer_info, 0,
+  sizeof(struct ixgbe_tx_buffer) * ring->count);
+
/* enable queue */
IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
 
@@ -3865,6 +3846,10 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter 
*adapter,
 #endif
}
 
+   /* initialize rx_buffer_info */
+   memset(ring->rx_buffer_info, 0,
+  sizeof(struct ixgbe_rx_buffer) * ring->count);
+
/* initialize Rx descriptor 0 */
rx_desc = IXGBE_RX_DESC(ring, 0);
rx_desc->wb.upper.length = 0;
@@ -5049,33 +5034,22 @@ static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter 
*vadapter)
  **/
 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
 {
-   struct device *dev = rx_ring->dev;
-   unsigned long size;
-

[next PATCH 09/11] ixgbe: Add private flag to control buffer mode

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

Since there are potential drawbacks to the new Rx allocation approach I
thought it best to add a "chicken bit" so that we can turn the feature off
if in the event that a problem is found.

It also provides a means of validating the legacy Rx path in the event that
we are forced to fall back.  At some point in the future when we are
convinced we don't need it anymore we might be able to drop the legacy-rx
flag.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c |   47 ++
 1 file changed, 47 insertions(+)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index aa80ece9ea96..6466d828bc6f 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -151,6 +151,13 @@ struct ixgbe_stats {
 };
 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 
+static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
+#define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0)
+   "legacy-rx",
+};
+
+#define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
+
 /* currently supported speeds for 10G */
 #define ADVRTSD_MSK_10G (SUPPORTED_1baseT_Full | \
 SUPPORTED_1baseKX4_Full | \
@@ -1002,6 +1009,8 @@ static void ixgbe_get_drvinfo(struct net_device *netdev,
 
strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
sizeof(drvinfo->bus_info));
+
+   drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
 }
 
 static void ixgbe_get_ringparam(struct net_device *netdev,
@@ -1141,6 +1150,8 @@ static int ixgbe_get_sset_count(struct net_device 
*netdev, int sset)
return IXGBE_TEST_LEN;
case ETH_SS_STATS:
return IXGBE_STATS_LEN;
+   case ETH_SS_PRIV_FLAGS:
+   return IXGBE_PRIV_FLAGS_STR_LEN;
default:
return -EOPNOTSUPP;
}
@@ -1305,6 +1316,9 @@ static void ixgbe_get_strings(struct net_device *netdev, 
u32 stringset,
}
/* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
break;
+   case ETH_SS_PRIV_FLAGS:
+   memcpy(data, ixgbe_priv_flags_strings,
+  IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
}
 }
 
@@ -3386,6 +3400,37 @@ static int ixgbe_set_eee(struct net_device *netdev, 
struct ethtool_eee *edata)
return 0;
 }
 
+static u32 ixgbe_get_priv_flags(struct net_device *netdev)
+{
+   struct ixgbe_adapter *adapter = netdev_priv(netdev);
+   u32 priv_flags = 0;
+
+   if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
+   priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
+
+   return priv_flags;
+}
+
+static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
+{
+   struct ixgbe_adapter *adapter = netdev_priv(netdev);
+   unsigned int flags2 = adapter->flags2;
+
+   flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
+   if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
+   flags2 |= IXGBE_FLAG2_RX_LEGACY;
+
+   if (flags2 != adapter->flags2) {
+   adapter->flags2 = flags2;
+
+   /* reset interface to repopulate queues */
+   if (netif_running(netdev))
+   ixgbe_reinit_locked(adapter);
+   }
+
+   return 0;
+}
+
 static const struct ethtool_ops ixgbe_ethtool_ops = {
.get_settings   = ixgbe_get_settings,
.set_settings   = ixgbe_set_settings,
@@ -3422,6 +3467,8 @@ static int ixgbe_set_eee(struct net_device *netdev, 
struct ethtool_eee *edata)
.set_eee= ixgbe_set_eee,
.get_channels   = ixgbe_get_channels,
.set_channels   = ixgbe_set_channels,
+   .get_priv_flags = ixgbe_get_priv_flags,
+   .set_priv_flags = ixgbe_set_priv_flags,
.get_ts_info= ixgbe_get_ts_info,
.get_module_info= ixgbe_get_module_info,
.get_module_eeprom  = ixgbe_get_module_eeprom,

[next PATCH 06/11] ixgbe: Use length to determine if descriptor is done

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

This change makes it so that we use the length of the packet instead of the
DD status bit to determine if a new descriptor is ready to be processed.
The obvious advantage is that it cuts down on reads as we don't really even
need the DD bit if going from a 0 to a non-zero value on size is enough to
inform us that the packet has been completed.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 1b6f1f584044..6ce596816954 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1653,8 +1653,8 @@ void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, 
u16 cleaned_count)
i -= rx_ring->count;
}
 
-   /* clear the status bits for the next_to_use descriptor */
-   rx_desc->wb.upper.status_error = 0;
+   /* clear the length for the next_to_use descriptor */
+   rx_desc->wb.upper.length = 0;
 
cleaned_count--;
} while (cleaned_count);
@@ -2170,7 +2170,7 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector 
*q_vector,
 
rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
 
-   if (!rx_desc->wb.upper.status_error)
+   if (!rx_desc->wb.upper.length)
break;
 
/* This memory barrier is needed to keep us from reading
@@ -3749,6 +3749,7 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter 
*adapter,
 struct ixgbe_ring *ring)
 {
struct ixgbe_hw *hw = &adapter->hw;
+   union ixgbe_adv_rx_desc *rx_desc;
u64 rdba = ring->dma;
u32 rxdctl;
u8 reg_idx = ring->reg_idx;
@@ -3783,6 +3784,10 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter 
*adapter,
rxdctl |=  0x080420;
}
 
+   /* initialize Rx descriptor 0 */
+   rx_desc = IXGBE_RX_DESC(ring, 0);
+   rx_desc->wb.upper.length = 0;
+
/* enable receive descriptor ring */
rxdctl |= IXGBE_RXDCTL_ENABLE;
IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
@@ -4998,9 +5003,6 @@ static void ixgbe_clean_rx_ring(struct ixgbe_ring 
*rx_ring)
size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
memset(rx_ring->rx_buffer_info, 0, size);
 
-   /* Zero out the descriptor ring */
-   memset(rx_ring->desc, 0, rx_ring->size);
-
rx_ring->next_to_alloc = 0;
rx_ring->next_to_clean = 0;
rx_ring->next_to_use = 0;

[next PATCH 08/11] ixgbe: Add support for padding packet

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

This patch adds support for providing a buffer with headroom and tailroom
to allow for shared info, NET_SKB_PAD, and NET_IP_ALIGN.  With this
combined with the DMA changes we can start using build_skb to build frames
around an incoming Rx buffer instead of having to memcpy the headers.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe.h  |   17 ++
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   43 +++--
 2 files changed, 56 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h 
b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 80328e657d6a..3537d07b4807 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -94,6 +94,14 @@
 #define IXGBE_RXBUFFER_4K4096
 #define IXGBE_MAX_RXBUFFER  16384  /* largest size for a single descriptor */
 
+#define IXGBE_SKB_PAD  (NET_SKB_PAD + NET_IP_ALIGN)
+#if (PAGE_SIZE < 8192)
+#define IXGBE_MAX_FRAME_BUILD_SKB \
+   (SKB_WITH_OVERHEAD(IXGBE_RXBUFFER_2K) - IXGBE_SKB_PAD)
+#else
+#define IGB_MAX_FRAME_BUILD_SKB IXGBE_RXBUFFER_2K
+#endif
+
 /*
  * NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we
  * reserve 64 more, and skb_shared_info adds an additional 320 bytes more,
@@ -235,6 +243,7 @@ struct ixgbe_rx_queue_stats {
 
 enum ixgbe_ring_state_t {
__IXGBE_RX_3K_BUFFER,
+   __IXGBE_RX_BUILD_SKB_ENABLED,
__IXGBE_RX_RSC_ENABLED,
__IXGBE_RX_CSUM_UDP_ZERO_ERR,
__IXGBE_RX_FCOE,
@@ -244,6 +253,9 @@ enum ixgbe_ring_state_t {
__IXGBE_HANG_CHECK_ARMED,
 };
 
+#define ring_uses_build_skb(ring) \
+   test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state)
+
 struct ixgbe_fwd_adapter {
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
struct net_device *netdev;
@@ -355,6 +367,10 @@ static inline unsigned int ixgbe_rx_bufsz(struct 
ixgbe_ring *ring)
 {
if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
return IXGBE_RXBUFFER_3K;
+#if (PAGE_SIZE < 8192)
+   if (ring_uses_build_skb(ring))
+   return IXGBE_MAX_FRAME_BUILD_SKB;
+#endif
return IXGBE_RXBUFFER_2K;
 }
 
@@ -670,6 +686,7 @@ struct ixgbe_adapter {
 #define IXGBE_FLAG2_VLAN_PROMISC   BIT(13)
 #define IXGBE_FLAG2_EEE_CAPABLEBIT(14)
 #define IXGBE_FLAG2_EEE_ENABLEDBIT(15)
+#define IXGBE_FLAG2_RX_LEGACY  BIT(16)
 
/* Tx fast path data */
int num_tx_queues;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 79495cc990c2..8529eafb9717 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1565,6 +1565,11 @@ static inline void ixgbe_rx_checksum(struct ixgbe_ring 
*ring,
}
 }
 
+static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
+{
+   return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
+}
+
 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
struct ixgbe_rx_buffer *bi)
 {
@@ -1601,7 +1606,7 @@ static bool ixgbe_alloc_mapped_page(struct ixgbe_ring 
*rx_ring,
 
bi->dma = dma;
bi->page = page;
-   bi->page_offset = 0;
+   bi->page_offset = ixgbe_rx_offset(rx_ring);
bi->pagecnt_bias = 1;
 
return true;
@@ -2018,7 +2023,9 @@ static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
 #if (PAGE_SIZE < 8192)
unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
 #else
-   unsigned int truesize = SKB_DATA_ALIGN(size);
+   unsigned int truesize = ring_uses_build_skb(rx_ring) ?
+   SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
+   SKB_DATA_ALIGN(size);
 #endif
skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
rx_buffer->page_offset, size, truesize);
@@ -2100,7 +2107,7 @@ static struct sk_buff *ixgbe_construct_skb(struct 
ixgbe_ring *rx_ring,
 #if (PAGE_SIZE < 8192)
unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
 #else
-   unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
+   unsigned int truesize = SKB_DATA_ALIGN(size);
 #endif
struct sk_buff *skb;
 
@@ -3462,7 +3469,10 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter 
*adapter,
srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
 
/* configure the packet buffer length */
-   srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
+   if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
+   srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
+   else
+   srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
 
/* configure descriptor type */
srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
@@ -3796,6 +3806,

[next PATCH 04/11] ixgbe: Update code to better handle incrementing page count

2017-01-06 Thread Alexander Duyck

From: Alexander Duyck 

Batch the page count updates instead of doing them one at a time.  By doing
this we can improve the overall performance as the atomic increment
operations can be expensive due to the fact that on x86 they are locked
operations which can cause stalls.  By doing bulk updates we can
consolidate the stall which should help to improve the overall receive
performance.

Signed-off-by: Alexander Duyck 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe.h  |7 
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |   39 -
 2 files changed, 31 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h 
b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 97e74deecae2..717c65b0deb2 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -198,7 +198,12 @@ struct ixgbe_rx_buffer {
struct sk_buff *skb;
dma_addr_t dma;
struct page *page;
-   unsigned int page_offset;
+#if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536)
+   __u32 page_offset;
+#else
+   __u16 page_offset;
+#endif
+   __u16 pagecnt_bias;
 };
 
 struct ixgbe_queue_stats {
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 062b984ffdf4..519b6a2b65c1 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1602,6 +1602,7 @@ static bool ixgbe_alloc_mapped_page(struct ixgbe_ring 
*rx_ring,
bi->dma = dma;
bi->page = page;
bi->page_offset = 0;
+   bi->pagecnt_bias = 1;
 
return true;
 }
@@ -1959,13 +1960,15 @@ static bool ixgbe_can_reuse_rx_page(struct 
ixgbe_rx_buffer *rx_buffer,
unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
   ixgbe_rx_bufsz(rx_ring);
 #endif
+   unsigned int pagecnt_bias = rx_buffer->pagecnt_bias--;
+
/* avoid re-using remote pages */
if (unlikely(ixgbe_page_is_reserved(page)))
return false;
 
 #if (PAGE_SIZE < 8192)
/* if we are only owner of page we can reuse it */
-   if (unlikely(page_count(page) != 1))
+   if (unlikely(page_count(page) != pagecnt_bias))
return false;
 
/* flip page offset to other buffer */
@@ -1978,10 +1981,14 @@ static bool ixgbe_can_reuse_rx_page(struct 
ixgbe_rx_buffer *rx_buffer,
return false;
 #endif
 
-   /* Even if we own the page, we are not allowed to use atomic_set()
-* This would break get_page_unless_zero() users.
+   /* If we have drained the page fragment pool we need to update
+* the pagecnt_bias and page count so that we fully restock the
+* number of references the driver holds.
 */
-   page_ref_inc(page);
+   if (unlikely(pagecnt_bias == 1)) {
+   page_ref_add(page, USHRT_MAX);
+   rx_buffer->pagecnt_bias = USHRT_MAX;
+   }
 
return true;
 }
@@ -2025,7 +2032,6 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
return true;
 
/* this page cannot be reused so discard it */
-   __free_pages(page, ixgbe_rx_pg_order(rx_ring));
return false;
}
 
@@ -2104,15 +2110,19 @@ static struct sk_buff *ixgbe_fetch_rx_buffer(struct 
ixgbe_ring *rx_ring,
if (ixgbe_add_rx_frag(rx_ring, rx_buffer, size, skb)) {
/* hand second half of page back to the ring */
ixgbe_reuse_rx_page(rx_ring, rx_buffer);
-   } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
-   /* the page has been released from the ring */
-   IXGBE_CB(skb)->page_released = true;
} else {
-   /* we are not reusing the buffer so unmap it */
-   dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
-ixgbe_rx_pg_size(rx_ring),
-DMA_FROM_DEVICE,
-IXGBE_RX_DMA_ATTR);
+   if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
+   /* the page has been released from the ring */
+   IXGBE_CB(skb)->page_released = true;
+   } else {
+   /* we are not reusing the buffer so unmap it */
+   dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
+ixgbe_rx_pg_size(rx_ring),
+DMA_FROM_DEVICE,
+IXGBE_RX_DMA_ATTR);
+   }
+   __page_frag_cache_drain(page,
+   rx_buffer->pagecnt_bias);
}
 
/* clear contents of buffer_info */
@@ -4972,7 +4982,8 @@ static void ixgbe_clean_rx_ring(struct ixgbe_ring 
*rx_ring)
 ixgbe_rx_pg_size(rx_ring),

1 2 3 >

1 - 100 of 266 matches

Mail list logo