[PATCH 1/10] cxgb3 - main header files

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements the main header files of
the Chelsio T3 network driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/cxgb3/adapter.h  |  317 +++
 drivers/net/cxgb3/common.h   |  702 ++
 drivers/net/cxgb3/cxgb3_ioctl.h  |  165 
 drivers/net/cxgb3/firmware_exports.h |  145 +++
 4 files changed, 1329 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/adapter.h b/drivers/net/cxgb3/adapter.h
new file mode 100644
index 000..318fe6c
--- /dev/null
+++ b/drivers/net/cxgb3/adapter.h
@@ -0,0 +1,317 @@
+/*
+ * This file is part of the Chelsio T3 Ethernet driver for Linux.
+ *
+ * Copyright (C) 2003-2006 Chelsio Communications.  All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
+ * release for licensing terms and conditions.
+ */
+
+/* This file should not be included directly.  Include common.h instead. */
+
+#ifndef __T3_ADAPTER_H__
+#define __T3_ADAPTER_H__
+
+#include linux/pci.h
+#include linux/spinlock.h
+#include linux/interrupt.h
+#include linux/timer.h
+#include linux/cache.h
+#include t3cdev.h
+#include asm/semaphore.h
+#include asm/bitops.h
+#include asm/io.h
+
+typedef irqreturn_t (*intr_handler_t)(int, void *);
+
+struct vlan_group;
+
+struct port_info {
+   struct net_device *dev;
+   struct vlan_group *vlan_grp;
+   const struct port_type_info *port_type;
+   u8 rx_csum_offload;
+   u8 nqsets;
+   u8 first_qset;
+   struct cphy phy;
+   struct cmac mac;
+   struct link_config link_config;
+   struct net_device_stats netstats;
+   int activity;
+};
+
+struct work_struct;
+struct dentry;
+
+enum { /* adapter flags */
+   FULL_INIT_DONE = (1  0),
+   USING_MSI  = (1  1),
+   USING_MSIX = (1  2),
+};
+
+struct rx_desc;
+struct rx_sw_desc;
+
+struct sge_fl { /* SGE per free-buffer list state */
+   unsigned int buf_size;  /* size of each Rx buffer */
+   unsigned int credits;   /* # of available Rx buffers */
+   unsigned int size;  /* capacity of free list */
+   unsigned int cidx;  /* consumer index */
+   unsigned int pidx;  /* producer index */
+   unsigned int gen;   /* free list generation */
+   struct rx_desc *desc;   /* address of HW Rx descriptor ring */
+   struct rx_sw_desc *sdesc;   /* address of SW Rx descriptor ring */
+   dma_addr_t   phys_addr; /* physical address of HW ring start */
+   unsigned int cntxt_id;  /* SGE context id for the free list */
+   unsigned long empty;/* # of times queue ran out of buffers */
+};
+
+/*
+ * Bundle size for grouping offload RX packets for delivery to the stack.
+ * Don't make this too big as we do prefetch on each packet in a bundle.
+ */
+# define RX_BUNDLE_SIZE 8
+
+struct rsp_desc;
+
+struct sge_rspq {   /* state for an SGE response queue */
+   unsigned int credits;   /* # of pending response credits */
+   unsigned int size;  /* capacity of response queue */
+   unsigned int cidx;  /* consumer index */
+   unsigned int gen;   /* current generation bit */
+   unsigned int polling;   /* is the queue serviced through NAPI? */
+   unsigned int holdoff_tmr;   /* interrupt holdoff timer in 100ns */
+   unsigned int next_holdoff;  /* holdoff time for next interrupt */
+   struct rsp_desc *desc;  /* address of HW response ring */
+   dma_addr_t   phys_addr; /* physical address of the ring */
+   unsigned int cntxt_id;  /* SGE context id for the response q */
+   spinlock_t   lock;  /* guards response processing */
+   struct sk_buff *rx_head;/* offload packet receive queue head */
+   struct sk_buff *rx_tail;/* offload packet receive queue tail */
+
+   unsigned long offload_pkts;
+   unsigned long offload_bundles;
+   unsigned long eth_pkts; /* # of ethernet packets */
+   unsigned long pure_rsps;/* # of pure (non-data) responses */
+   unsigned long imm_data; /* responses with immediate data */
+   unsigned long rx_drops; /* # of packets dropped due to no mem */
+   unsigned long async_notif;  /* # of asynchronous notification events */
+   unsigned long empty;/* # of times queue ran out of credits */
+   unsigned long nomem;/* # of responses deferred due to no mem */
+   unsigned long unhandled_irqs; /* # of spurious intrs */
+};
+
+struct tx_desc;
+struct tx_sw_desc;
+
+struct sge_txq {/* state for an SGE Tx queue */
+   unsigned long flags

[PATCH 9/10] cxgb3 - register definitions

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements the registers definitions for the
Chelsio network adapter's driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/cxgb3/regs.h | 2754 ++
 1 files changed, 2754 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h
new file mode 100644
index 000..74c440b
--- /dev/null
+++ b/drivers/net/cxgb3/regs.h
@@ -0,0 +1,2754 @@
+#define A_SG_CONTROL 0x0
+
+
+#define S_DROPPKT20
+#define V_DROPPKT(x) ((x)  S_DROPPKT)
+#define F_DROPPKTV_DROPPKT(1U)
+
+
+#define S_EGRGENCTRL19
+#define V_EGRGENCTRL(x) ((x)  S_EGRGENCTRL)
+#define F_EGRGENCTRLV_EGRGENCTRL(1U)
+
+
+#define S_USERSPACESIZE14
+#define M_USERSPACESIZE0x1f
+#define V_USERSPACESIZE(x) ((x)  S_USERSPACESIZE)
+
+#define S_HOSTPAGESIZE11
+#define M_HOSTPAGESIZE0x7
+#define V_HOSTPAGESIZE(x) ((x)  S_HOSTPAGESIZE)
+
+#define S_FLMODE9
+#define V_FLMODE(x) ((x)  S_FLMODE)
+#define F_FLMODEV_FLMODE(1U)
+
+
+#define S_PKTSHIFT6
+#define M_PKTSHIFT0x7
+#define V_PKTSHIFT(x) ((x)  S_PKTSHIFT)
+
+#define S_ONEINTMULTQ5
+#define V_ONEINTMULTQ(x) ((x)  S_ONEINTMULTQ)
+#define F_ONEINTMULTQV_ONEINTMULTQ(1U)
+
+
+#define S_BIGENDIANINGRESS2
+#define V_BIGENDIANINGRESS(x) ((x)  S_BIGENDIANINGRESS)
+#define F_BIGENDIANINGRESSV_BIGENDIANINGRESS(1U)
+
+
+#define S_ISCSICOALESCING1
+#define V_ISCSICOALESCING(x) ((x)  S_ISCSICOALESCING)
+#define F_ISCSICOALESCINGV_ISCSICOALESCING(1U)
+
+
+#define S_GLOBALENABLE0
+#define V_GLOBALENABLE(x) ((x)  S_GLOBALENABLE)
+#define F_GLOBALENABLEV_GLOBALENABLE(1U)
+
+
+#define S_AVOIDCQOVFL24
+#define V_AVOIDCQOVFL(x) ((x)  S_AVOIDCQOVFL)
+#define F_AVOIDCQOVFLV_AVOIDCQOVFL(1U)
+
+
+#define S_OPTONEINTMULTQ23
+#define V_OPTONEINTMULTQ(x) ((x)  S_OPTONEINTMULTQ)
+#define F_OPTONEINTMULTQV_OPTONEINTMULTQ(1U)
+
+
+#define S_CQCRDTCTRL22
+#define V_CQCRDTCTRL(x) ((x)  S_CQCRDTCTRL)
+#define F_CQCRDTCTRLV_CQCRDTCTRL(1U)
+
+
+#define A_SG_KDOORBELL 0x4
+
+
+#define S_SELEGRCNTX31
+#define V_SELEGRCNTX(x) ((x)  S_SELEGRCNTX)
+#define F_SELEGRCNTXV_SELEGRCNTX(1U)
+
+
+#define S_EGRCNTX0
+#define M_EGRCNTX0x
+#define V_EGRCNTX(x) ((x)  S_EGRCNTX)
+
+#define A_SG_GTS 0x8
+
+
+#define S_RSPQ29
+
+#define V_RSPQ(x) ((x)  S_RSPQ)
+
+#define G_RSPQ(x) (((x)  S_RSPQ)  M_RSPQ)
+
+
+#define S_NEWTIMER16
+#define M_NEWTIMER0x1fff
+
+#define V_NEWTIMER(x) ((x)  S_NEWTIMER)
+
+#define S_NEWINDEX0
+#define M_NEWINDEX0x
+#define V_NEWINDEX(x) ((x)  S_NEWINDEX)
+
+#define A_SG_CONTEXT_CMD 0xc
+
+
+#define S_CONTEXT_CMD_OPCODE28
+#define M_CONTEXT_CMD_OPCODE0xf
+#define V_CONTEXT_CMD_OPCODE(x) ((x)  S_CONTEXT_CMD_OPCODE)
+
+#define S_CONTEXT_CMD_BUSY27
+#define V_CONTEXT_CMD_BUSY(x) ((x)  S_CONTEXT_CMD_BUSY)
+#define F_CONTEXT_CMD_BUSYV_CONTEXT_CMD_BUSY(1U)
+
+
+#define S_CQ_CREDIT20
+
+#define M_CQ_CREDIT0x7f
+
+#define V_CQ_CREDIT(x) ((x)  S_CQ_CREDIT)
+
+#define G_CQ_CREDIT(x) (((x)  S_CQ_CREDIT)  M_CQ_CREDIT)
+
+
+#define S_CQ19
+
+#define V_CQ(x) ((x)  S_CQ)
+#define F_CQV_CQ(1U)
+
+#define F_CQV_CQ(1U)
+
+
+#define S_RESPONSEQ18
+#define V_RESPONSEQ(x) ((x)  S_RESPONSEQ)
+#define F_RESPONSEQV_RESPONSEQ(1U)
+
+
+#define S_EGRESS17
+#define V_EGRESS(x) ((x)  S_EGRESS)
+#define F_EGRESSV_EGRESS(1U)
+
+
+#define S_FREELIST16
+#define V_FREELIST(x) ((x)  S_FREELIST)
+#define F_FREELISTV_FREELIST(1U)
+
+
+#define S_CONTEXT0
+#define M_CONTEXT0x
+#define V_CONTEXT(x) ((x)  S_CONTEXT)
+
+#define G_CONTEXT(x) (((x)  S_CONTEXT)  M_CONTEXT)
+
+
+#define A_SG_CONTEXT_DATA0 0x10
+
+
+#define A_SG_CONTEXT_DATA1 0x14
+
+
+#define A_SG_CONTEXT_DATA2 0x18
+
+
+#define A_SG_CONTEXT_DATA3 0x1c
+
+
+#define A_SG_CONTEXT_MASK0 0x20
+
+
+#define A_SG_CONTEXT_MASK1 0x24
+
+
+#define A_SG_CONTEXT_MASK2 0x28
+
+
+#define A_SG_CONTEXT_MASK3 0x2c
+
+
+#define A_SG_RSPQ_CREDIT_RETURN 0x30
+
+
+#define S_CREDITS0
+#define M_CREDITS0x
+#define V_CREDITS(x) ((x)  S_CREDITS)
+
+#define A_SG_DATA_INTR 0x34
+
+
+#define S_ERRINTR31
+#define V_ERRINTR(x) ((x)  S_ERRINTR)
+#define F_ERRINTRV_ERRINTR(1U)
+
+
+#define A_SG_HI_DRB_HI_THRSH 0x38
+
+
+#define A_SG_HI_DRB_LO_THRSH 0x3c
+
+
+#define A_SG_LO_DRB_HI_THRSH 0x40
+
+
+#define A_SG_LO_DRB_LO_THRSH 0x44
+
+
+#define A_SG_RSPQ_FL_STATUS 0x4c
+
+
+#define S_RSPQ0DISABLED8
+
+#define A_SG_EGR_RCQ_DRB_THRSH 0x54
+
+
+#define S_HIRCQDRBTHRSH16
+#define M_HIRCQDRBTHRSH0x7ff
+#define V_HIRCQDRBTHRSH(x) ((x)  S_HIRCQDRBTHRSH)
+
+#define S_LORCQDRBTHRSH0
+#define M_LORCQDRBTHRSH0x7ff
+#define V_LORCQDRBTHRSH(x) ((x)  S_LORCQDRBTHRSH)
+
+#define A_SG_EGR_CNTX_BADDR 0x58
+
+
+#define A_SG_INT_CAUSE 0x5c
+
+
+#define S_RSPQDISABLED3
+#define V_RSPQDISABLED(x) ((x)  S_RSPQDISABLED)
+#define F_RSPQDISABLEDV_RSPQDISABLED(1U

[PATCH 7/10] cxgb3 - offload header files

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements the offload operations header files
for the Chelsio T3 network adapter's driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/cxgb3/cxgb3_ctl_defs.h |  141 
 drivers/net/cxgb3/cxgb3_defs.h |  100 +++
 drivers/net/cxgb3/cxgb3_offload.h  |  199 +
 drivers/net/cxgb3/l2t.h|  144 
 drivers/net/cxgb3/t3_cpl.h | 1431 
 drivers/net/cxgb3/t3cdev.h |   72 ++
 6 files changed, 2087 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/cxgb3_ctl_defs.h 
b/drivers/net/cxgb3/cxgb3_ctl_defs.h
new file mode 100644
index 000..be7ac6d
--- /dev/null
+++ b/drivers/net/cxgb3/cxgb3_ctl_defs.h
@@ -0,0 +1,141 @@
+/*
+ * Copyright (C) 2003-2006 Chelsio Communications.  All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
+ * release for licensing terms and conditions.
+ */
+
+#ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
+#define _CXGB3_OFFLOAD_CTL_DEFS_H
+
+enum {
+   GET_MAX_OUTSTANDING_WR,
+   GET_TX_MAX_CHUNK,
+   GET_TID_RANGE,
+   GET_STID_RANGE,
+   GET_RTBL_RANGE,
+   GET_L2T_CAPACITY,
+   GET_MTUS,
+   GET_WR_LEN,
+   GET_IFF_FROM_MAC,
+   GET_DDP_PARAMS,
+   GET_PORTS,
+
+   ULP_ISCSI_GET_PARAMS,
+   ULP_ISCSI_SET_PARAMS,
+
+   RDMA_GET_PARAMS,
+   RDMA_CQ_OP,
+   RDMA_CQ_SETUP,
+   RDMA_CQ_DISABLE,
+   RDMA_CTRL_QP_SETUP,
+   RDMA_GET_MEM,
+};
+
+/*
+ * Structure used to describe a TID range.  Valid TIDs are [base, base+num).
+ */
+struct tid_range {
+   unsigned int base;   /* first TID */
+   unsigned int num;/* number of TIDs in range */
+};
+
+/*
+ * Structure used to request the size and contents of the MTU table.
+ */
+struct mtutab {
+   unsigned int size;  /* # of entries in the MTU table */
+   const unsigned short *mtus; /* the MTU table values */
+};
+
+struct net_device;
+
+/*
+ * Structure used to request the adapter net_device owning a given MAC address.
+ */
+struct iff_mac {
+   struct net_device *dev;  /* the net_device */
+   const unsigned char *mac_addr;   /* MAC address to lookup */
+   u16 vlan_tag;
+};
+
+/*
+ * Structure used to request the TCP DDP parameters.
+ */
+struct ddp_params {
+   unsigned int llimit; /* TDDP region start address */
+   unsigned int ulimit; /* TDDP region end address */
+   unsigned int tag_mask;   /* TDDP tag mask */
+};
+
+struct adap_ports {
+   unsigned int nports; /* number of ports on this adapter */
+   struct net_device *lldevs[2];
+};
+
+struct pci_dev;
+
+/*
+ * Structure used to return information to the iscsi layer.
+ */
+struct ulp_iscsi_info {
+   unsigned intoffset;
+   unsigned intllimit;
+   unsigned intulimit;
+   unsigned inttagmask;
+   unsigned intpgsz3;
+   unsigned intpgsz2;
+   unsigned intpgsz1;
+   unsigned intpgsz0;
+   unsigned intmax_rxsz;
+   unsigned intmax_txsz;
+   struct pci_dev  *pdev;
+};
+
+/*
+ * Structure used to return information to the RDMA layer.
+ */
+struct rdma_info {
+   unsigned int tpt_base;   /* TPT base address */
+   unsigned int tpt_top;/* TPT last entry address */
+   unsigned int pbl_base;   /* PBL base address */
+   unsigned int pbl_top;/* PBL last entry address */
+   unsigned int rqt_base;   /* RQT base address */
+   unsigned int rqt_top;/* RQT last entry address */
+   unsigned int udbell_len; /* user doorbell region length */
+   unsigned long udbell_physbase;  /* user doorbell physical start addr */
+   void __iomem *kdb_addr;  /* kernel doorbell register address */
+   struct pci_dev *pdev;/* associated PCI device */
+};
+
+/*
+ * Structure used to request an operation on an RDMA completion queue.
+ */
+struct rdma_cq_op {
+   unsigned int id;
+   unsigned int op;
+   unsigned int credits;
+};
+
+/*
+ * Structure used to setup RDMA completion queues.
+ */
+struct rdma_cq_setup {
+   unsigned int id;
+   unsigned long long base_addr;
+   unsigned int size;
+   unsigned int credits;
+   unsigned int credit_thres;
+   unsigned int ovfl_mode;
+};
+
+/*
+ * Structure used to setup the RDMA control egress context.
+ */
+struct rdma_ctrlqp_setup {
+   unsigned long long base_addr;
+   unsigned int size;
+};
+#endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */
diff --git a/drivers/net/cxgb3/cxgb3_defs.h b/drivers/net/cxgb3/cxgb3_defs.h
new file mode 100644
index 000..ddaba3f
--- /dev/null
+++ b/drivers/net/cxgb3/cxgb3_defs.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2006 Open Grid

[PATCH 8/10] cxgb3 - offload capabilities

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements the offload capabilities of the
Chelsio network adapter's driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/cxgb3/cxgb3_offload.c | 1204 +
 drivers/net/cxgb3/l2t.c   |  558 +
 2 files changed, 1762 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/cxgb3_offload.c 
b/drivers/net/cxgb3/cxgb3_offload.c
new file mode 100644
index 000..1b963d8
--- /dev/null
+++ b/drivers/net/cxgb3/cxgb3_offload.c
@@ -0,0 +1,1204 @@
+/*
+ * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ *  - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ *  - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include linux/list.h
+#include net/neighbour.h
+#include linux/notifier.h
+#include asm/atomic.h
+#include linux/proc_fs.h
+#include linux/if_vlan.h
+#include net/netevent.h
+
+#include common.h
+#include regs.h
+#include cxgb3_ioctl.h
+#include cxgb3_ctl_defs.h
+#include cxgb3_defs.h
+#include l2t.h
+#include firmware_exports.h
+#include cxgb3_offload.h
+
+static LIST_HEAD(client_list);
+static LIST_HEAD(ofld_dev_list);
+static DEFINE_MUTEX(cxgb3_db_lock);
+
+static DEFINE_RWLOCK(adapter_list_lock);
+static LIST_HEAD(adapter_list);
+
+static const unsigned int MAX_ATIDS = 64 * 1024;
+static const unsigned int ATID_BASE = 0x10;
+
+static inline int offload_activated(struct t3cdev *tdev)
+{
+   struct adapter *adapter = tdev2adap(tdev);
+
+   return (test_bit(OFFLOAD_DEVMAP_BIT, adapter-open_device_map));
+}
+
+/**
+ * cxgb3_register_client - register an offload client
+ * @client: the client
+ *
+ * Add the client to the client list,
+ * and call backs the client for each activated offload device
+ */
+void cxgb3_register_client(struct cxgb3_client *client)
+{
+   struct t3cdev *tdev;
+
+   mutex_lock(cxgb3_db_lock);
+   list_add_tail(client-client_list, client_list);
+
+   if (client-add) {
+   list_for_each_entry(tdev, ofld_dev_list, ofld_dev_list) {
+   if (offload_activated(tdev))
+   client-add(tdev);
+   }
+   }
+   mutex_unlock(cxgb3_db_lock);
+}
+EXPORT_SYMBOL(cxgb3_register_client);
+
+/**
+ * cxgb3_unregister_client - unregister an offload client
+ * @client: the client
+ *
+ * Remove the client to the client list,
+ * and call backs the client for each activated offload device.
+ */
+void cxgb3_unregister_client(struct cxgb3_client *client)
+{
+   struct t3cdev *tdev;
+
+   mutex_lock(cxgb3_db_lock);
+   list_del(client-client_list);
+
+   if (client-remove) {
+   list_for_each_entry(tdev, ofld_dev_list, ofld_dev_list) {
+   if (offload_activated(tdev))
+   client-remove(tdev);
+   }
+   }
+   mutex_unlock(cxgb3_db_lock);
+}
+EXPORT_SYMBOL(cxgb3_unregister_client);
+
+/**
+ * cxgb3_add_clients - activate register clients for an offload device
+ * @tdev: the offload device
+ *
+ * Call backs all registered clients once a offload device is activated
+ */
+void cxgb3_add_clients(struct t3cdev *tdev)
+{
+   struct cxgb3_client *client;
+
+   mutex_lock(cxgb3_db_lock);
+   list_for_each_entry(client, client_list, client_list) {
+   if (client-add)
+   client-add(tdev);
+   }
+   mutex_unlock(cxgb3_db_lock);
+}
+
+/**
+ * cxgb3_remove_clients - activate register clients for an offload device
+ * @tdev: the offload device
+ *
+ * Call

[PATCH 6/10] cxgb3 - on board memory, MAC and PHY

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements on board memory, MAC and PHY management
for the Chelsio T3 network adapter's driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/cxgb3/ael1002.c |  223 +
 drivers/net/cxgb3/mc5.c |  453 +++
 drivers/net/cxgb3/vsc8211.c |  208 
 drivers/net/cxgb3/xgmac.c   |  383 
 4 files changed, 1267 insertions(+), 0 deletions(-)

diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c
new file mode 100644
index 000..761c719
--- /dev/null
+++ b/drivers/net/cxgb3/ael1002.c
@@ -0,0 +1,223 @@
+/*
+ * This file is part of the Chelsio T3 Ethernet driver.
+ *
+ * Copyright (C) 2005-2006 Chelsio Communications.  All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
+ * release for licensing terms and conditions.
+ */
+
+#include common.h
+#include regs.h
+
+enum {
+   AEL100X_TX_DISABLE  = 9,
+   AEL100X_TX_CONFIG1  = 0xc002,
+   AEL1002_PWR_DOWN_HI = 0xc011,
+   AEL1002_PWR_DOWN_LO = 0xc012,
+   AEL1002_XFI_EQL = 0xc015,
+   AEL1002_LB_EN   = 0xc017,
+
+   LASI_CTRL   = 0x9002,
+   LASI_STAT   = 0x9005
+};
+
+static void ael100x_txon(struct cphy *phy)
+{
+   int tx_on_gpio = phy-addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
+
+   msleep(100);
+   t3_set_reg_field(phy-adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);
+   msleep(30);
+}
+
+static int ael1002_power_down(struct cphy *phy, int enable)
+{
+   int err;
+
+   err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
+   if (!err)
+   err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
+ BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
+   return err;
+}
+
+static int ael1002_reset(struct cphy *phy, int wait)
+{
+   int err;
+
+   if ((err = ael1002_power_down(phy, 0)) ||
+   (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
+   (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
+   (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
+   (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
+   (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
+  0, 1  5)))
+   return err;
+   return 0;
+}
+
+static int ael1002_intr_noop(struct cphy *phy)
+{
+   return 0;
+}
+
+static int ael100x_get_link_status(struct cphy *phy, int *link_ok,
+  int *speed, int *duplex, int *fc)
+{
+   if (link_ok) {
+   unsigned int status;
+   int err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, status);
+
+   /*
+* BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
+* once more to get the current link state.
+*/
+   if (!err  !(status  BMSR_LSTATUS))
+   err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR,
+   status);
+   if (err)
+   return err;
+   *link_ok = !!(status  BMSR_LSTATUS);
+   }
+   if (speed)
+   *speed = SPEED_1;
+   if (duplex)
+   *duplex = DUPLEX_FULL;
+   return 0;
+}
+
+static struct cphy_ops ael1002_ops = {
+   .reset   = ael1002_reset,
+   .intr_enable = ael1002_intr_noop,
+   .intr_disable= ael1002_intr_noop,
+   .intr_clear  = ael1002_intr_noop,
+   .intr_handler= ael1002_intr_noop,
+   .get_link_status = ael100x_get_link_status,
+   .power_down  = ael1002_power_down,
+};
+
+void t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+const struct mdio_ops *mdio_ops)
+{
+   cphy_init(phy, adapter, phy_addr, ael1002_ops, mdio_ops);
+   ael100x_txon(phy);
+}
+
+static int ael1006_reset(struct cphy *phy, int wait)
+{
+   return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
+}
+
+static int ael1006_intr_enable(struct cphy *phy)
+{
+   return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
+}
+
+static int ael1006_intr_disable(struct cphy *phy)
+{
+   return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
+}
+
+static int ael1006_intr_clear(struct cphy *phy)
+{
+   u32 val;
+
+   return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, val);
+}
+
+static int ael1006_intr_handler(struct cphy *phy)
+{
+   unsigned int status;
+   int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, status);
+
+   if (err)
+   return err;
+   return (status

[PATCH 10/10] cxgb3 - build files and versioning

2006-11-17 Thread Divy Le Ray [EMAIL PROTECTED]
From: Divy Le Ray [EMAIL PROTECTED]

This patch implements build files and versioning for the 
Chelsio T3 network adapter's driver.

Signed-off-by: Divy Le Ray [EMAIL PROTECTED]
---

 drivers/net/Kconfig |   18 ++
 drivers/net/Makefile|1 +
 drivers/net/cxgb3/Makefile  |8 
 drivers/net/cxgb3/version.h |   24 
 4 files changed, 51 insertions(+), 0 deletions(-)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6e863aa..543374d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2357,6 +2357,24 @@ config CHELSIO_T1
   To compile this driver as a module, choose M here: the module
   will be called cxgb.
 
+config CHELSIO_T3
+tristate Chelsio Communications T3 10Gb Ethernet support
+depends on PCI
+help
+  This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
+  adapters.
+
+  For general information about Chelsio and our products, visit
+  our website at http://www.chelsio.com.
+
+  For customer support, please visit our customer support page at
+  http://www.chelsio.com/support.htm.
+
+  Please send feedback to [EMAIL PROTECTED].
+
+  To compile this driver as a module, choose M here: the module
+  will be called cxgb3.
+
 config EHEA
tristate eHEA Ethernet support
depends on IBMEBUS
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index f270bc4..d316ee0 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_E1000) += e1000/
 obj-$(CONFIG_IBM_EMAC) += ibm_emac/
 obj-$(CONFIG_IXGB) += ixgb/
 obj-$(CONFIG_CHELSIO_T1) += chelsio/
+obj-$(CONFIG_CHELSIO_T3) += cxgb3/
 obj-$(CONFIG_EHEA) += ehea/
 obj-$(CONFIG_BONDING) += bonding/
 obj-$(CONFIG_GIANFAR) += gianfar_driver.o
diff --git a/drivers/net/cxgb3/Makefile b/drivers/net/cxgb3/Makefile
new file mode 100644
index 000..3434679
--- /dev/null
+++ b/drivers/net/cxgb3/Makefile
@@ -0,0 +1,8 @@
+#
+# Chelsio T3 driver
+#
+
+obj-$(CONFIG_CHELSIO_T3) += cxgb3.o
+
+cxgb3-objs := cxgb3_main.o ael1002.o vsc8211.o t3_hw.o mc5.o \
+ xgmac.o sge.o l2t.o cxgb3_offload.o
diff --git a/drivers/net/cxgb3/version.h b/drivers/net/cxgb3/version.h
new file mode 100644
index 000..61de82e
--- /dev/null
+++ b/drivers/net/cxgb3/version.h
@@ -0,0 +1,24 @@
+/*
+ *   *
+ * File: *
+ *  version.h*
+ *   *
+ * Description:  *
+ *  Chelsio driver version defines.  *
+ *   *
+ * Copyright (c) 2003 - 2006 Chelsio Communications, Inc.*
+ * All rights reserved.  *
+ *   *
+ * Maintainers: [EMAIL PROTECTED]  *
+ *   *
+ * http://www.chelsio.com*
+ *   *
+ /
+/* $Date: 2006/10/31 18:57:51 $ $RCSfile: version.h,v $ $Revision: 1.3 $ */
+#ifndef __CHELSIO_VERSION_H
+#define __CHELSIO_VERSION_H
+#define DRV_DESC Chelsio T3 Network Driver
+#define DRV_NAME cxgb3
+// Driver version
+#define DRV_VERSION 1.0
+#endif //__CHELSIO_VERSION_H
-
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