Re: [PATCH] dt-bindings: Drop type references on common properties
On Tue, Mar 16, 2021 at 01:48:58PM -0600, Rob Herring wrote: > Users of common properties shouldn't have a type definition as the > common schemas already have one. Drop all the unnecessary type > references in the tree. > > A meta-schema update to catch these is pending. > > Cc: Nicolas Saenz Julienne > Cc: Maxime Ripard > Cc: Linus Walleij > Cc: Bartosz Golaszewski > Cc: Bjorn Andersson > Cc: Krzysztof Kozlowski > Cc: Marc Kleine-Budde > Cc: "David S. Miller" > Cc: Jakub Kicinski > Cc: Srinivas Kandagatla > Cc: Ohad Ben-Cohen > Cc: Mark Brown > Cc: Cheng-Yi Chiang > Cc: Benson Leung > Cc: Zhang Rui > Cc: Daniel Lezcano > Cc: Greg Kroah-Hartman > Cc: Stefan Wahren > Cc: Masahiro Yamada > Cc: Odelu Kukatla > Cc: Alex Elder > Cc: Suman Anna > Cc: Kuninori Morimoto > Cc: Dmitry Baryshkov > Cc: linux-g...@vger.kernel.org > Cc: linux...@vger.kernel.org > Cc: linux-...@vger.kernel.org > Cc: netdev@vger.kernel.org > Cc: linux-remotep...@vger.kernel.org > Cc: alsa-de...@alsa-project.org > Cc: linux-...@vger.kernel.org > Signed-off-by: Rob Herring Acked-by: Maxime Ripard Thanks! Maxiem signature.asc Description: PGP signature
Re: [PATCH v5 16/20] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register
On Wed, Jan 27, 2021 at 05:24:56PM +, Andre Przywara wrote: > The Allwinner H616 SoC has two EMAC controllers, with the second one > being tied to the internal PHY, but also using a separate EMAC clock > register. > > To tell the driver about which clock register to use, we add a parameter > to our syscon phandle. The driver will use this value as an index into > the regmap, so that we can address more than the first register, if > needed. > > Signed-off-by: Andre Przywara Acked-by: Maxime Ripard Maxime signature.asc Description: PGP signature
Re: [PATCH] net: allwinner: Fix some resources leak in the error handling path of the probe and in the remove function
On Tue, Dec 15, 2020 at 07:18:48PM +0100, Christophe JAILLET wrote: > Le 15/12/2020 à 12:37, Maxime Ripard a écrit : > > On Tue, Dec 15, 2020 at 12:11:53PM +0300, Dan Carpenter wrote: > > > On Tue, Dec 15, 2020 at 09:56:55AM +0100, Maxime Ripard wrote: > > > > Hi, > > > > > > > > On Mon, Dec 14, 2020 at 09:21:17PM +0100, Christophe JAILLET wrote: > > > > > 'irq_of_parse_and_map()' should be balanced by a corresponding > > > > > 'irq_dispose_mapping()' call. Otherwise, there is some resources > > > > > leaks. > > > > > > > > Do you have a source to back that? It's not clear at all from the > > > > documentation for those functions, and couldn't find any user calling it > > > > from the ten-or-so random picks I took. > > > > > > It looks like irq_create_of_mapping() needs to be freed with > > > irq_dispose_mapping() so this is correct. > > > > The doc should be updated first to make that clear then, otherwise we're > > going to fix one user while multiples will have poped up > > > > Maxime > > > > Hi, > > as Dan explained, I think that 'irq_dispose_mapping()' is needed because of > the 'irq_create_of_mapping()" within 'irq_of_parse_and_map()'. > > As you suggest, I'll propose a doc update to make it clear and more future > proof. Thanks :) And if you feel like it, a coccinelle script would be awesome too so that other users get fixed over time Maxime signature.asc Description: PGP signature
Re: [PATCH] net: allwinner: Fix some resources leak in the error handling path of the probe and in the remove function
On Tue, Dec 15, 2020 at 12:11:53PM +0300, Dan Carpenter wrote: > On Tue, Dec 15, 2020 at 09:56:55AM +0100, Maxime Ripard wrote: > > Hi, > > > > On Mon, Dec 14, 2020 at 09:21:17PM +0100, Christophe JAILLET wrote: > > > 'irq_of_parse_and_map()' should be balanced by a corresponding > > > 'irq_dispose_mapping()' call. Otherwise, there is some resources leaks. > > > > Do you have a source to back that? It's not clear at all from the > > documentation for those functions, and couldn't find any user calling it > > from the ten-or-so random picks I took. > > It looks like irq_create_of_mapping() needs to be freed with > irq_dispose_mapping() so this is correct. The doc should be updated first to make that clear then, otherwise we're going to fix one user while multiples will have poped up Maxime signature.asc Description: PGP signature
Re: [PATCH] net: allwinner: Fix some resources leak in the error handling path of the probe and in the remove function
Hi, On Mon, Dec 14, 2020 at 09:21:17PM +0100, Christophe JAILLET wrote: > 'irq_of_parse_and_map()' should be balanced by a corresponding > 'irq_dispose_mapping()' call. Otherwise, there is some resources leaks. Do you have a source to back that? It's not clear at all from the documentation for those functions, and couldn't find any user calling it from the ten-or-so random picks I took. Maxime signature.asc Description: PGP signature
Re: [PATCH] net: allwinner: remove redundant irqsave and irqrestore in hardIRQ
On Tue, Sep 22, 2020 at 01:56:15PM +1200, Barry Song wrote: > The comment "holders of db->lock must always block IRQs" and related > code to do irqsave and irqrestore don't make sense since we are in a > IRQ-disabled hardIRQ context. > > Cc: Maxime Ripard > Cc: Chen-Yu Tsai > Signed-off-by: Barry Song Acked-by: Maxime Ripard Thanks! Maxime signature.asc Description: PGP signature
Re: PHY reset handling during DT parsing
Hi Andrew, On Tue, Jul 07, 2020 at 04:19:18PM +0200, Andrew Lunn wrote: > On Mon, Jul 06, 2020 at 08:13:31PM +0200, Maxime Ripard wrote: > > I came across an issue today on an Allwinner board, but I believe it's a > > core issue. > > > > That board is using the stmac driver together with a phy that happens to > > have a reset GPIO, except that that GPIO will never be claimed, and the > > PHY will thus never work. > > > > You can find an example of such a board here: > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun6i-a31-hummingbird.dts#n195 > > > > It looks like when of_mdiobus_register() will parse the DT, it will then > > call of_mdiobus_register_phy() for each PHY it encounters [1]. > > of_mdiobus_register_phy() will then if the phy doesn't have an > > ethernet-phy-id* compatible call get_phy_device() [2], and will later on > > call phy_register_device [3]. > > > > get_phy_device() will then call get_phy_id() [4], that will try to > > access the PHY through the MDIO bus [5]. > > > > The code that deals with the PHY reset line / GPIO is however only done > > in mdiobus_device_register, called through phy_device_register. Since > > this is happening way after the call to get_phy_device, our PHY might > > still very well be in reset if the bootloader hasn't put it out of reset > > and left it there. > > Hi Maxime > > If you look at the history of this code, > > commit bafbdd527d569c8200521f2f7579f65a044271be > Author: Sergei Shtylyov > Date: Mon Dec 4 13:35:05 2017 +0100 > > phylib: Add device reset GPIO support > > you will see there is an assumption the PHY can be detected while in > reset. The reset was originally handled inside the at803x PHY driver > probe function, before it got moved into the core. > > What you are asking for it reasonable, but you have some history to > deal with, changing some assumptions as to what the reset is all > about. Thanks for the pointer. It looks to me from the commit log that the assumption was that a bootloader could leave the PHY into reset though? It starts with: > The PHY devices sometimes do have their reset signal (maybe even power > supply?) tied to some GPIO and sometimes it also does happen that a > boot loader does not leave it deasserted. This is exactly the case I was discussing. The bootloader hasn't used the PHY, and thus the PHY reset signal is still asserted? Maxime
PHY reset handling during DT parsing
Hi, I came across an issue today on an Allwinner board, but I believe it's a core issue. That board is using the stmac driver together with a phy that happens to have a reset GPIO, except that that GPIO will never be claimed, and the PHY will thus never work. You can find an example of such a board here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun6i-a31-hummingbird.dts#n195 It looks like when of_mdiobus_register() will parse the DT, it will then call of_mdiobus_register_phy() for each PHY it encounters [1]. of_mdiobus_register_phy() will then if the phy doesn't have an ethernet-phy-id* compatible call get_phy_device() [2], and will later on call phy_register_device [3]. get_phy_device() will then call get_phy_id() [4], that will try to access the PHY through the MDIO bus [5]. The code that deals with the PHY reset line / GPIO is however only done in mdiobus_device_register, called through phy_device_register. Since this is happening way after the call to get_phy_device, our PHY might still very well be in reset if the bootloader hasn't put it out of reset and left it there. I'm not entirely sure how to fix that though. I tried to fix it by splitting away the gpio / reset code away from mdiobus_device_register into a new function, and calling it before the first call to get_phy_id so that we can put our phy out of reset, but it looks like the device registration makes it more complicated than that. Any ideas? Thanks! Maxime 1: https://elixir.bootlin.com/linux/latest/source/drivers/of/of_mdio.c#L274 2: https://elixir.bootlin.com/linux/latest/source/drivers/of/of_mdio.c#L82 3: https://elixir.bootlin.com/linux/latest/source/drivers/of/of_mdio.c#L119 4: https://elixir.bootlin.com/linux/latest/source/drivers/net/phy/phy_device.c#L830 5: https://elixir.bootlin.com/linux/latest/source/drivers/net/phy/phy_device.c#L791 signature.asc Description: PGP signature
Re: [PATCH 3/3] arm64: allwinner: a64: enable Bluetooth On Pinebook
Hi,
On Sun, Jul 05, 2020 at 12:51:10PM -0700, Vasily Khoruzhick wrote:
> Pinebook has an RTL8723CS WiFi + BT chip, BT is connected to UART1
> and uses PL5 as device wake GPIO, PL6 as host wake GPIO the I2C
> controlling signals are connected to R_I2C bus.
>
> Enable it in the device tree.
>
> Signed-off-by: Vasily Khoruzhick
> ---
> .../arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> index 64b1c54f87c0..e63ff271be4e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> @@ -408,6 +408,18 @@ &uart0 {
> status = "okay";
> };
>
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
> + status = "okay";
You probably need uart-has-rtscts here
> +
> + bluetooth {
> + compatible = "realtek,rtl8723cs-bt";
> + device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
> + host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
> + };
And max-speed I guess?
Maxime
>
Re: [DO-NOT-MERGE][PATCH v4 3/3] arm64: allwinner: Enable Bluetooth and WiFi on sopine baseboard
Hi Marcel, On Tue, Apr 28, 2020 at 11:51:24AM +0200, Marcel Holtmann wrote: > Hi Alistair, > > > The sopine board has an optional RTL8723BS WiFi + BT module that can be > > connected to UART1. Add this to the device tree so that it will work > > for users if connected. > > > > Signed-off-by: Alistair Francis > > --- > > .../allwinner/sun50i-a64-sopine-baseboard.dts | 29 +++ > > 1 file changed, 29 insertions(+) > > so I am bit confused on what to do with this series? Do you want me to apply a > subset of patches or do you require specific reviews or acks? Applying 1 and 2 and leaving 3 aside would be great :) Thanks! Maxime signature.asc Description: PGP signature
[PATCH] dt-bindings: can: Convert Allwinner A10 CAN controller to a schema
The older Allwinner SoCs have a CAN controller that is supported in Linux,
with a matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard
---
.../net/can/allwinner,sun4i-a10-can.yaml | 51 +++
.../devicetree/bindings/net/can/sun4i_can.txt | 36 -
2 files changed, 51 insertions(+), 36 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
delete mode 100644 Documentation/devicetree/bindings/net/can/sun4i_can.txt
diff --git
a/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
b/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
new file mode 100644
index ..770af7c46114
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/can/allwinner,sun4i-a10-can.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 CAN Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - const: allwinner,sun7i-a20-can
+ - const: allwinner,sun4i-a10-can
+ - const: allwinner,sun4i-a10-can
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+can0: can@1c2bc00 {
+compatible = "allwinner,sun7i-a20-can",
+ "allwinner,sun4i-a10-can";
+reg = <0x01c2bc00 0x400>;
+interrupts = ;
+clocks = <&ccu CLK_APB1_CAN>;
+};
+
+...
diff --git a/Documentation/devicetree/bindings/net/can/sun4i_can.txt
b/Documentation/devicetree/bindings/net/can/sun4i_can.txt
deleted file mode 100644
index f69845e6feaf..
--- a/Documentation/devicetree/bindings/net/can/sun4i_can.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-Allwinner A10/A20 CAN controller Device Tree Bindings
--
-
-Required properties:
-- compatible: "allwinner,sun4i-a10-can"
-- reg: physical base address and size of the Allwinner A10/A20 CAN register
map.
-- interrupts: interrupt specifier for the sole interrupt.
-- clock: phandle and clock specifier.
-
-Example
-
-SoC common .dtsi file:
-
- can0_pins_a: can0@0 {
- allwinner,pins = "PH20","PH21";
- allwinner,function = "can";
- allwinner,drive = <0>;
- allwinner,pull = <0>;
- };
-...
- can0: can@1c2bc00 {
- compatible = "allwinner,sun4i-a10-can";
- reg = <0x01c2bc00 0x400>;
- interrupts = <0 26 4>;
- clocks = <&apb1_gates 4>;
- status = "disabled";
- };
-
-Board specific .dts file:
-
- can0: can@1c2bc00 {
- pinctrl-names = "default";
- pinctrl-0 = <&can0_pins_a>;
- status = "okay";
- };
--
2.23.0
Re: [PATCH v4 03/13] dt-bindings: net: Add a YAML schemas for the generic MDIO options
On Thu, Jun 27, 2019 at 10:06:57AM -0600, Rob Herring wrote:
> On Thu, Jun 27, 2019 at 9:57 AM Maxime Ripard
> wrote:
> > > > +
> > > > +reset-gpios = <&gpio2 5 1>;
> > > > +reset-delay-us = <2>;
> > > > +
> > > > +ethphy0: ethernet-phy@1 {
> > > > +reg = <1>;
> > >
> > > Need a child node schema to validate the unit-address and reg property.
> >
> > This should be already covered by the ethernet-phy.yaml schemas
> > earlier in this series.
>
> Partially, yes.
>
> > Were you expecting something else?
>
> That would not prevent having a child node such as 'foo {};' or
> 'foo@bad {};'. It would also not check valid nodes named something
> other than 'ethernet-phy'.
Right, but listing the nodes won't either, since we can't enable
additionalProperties in that schema. So any node that wouldn't match
ethernet-phy@.* wouldn't be validated, but wouldn't generate a warning
either.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH v4 03/13] dt-bindings: net: Add a YAML schemas for the generic MDIO options
Hi Rob,
On Thu, Jun 27, 2019 at 09:48:06AM -0600, Rob Herring wrote:
> On Thu, Jun 27, 2019 at 9:32 AM Maxime Ripard
> wrote:
> >
> > The MDIO buses have a number of available device tree properties that can
> > be used in their device tree node. Add a YAML schemas for those.
> >
> > Suggested-by: Andrew Lunn
> > Signed-off-by: Maxime Ripard
> > ---
> > Documentation/devicetree/bindings/net/mdio.txt | 38 +-
> > Documentation/devicetree/bindings/net/mdio.yaml | 51 ++-
> > 2 files changed, 52 insertions(+), 37 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/net/mdio.yaml
>
> Reviewed-by: Rob Herring
>
> However, some comments for a follow-up...
>
> > diff --git a/Documentation/devicetree/bindings/net/mdio.yaml
> > b/Documentation/devicetree/bindings/net/mdio.yaml
> > new file mode 100644
> > index ..b8fa8251c4bc
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/mdio.yaml
> > @@ -0,0 +1,51 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/mdio.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MDIO Bus Generic Binding
> > +
> > +maintainers:
> > + - Andrew Lunn
> > + - Florian Fainelli
> > + - Heiner Kallweit
> > +
> > +description:
> > + These are generic properties that can apply to any MDIO bus. Any
> > + MDIO bus must have a list of child nodes, one per device on the
> > + bus. These should follow the generic ethernet-phy.yaml document, or
> > + a device specific binding document.
> > +
> > +properties:
> > + reset-gpios:
> > +maxItems: 1
> > +description:
> > + The phandle and specifier for the GPIO that controls the RESET
> > + lines of all PHYs on that MDIO bus.
> > +
> > + reset-delay-us:
> > +description:
> > + RESET pulse width in microseconds. It applies to all PHY devices
> > + and must therefore be appropriately determined based on all PHY
> > + requirements (maximum value of all per-PHY RESET pulse widths).
> > +
> > +examples:
> > + - |
> > +davinci_mdio: mdio@5c03 {
>
> Can we enforce nodename to be mdio? That may not work for muxes.
> You'll probably have to implement it and see.
Ok, I'll send a follow-up patch for this.
> > +compatible = "ti,davinci_mdio";
> > +reg = <0x5c03 0x1000>;
> > +#address-cells = <1>;
> > +#size-cells = <0>;
>
> These 2 should have a schema.
Indeed, I'll do it for that too.
> > +
> > +reset-gpios = <&gpio2 5 1>;
> > +reset-delay-us = <2>;
> > +
> > +ethphy0: ethernet-phy@1 {
> > +reg = <1>;
>
> Need a child node schema to validate the unit-address and reg property.
This should be already covered by the ethernet-phy.yaml schemas
earlier in this series.
Were you expecting something else?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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[PATCH v4 11/13] dt-bindings: net: dwmac: Deprecate the PHY reset properties
Even though the DWMAC driver uses some driver specific properties, the PHY core has a bunch of generic properties and can deal with them nicely. Let's deprecate our specific properties. Reviewed-by: Martin Blumenstingl Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 956308806c33..0bf322408500 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -172,16 +172,19 @@ properties: * snps,priority, TX queue priority (Range 0x0 to 0xF) snps,reset-gpio: +deprecated: true maxItems: 1 description: PHY Reset GPIO snps,reset-active-low: +deprecated: true $ref: /schemas/types.yaml#definitions/flag description: Indicates that the PHY Reset is active low snps,reset-delays-us: +deprecated: true allOf: - $ref: /schemas/types.yaml#definitions/uint32-array - minItems: 3 -- git-series 0.9.1
[PATCH v4 12/13] ARM: dts: sunxi: Switch to the generic PHY properties
The DWMAC specific properties to manage the PHY have been superseeded by
the generic PHY properties. Let's move to it.
Reviewed-by: Andrew Lunn
Tested-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 6 +++---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 6 +++---
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 9 -
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 8
4 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 09832b4e8fc8..2652d737fe7c 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -155,13 +155,13 @@
pinctrl-0 = <&gmac_rgmii_pins>;
phy = <&phy1>;
phy-mode = "rgmii";
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index 8e724c52feff..7899712400b2 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -95,13 +95,13 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_dldo1>;
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>; /* PA21 */
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index fd0153f65685..b01d91d025ec 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -103,15 +103,14 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_gmac_vdd>;
- /* phy reset config */
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
- snps,reset-active-low;
- /* wait 1s after reset, otherwise fail to read phy id */
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index c34a83f666c7..ca12cee27072 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -108,14 +108,14 @@
phy = <&phy3>;
phy-mode = "rgmii";
phy-supply = <®_vcc3v3>;
-
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy3: ethernet-phy@3 {
reg = <3>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
--
git-series 0.9.1
[PATCH v4 02/13] dt-bindings: net: Add a YAML schemas for the generic PHY options
The networking PHYs have a number of available device tree properties that
can be used in their device tree node. Add a YAML schemas for those.
Reviewed-by: Andrew Lunn
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 179 +-
Documentation/devicetree/bindings/net/phy.txt | 80 +
2 files changed, 180 insertions(+), 79 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
new file mode 100644
index ..81d2016d7232
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet PHY Generic Binding
+
+maintainers:
+ - Andrew Lunn
+ - Florian Fainelli
+ - Heiner Kallweit
+
+# The dt-schema tools will generate a select statement first by using
+# the compatible, and second by using the node name if any. In our
+# case, the node name is the one we want to match on, while the
+# compatible is optional.
+select:
+ properties:
+$nodename:
+ pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ required:
+- $nodename
+
+properties:
+ $nodename:
+pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ compatible:
+oneOf:
+ - const: ethernet-phy-ieee802.3-c22
+description: PHYs that implement IEEE802.3 clause 22
+ - const: ethernet-phy-ieee802.3-c45
+description: PHYs that implement IEEE802.3 clause 45
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+description:
+ If the PHY reports an incorrect ID (or none at all) then the
+ compatible list may contain an entry with the correct PHY ID
+ in the above form.
+ The first group of digits is the 16 bit Phy Identifier 1
+ register, this is the chip vendor OUI bits 3:18. The
+ second group of digits is the Phy Identifier 2 register,
+ this is the chip vendor OUI bits 19:24, followed by 10
+ bits of a vendor specific ID.
+ - items:
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+ - const: ethernet-phy-ieee802.3-c45
+
+ reg:
+maxItems: 1
+minimum: 0
+maximum: 31
+description:
+ The ID number for the PHY.
+
+ interrupts:
+maxItems: 1
+
+ max-speed:
+enum:
+ - 10
+ - 100
+ - 1000
+ - 2500
+ - 5000
+ - 1
+ - 2
+ - 25000
+ - 4
+ - 5
+ - 56000
+ - 10
+ - 20
+description:
+ Maximum PHY supported speed in Mbits / seconds.
+
+ broken-turn-around:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY device does not correctly release
+ the turn around line low at the end of a MDIO transaction.
+
+ enet-phy-lane-swap:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY will swap the TX/RX lanes to
+ compensate for the board being designed with the lanes
+ swapped.
+
+ eee-broken-100tx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000t:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gt:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000kx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkx4:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkr:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ phy-is-integrated:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates that the PHY is integrated into the same
+ physical package as the Ethernet MAC. If needed, muxers
+ should be configured to ensure the integrated PHY is
+ used. The absence of this property indicates the muxers
[PATCH v4 10/13] dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable the DT validation. Since that controller is based on a Synopsys IP, let's add the validation to that schemas with a bunch of conditionals. Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 321 - Documentation/devicetree/bindings/net/dwmac-sun8i.txt| 201 +- Documentation/devicetree/bindings/net/snps,dwmac.yaml| 15 +++- 3 files changed, 336 insertions(+), 201 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml delete mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml new file mode 100644 index ..6f68c7f5fc34 --- /dev/null +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -0,0 +1,321 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A83t EMAC Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: +oneOf: + - const: allwinner,sun8i-a83t-emac + - const: allwinner,sun8i-h3-emac + - const: allwinner,sun8i-r40-emac + - const: allwinner,sun8i-v3s-emac + - const: allwinner,sun50i-a64-emac + - items: +- const: allwinner,sun50i-h6-emac +- const: allwinner,sun50i-a64-emac + + reg: +maxItems: 1 + + interrupts: +maxItems: 1 + + interrupt-names: +const: macirq + + clocks: +maxItems: 1 + + clock-names: +const: stmmaceth + + syscon: +$ref: /schemas/types.yaml#definitions/phandle +description: + Phandle to the device containing the EMAC or GMAC clock + register + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - phy-connection-type + - phy-handle + - syscon + +allOf: + - $ref: "snps,dwmac.yaml#" + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + +then: + properties: +allwinner,tx-delay-ps: + default: 0 + minimum: 0 + maximum: 700 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + +allwinner,rx-delay-ps: + default: 0 + minimum: 0 + maximum: 3100 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-r40-emac + +then: + properties: +allwinner,rx-delay-ps: + default: 0 + minimum: 0 + maximum: 700 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + +then: + properties: +allwinner,leds-active-low: + $ref: /schemas/types.yaml#definitions/flag + description: +EPHY LEDs are active low. + +mdio-mux: + type: object + + properties: +compatible: + const: allwinner,sun8i-h3-mdio-mux + +mdio-parent-bus: + $ref: /schemas/types.yaml#definitions/phandle + description: +Phandle to EMAC MDIO. + +mdio@1: + type: object + description: Internal MDIO Bus + + properties: +"#address-cells": + const: 1 + +"#size-cells": + const: 0 + +compatible: + const: allwinner,sun8i-h3-mdio-internal + +reg: + const: 1 + + patternProperties: +"^ethernet-phy@[0-9a-f]$": + type: object + description: +Integrated PHY node + + properties: +clocks: + maxItems: 1 + +resets: + maxItems: 1 + + required: +- clocks +
[PATCH v4 06/13] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Switch our Allwinner A10 EMAC controller binding to a YAML schema to enable
the DT validation.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 55
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt | 19
---
2 files changed, 55 insertions(+), 19 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
new file mode 100644
index ..2ff9e605cd26
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun4i-a10-emac
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ allwinner,sram:
+description: Phandle to the device SRAM
+$ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - phy-handle
+ - allwinner,sram
+
+examples:
+ - |
+emac: ethernet@1c0b000 {
+compatible = "allwinner,sun4i-a10-emac";
+reg = <0x01c0b000 0x1000>;
+interrupts = <55>;
+clocks = <&ahb_gates 17>;
+phy = <&phy0>;
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
deleted file mode 100644
index e98118aef5f6..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* Allwinner EMAC ethernet controller
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
- "allwinner,sun4i-emac")
-- reg: address and length of the register set for the device.
-- interrupts: interrupt for the device
-- phy: see ethernet.txt file in the same directory.
-- clocks: A phandle to the reference clock for this device
-
-Example:
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- phy = <&phy0>;
-};
--
git-series 0.9.1
[PATCH v4 03/13] dt-bindings: net: Add a YAML schemas for the generic MDIO options
The MDIO buses have a number of available device tree properties that can
be used in their device tree node. Add a YAML schemas for those.
Suggested-by: Andrew Lunn
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/mdio.txt | 38 +-
Documentation/devicetree/bindings/net/mdio.yaml | 51 ++-
2 files changed, 52 insertions(+), 37 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/mdio.yaml
diff --git a/Documentation/devicetree/bindings/net/mdio.txt
b/Documentation/devicetree/bindings/net/mdio.txt
index e3e1603f256c..cf8a0105488e 100644
--- a/Documentation/devicetree/bindings/net/mdio.txt
+++ b/Documentation/devicetree/bindings/net/mdio.txt
@@ -1,37 +1 @@
-Common MDIO bus properties.
-
-These are generic properties that can apply to any MDIO bus.
-
-Optional properties:
-- reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO
- bus.
-- reset-delay-us: RESET pulse width in microseconds.
-
-A list of child nodes, one per device on the bus is expected. These
-should follow the generic phy.txt, or a device specific binding document.
-
-The 'reset-delay-us' indicates the RESET signal pulse width in microseconds and
-applies to all PHY devices. It must therefore be appropriately determined based
-on all PHY requirements (maximum value of all per-PHY RESET pulse widths).
-
-Example :
-This example shows these optional properties, plus other properties
-required for the TI Davinci MDIO driver.
-
- davinci_mdio: ethernet@5c03 {
- compatible = "ti,davinci_mdio";
- reg = <0x5c03 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
- reset-delay-us = <2>;
-
- ethphy0: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethphy1: ethernet-phy@3 {
- reg = <3>;
- };
- };
+This file has moved to mdio.yaml.
diff --git a/Documentation/devicetree/bindings/net/mdio.yaml
b/Documentation/devicetree/bindings/net/mdio.yaml
new file mode 100644
index ..b8fa8251c4bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MDIO Bus Generic Binding
+
+maintainers:
+ - Andrew Lunn
+ - Florian Fainelli
+ - Heiner Kallweit
+
+description:
+ These are generic properties that can apply to any MDIO bus. Any
+ MDIO bus must have a list of child nodes, one per device on the
+ bus. These should follow the generic ethernet-phy.yaml document, or
+ a device specific binding document.
+
+properties:
+ reset-gpios:
+maxItems: 1
+description:
+ The phandle and specifier for the GPIO that controls the RESET
+ lines of all PHYs on that MDIO bus.
+
+ reset-delay-us:
+description:
+ RESET pulse width in microseconds. It applies to all PHY devices
+ and must therefore be appropriately determined based on all PHY
+ requirements (maximum value of all per-PHY RESET pulse widths).
+
+examples:
+ - |
+davinci_mdio: mdio@5c03 {
+compatible = "ti,davinci_mdio";
+reg = <0x5c03 0x1000>;
+#address-cells = <1>;
+#size-cells = <0>;
+
+reset-gpios = <&gpio2 5 1>;
+reset-delay-us = <2>;
+
+ethphy0: ethernet-phy@1 {
+reg = <1>;
+};
+
+ethphy1: ethernet-phy@3 {
+reg = <3>;
+};
+};
--
git-series 0.9.1
[PATCH v4 13/13] ARM: dts: sunxi: Switch from phy to phy-handle
The phy device tree property has been deprecated in favor of phy-handle,
let's replace it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun4i-a10-a1000.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-hackberry.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-marsboard.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-colombus.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-i7.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-cs908.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-m3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
41 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 6c254ec4c85b..8692b11a83c3 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -125,7 +125,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
index 38a2c4134952..816d534ac093 100644
--- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
@@ -68,7 +68,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 7306c65df88a..6ca02e824acc 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -114,7 +114,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index cc988ccd5ca7..47dea0922501 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -80,7 +80,7 @@
};
&emac {
- phy = <&phy0>;
+ phy-handle = <&phy0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
index 80ecd78247ac..d4e319d16aae 100644
--- a/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
@@ -58,7 +58,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins>;
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index 247fa27ef717..8a7b4c53d278 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
@@ -94,
[PATCH v4 08/13] dt-bindings: net: stmmac: Convert the binding to a schemas
Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML schema to enable the DT validation. Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 389 +++- Documentation/devicetree/bindings/net/stmmac.txt | 179 +- 2 files changed, 390 insertions(+), 178 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/snps,dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml new file mode 100644 index ..30e2ff7a2dcb --- /dev/null +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -0,0 +1,389 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare MAC Device Tree Bindings + +maintainers: + - Alexandre Torgue + - Giuseppe Cavallaro + - Jose Abreu + +# Select every compatible, including the deprecated ones. This way, we +# will be able to report a warning when we have that compatible, since +# we will validate the node thanks to the select, but won't report it +# as a valid value in the compatible property description +select: + properties: +compatible: + contains: +enum: + - snps,dwmac + - snps,dwmac-3.50a + - snps,dwmac-3.610 + - snps,dwmac-3.70a + - snps,dwmac-3.710 + - snps,dwmac-4.00 + - snps,dwmac-4.10a + - snps,dwxgmac + - snps,dwxgmac-2.10 + + # Deprecated + - st,spear600-gmac + + required: +- compatible + +properties: + + # We need to include all the compatibles from schemas that will + # include that schemas, otherwise compatible won't validate for + # those. + compatible: +contains: + enum: +- snps,dwmac +- snps,dwmac-3.50a +- snps,dwmac-3.610 +- snps,dwmac-3.70a +- snps,dwmac-3.710 +- snps,dwmac-4.00 +- snps,dwmac-4.10a +- snps,dwxgmac +- snps,dwxgmac-2.10 + + reg: +maxItems: 1 + + interrupts: +minItems: 1 +maxItems: 3 +items: + - description: Combined signal for various interrupt events + - description: The interrupt to manage the remote wake-up packet detection + - description: The interrupt that occurs when Rx exits the LPI state + + interrupt-names: +minItems: 1 +maxItems: 3 +items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + + clocks: +minItems: 1 +maxItems: 3 +items: + - description: GMAC main clock + - description: Peripheral registers interface clock + - description: + PTP reference clock. This clock is used for programming the + Timestamp Addend Register. If not passed then the system + clock will be used and this is fine on some platforms. + + clock-names: +additionalItems: true +contains: + enum: +- stmmaceth +- pclk +- ptp_ref + + resets: +maxItems: 1 +description: + MAC Reset signal. + + reset-names: +const: stmmaceth + + snps,axi-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + AXI BUS Mode parameters. Phandle to a node that can contain the + following properties +* snps,lpi_en, enable Low Power Interface +* snps,xit_frm, unlock on WoL +* snps,wr_osr_lmt, max write outstanding req. limit +* snps,rd_osr_lmt, max read outstanding req. limit +* snps,kbbe, do not cross 1KiB boundary. +* snps,blen, this is a vector of supported burst length. +* snps,fb, fixed-burst +* snps,mb, mixed-burst +* snps,rb, rebuild INCRx Burst + + snps,mtl-rx-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + Multiple RX Queues parameters. Phandle to a node that can + contain the following properties +* snps,rx-queues-to-use, number of RX queues to be used in the + driver +* Choose one of these RX scheduling algorithms + * snps,rx-sched-sp, Strict priority + * snps,rx-sched-wsp, Weighted Strict priority +* For each RX queue + * Choose one of these modes +* snps,dcb-algorithm, Queue to be enabled as DCB +* snps,avb-algorithm, Queue to be enabled as AVB + * snps,map-to-dma-channel, Channel to map + * Specifiy specific packet routing +* snps,route-avcp, AV Untagged Control packets +* snps,route-ptp, PTP Packets +* snps,route-dcbcp, DCB Control Packets +* snps,route-up, Untagged Packets +* snps,route-multi-broad, Multicast & Broadcast Packets + * snps,priority, RX queue priority (Range 0x0 to 0xF) + + snps,mtl-tx-config: +$ref: /sche
[PATCH v4 05/13] dt-bindings: net: phy: The interrupt property is not mandatory
Unlike what was initially claimed in the PHY binding, the interrupt property of a PHY can be omitted, and the OS will turn to polling instead. Document that. Reviewed-by: Andrew Lunn Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 81d2016d7232..c77f97cbd54b 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -156,7 +156,6 @@ properties: required: - reg - - interrupts examples: - | -- git-series 0.9.1
[PATCH v4 04/13] MAINTAINERS: Add Ethernet PHY YAML file
While the Ethernet PHY framework was marked as maintained, the device tree bindings associated to that framework was not listed under the maintained files. Fix that. Reviewed-by: Andrew Lunn Signed-off-by: Maxime Ripard --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3e3b9738f2e6..087821e507f6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6009,6 +6009,7 @@ M:Heiner Kallweit L: netdev@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-bus-mdio +F: Documentation/devicetree/bindings/net/ethernet-phy.yaml F: Documentation/devicetree/bindings/net/mdio* F: Documentation/networking/phy.rst F: drivers/net/phy/ -- git-series 0.9.1
[PATCH v4 00/13] net: Add generic and Allwinner YAML bindings
Hi, This is an attempt at getting the main generic DT bindings for the ethernet (and related) devices, and convert some DT bindings for the Allwinner DTs to YAML as well. This should provide some DT validation coverage. Let me know if you have any questions, Maxime Changes from v3: - Added a cover letter - Dropped the phy-mode deprecation, and the DT changes moving to phy-connection-type - Fixed the mdio example node name - Deprecated the fixed-link array property, in favor of the fixed-link subnode Changes from v2: - Switched to the deprecated keyword to describe deprecated properties - Deprecated phy-mode, phy and phy-handle - Added patches to switch to phy-connection-type and phy-device for Allwinner DTs - Changed the A83t GMAC delays to use multipleOf instead of an enum - Fix the snps,*pbl properties types - Add a generic MDIO YAML schemas Changes from v1: - Move the DWMAC SoC specific bindings to separate documents - Mark snps,reset-gpio (and related) as deprecated and fixed the Allwinner DTs accordingly - Restrict snps,tso to only a couple of compatibles - Use an enum for the compatibles - Add a custom select statement with the compatibles of all the generic compatibles, including the deprecated ones. Remove the deprecated ones from the valid compatible values to issue a warning when used. - Add a patch to MAINTAINERS for the PHY YAML binding - Add missing compatible options for the PHY, and missing phy speeds - Add a custom select clause to make the PHY binding validate all phy nodes, and not just the ones with a compatible - Validate the fixed-link array elements - Removed deprecated properties (phy-mode, phy, phy-device) - Restrict the number of items under link-gpios to 1 Maxime Ripard (13): dt-bindings: net: Add YAML schemas for the generic Ethernet options dt-bindings: net: Add a YAML schemas for the generic PHY options dt-bindings: net: Add a YAML schemas for the generic MDIO options MAINTAINERS: Add Ethernet PHY YAML file dt-bindings: net: phy: The interrupt property is not mandatory dt-bindings: net: sun4i-emac: Convert the binding to a schemas dt-bindings: net: sun4i-mdio: Convert the binding to a schemas dt-bindings: net: stmmac: Convert the binding to a schemas dt-bindings: net: sun7i-gmac: Convert the binding to a schemas dt-bindings: net: sun8i-emac: Convert the binding to a schemas dt-bindings: net: dwmac: Deprecate the PHY reset properties ARM: dts: sunxi: Switch to the generic PHY properties ARM: dts: sunxi: Switch from phy to phy-handle Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 55 ++- Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml | 70 - Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt | 19 +--- Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt | 27 +- Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt | 27 +- Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml | 66 - Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 321 - Documentation/devicetree/bindings/net/dwmac-sun8i.txt| 201 +--- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 204 - Documentation/devicetree/bindings/net/ethernet-phy.yaml | 178 +++- Documentation/devicetree/bindings/net/ethernet.txt | 69 + Documentation/devicetree/bindings/net/fixed-link.txt | 55 +-- Documentation/devicetree/bindings/net/mdio.txt | 38 +--- Documentation/devicetree/bindings/net/mdio.yaml | 51 +- Documentation/devicetree/bindings/net/phy.txt| 80 +-- Documentation/devicetree/bindings/net/snps,dwmac.yaml| 410 - Documentation/devicetree/bindings/net/stmmac.txt | 179 +--- MAINTAINERS | 1 +- arch/arm/boot/dts/sun4i-a10-a1000.dts| 2 +- arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 2 +- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +- arch/arm/boot/dts/sun4i-a10-hackberry.dts| 2 +- arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts | 2 +- arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +- arch/arm/boot/dts/sun4i-a10-marsboard.dts| 2 +- arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
[PATCH v4 01/13] dt-bindings: net: Add YAML schemas for the generic Ethernet options
The Ethernet controllers have a good number of generic options that can be needed in a device tree. Add a YAML schemas for those. Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 204 +++- Documentation/devicetree/bindings/net/ethernet.txt | 69 +-- Documentation/devicetree/bindings/net/fixed-link.txt | 55 +-- 3 files changed, 206 insertions(+), 122 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/ethernet-controller.yaml diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml new file mode 100644 index ..77ee2aa5d29e --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ethernet Controller Generic Binding + +maintainers: + - David S. Miller + +properties: + $nodename: +pattern: "^ethernet(@.*)?$" + + local-mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was assigned to the network device. + + mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was last used by the boot + program; should be used in cases where the MAC address assigned + to the device by the boot program is different from the + local-mac-address property. + + max-frame-size: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Maximum transfer unit (IEEE defined MTU), rather than the + maximum frame size (there\'s contradiction in the Devicetree + Specification). + + max-speed: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Specifies maximum speed in Mbit/s supported by the device. + + nvmem-cells: +maxItems: 1 +description: + Reference to an nvmem node for the MAC address + + nvmem-cells-names: +const: mac-address + + phy-connection-type: +description: + Operation mode of the PHY interface +enum: + # There is not a standard bus between the MAC and the PHY, + # something proprietary is being used to embed the PHY in the + # MAC. + - internal + - mii + - gmii + - sgmii + - qsgmii + - tbi + - rev-mii + - rmii + + # RX and TX delays are added by the MAC when required + - rgmii + + # RGMII with internal RX and TX delays provided by the PHY, + # the MAC should not add the RX or TX delays in this case + - rgmii-id + + # RGMII with internal RX delay provided by the PHY, the MAC + # should not add an RX delay in this case + - rgmii-rxid + + # RGMII with internal TX delay provided by the PHY, the MAC + # should not add an TX delay in this case + - rgmii-txid + - rtbi + - smii + - xgmii + - trgmii + - 1000base-x + - 2500base-x + - rxaui + - xaui + + # 10GBASE-KR, XFI, SFI + - 10gbase-kr + - usxgmii + + phy-mode: +$ref: "#/properties/phy-connection-type" + + phy-handle: +$ref: /schemas/types.yaml#definitions/phandle +description: + Specifies a reference to a node representing a PHY device. + + phy: +$ref: "#/properties/phy-handle" +deprecated: true + + phy-device: +$ref: "#/properties/phy-handle" +deprecated: true + + rx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s receive fifo in bytes. This is used + for components that can have configurable receive fifo sizes, + and is useful for determining certain configuration settings + such as flow control thresholds. + + tx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s transmit fifo in bytes. This + is used for components that can have configurable fifo sizes. + + managed: +allOf: + - $ref: /schemas/types.yaml#definitions/string + - default: auto +enum: + - auto + - in-band-status +description: + Specifies the PHY management type. If auto is set and fixed-link + is not specified, it uses MDIO for management. + + fixed-link: +allOf: + - if: + type: array +then: + deprecated: true + minItems: 1 + maxItems: 1 + items: +items: + - minimum: 0 +maximum: 31 +description: +
[PATCH v4 09/13] dt-bindings: net: sun7i-gmac: Convert the binding to a schemas
Switch our Allwinner A20 GMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt | 27
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml | 66
++
Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++
3 files changed, 69 insertions(+), 27 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
deleted file mode 100644
index 8b3f953656e3..
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
- - compatible: Should be "allwinner,sun7i-a20-gmac"
- - clocks: Should contain the GMAC main clock, and tx clock
- The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
- - clock-names: Should contain the clock names "stmmaceth",
- and "allwinner_gmac_tx"
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Examples:
-
- gmac: ethernet@1c5 {
- compatible = "allwinner,sun7i-a20-gmac";
- reg = <0x01c5 0x1>,
- <0x01c20164 0x4>;
- interrupts = <0 85 1>;
- interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
- phy-mode = "mii";
- };
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
new file mode 100644
index ..38f6a2a73f46
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A20 GMAC Device Tree Bindings
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun7i-a20-gmac
+
+ interrupts:
+maxItems: 1
+
+ interrupt-names:
+const: macirq
+
+ clocks:
+items:
+ - description: GMAC main clock
+ - description: TX clock
+
+ clock-names:
+items:
+ - const: stmmaceth
+ - const: allwinner_gmac_tx
+
+ phy-supply:
+description:
+ PHY regulator
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - phy-connection-type
+
+examples:
+ - |
+gmac: ethernet@1c5 {
+compatible = "allwinner,sun7i-a20-gmac";
+reg = <0x01c5 0x1>,
+ <0x01c20164 0x4>;
+interrupts = <0 85 1>;
+interrupt-names = "macirq";
+clocks = <&ahb_gates 49>, <&gmac_tx>;
+clock-names = "stmmaceth", "allwinner_gmac_tx";
+phy-connection-type = "mii";
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 30e2ff7a2dcb..fed623a81dcd 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -44,6 +44,7 @@ properties:
compatible:
contains:
enum:
+- allwinner,sun7i-a20-gmac
- snps,dwmac
- snps,dwmac-3.50a
- snps,dwmac-3.610
@@ -265,6 +266,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac
@@ -305,6 +307,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwmac-4.00
- snps,dwmac-4.10a
- snps,dwxgmac
--
git-series 0.9.1
[PATCH v4 07/13] dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable
the DT validation.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml | 70
++
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt | 27
---
2 files changed, 70 insertions(+), 27 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
new file mode 100644
index ..df24d9d969f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 MDIO Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+allOf:
+ - $ref: "mdio.yaml#"
+
+# Select every compatible, including the deprecated ones. This way, we
+# will be able to report a warning when we have that compatible, since
+# we will validate the node thanks to the select, but won't report it
+# as a valid value in the compatible property description
+select:
+ properties:
+compatible:
+ enum:
+- allwinner,sun4i-a10-mdio
+
+# Deprecated
+- allwinner,sun4i-mdio
+
+ required:
+- compatible
+
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ compatible:
+const: allwinner,sun4i-a10-mdio
+
+ reg:
+maxItems: 1
+
+ phy-supply:
+description: PHY regulator
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+mdio@1c0b080 {
+compatible = "allwinner,sun4i-a10-mdio";
+reg = <0x01c0b080 0x14>;
+#address-cells = <1>;
+#size-cells = <0>;
+phy-supply = <®_emac_3v3>;
+
+phy0: ethernet-phy@0 {
+reg = <0>;
+};
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
deleted file mode 100644
index ab5b8613b0ef..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner A10 MDIO Ethernet Controller interface
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-mdio"
- (Deprecated: "allwinner,sun4i-mdio").
-- reg: address and length of the register set for the device.
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Example at the SoC level:
-mdio@1c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-And at the board level:
-
-mdio@1c0b080 {
- phy-supply = <®_emac_3v3>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
--
git-series 0.9.1
Re: [PATCH v3 03/16] dt-bindings: net: Add a YAML schemas for the generic MDIO options
Hi,
On Wed, Jun 19, 2019 at 08:17:52AM -0600, Rob Herring wrote:
> On Wed, Jun 19, 2019 at 3:47 AM Maxime Ripard
> wrote:
> >
> > The MDIO buses have a number of available device tree properties that can
> > be used in their device tree node. Add a YAML schemas for those.
> >
> > Suggested-by: Andrew Lunn
> > Signed-off-by: Maxime Ripard
> >
> > ---
> >
> > Changes from v2:
> > - New patch
> > ---
> > Documentation/devicetree/bindings/net/mdio.txt | 38 +-
> > Documentation/devicetree/bindings/net/mdio.yaml | 51 ++-
> > 2 files changed, 52 insertions(+), 37 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/net/mdio.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/mdio.txt
> > b/Documentation/devicetree/bindings/net/mdio.txt
> > index e3e1603f256c..cf8a0105488e 100644
> > --- a/Documentation/devicetree/bindings/net/mdio.txt
> > +++ b/Documentation/devicetree/bindings/net/mdio.txt
> > @@ -1,37 +1 @@
> > -Common MDIO bus properties.
> > -
> > -These are generic properties that can apply to any MDIO bus.
> > -
> > -Optional properties:
> > -- reset-gpios: One GPIO that control the RESET lines of all PHYs on that
> > MDIO
> > - bus.
> > -- reset-delay-us: RESET pulse width in microseconds.
> > -
> > -A list of child nodes, one per device on the bus is expected. These
> > -should follow the generic phy.txt, or a device specific binding document.
> > -
> > -The 'reset-delay-us' indicates the RESET signal pulse width in
> > microseconds and
> > -applies to all PHY devices. It must therefore be appropriately determined
> > based
> > -on all PHY requirements (maximum value of all per-PHY RESET pulse widths).
> > -
> > -Example :
> > -This example shows these optional properties, plus other properties
> > -required for the TI Davinci MDIO driver.
> > -
> > - davinci_mdio: ethernet@5c03 {
> > - compatible = "ti,davinci_mdio";
> > - reg = <0x5c03 0x1000>;
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > -
> > - reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> > - reset-delay-us = <2>;
> > -
> > - ethphy0: ethernet-phy@1 {
> > - reg = <1>;
> > - };
> > -
> > - ethphy1: ethernet-phy@3 {
> > - reg = <3>;
> > - };
> > - };
> > +This file has moved to mdio.yaml.
> > diff --git a/Documentation/devicetree/bindings/net/mdio.yaml
> > b/Documentation/devicetree/bindings/net/mdio.yaml
> > new file mode 100644
> > index ..8f4f9d0a2882
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/mdio.yaml
> > @@ -0,0 +1,51 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/mdio.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MDIO Bus Generic Binding
> > +
> > +maintainers:
> > + - Andrew Lunn
> > + - Florian Fainelli
> > + - Heiner Kallweit
> > +
> > +description:
> > + These are generic properties that can apply to any MDIO bus. Any
> > + MDIO bus must have a list of child nodes, one per device on the
> > + bus. These should follow the generic ethernet-phy.yaml document, or
> > + a device specific binding document.
> > +
> > +properties:
> > + reset-gpios:
> > +maxItems: 1
> > +description:
> > + The phandle and specifier for the GPIO that controls the RESET
> > + lines of all PHYs on that MDIO bus.
> > +
> > + reset-delay-us:
> > +description:
> > + RESET pulse width in microseconds. It applies to all PHY devices
> > + and must therefore be appropriately determined based on all PHY
> > + requirements (maximum value of all per-PHY RESET pulse widths).
> > +
> > +examples:
> > + - |
> > +davinci_mdio: ethernet@5c03 {
>
> Shouldn't this be mdio@... ?
Yeah, I'll fix it.
> > +compatible = "ti,davinci_mdio";
> > +reg = <0x5c03 0x1000>;
> > +#address-cells = <1>;
> > +#size-cells = <0>;
> > +
> > +reset-gpios = <&gpio2 5 1>;
> > +reset-delay-us = <2>;
> > +
> > +ethphy0: ethernet-phy@1 {
>
> Would be good to have some unit-address checks. Could be a follow-up
> though.
I guess this could be good, but I'm not sure how to do that. We could
add a patternProperties with the proper regex, but that would find
some issues only if we have additionalProperties set, which we don't
want since this is a generic binding and that would create another set
of problems :)
maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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Description: PGP signature
Re: [PATCH v3 01/16] dt-bindings: net: Add YAML schemas for the generic Ethernet options
Hi Andrew, On Wed, Jun 19, 2019 at 04:03:14PM +0200, Andrew Lunn wrote: > > + phy-connection-type: > > +description: > > + Operation mode of the PHY interface > > +enum: > > + # There is not a standard bus between the MAC and the PHY, > > + # something proprietary is being used to embed the PHY in the > > + # MAC. > > ... > > > + > > + phy-mode: > > +$ref: "#/properties/phy-connection-type" > > +deprecated: true > > I don't think phy-mode is actually deprecated. ethernet.txt actually says: > > "This is now a de-facto standard property;" and no mentions that is > should not be used. Looking at actual device trees, phy-mode is by far > more popular than phy-connection-type. Looking at the phy-connection-type documentation, I was under this impression, sorry. I'll drop it then. > fwnode_get_phy_mode() first looks for phy-mode and only falls back to > phy-connection-type if it is not present. The same is true for > of_get_phy_mode(). > > > + fixed-link: > > +allOf: > > + - if: > > + type: array > > +then: > > + minItems: 1 > > + maxItems: 1 > > + items: > > +items: > > + - minimum: 0 > > +maximum: 31 > > +description: > > + Emulated PHY ID, choose any but unique to the all > > + specified fixed-links > > + > > + - enum: [0, 1] > > +description: > > + Duplex configuration. 0 for half duplex or 1 for > > + full duplex > > + > > + - enum: [10, 100, 1000] > > +description: > > + Link speed in Mbits/sec. > > + > > + - enum: [0, 1] > > +description: > > + Pause configuration. 0 for no pause, 1 for pause > > + > > + - enum: [0, 1] > > +description: > > + Asymmetric pause configuration. 0 for no asymmetric > > + pause, 1 for asymmetric pause > > + > > This array of 5 values format should be marked as deprecated. Right, I'll add it. > > + > > + - if: > > + type: object > > +then: > > + properties: > > +speed: > > + allOf: > > +- $ref: /schemas/types.yaml#definitions/uint32 > > +- enum: [10, 100, 1000] > > This recently changed, depending on context. If PHYLINK is being used, > any speed is allowed. If phylib is used, then only these speeds are > allowed. And we are starting to see some speeds other than listed > here. phylink seems to be described in a separate binding document, maybe we can adjust that later? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
[PATCH v3 12/16] ARM: dts: sunxi: Switch to the generic PHY properties
The DWMAC specific properties to manage the PHY have been superseeded by
the generic PHY properties. Let's move to it.
Reviewed-by: Andrew Lunn
Tested-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
This patch should go through arm-soc.
Changes from v1:
- New patch
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 6 +++---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 6 +++---
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 9 -
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 8
4 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 09832b4e8fc8..2652d737fe7c 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -155,13 +155,13 @@
pinctrl-0 = <&gmac_rgmii_pins>;
phy = <&phy1>;
phy-mode = "rgmii";
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index 8e724c52feff..7899712400b2 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -95,13 +95,13 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_dldo1>;
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>; /* PA21 */
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index fd0153f65685..b01d91d025ec 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -103,15 +103,14 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_gmac_vdd>;
- /* phy reset config */
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
- snps,reset-active-low;
- /* wait 1s after reset, otherwise fail to read phy id */
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index c34a83f666c7..ca12cee27072 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -108,14 +108,14 @@
phy = <&phy3>;
phy-mode = "rgmii";
phy-supply = <®_vcc3v3>;
-
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy3: ethernet-phy@3 {
reg = <3>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
--
git-series 0.9.1
[PATCH v3 07/16] dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- Add the generic MDIO YAML schema
Changes from v1:
- Add a select statement with the deprecated compatible, and remove it
from the valid compatibles
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml | 70
++
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt | 27
---
2 files changed, 70 insertions(+), 27 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
new file mode 100644
index ..df24d9d969f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 MDIO Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+allOf:
+ - $ref: "mdio.yaml#"
+
+# Select every compatible, including the deprecated ones. This way, we
+# will be able to report a warning when we have that compatible, since
+# we will validate the node thanks to the select, but won't report it
+# as a valid value in the compatible property description
+select:
+ properties:
+compatible:
+ enum:
+- allwinner,sun4i-a10-mdio
+
+# Deprecated
+- allwinner,sun4i-mdio
+
+ required:
+- compatible
+
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ compatible:
+const: allwinner,sun4i-a10-mdio
+
+ reg:
+maxItems: 1
+
+ phy-supply:
+description: PHY regulator
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+mdio@1c0b080 {
+compatible = "allwinner,sun4i-a10-mdio";
+reg = <0x01c0b080 0x14>;
+#address-cells = <1>;
+#size-cells = <0>;
+phy-supply = <®_emac_3v3>;
+
+phy0: ethernet-phy@0 {
+reg = <0>;
+};
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
deleted file mode 100644
index ab5b8613b0ef..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner A10 MDIO Ethernet Controller interface
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-mdio"
- (Deprecated: "allwinner,sun4i-mdio").
-- reg: address and length of the register set for the device.
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Example at the SoC level:
-mdio@1c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-And at the board level:
-
-mdio@1c0b080 {
- phy-supply = <®_emac_3v3>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
--
git-series 0.9.1
[PATCH v3 16/16] arm64: dts: allwinner: Switch from phy-mode to phy-connection-type
The phy-mode device tree property has been deprecated in favor of
phy-connection-type, let's replace it.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- new patch
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts| 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts| 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts| 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 208373efee49..2484142f855c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -127,7 +127,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_dc1sw>;
status = "okay";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 9b9d9157128c..b8d93c6e9469 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -102,7 +102,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_dcdc1>;
status = "okay";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
index 787ebd805a3b..ba7ba6d1d840 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
@@ -30,7 +30,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_dc1sw>;
allwinner,tx-delay-ps = <600>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 01a9a52edae4..e3f691b358da 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -102,7 +102,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_dcdc1>;
allwinner,tx-delay-ps = <600>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 5ef3c62c765e..738497489afd 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -129,7 +129,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_gmac_3v3>;
status = "okay";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 24f1aac366d6..234d0e66cbdc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -52,7 +52,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
phy-handle = <&ext_rgmii_phy>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 409523cb0950..7458469a60f7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwi
[PATCH v3 09/16] dt-bindings: net: sun7i-gmac: Convert the binding to a schemas
Switch our Allwinner A20 GMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Changes from v2:
- Switch to phy-connection-type instead of phy-mode
Changes from v1:
- Add a file of its own
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt | 27
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml | 66
++
Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++
3 files changed, 69 insertions(+), 27 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
deleted file mode 100644
index 8b3f953656e3..
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
- - compatible: Should be "allwinner,sun7i-a20-gmac"
- - clocks: Should contain the GMAC main clock, and tx clock
- The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
- - clock-names: Should contain the clock names "stmmaceth",
- and "allwinner_gmac_tx"
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Examples:
-
- gmac: ethernet@1c5 {
- compatible = "allwinner,sun7i-a20-gmac";
- reg = <0x01c5 0x1>,
- <0x01c20164 0x4>;
- interrupts = <0 85 1>;
- interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
- phy-mode = "mii";
- };
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
new file mode 100644
index ..38f6a2a73f46
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A20 GMAC Device Tree Bindings
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun7i-a20-gmac
+
+ interrupts:
+maxItems: 1
+
+ interrupt-names:
+const: macirq
+
+ clocks:
+items:
+ - description: GMAC main clock
+ - description: TX clock
+
+ clock-names:
+items:
+ - const: stmmaceth
+ - const: allwinner_gmac_tx
+
+ phy-supply:
+description:
+ PHY regulator
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - phy-connection-type
+
+examples:
+ - |
+gmac: ethernet@1c5 {
+compatible = "allwinner,sun7i-a20-gmac";
+reg = <0x01c5 0x1>,
+ <0x01c20164 0x4>;
+interrupts = <0 85 1>;
+interrupt-names = "macirq";
+clocks = <&ahb_gates 49>, <&gmac_tx>;
+clock-names = "stmmaceth", "allwinner_gmac_tx";
+phy-connection-type = "mii";
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 30e2ff7a2dcb..fed623a81dcd 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -44,6 +44,7 @@ properties:
compatible:
contains:
enum:
+- allwinner,sun7i-a20-gmac
- snps,dwmac
- snps,dwmac-3.50a
- snps,dwmac-3.610
@@ -265,6 +266,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac
@@ -305,6 +307,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwmac-4.00
- snps,dwmac-4.10a
- snps,dwxgmac
--
git-series 0.9.1
[PATCH v3 13/16] ARM: dts: sunxi: Switch from phy to phy-handle
The phy device tree property has been deprecated in favor of phy-handle,
let's replace it.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- new patch
---
arch/arm/boot/dts/sun4i-a10-a1000.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-hackberry.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-marsboard.dts| 2 +-
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-colombus.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-i7.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-cs908.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-m3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
41 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 6c254ec4c85b..8692b11a83c3 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -125,7 +125,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
index 38a2c4134952..816d534ac093 100644
--- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
@@ -68,7 +68,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 7306c65df88a..6ca02e824acc 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -114,7 +114,7 @@
};
&emac {
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index cc988ccd5ca7..47dea0922501 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -80,7 +80,7 @@
};
&emac {
- phy = <&phy0>;
+ phy-handle = <&phy0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
index 80ecd78247ac..d4e319d16aae 100644
--- a/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
@@ -58,7 +58,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins>;
- phy = <&phy1>;
+ phy-handle = <&phy1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index 247fa27ef717..8a7b4c53d278 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/s
[PATCH v3 15/16] ARM: dts: sunxi: h3/h5: Switch from phy-mode to phy-connection-type
The phy-mode device tree property has been deprecated in favor of
phy-connection-type, let's replace it.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- new patch
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts| 2 +-
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts| 2 +-
arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts| 2 +-
arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts| 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts| 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-rervision-dvk.dts | 2 +-
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi| 2 +-
arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5-devboard.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index f19ed981da9d..671f21e1b771 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -126,7 +126,7 @@
&emac {
phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
allwinner,leds-active-low;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index ac9e26b1d906..782aac0cd2fe 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -127,7 +127,7 @@
&emac {
phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
allwinner,leds-active-low;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
b/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
index ff0a7a952e0c..59ac1d349afa 100644
--- a/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
+++ b/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
@@ -77,7 +77,7 @@
&emac {
phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
allwinner,leds-active-low;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 4ba533b0340f..54cfa753853f 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -96,7 +96,7 @@
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
index 69243dcb30a6..e53458bf8c46 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
@@ -76,7 +76,7 @@
&emac {
phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
allwinner,leds-active-low;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 9f33f6fae595..744b35e4f50b 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -53,7 +53,7 @@
&emac {
phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
allwinner,leds-active-low;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 597c425d08ec..61ee3790ec94 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -129,7 +129,7 @@
[PATCH v3 14/16] ARM: dts: sunxi: Switch from phy-mode to phy-connection-type
The phy-mode device tree property has been deprecated in favor of
phy-connection-type, let's replace it.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- new patch
---
arch/arm/boot/dts/sun6i-a31-colombus.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-i7.dts| 2 +-
arch/arm/boot/dts/sun6i-a31-m9.dts| 2 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-cs908.dts| 2 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 2 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 4 ++--
arch/arm/boot/dts/sun7i-a20-m3.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts| 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +-
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 2 +-
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +-
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
35 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts
b/arch/arm/boot/dts/sun6i-a31-colombus.dts
index 50092b0bd0fe..403b734fbfab 100644
--- a/arch/arm/boot/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -77,7 +77,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 7c611ddbaf2f..50ab6fe08fd8 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -154,7 +154,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-connection-type = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts
b/arch/arm/boot/dts/sun6i-a31-i7.dts
index ebb0b4710afb..75451e40d086 100644
--- a/arch/arm/boot/dts/sun6i-a31-i7.dts
+++ b/arch/arm/boot/dts/sun6i-a31-i7.dts
@@ -118,7 +118,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_mii_pins>;
phy-handle = <&phy1>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
status = "okay";
phy1: ethernet-phy@1 {
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 4910c6ccf2f7..ffa6b4bfcebe 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -85,7 +85,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_mii_pins>;
phy-handle = <&phy1>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
phy-supply = <®_dldo1>;
status = "okay";
diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
index 703e1c19b407..d1a898ee3fec 100644
--- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -85,7 +85,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_mii_pins>;
phy-handle = <&phy1>;
- phy-mode = "mii";
+ phy-connection-type = "mii";
phy-supply = <®_dldo1>;
status = "okay";
diff --git a/arch/arm/boo
[PATCH v3 08/16] dt-bindings: net: stmmac: Convert the binding to a schemas
Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard --- Changes from v2: - Switch to phy-connection-type instead of phy-mode - Fix the snps,*pbl properties type Changes from v1: - Restrict snps,tso to only a couple of compatibles - Use an enum for the compatibles - Add a custom select statement with the compatibles of all the generic compatibles, including the deprecated ones. Remove the deprecated ones from the valid compatible values to issue a warning when used. --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 389 +++- Documentation/devicetree/bindings/net/stmmac.txt | 179 +- 2 files changed, 390 insertions(+), 178 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/snps,dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml new file mode 100644 index ..30e2ff7a2dcb --- /dev/null +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -0,0 +1,389 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare MAC Device Tree Bindings + +maintainers: + - Alexandre Torgue + - Giuseppe Cavallaro + - Jose Abreu + +# Select every compatible, including the deprecated ones. This way, we +# will be able to report a warning when we have that compatible, since +# we will validate the node thanks to the select, but won't report it +# as a valid value in the compatible property description +select: + properties: +compatible: + contains: +enum: + - snps,dwmac + - snps,dwmac-3.50a + - snps,dwmac-3.610 + - snps,dwmac-3.70a + - snps,dwmac-3.710 + - snps,dwmac-4.00 + - snps,dwmac-4.10a + - snps,dwxgmac + - snps,dwxgmac-2.10 + + # Deprecated + - st,spear600-gmac + + required: +- compatible + +properties: + + # We need to include all the compatibles from schemas that will + # include that schemas, otherwise compatible won't validate for + # those. + compatible: +contains: + enum: +- snps,dwmac +- snps,dwmac-3.50a +- snps,dwmac-3.610 +- snps,dwmac-3.70a +- snps,dwmac-3.710 +- snps,dwmac-4.00 +- snps,dwmac-4.10a +- snps,dwxgmac +- snps,dwxgmac-2.10 + + reg: +maxItems: 1 + + interrupts: +minItems: 1 +maxItems: 3 +items: + - description: Combined signal for various interrupt events + - description: The interrupt to manage the remote wake-up packet detection + - description: The interrupt that occurs when Rx exits the LPI state + + interrupt-names: +minItems: 1 +maxItems: 3 +items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + + clocks: +minItems: 1 +maxItems: 3 +items: + - description: GMAC main clock + - description: Peripheral registers interface clock + - description: + PTP reference clock. This clock is used for programming the + Timestamp Addend Register. If not passed then the system + clock will be used and this is fine on some platforms. + + clock-names: +additionalItems: true +contains: + enum: +- stmmaceth +- pclk +- ptp_ref + + resets: +maxItems: 1 +description: + MAC Reset signal. + + reset-names: +const: stmmaceth + + snps,axi-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + AXI BUS Mode parameters. Phandle to a node that can contain the + following properties +* snps,lpi_en, enable Low Power Interface +* snps,xit_frm, unlock on WoL +* snps,wr_osr_lmt, max write outstanding req. limit +* snps,rd_osr_lmt, max read outstanding req. limit +* snps,kbbe, do not cross 1KiB boundary. +* snps,blen, this is a vector of supported burst length. +* snps,fb, fixed-burst +* snps,mb, mixed-burst +* snps,rb, rebuild INCRx Burst + + snps,mtl-rx-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + Multiple RX Queues parameters. Phandle to a node that can + contain the following properties +* snps,rx-queues-to-use, number of RX queues to be used in the + driver +* Choose one of these RX scheduling algorithms + * snps,rx-sched-sp, Strict priority + * snps,rx-sched-wsp, Weighted Strict priority +* For each RX queue + * Choose one of these modes +* snps,dcb-algorithm, Queue to be enabled as DCB +* snps,avb-algorithm, Queue to be enabled as AVB + * snps,map-to-dma-channel, Channel to map +
[PATCH v3 10/16] dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable the DT validation. Since that controller is based on a Synopsys IP, let's add the validation to that schemas with a bunch of conditionals. Signed-off-by: Maxime Ripard --- Changes from v2: - Switch to phy-connection-type instead of phy-mode - Change the delay enum to using multipleOf Changes from v1: - Add specific binding document --- Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 321 - Documentation/devicetree/bindings/net/dwmac-sun8i.txt| 201 +- Documentation/devicetree/bindings/net/snps,dwmac.yaml| 15 +++- 3 files changed, 336 insertions(+), 201 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml delete mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml new file mode 100644 index ..6f68c7f5fc34 --- /dev/null +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -0,0 +1,321 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A83t EMAC Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: +oneOf: + - const: allwinner,sun8i-a83t-emac + - const: allwinner,sun8i-h3-emac + - const: allwinner,sun8i-r40-emac + - const: allwinner,sun8i-v3s-emac + - const: allwinner,sun50i-a64-emac + - items: +- const: allwinner,sun50i-h6-emac +- const: allwinner,sun50i-a64-emac + + reg: +maxItems: 1 + + interrupts: +maxItems: 1 + + interrupt-names: +const: macirq + + clocks: +maxItems: 1 + + clock-names: +const: stmmaceth + + syscon: +$ref: /schemas/types.yaml#definitions/phandle +description: + Phandle to the device containing the EMAC or GMAC clock + register + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - phy-connection-type + - phy-handle + - syscon + +allOf: + - $ref: "snps,dwmac.yaml#" + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + +then: + properties: +allwinner,tx-delay-ps: + default: 0 + minimum: 0 + maximum: 700 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + +allwinner,rx-delay-ps: + default: 0 + minimum: 0 + maximum: 3100 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-r40-emac + +then: + properties: +allwinner,rx-delay-ps: + default: 0 + minimum: 0 + maximum: 700 + multipleOf: 100 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + +then: + properties: +allwinner,leds-active-low: + $ref: /schemas/types.yaml#definitions/flag + description: +EPHY LEDs are active low. + +mdio-mux: + type: object + + properties: +compatible: + const: allwinner,sun8i-h3-mdio-mux + +mdio-parent-bus: + $ref: /schemas/types.yaml#definitions/phandle + description: +Phandle to EMAC MDIO. + +mdio@1: + type: object + description: Internal MDIO Bus + + properties: +"#address-cells": + const: 1 + +"#size-cells": + const: 0 + +compatible: + const: allwinner,sun8i-h3-mdio-internal + +reg: + const: 1 + + patternProperties: +"^ethernet-phy@[0-9a-f]$": + type: object + description: +Integrated PHY node + + properties: +clocks: +
[PATCH v3 06/16] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Switch our Allwinner A10 EMAC controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Changes from v2:
- Switch from the deprecated phy property to phy-handle
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 55
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt | 19
---
2 files changed, 55 insertions(+), 19 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
new file mode 100644
index ..2ff9e605cd26
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun4i-a10-emac
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ allwinner,sram:
+description: Phandle to the device SRAM
+$ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - phy-handle
+ - allwinner,sram
+
+examples:
+ - |
+emac: ethernet@1c0b000 {
+compatible = "allwinner,sun4i-a10-emac";
+reg = <0x01c0b000 0x1000>;
+interrupts = <55>;
+clocks = <&ahb_gates 17>;
+phy = <&phy0>;
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
deleted file mode 100644
index e98118aef5f6..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* Allwinner EMAC ethernet controller
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
- "allwinner,sun4i-emac")
-- reg: address and length of the register set for the device.
-- interrupts: interrupt for the device
-- phy: see ethernet.txt file in the same directory.
-- clocks: A phandle to the reference clock for this device
-
-Example:
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- phy = <&phy0>;
-};
--
git-series 0.9.1
[PATCH v3 05/16] dt-bindings: net: phy: The interrupt property is not mandatory
Unlike what was initially claimed in the PHY binding, the interrupt property of a PHY can be omitted, and the OS will turn to polling instead. Document that. Reviewed-by: Andrew Lunn Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 81d2016d7232..c77f97cbd54b 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -156,7 +156,6 @@ properties: required: - reg - - interrupts examples: - | -- git-series 0.9.1
[PATCH v3 03/16] dt-bindings: net: Add a YAML schemas for the generic MDIO options
The MDIO buses have a number of available device tree properties that can
be used in their device tree node. Add a YAML schemas for those.
Suggested-by: Andrew Lunn
Signed-off-by: Maxime Ripard
---
Changes from v2:
- New patch
---
Documentation/devicetree/bindings/net/mdio.txt | 38 +-
Documentation/devicetree/bindings/net/mdio.yaml | 51 ++-
2 files changed, 52 insertions(+), 37 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/mdio.yaml
diff --git a/Documentation/devicetree/bindings/net/mdio.txt
b/Documentation/devicetree/bindings/net/mdio.txt
index e3e1603f256c..cf8a0105488e 100644
--- a/Documentation/devicetree/bindings/net/mdio.txt
+++ b/Documentation/devicetree/bindings/net/mdio.txt
@@ -1,37 +1 @@
-Common MDIO bus properties.
-
-These are generic properties that can apply to any MDIO bus.
-
-Optional properties:
-- reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO
- bus.
-- reset-delay-us: RESET pulse width in microseconds.
-
-A list of child nodes, one per device on the bus is expected. These
-should follow the generic phy.txt, or a device specific binding document.
-
-The 'reset-delay-us' indicates the RESET signal pulse width in microseconds and
-applies to all PHY devices. It must therefore be appropriately determined based
-on all PHY requirements (maximum value of all per-PHY RESET pulse widths).
-
-Example :
-This example shows these optional properties, plus other properties
-required for the TI Davinci MDIO driver.
-
- davinci_mdio: ethernet@5c03 {
- compatible = "ti,davinci_mdio";
- reg = <0x5c03 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
- reset-delay-us = <2>;
-
- ethphy0: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethphy1: ethernet-phy@3 {
- reg = <3>;
- };
- };
+This file has moved to mdio.yaml.
diff --git a/Documentation/devicetree/bindings/net/mdio.yaml
b/Documentation/devicetree/bindings/net/mdio.yaml
new file mode 100644
index ..8f4f9d0a2882
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MDIO Bus Generic Binding
+
+maintainers:
+ - Andrew Lunn
+ - Florian Fainelli
+ - Heiner Kallweit
+
+description:
+ These are generic properties that can apply to any MDIO bus. Any
+ MDIO bus must have a list of child nodes, one per device on the
+ bus. These should follow the generic ethernet-phy.yaml document, or
+ a device specific binding document.
+
+properties:
+ reset-gpios:
+maxItems: 1
+description:
+ The phandle and specifier for the GPIO that controls the RESET
+ lines of all PHYs on that MDIO bus.
+
+ reset-delay-us:
+description:
+ RESET pulse width in microseconds. It applies to all PHY devices
+ and must therefore be appropriately determined based on all PHY
+ requirements (maximum value of all per-PHY RESET pulse widths).
+
+examples:
+ - |
+davinci_mdio: ethernet@5c03 {
+compatible = "ti,davinci_mdio";
+reg = <0x5c03 0x1000>;
+#address-cells = <1>;
+#size-cells = <0>;
+
+reset-gpios = <&gpio2 5 1>;
+reset-delay-us = <2>;
+
+ethphy0: ethernet-phy@1 {
+reg = <1>;
+};
+
+ethphy1: ethernet-phy@3 {
+reg = <3>;
+};
+};
--
git-series 0.9.1
[PATCH v3 11/16] dt-bindings: net: dwmac: Deprecate the PHY reset properties
Even though the DWMAC driver uses some driver specific properties, the PHY core has a bunch of generic properties and can deal with them nicely. Let's deprecate our specific properties. Reviewed-by: Martin Blumenstingl Signed-off-by: Maxime Ripard --- Changes from v2: - Use the deprecated keyword instead of duplicating them Changes from v1: - New patch --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 956308806c33..0bf322408500 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -172,16 +172,19 @@ properties: * snps,priority, TX queue priority (Range 0x0 to 0xF) snps,reset-gpio: +deprecated: true maxItems: 1 description: PHY Reset GPIO snps,reset-active-low: +deprecated: true $ref: /schemas/types.yaml#definitions/flag description: Indicates that the PHY Reset is active low snps,reset-delays-us: +deprecated: true allOf: - $ref: /schemas/types.yaml#definitions/uint32-array - minItems: 3 -- git-series 0.9.1
[PATCH v3 01/16] dt-bindings: net: Add YAML schemas for the generic Ethernet options
The Ethernet controllers have a good number of generic options that can be needed in a device tree. Add a YAML schemas for those. Reviewed-by: Rob Herring Signed-off-by: Maxime Ripard --- Changes from v2: - Add back the deprecated properties using the deprecated keyword Changes from v1: - Use an enum for phy-connection-types - Validate the items for the fixed-link array - Set the number of valid items for link-gpios to 1 - Removed deprecated properties (phy-mode, phy, phy-device) --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 204 +++- Documentation/devicetree/bindings/net/ethernet.txt | 69 +-- Documentation/devicetree/bindings/net/fixed-link.txt | 55 +-- 3 files changed, 206 insertions(+), 122 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/ethernet-controller.yaml diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml new file mode 100644 index ..501ea658b319 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ethernet Controller Generic Binding + +maintainers: + - David S. Miller + +properties: + $nodename: +pattern: "^ethernet(@.*)?$" + + local-mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was assigned to the network device. + + mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was last used by the boot + program; should be used in cases where the MAC address assigned + to the device by the boot program is different from the + local-mac-address property. + + max-frame-size: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Maximum transfer unit (IEEE defined MTU), rather than the + maximum frame size (there\'s contradiction in the Devicetree + Specification). + + max-speed: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Specifies maximum speed in Mbit/s supported by the device. + + nvmem-cells: +maxItems: 1 +description: + Reference to an nvmem node for the MAC address + + nvmem-cells-names: +const: mac-address + + phy-connection-type: +description: + Operation mode of the PHY interface +enum: + # There is not a standard bus between the MAC and the PHY, + # something proprietary is being used to embed the PHY in the + # MAC. + - internal + - mii + - gmii + - sgmii + - qsgmii + - tbi + - rev-mii + - rmii + + # RX and TX delays are added by the MAC when required + - rgmii + + # RGMII with internal RX and TX delays provided by the PHY, + # the MAC should not add the RX or TX delays in this case + - rgmii-id + + # RGMII with internal RX delay provided by the PHY, the MAC + # should not add an RX delay in this case + - rgmii-rxid + + # RGMII with internal TX delay provided by the PHY, the MAC + # should not add an TX delay in this case + - rgmii-txid + - rtbi + - smii + - xgmii + - trgmii + - 1000base-x + - 2500base-x + - rxaui + - xaui + + # 10GBASE-KR, XFI, SFI + - 10gbase-kr + - usxgmii + + phy-mode: +$ref: "#/properties/phy-connection-type" +deprecated: true + + phy-handle: +$ref: /schemas/types.yaml#definitions/phandle +description: + Specifies a reference to a node representing a PHY device. + + phy: +$ref: "#/properties/phy-handle" +deprecated: true + + phy-device: +$ref: "#/properties/phy-handle" +deprecated: true + + rx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s receive fifo in bytes. This is used + for components that can have configurable receive fifo sizes, + and is useful for determining certain configuration settings + such as flow control thresholds. + + tx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s transmit fifo in bytes. This + is used for components that can have configurable fifo sizes. + + managed: +allOf: + - $ref: /schemas/types.yaml#definitions/string + - default: auto +enum: + - auto + - in-band-status +description: + Specifies the PHY management type. If auto is set and fixed-link + is not specified, i
[PATCH v3 04/16] MAINTAINERS: Add Ethernet PHY YAML file
While the Ethernet PHY framework was marked as maintained, the device tree bindings associated to that framework was not listed under the maintained files. Fix that. Reviewed-by: Andrew Lunn Signed-off-by: Maxime Ripard --- Changes from v1: - New patch --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 731b8879bce9..9f629ed4624f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6000,6 +6000,7 @@ M:Heiner Kallweit L: netdev@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-bus-mdio +F: Documentation/devicetree/bindings/net/ethernet-phy.yaml F: Documentation/devicetree/bindings/net/mdio* F: Documentation/networking/phy.rst F: drivers/net/phy/ -- git-series 0.9.1
[PATCH v3 02/16] dt-bindings: net: Add a YAML schemas for the generic PHY options
The networking PHYs have a number of available device tree properties that
can be used in their device tree node. Add a YAML schemas for those.
Reviewed-by: Andrew Lunn
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Add missing compatible options
- add missing phy speeds
- Fix the maintainers entry
- Add a custom select clause to make it validate all phy nodes, and not
just the ones with a compatible
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 179 +-
Documentation/devicetree/bindings/net/phy.txt | 80 +
2 files changed, 180 insertions(+), 79 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
new file mode 100644
index ..81d2016d7232
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet PHY Generic Binding
+
+maintainers:
+ - Andrew Lunn
+ - Florian Fainelli
+ - Heiner Kallweit
+
+# The dt-schema tools will generate a select statement first by using
+# the compatible, and second by using the node name if any. In our
+# case, the node name is the one we want to match on, while the
+# compatible is optional.
+select:
+ properties:
+$nodename:
+ pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ required:
+- $nodename
+
+properties:
+ $nodename:
+pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ compatible:
+oneOf:
+ - const: ethernet-phy-ieee802.3-c22
+description: PHYs that implement IEEE802.3 clause 22
+ - const: ethernet-phy-ieee802.3-c45
+description: PHYs that implement IEEE802.3 clause 45
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+description:
+ If the PHY reports an incorrect ID (or none at all) then the
+ compatible list may contain an entry with the correct PHY ID
+ in the above form.
+ The first group of digits is the 16 bit Phy Identifier 1
+ register, this is the chip vendor OUI bits 3:18. The
+ second group of digits is the Phy Identifier 2 register,
+ this is the chip vendor OUI bits 19:24, followed by 10
+ bits of a vendor specific ID.
+ - items:
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+ - const: ethernet-phy-ieee802.3-c45
+
+ reg:
+maxItems: 1
+minimum: 0
+maximum: 31
+description:
+ The ID number for the PHY.
+
+ interrupts:
+maxItems: 1
+
+ max-speed:
+enum:
+ - 10
+ - 100
+ - 1000
+ - 2500
+ - 5000
+ - 1
+ - 2
+ - 25000
+ - 4
+ - 5
+ - 56000
+ - 10
+ - 20
+description:
+ Maximum PHY supported speed in Mbits / seconds.
+
+ broken-turn-around:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY device does not correctly release
+ the turn around line low at the end of a MDIO transaction.
+
+ enet-phy-lane-swap:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY will swap the TX/RX lanes to
+ compensate for the board being designed with the lanes
+ swapped.
+
+ eee-broken-100tx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000t:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gt:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000kx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkx4:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkr:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ phy-is-integrated:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates
Re: [PATCH v2 05/11] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Hi, On Fri, Jun 14, 2019 at 07:37:49AM -0600, Rob Herring wrote: > > > For '-gpio', we may be okay because the suffix is handled in the GPIO > > > core. It should be safe to update the binding to use the preferred > > > form. > > > > It might require a bit of work though in drivers, since the fallback > > is only handled if you're using the gpiod API, and not the legacy one. > > > > > > And then, we need to agree on how to express the deprecation. I guess > > > > we could allow the deprecated keyword that will be there in the > > > > draft-8, instead of ad-hoc solutions? > > > > > > Oh, nice! I hadn't seen that. Seems like we should use that. We can > > > start even without draft-8 support because unknown keywords are > > > ignored (though we probably have to add it to our meta-schema). Then > > > at some point we can add a 'disallow deprecated' flag to the tool. > > > > So, in the generic ethernet binding, we would have: > > > > properties: > > phy-handle: > > $ref: /schemas/types.yaml#definitions/phandle > > description: > > Specifies a reference to a node representing a PHY device. > > > > phy: > > $ref: "#/properties/phy-handle" > > deprecated: true > > > > phy-device: > > $ref: "#/properties/phy-handle" > > deprecated: true > > > > Does that sound good? > > Yes. Great, I'll post that. > > Now, how do we handle the case above, in the device specific binding? > > We just require the non-deprecated one, or the three? > > Wouldn't that just depend if all the instances of the device specific > binding have been updated? You mean in the DTS? It shouldn't matter, we'll want to have a warning anyway. But yeah, I'll update them too. Maxme -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 05/11] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Hi Rob, On Thu, Jun 13, 2019 at 11:32:30AM -0600, Rob Herring wrote: > On Thu, Jun 13, 2019 at 7:25 AM Maxime Ripard > wrote: > > On Mon, Jun 10, 2019 at 12:59:29PM -0600, Rob Herring wrote: > > > On Mon, Jun 10, 2019 at 8:31 AM Andrew Lunn wrote: > > > > > > > > > +required: > > > > > + - compatible > > > > > + - reg > > > > > + - interrupts > > > > > + - clocks > > > > > + - phy > > > > > + - allwinner,sram > > > > > > > > Quoting ethernet.txt: > > > > > > > > - phy: the same as "phy-handle" property, not recommended for new > > > > bindings. > > > > > > > > - phy-handle: phandle, specifies a reference to a node representing a > > > > PHY > > > > device; this property is described in the Devicetree Specification > > > > and so > > > > preferred; > > > > > > > > Can this be expressed in Yaml? Accept phy, but give a warning. Accept > > > > phy-handle without a warning? Enforce that one or the other is > > > > present? > > > > > > The common schema could have 'phy: false'. This works as long as we've > > > updated (or plan to) all the dts files to use phy-handle. The issue is > > > how far back do you need kernels to work with newer dtbs. > > > > I guess another question being raised by this is how hard do we want > > to be a deprecating things, and should the DT validation be a tool to > > enforce that validation. > > > > For example, you've used in you GPIO meta-schema false for anything > > ending with -gpio, since it's deprecated. This means that we can't > > convert any binding using a deprecated property without introducing a > > build error in the schemas, which in turn means that you'll have a lot > > of friction to support schemas, since you would have to convert your > > driver to support the new way of doing things, before being able to > > have a schema for your binding. > > I've err'ed on the stricter side. We may need to back off on some > things to get to warning free builds. Really, I'd like to have levels > to separate checks for existing bindings, new bindings, and pedantic > checks. That would be awesome. Do you have a plan for that already though? I can't really think of a way to implement it at the moment. > For '-gpio', we may be okay because the suffix is handled in the GPIO > core. It should be safe to update the binding to use the preferred > form. It might require a bit of work though in drivers, since the fallback is only handled if you're using the gpiod API, and not the legacy one. > > And then, we need to agree on how to express the deprecation. I guess > > we could allow the deprecated keyword that will be there in the > > draft-8, instead of ad-hoc solutions? > > Oh, nice! I hadn't seen that. Seems like we should use that. We can > start even without draft-8 support because unknown keywords are > ignored (though we probably have to add it to our meta-schema). Then > at some point we can add a 'disallow deprecated' flag to the tool. So, in the generic ethernet binding, we would have: properties: phy-handle: $ref: /schemas/types.yaml#definitions/phandle description: Specifies a reference to a node representing a PHY device. phy: $ref: "#/properties/phy-handle" deprecated: true phy-device: $ref: "#/properties/phy-handle" deprecated: true Does that sound good? Now, how do we handle the case above, in the device specific binding? We just require the non-deprecated one, or the three? Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 05/11] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Hi Rob, On Mon, Jun 10, 2019 at 12:59:29PM -0600, Rob Herring wrote: > On Mon, Jun 10, 2019 at 8:31 AM Andrew Lunn wrote: > > > > > +required: > > > + - compatible > > > + - reg > > > + - interrupts > > > + - clocks > > > + - phy > > > + - allwinner,sram > > > > Quoting ethernet.txt: > > > > - phy: the same as "phy-handle" property, not recommended for new bindings. > > > > - phy-handle: phandle, specifies a reference to a node representing a PHY > > device; this property is described in the Devicetree Specification and so > > preferred; > > > > Can this be expressed in Yaml? Accept phy, but give a warning. Accept > > phy-handle without a warning? Enforce that one or the other is > > present? > > The common schema could have 'phy: false'. This works as long as we've > updated (or plan to) all the dts files to use phy-handle. The issue is > how far back do you need kernels to work with newer dtbs. I guess another question being raised by this is how hard do we want to be a deprecating things, and should the DT validation be a tool to enforce that validation. For example, you've used in you GPIO meta-schema false for anything ending with -gpio, since it's deprecated. This means that we can't convert any binding using a deprecated property without introducing a build error in the schemas, which in turn means that you'll have a lot of friction to support schemas, since you would have to convert your driver to support the new way of doing things, before being able to have a schema for your binding. And then, we need to agree on how to express the deprecation. I guess we could allow the deprecated keyword that will be there in the draft-8, instead of ad-hoc solutions? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 07/11] dt-bindings: net: stmmac: Convert the binding to a schemas
On Mon, Jun 10, 2019 at 01:13:25PM -0600, Rob Herring wrote: > On Mon, Jun 10, 2019 at 3:26 AM Maxime Ripard > wrote: > > +then: > > + properties: > > +snps,pbl: > > + allOf: > > +- $ref: /schemas/types.yaml#definitions/uint32-array > > +- enum: [2, 4, 8] > > As this is an array, I think this needs to be: > > - items: > enum: [2, 4, 8] > > > And the next 2, too. This was actually an error on the types, those properties are not arrays. I've changed the type, thanks! maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 09/11] dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Hi, On Mon, Jun 10, 2019 at 01:22:00PM -0600, Rob Herring wrote: > On Mon, Jun 10, 2019 at 3:26 AM Maxime Ripard > wrote: > > +then: > > + properties: > > +allwinner,tx-delay-ps: > > + allOf: > > +- $ref: /schemas/types.yaml#definitions/uint32 > > Can drop this as anything with unit prefix has its type defined > already. Not for picoseconds though. I'll send a PR to dt-schema if you prefer to define it there. > > > +- enum: [0, 100, 200, 300, 400, 500, 600, 700] > > + default: 0 > > + description: > > +External RGMII PHY TX clock delay chain value in ps. > > + > > +allwinner,rx-delay-ps: > > + allOf: > > +- $ref: /schemas/types.yaml#definitions/uint32 > > +- enum: > > +- 0 > > +- 100 > > +- 200 > > +- 300 > > +- 400 > > +- 500 > > +- 600 > > +- 700 > > +- 800 > > +- 900 > > +- 1000 > > +- 1100 > > +- 1200 > > +- 1300 > > +- 1400 > > +- 1500 > > +- 1600 > > +- 1700 > > +- 1800 > > +- 1900 > > +- 2000 > > +- 2100 > > +- 2200 > > +- 2300 > > +- 2400 > > +- 2500 > > +- 2600 > > +- 2700 > > +- 2800 > > +- 2900 > > +- 3000 > > +- 3100 > > I think you can do > > enum: [1, 2, 3, > 4, 5, 6] > > Or you can do: > > minimum: 0 > maximum: 3100 > multipleOf: 100 > > IIRC that multipleOf is a json-schema key. I really like that second syntax, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 06/11] dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Hi Andrew, On Mon, Jun 10, 2019 at 04:37:30PM +0200, Andrew Lunn wrote: > On Mon, Jun 10, 2019 at 11:25:45AM +0200, Maxime Ripard wrote: > > Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable > > the DT validation. > > > > Signed-off-by: Maxime Ripard > > Should there be a generic part to cover what is listed in: > > Documentation/devicetree/bindings/net/mdio.txt Thanks for pointing that out, I'll convert it as well. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v2 05/11] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Hi Andrew, On Mon, Jun 10, 2019 at 04:31:39PM +0200, Andrew Lunn wrote: > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - clocks > > + - phy > > + - allwinner,sram > > Quoting ethernet.txt: > > - phy: the same as "phy-handle" property, not recommended for new bindings. > - phy-handle: phandle, specifies a reference to a node representing a PHY > device; this property is described in the Devicetree Specification and so > preferred; > > Can this be expressed in Yaml? Accept phy, but give a warning. Accept > phy-handle without a warning? Enforce that one or the other is > present? This is what we should be aiming for, yes, but right now we don't really have a way to express that for properties. The next specification of the schema spec seems to address that, and it should be released pretty soon, so it's always something that we can address later on, when it will be out. For that particular case, we can also work around it by requiring phy-handle instead of phy. That way, if phy-handle is missing we will have a warning. phy will not be validated though, which is kind of a shame, but still much better than what we currently have. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
[PATCH v2 02/11] dt-bindings: net: Add a YAML schemas for the generic PHY options
The networking PHYs have a number of available device tree properties that
can be used in their device tree node. Add a YAML schemas for those.
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Add missing compatible options
- add missing phy speeds
- Fix the maintainers entry
- Add a custom select clause to make it validate all phy nodes, and not
just the ones with a compatible
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 179 +-
Documentation/devicetree/bindings/net/phy.txt | 80 +
2 files changed, 180 insertions(+), 79 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
new file mode 100644
index ..81d2016d7232
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet PHY Generic Binding
+
+maintainers:
+ - Andrew Lunn
+ - Florian Fainelli
+ - Heiner Kallweit
+
+# The dt-schema tools will generate a select statement first by using
+# the compatible, and second by using the node name if any. In our
+# case, the node name is the one we want to match on, while the
+# compatible is optional.
+select:
+ properties:
+$nodename:
+ pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ required:
+- $nodename
+
+properties:
+ $nodename:
+pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ compatible:
+oneOf:
+ - const: ethernet-phy-ieee802.3-c22
+description: PHYs that implement IEEE802.3 clause 22
+ - const: ethernet-phy-ieee802.3-c45
+description: PHYs that implement IEEE802.3 clause 45
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+description:
+ If the PHY reports an incorrect ID (or none at all) then the
+ compatible list may contain an entry with the correct PHY ID
+ in the above form.
+ The first group of digits is the 16 bit Phy Identifier 1
+ register, this is the chip vendor OUI bits 3:18. The
+ second group of digits is the Phy Identifier 2 register,
+ this is the chip vendor OUI bits 19:24, followed by 10
+ bits of a vendor specific ID.
+ - items:
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+ - const: ethernet-phy-ieee802.3-c45
+
+ reg:
+maxItems: 1
+minimum: 0
+maximum: 31
+description:
+ The ID number for the PHY.
+
+ interrupts:
+maxItems: 1
+
+ max-speed:
+enum:
+ - 10
+ - 100
+ - 1000
+ - 2500
+ - 5000
+ - 1
+ - 2
+ - 25000
+ - 4
+ - 5
+ - 56000
+ - 10
+ - 20
+description:
+ Maximum PHY supported speed in Mbits / seconds.
+
+ broken-turn-around:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY device does not correctly release
+ the turn around line low at the end of a MDIO transaction.
+
+ enet-phy-lane-swap:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY will swap the TX/RX lanes to
+ compensate for the board being designed with the lanes
+ swapped.
+
+ eee-broken-100tx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000t:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gt:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000kx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkx4:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkr:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ phy-is-integrated:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates that the PHY is integrated into the same
+ physica
[PATCH v2 10/11] dt-bindings: net: dwmac: Deprecate the PHY reset properties
Even though the DWMAC driver uses some driver specific properties, the PHY core has a bunch of generic properties and can deal with them nicely. Let's deprecate our specific properties. Signed-off-by: Maxime Ripard --- Changes from v1: - New patch --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 54 ++-- 1 file changed, 30 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index c48a089edc21..a2d56e8a7a39 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -171,26 +171,6 @@ properties: * snps,low_credit, max read outstanding req. limit * snps,priority, TX queue priority (Range 0x0 to 0xF) - snps,reset-gpio: -maxItems: 1 -description: - PHY Reset GPIO - - snps,reset-active-low: -$ref: /schemas/types.yaml#definitions/flag -description: - Indicates that the PHY Reset is active low - - snps,reset-delays-us: -allOf: - - $ref: /schemas/types.yaml#definitions/uint32-array - - minItems: 3 -maxItems: 3 -description: - Triplet of delays. The 1st cell is reset pre-delay in micro - seconds. The 2nd cell is reset pulse in micro seconds. The 3rd - cell is reset post-delay in micro seconds. - snps,aal: $ref: /schemas/types.yaml#definitions/flag description: @@ -253,6 +233,36 @@ properties: required: - compatible + ## Deprecated properties + # + # Deprecated in favor of ethernet phy's reset-gpios property + # snps,reset-gpio: + # maxItems: 1 + # description: + # PHY Reset GPIO + + # Deprecated in favor of ethernet phy's reset-gpios property + # snps,reset-active-low: + # $ref: /schemas/types.yaml#definitions/flag + # description: + # Indicates that the PHY Reset is active low + + # Deprecated in favor of ethernet phy's reset-assert-us and + # reset-deassert-us properties + # snps,reset-delays-us: + # allOf: + # - $ref: /schemas/types.yaml#definitions/uint32-array + # - minItems: 3 + # maxItems: 3 + # description: + # Triplet of delays. The 1st cell is reset pre-delay in micro + # seconds. The 2nd cell is reset pulse in micro seconds. The 3rd + # cell is reset post-delay in micro seconds. + +# dependencies: +# snps,reset-active-low: ["snps,reset-gpio"] +# snps,reset-delay-us: ["snps,reset-gpio"] + required: - compatible - reg @@ -260,10 +270,6 @@ required: - interrupt-names - phy-mode -dependencies: - snps,reset-active-low: ["snps,reset-gpio"] - snps,reset-delay-us: ["snps,reset-gpio"] - allOf: - $ref: "ethernet-controller.yaml#" - if: -- git-series 0.9.1
[PATCH v2 05/11] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Switch our Allwinner A10 EMAC controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 55
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt | 19
---
2 files changed, 55 insertions(+), 19 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
new file mode 100644
index ..b5d82d0a59d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun4i-a10-emac
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ allwinner,sram:
+description: Phandle to the device SRAM
+$ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - phy
+ - allwinner,sram
+
+examples:
+ - |
+emac: ethernet@1c0b000 {
+compatible = "allwinner,sun4i-a10-emac";
+reg = <0x01c0b000 0x1000>;
+interrupts = <55>;
+clocks = <&ahb_gates 17>;
+phy = <&phy0>;
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
deleted file mode 100644
index e98118aef5f6..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* Allwinner EMAC ethernet controller
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
- "allwinner,sun4i-emac")
-- reg: address and length of the register set for the device.
-- interrupts: interrupt for the device
-- phy: see ethernet.txt file in the same directory.
-- clocks: A phandle to the reference clock for this device
-
-Example:
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- phy = <&phy0>;
-};
--
git-series 0.9.1
[PATCH v2 04/11] dt-bindings: net: phy: The interrupt property is not mandatory
Unlike what was initially claimed in the PHY binding, the interrupt property of a PHY can be omitted, and the OS will turn to polling instead. Document that. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 81d2016d7232..c77f97cbd54b 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -156,7 +156,6 @@ properties: required: - reg - - interrupts examples: - | -- git-series 0.9.1
[PATCH v2 08/11] dt-bindings: net: sun7i-gmac: Convert the binding to a schemas
Switch our Allwinner A20 GMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Add a file of its own
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt | 27
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml | 66
++
Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++
3 files changed, 69 insertions(+), 27 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
deleted file mode 100644
index 8b3f953656e3..
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
- - compatible: Should be "allwinner,sun7i-a20-gmac"
- - clocks: Should contain the GMAC main clock, and tx clock
- The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
- - clock-names: Should contain the clock names "stmmaceth",
- and "allwinner_gmac_tx"
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Examples:
-
- gmac: ethernet@1c5 {
- compatible = "allwinner,sun7i-a20-gmac";
- reg = <0x01c5 0x1>,
- <0x01c20164 0x4>;
- interrupts = <0 85 1>;
- interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
- phy-mode = "mii";
- };
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
new file mode 100644
index ..0127685b81ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A20 GMAC Device Tree Bindings
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun7i-a20-gmac
+
+ interrupts:
+maxItems: 1
+
+ interrupt-names:
+const: macirq
+
+ clocks:
+items:
+ - description: GMAC main clock
+ - description: TX clock
+
+ clock-names:
+items:
+ - const: stmmaceth
+ - const: allwinner_gmac_tx
+
+ phy-supply:
+description:
+ PHY regulator
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - phy-mode
+
+examples:
+ - |
+gmac: ethernet@1c5 {
+compatible = "allwinner,sun7i-a20-gmac";
+reg = <0x01c5 0x1>,
+ <0x01c20164 0x4>;
+interrupts = <0 85 1>;
+interrupt-names = "macirq";
+clocks = <&ahb_gates 49>, <&gmac_tx>;
+clock-names = "stmmaceth", "allwinner_gmac_tx";
+phy-mode = "mii";
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 5983715ac5bc..18d7ecc414be 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -44,6 +44,7 @@ properties:
compatible:
contains:
enum:
+- allwinner,sun7i-a20-gmac
- snps,dwmac
- snps,dwmac-3.50a
- snps,dwmac-3.610
@@ -265,6 +266,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac
@@ -305,6 +307,7 @@ allOf:
compatible:
contains:
enum:
+ - allwinner,sun7i-a20-gmac
- snps,dwmac-4.00
- snps,dwmac-4.10a
- snps,dwxgmac
--
git-series 0.9.1
[PATCH v2 09/11] dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable the DT validation. Since that controller is based on a Synopsys IP, let's add the validation to that schemas with a bunch of conditionals. Signed-off-by: Maxime Ripard --- Changes from v1: - Add specific binding document --- Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 353 - Documentation/devicetree/bindings/net/dwmac-sun8i.txt| 201 +- Documentation/devicetree/bindings/net/snps,dwmac.yaml| 15 +++- 3 files changed, 368 insertions(+), 201 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml delete mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml new file mode 100644 index ..814cfb862e4f --- /dev/null +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -0,0 +1,353 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A83t EMAC Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: +oneOf: + - const: allwinner,sun8i-a83t-emac + - const: allwinner,sun8i-h3-emac + - const: allwinner,sun8i-r40-emac + - const: allwinner,sun8i-v3s-emac + - const: allwinner,sun50i-a64-emac + - items: +- const: allwinner,sun50i-h6-emac +- const: allwinner,sun50i-a64-emac + + reg: +maxItems: 1 + + interrupts: +maxItems: 1 + + interrupt-names: +const: macirq + + clocks: +maxItems: 1 + + clock-names: +const: stmmaceth + + syscon: +$ref: /schemas/types.yaml#definitions/phandle +description: + Phandle to the device containing the EMAC or GMAC clock + register + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - phy-mode + - phy-handle + - syscon + +allOf: + - $ref: "snps,dwmac.yaml#" + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + +then: + properties: +allwinner,tx-delay-ps: + allOf: +- $ref: /schemas/types.yaml#definitions/uint32 +- enum: [0, 100, 200, 300, 400, 500, 600, 700] + default: 0 + description: +External RGMII PHY TX clock delay chain value in ps. + +allwinner,rx-delay-ps: + allOf: +- $ref: /schemas/types.yaml#definitions/uint32 +- enum: +- 0 +- 100 +- 200 +- 300 +- 400 +- 500 +- 600 +- 700 +- 800 +- 900 +- 1000 +- 1100 +- 1200 +- 1300 +- 1400 +- 1500 +- 1600 +- 1700 +- 1800 +- 1900 +- 2000 +- 2100 +- 2200 +- 2300 +- 2400 +- 2500 +- 2600 +- 2700 +- 2800 +- 2900 +- 3000 +- 3100 + default: 0 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-r40-emac + +then: + properties: +allwinner,rx-delay-ps: + allOf: +- $ref: /schemas/types.yaml#definitions/uint32 +- enum: [0, 100, 200, 300, 400, 500, 600, 700] + default: 0 + description: +External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: +compatible: + contains: +enum: + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + +then: + properties: +allwinner,leds-active-low: + $ref: /schemas/types.yaml#definitions/flag + description: +EPHY LEDs are active low. + +mdio-mux: + type: object + + properties: +compatible: + const: allwinner,sun8i-h3-mdio-mux + +mdio-parent-bus: + $ref: /schemas/types.y
[PATCH v2 11/11] ARM: dts: sunxi: Switch to the generic PHY properties
The DWMAC specific properties to manage the PHY have been superseeded by
the generic PHY properties. Let's move to it.
Signed-off-by: Maxime Ripard
---
This patch should go through arm-soc.
Changes from v1:
- New patch
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 6 +++---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 6 +++---
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 9 -
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 8
4 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 09832b4e8fc8..2652d737fe7c 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -155,13 +155,13 @@
pinctrl-0 = <&gmac_rgmii_pins>;
phy = <&phy1>;
phy-mode = "rgmii";
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index 8e724c52feff..7899712400b2 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -95,13 +95,13 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_dldo1>;
- snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>; /* PA21 */
+ reset-assert-us = <1>;
+ reset-deassert-us = <3>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index fd0153f65685..b01d91d025ec 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -103,15 +103,14 @@
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <®_gmac_vdd>;
- /* phy reset config */
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
- snps,reset-active-low;
- /* wait 1s after reset, otherwise fail to read phy id */
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index c34a83f666c7..ca12cee27072 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -108,14 +108,14 @@
phy = <&phy3>;
phy-mode = "rgmii";
phy-supply = <®_vcc3v3>;
-
- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 100>;
status = "okay";
phy3: ethernet-phy@3 {
reg = <3>;
+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
+ reset-assert-us = <1>;
+ /* wait 1s after reset, otherwise fail to read phy id */
+ reset-deassert-us = <100>;
};
};
--
git-series 0.9.1
[PATCH v2 07/11] dt-bindings: net: stmmac: Convert the binding to a schemas
Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard --- Changes from v1: - Restrict snps,tso to only a couple of compatibles - Use an enum for the compatibles - Add a custom select statement with the compatibles of all the generic compatibles, including the deprecated ones. Remove the deprecated ones from the valid compatible values to issue a warning when used. --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 389 +++- Documentation/devicetree/bindings/net/stmmac.txt | 179 +- 2 files changed, 390 insertions(+), 178 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/snps,dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml new file mode 100644 index ..5983715ac5bc --- /dev/null +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -0,0 +1,389 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare MAC Device Tree Bindings + +maintainers: + - Alexandre Torgue + - Giuseppe Cavallaro + - Jose Abreu + +# Select every compatible, including the deprecated ones. This way, we +# will be able to report a warning when we have that compatible, since +# we will validate the node thanks to the select, but won't report it +# as a valid value in the compatible property description +select: + properties: +compatible: + contains: +enum: + - snps,dwmac + - snps,dwmac-3.50a + - snps,dwmac-3.610 + - snps,dwmac-3.70a + - snps,dwmac-3.710 + - snps,dwmac-4.00 + - snps,dwmac-4.10a + - snps,dwxgmac + - snps,dwxgmac-2.10 + + # Deprecated + - st,spear600-gmac + + required: +- compatible + +properties: + + # We need to include all the compatibles from schemas that will + # include that schemas, otherwise compatible won't validate for + # those. + compatible: +contains: + enum: +- snps,dwmac +- snps,dwmac-3.50a +- snps,dwmac-3.610 +- snps,dwmac-3.70a +- snps,dwmac-3.710 +- snps,dwmac-4.00 +- snps,dwmac-4.10a +- snps,dwxgmac +- snps,dwxgmac-2.10 + + reg: +maxItems: 1 + + interrupts: +minItems: 1 +maxItems: 3 +items: + - description: Combined signal for various interrupt events + - description: The interrupt to manage the remote wake-up packet detection + - description: The interrupt that occurs when Rx exits the LPI state + + interrupt-names: +minItems: 1 +maxItems: 3 +items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + + clocks: +minItems: 1 +maxItems: 3 +items: + - description: GMAC main clock + - description: Peripheral registers interface clock + - description: + PTP reference clock. This clock is used for programming the + Timestamp Addend Register. If not passed then the system + clock will be used and this is fine on some platforms. + + clock-names: +additionalItems: true +contains: + enum: +- stmmaceth +- pclk +- ptp_ref + + resets: +maxItems: 1 +description: + MAC Reset signal. + + reset-names: +const: stmmaceth + + snps,axi-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + AXI BUS Mode parameters. Phandle to a node that can contain the + following properties +* snps,lpi_en, enable Low Power Interface +* snps,xit_frm, unlock on WoL +* snps,wr_osr_lmt, max write outstanding req. limit +* snps,rd_osr_lmt, max read outstanding req. limit +* snps,kbbe, do not cross 1KiB boundary. +* snps,blen, this is a vector of supported burst length. +* snps,fb, fixed-burst +* snps,mb, mixed-burst +* snps,rb, rebuild INCRx Burst + + snps,mtl-rx-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + Multiple RX Queues parameters. Phandle to a node that can + contain the following properties +* snps,rx-queues-to-use, number of RX queues to be used in the + driver +* Choose one of these RX scheduling algorithms + * snps,rx-sched-sp, Strict priority + * snps,rx-sched-wsp, Weighted Strict priority +* For each RX queue + * Choose one of these modes +* snps,dcb-algorithm, Queue to be enabled as DCB +* snps,avb-algorithm, Queue to be enabled as AVB + * snps,map-to-dma-channel, Channel to map + * Specifiy specific packet routing +* snps,route-avcp, AV Untagged Control packets +* snps
[PATCH v2 06/11] dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Add a select statement with the deprecated compatible, and remove it
from the valid compatibles
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml | 67
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt | 27
---
2 files changed, 67 insertions(+), 27 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
new file mode 100644
index ..c4d8ffb9b6ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 MDIO Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+# Select every compatible, including the deprecated ones. This way, we
+# will be able to report a warning when we have that compatible, since
+# we will validate the node thanks to the select, but won't report it
+# as a valid value in the compatible property description
+select:
+ properties:
+compatible:
+ enum:
+- allwinner,sun4i-a10-mdio
+
+# Deprecated
+- allwinner,sun4i-mdio
+
+ required:
+- compatible
+
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ compatible:
+const: allwinner,sun4i-a10-mdio
+
+ reg:
+maxItems: 1
+
+ phy-supply:
+description: PHY regulator
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+mdio@1c0b080 {
+compatible = "allwinner,sun4i-a10-mdio";
+reg = <0x01c0b080 0x14>;
+#address-cells = <1>;
+#size-cells = <0>;
+phy-supply = <®_emac_3v3>;
+
+phy0: ethernet-phy@0 {
+reg = <0>;
+};
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
deleted file mode 100644
index ab5b8613b0ef..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner A10 MDIO Ethernet Controller interface
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-mdio"
- (Deprecated: "allwinner,sun4i-mdio").
-- reg: address and length of the register set for the device.
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Example at the SoC level:
-mdio@1c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-And at the board level:
-
-mdio@1c0b080 {
- phy-supply = <®_emac_3v3>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
--
git-series 0.9.1
[PATCH v2 03/11] MAINTAINERS: Add Ethernet PHY YAML file
While the Ethernet PHY framework was marked as maintained, the device tree bindings associated to that framework was not listed under the maintained files. Fix that. Signed-off-by: Maxime Ripard --- Changes from v1: - New patch --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7ed4d54956a2..1cb1e4b6c473 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5987,6 +5987,7 @@ M:Heiner Kallweit L: netdev@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-bus-mdio +F: Documentation/devicetree/bindings/net/ethernet-phy.yaml F: Documentation/devicetree/bindings/net/mdio* F: Documentation/networking/phy.rst F: drivers/net/phy/ -- git-series 0.9.1
[PATCH v2 01/11] dt-bindings: net: Add YAML schemas for the generic Ethernet options
The Ethernet controllers have a good number of generic options that can be needed in a device tree. Add a YAML schemas for those. Signed-off-by: Maxime Ripard --- Changes from v1: - Use an enum for phy-connection-types - Validate the items for the fixed-link array - Set the number of valid items for link-gpios to 1 - Removed deprecated properties (phy-mode, phy, phy-device) --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 194 +++- Documentation/devicetree/bindings/net/ethernet.txt | 69 +-- Documentation/devicetree/bindings/net/fixed-link.txt | 55 +-- 3 files changed, 196 insertions(+), 122 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/ethernet-controller.yaml diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml new file mode 100644 index ..0f53fb16fa6c --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -0,0 +1,194 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ethernet Controller Generic Binding + +maintainers: + - David S. Miller + +properties: + $nodename: +pattern: "^ethernet(@.*)?$" + + local-mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was assigned to the network device. + + mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was last used by the boot + program; should be used in cases where the MAC address assigned + to the device by the boot program is different from the + local-mac-address property. + + max-frame-size: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Maximum transfer unit (IEEE defined MTU), rather than the + maximum frame size (there\'s contradiction in the Devicetree + Specification). + + max-speed: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Specifies maximum speed in Mbit/s supported by the device. + + nvmem-cells: +maxItems: 1 +description: + Reference to an nvmem node for the MAC address + + nvmem-cells-names: +const: mac-address + + # Deprecated: phy-mode + phy-connection-type: +description: + Operation mode of the PHY interface +enum: + # There is not a standard bus between the MAC and the PHY, + # something proprietary is being used to embed the PHY in the + # MAC. + - internal + - mii + - gmii + - sgmii + - qsgmii + - tbi + - rev-mii + - rmii + + # RX and TX delays are added by the MAC when required + - rgmii + + # RGMII with internal RX and TX delays provided by the PHY, + # the MAC should not add the RX or TX delays in this case + - rgmii-id + + # RGMII with internal RX delay provided by the PHY, the MAC + # should not add an RX delay in this case + - rgmii-rxid + + # RGMII with internal TX delay provided by the PHY, the MAC + # should not add an TX delay in this case + - rgmii-txid + - rtbi + - smii + - xgmii + - trgmii + - 1000base-x + - 2500base-x + - rxaui + - xaui + + # 10GBASE-KR, XFI, SFI + - 10gbase-kr + - usxgmii + + # Deprecated: phy, phy-device + phy-handle: +$ref: /schemas/types.yaml#definitions/phandle +description: + Specifies a reference to a node representing a PHY device. + + rx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s receive fifo in bytes. This is used + for components that can have configurable receive fifo sizes, + and is useful for determining certain configuration settings + such as flow control thresholds. + + tx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s transmit fifo in bytes. This + is used for components that can have configurable fifo sizes. + + managed: +allOf: + - $ref: /schemas/types.yaml#definitions/string + - default: auto +enum: + - auto + - in-band-status +description: + Specifies the PHY management type. If auto is set and fixed-link + is not specified, it uses MDIO for management. + + fixed-link: +allOf: + - if: + type: array +then: + minItems: 1 + maxItems: 1 + items: +items: + - minimum: 0 +maximum: 31 +description: + Emulated PHY ID,
Re: [PATCH 2/8] dt-bindings: net: Add a YAML schemas for the generic PHY options
Hi Rob,
On Thu, May 23, 2019 at 09:44:51AM -0500, Rob Herring wrote:
> > + reg:
> > +maxItems: 1
> > +minimum: 0
> > +maximum: 31
>
> min/max need to be under 'items'. I don't think these would ever be
> valid if the type is an array.
>
> I've modified the meta-schema to catch this.
Have you pushed it already?
Using:
reg:
maxItems: 1
items:
minimum: 0
maximum: 31
is creating this error when running dtbs_check
ethernet-phy.yaml: properties:reg: {'maxItems': 1, 'items': {'minimum': 0,
'maximum': 31}, 'description': 'The ID number for the PHY.'} is not valid under
any of the given schemas
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Re: [PATCH 6/8] dt-bindings: net: stmmac: Convert the binding to a schemas
Hi Rob, On Thu, May 23, 2019 at 10:33:05AM -0500, Rob Herring wrote: > On Thu, May 23, 2019 at 4:57 AM Maxime Ripard > wrote: > > > > Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML > > schema to enable the DT validation. > > You picked an easy one. ;) Yeah, that's what happens when you run out of trivial bindings, you end up with only the hard ones left to work on :) > > Signed-off-by: Maxime Ripard > > --- > > Documentation/devicetree/bindings/net/snps,dwmac.yaml | 344 +++- > > Documentation/devicetree/bindings/net/stmmac.txt | 179 +-- > > 2 files changed, 345 insertions(+), 178 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/net/snps,dwmac.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > new file mode 100644 > > index ..be3ada5121e1 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > @@ -0,0 +1,344 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Synopsys DesignWare MAC Device Tree Bindings > > + > > +maintainers: > > + - Alexandre Torgue > > + - Giuseppe Cavallaro > > + - Jose Abreu > > + > > +properties: > > + compatible: > > +oneOf: > > + - const: snps,dwmac > > + - const: snps,dwmac-3.50a > > + - const: snps,dwmac-3.610 > > + - const: snps,dwmac-3.70a > > + - const: snps,dwmac-3.710 > > + - const: snps,dwmac-4.00 > > + - const: snps,dwmac-4.10a > > + - const: snps,dwxgmac > > + - const: snps,dwxgmac-2.10 > > + - const: st,spear600-gmac > > +description: Deprecated > > Like the other, just make this an enum. Ack. I did this initially because the sun8i-emac bindings also have multiple compatibles we can use, and thus I needed an items here, but since we will move them away in separate files, we can just use an enum (with a contains). > Though, what to do on deprecated things? If we expect dts files to be > updated, then we should remove or disallow in the schema (e.g. 'prop: > false' for properties). Oh, so that's what the false are here for. I wanted to send a PR to the meta-schemas because *-gpio was not working, and that binding uses one, but I guess that solves it. For the deprecation process, I haven't made up my mind yet. We could put in comment the deprecated properties and compatibles, but that has two significant drawbacks: - for the compatibles, we wouldn't have the nodes with a deprecated compatible validated, and thus we wouldn't even have a warning that our compatible is deprecated in the first place. And any property we might have not used properly will be ignored as well. - for the other properties, it's still pretty hard to disable additionalProperties, so any deprecated property wouldn't be validated if they were in a comment, and we wouldn't have a warning either if additionalProperties is true, because we tolerate them. I guess we can workaround the first one with a custom select that has all the supported compatibles (including the deprecated ones), but only list the non-deprecated options in the compatible properties. I don't really see a solution for the second one. > The issue with updating dts files, is it may break old kernels with > new dtbs. While this is something that is mentionned by some people, and I can see how it's problematic to some, it's also something we never really committed to, so I'm fine with that. > > + snps,axi-config: > > +$ref: /schemas/types.yaml#definitions/phandle > > +description: > > + AXI BUS Mode parameters. Phandle to a node that can contain the > > + following properties > > +* snps,lpi_en, enable Low Power Interface > > +* snps,xit_frm, unlock on WoL > > +* snps,wr_osr_lmt, max write outstanding req. limit > > +* snps,rd_osr_lmt, max read outstanding req. limit > > +* snps,kbbe, do not cross 1KiB boundary. > > +* snps,blen, this is a vector of supported burst length. > > +* snps,fb, fixed-burst > > +* snps,mb, mixed-burst > > +* snps,rb, rebuild INCRx Burst > > This obviously needs its own schema, but that can come latter. I haven't been able to describe a node that doesn't have any particular copmatible or node name,
Re: [PATCH 2/8] dt-bindings: net: Add a YAML schemas for the generic PHY options
Hi Florian, On Thu, May 23, 2019 at 11:16:55AM -0700, Florian Fainelli wrote: > On 5/23/19 2:56 AM, Maxime Ripard wrote: > > The networking PHYs have a number of available device tree properties that > > can be used in their device tree node. Add a YAML schemas for those. > > > > Signed-off-by: Maxime Ripard > > --- > > Documentation/devicetree/bindings/net/ethernet-phy.yaml | 148 +- > > Documentation/devicetree/bindings/net/phy.txt | 80 +- > > 2 files changed, 149 insertions(+), 79 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml > > Updating the PHY Library section of the MAINTAINERS file to include that > binding document (not sure why it was not there) would be nice. Sure, I'll do it, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH 6/8] dt-bindings: net: stmmac: Convert the binding to a schemas
Hi Alexandre, On Thu, May 23, 2019 at 05:05:51PM +0200, Alexandre Torgue wrote: > Hi Maxime > > On 5/23/19 11:56 AM, Maxime Ripard wrote: > > Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML > > schema to enable the DT validation. > > > > Signed-off-by: Maxime Ripard > > --- > > First, thanks a lot for this patch. Just one question: > We could add ranges for some properties in order to avoid "bad value" for a > property. If I understand correctly you do it only for snps,dwxgmac, > snps,dwxgmac-2.10 and st,spear600-gmac. Why not do it for all supported IPs > ? (Maybe it is something that we could add later) > We definitely can do that. It wasn't really obvious to me what the limits were by reading the previous documentation, but if you can provide them we can definitely add them. > > +snps,tso: > > + $ref: /schemas/types.yaml#definitions/flag > > + description: > > +Enables the TSO feature otherwise it will be managed by > > +MAC HW capability register. Only for GMAC4 and newer. > > TSO is also available for snps,dwmac-4.00 and snps,dwmac-4.10a Ack, I'll change it. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH 2/8] dt-bindings: net: Add a YAML schemas for the generic PHY options
Hi Andrew,
(Sorry for not CC'ing you on this)
On Thu, May 23, 2019 at 04:37:44PM +0200, Andrew Lunn wrote:
> On Thu, May 23, 2019 at 11:56:45AM +0200, Maxime Ripard wrote:
> > The networking PHYs have a number of available device tree properties that
> > can be used in their device tree node. Add a YAML schemas for those.
> >
> > Signed-off-by: Maxime Ripard
> > ---
> > Documentation/devicetree/bindings/net/ethernet-phy.yaml | 148 +-
> > Documentation/devicetree/bindings/net/phy.txt | 80 +-
> > 2 files changed, 149 insertions(+), 79 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > new file mode 100644
> > index ..eb79ee6db977
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > @@ -0,0 +1,148 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Ethernet PHY Generic Binding
> > +
> > +maintainers:
> > + - David S. Miller
> > +
> > +properties:
> > + $nodename:
> > +pattern: "^ethernet-phy(@[a-f0-9])?$"
> > +
> > + compatible:
> > +oneOf:
>
> I don't know the language. It is valid to have both
> ethernet-phy-ieee802.3-c45 and
> ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$". Does this oneOf prevent
> multiple compatible strings?
I haven't tested it, I will make sure it works
> Also, the general case is no compatible at all.
This is covered already. The description here just mentions the values
available if the property is set.
The required keyword a bit later lists the required property. In this
case, compatible is omitted so we just list the available values for
the compatible property.
> > + - const: ethernet-phy-ieee802.3-c22
> > +description: PHYs that implement IEEE802.3 clause 22
> > + - const: ethernet-phy-ieee802.3-c45
> > +description: PHYs that implement IEEE802.3 clause 45
> > + - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
> > +description:
> > + The first group of digits is the 16 bit Phy Identifier 1
> > + register, this is the chip vendor OUI bits 3:18. The
> > + second group of digits is the Phy Identifier 2 register,
> > + this is the chip vendor OUI bits 19:24, followed by 10
> > + bits of a vendor specific ID.
>
> Could we try to retain:
>
> > - If the PHY reports an incorrect ID (or none at all) then the
> > - "compatible" list may contain an entry with the correct PHY ID in the
> ...
>
> Using it is generally wrong, and that is not clear in the new text.
Ok, I'll add it back.
> > +
> > + reg:
> > +maxItems: 1
> > +minimum: 0
> > +maximum: 31
> > +description:
> > + The ID number for the PHY.
> > +
> > + interrupts:
> > +maxItems: 1
> > +
> > + max-speed:
> > +enum:
> > + - 10
> > + - 100
> > + - 1000
>
> This is outdated in the text description. Any valid speed is
> supported, currently 10 - 20, as listed in phy_setting settings().
Ack, I'll update it
Thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Re: [PATCH 1/8] dt-bindings: net: Add YAML schemas for the generic Ethernet options
Hi Rob, Thanks for the review, On Thu, May 23, 2019 at 08:10:22AM -0500, Rob Herring wrote: > > + fixed-link: > > +allOf: > > + - if: > > + type: array > > +then: > > + minItems: 1 > > + maxItems: 1 > > + items: > > +type: array > > +minItems: 5 > > +maxItems: 5 > > + description: > > +An array of 5 cells, with the following accepted values > > + - At index 0, the emulated PHY ID, choose any but but > > +unique to the all specified fixed-links, from 0 to 31 > > + - at index 1, duplex configuration with 0 for half duplex > > +or 1 for full duplex > > + - at index 2, link speed in Mbits/sec, accepted values are > > +10, 100 and 1000 > > + - at index 3, pause configuration with 0 for no pause, 1 > > +for pause > > + - at index 4, asymmetric pause configuration with 0 for no > > +asymmetric pause, 1 for asymmetric pause > > Looks like constraints to me: > > items: > - minimum: 0 > maximum: 31 > - enum: [ 0, 1 ] > - enum: [ 10, 100, 1000 ] > ... Yeah, we should definitely do something like that. I tried and failed, but that looks like the right solution. > > + > > + > > + - if: > > Couldn't this be an 'else' and avoid the allOf? I don't really know, we could go both ways. Which one would be the more verbose in the case where someone would just have a boolean instead of the node or the array? Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Re: [PATCH 6/8] dt-bindings: net: stmmac: Convert the binding to a schemas
On Thu, May 23, 2019 at 11:25:09AM +, Jose Abreu wrote: > From: Maxime Ripard > Date: Thu, May 23, 2019 at 12:07:15 > > > You can then run make dtbs_check, and those YAML files will be used to > > validate that any devicetree using those properties are doing it > > properly. That implies having the right node names, properties, types, > > ranges of values when relevant, and so on. > > Thanks but how can one that's developing know which bindings it shall use? I'm not quite sure what you mean here. Are you talking about which file to use, or which property are required, or something else? > Is this not parsed/prettified and displayed in some kind of webpage ? Not at the moment, but it's one of the things that are made much easier by using a formal data format. > Just that now that the TXT is gone its kind of "strange" to look at YAML > instead of plain text and develop/use the bindings. Well, it's kind of the point though. Free-form text was impossible to parse in a generic way, and you couldn't build any generic tools upon it. YAML provides that. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH 6/8] dt-bindings: net: stmmac: Convert the binding to a schemas
Hi! On Thu, May 23, 2019 at 10:11:39AM +, Jose Abreu wrote: > From: Maxime Ripard > Date: Thu, May 23, 2019 at 10:56:49 > > > Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML > > schema to enable the DT validation. > > > > Signed-off-by: Maxime Ripard > > How exactly can I see the final results of this ? Do you have any link ? > (I'm no expert in YAML at all). You need some extra tooling, that you can find here: https://github.com/devicetree-org/dt-schema You can then run make dtbs_check, and those YAML files will be used to validate that any devicetree using those properties are doing it properly. That implies having the right node names, properties, types, ranges of values when relevant, and so on. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
[PATCH 4/8] dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Switch our Allwinner A10 EMAC controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 55
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt | 19
---
2 files changed, 55 insertions(+), 19 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
new file mode 100644
index ..b5d82d0a59d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ compatible:
+const: allwinner,sun4i-a10-emac
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ allwinner,sram:
+description: Phandle to the device SRAM
+$ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - phy
+ - allwinner,sram
+
+examples:
+ - |
+emac: ethernet@1c0b000 {
+compatible = "allwinner,sun4i-a10-emac";
+reg = <0x01c0b000 0x1000>;
+interrupts = <55>;
+clocks = <&ahb_gates 17>;
+phy = <&phy0>;
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
deleted file mode 100644
index e98118aef5f6..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* Allwinner EMAC ethernet controller
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
- "allwinner,sun4i-emac")
-- reg: address and length of the register set for the device.
-- interrupts: interrupt for the device
-- phy: see ethernet.txt file in the same directory.
-- clocks: A phandle to the reference clock for this device
-
-Example:
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- phy = <&phy0>;
-};
--
git-series 0.9.1
[PATCH 5/8] dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable
the DT validation.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml | 55
+++
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt | 27
---
2 files changed, 55 insertions(+), 27 deletions(-)
create mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
diff --git
a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
new file mode 100644
index ..32c0fdc57d35
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 MDIO Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ compatible:
+enum:
+ - allwinner,sun4i-a10-mdio
+
+ # Deprecated
+ - allwinner,sun4i-mdio
+
+ reg:
+maxItems: 1
+
+ phy-supply:
+description: PHY regulator
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+mdio@1c0b080 {
+compatible = "allwinner,sun4i-a10-mdio";
+reg = <0x01c0b080 0x14>;
+#address-cells = <1>;
+#size-cells = <0>;
+phy-supply = <®_emac_3v3>;
+
+phy0: ethernet-phy@0 {
+reg = <0>;
+};
+};
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
deleted file mode 100644
index ab5b8613b0ef..
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner A10 MDIO Ethernet Controller interface
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-mdio"
- (Deprecated: "allwinner,sun4i-mdio").
-- reg: address and length of the register set for the device.
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Example at the SoC level:
-mdio@1c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-And at the board level:
-
-mdio@1c0b080 {
- phy-supply = <®_emac_3v3>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
--
git-series 0.9.1
[PATCH 6/8] dt-bindings: net: stmmac: Convert the binding to a schemas
Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 344 +++- Documentation/devicetree/bindings/net/stmmac.txt | 179 +-- 2 files changed, 345 insertions(+), 178 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/snps,dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml new file mode 100644 index ..be3ada5121e1 --- /dev/null +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -0,0 +1,344 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare MAC Device Tree Bindings + +maintainers: + - Alexandre Torgue + - Giuseppe Cavallaro + - Jose Abreu + +properties: + compatible: +oneOf: + - const: snps,dwmac + - const: snps,dwmac-3.50a + - const: snps,dwmac-3.610 + - const: snps,dwmac-3.70a + - const: snps,dwmac-3.710 + - const: snps,dwmac-4.00 + - const: snps,dwmac-4.10a + - const: snps,dwxgmac + - const: snps,dwxgmac-2.10 + - const: st,spear600-gmac +description: Deprecated + + reg: +maxItems: 1 + + interrupts: +minItems: 1 +maxItems: 3 +items: + - description: Combined signal for various interrupt events + - description: The interrupt to manage the remote wake-up packet detection + - description: The interrupt that occurs when Rx exits the LPI state + + interrupt-names: +minItems: 1 +maxItems: 3 +items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + + clocks: +minItems: 1 +maxItems: 3 +items: + - description: GMAC main clock + - description: Peripheral registers interface clock + - description: + PTP reference clock. This clock is used for programming the + Timestamp Addend Register. If not passed then the system + clock will be used and this is fine on some platforms. + + clock-names: +additionalItems: true +contains: + enum: +- stmmaceth +- pclk +- ptp_ref + + resets: +maxItems: 1 +description: + MAC Reset signal. + + reset-names: +const: stmmaceth + + snps,axi-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + AXI BUS Mode parameters. Phandle to a node that can contain the + following properties +* snps,lpi_en, enable Low Power Interface +* snps,xit_frm, unlock on WoL +* snps,wr_osr_lmt, max write outstanding req. limit +* snps,rd_osr_lmt, max read outstanding req. limit +* snps,kbbe, do not cross 1KiB boundary. +* snps,blen, this is a vector of supported burst length. +* snps,fb, fixed-burst +* snps,mb, mixed-burst +* snps,rb, rebuild INCRx Burst + + snps,mtl-rx-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + Multiple RX Queues parameters. Phandle to a node that can + contain the following properties +* snps,rx-queues-to-use, number of RX queues to be used in the + driver +* Choose one of these RX scheduling algorithms + * snps,rx-sched-sp, Strict priority + * snps,rx-sched-wsp, Weighted Strict priority +* For each RX queue + * Choose one of these modes +* snps,dcb-algorithm, Queue to be enabled as DCB +* snps,avb-algorithm, Queue to be enabled as AVB + * snps,map-to-dma-channel, Channel to map + * Specifiy specific packet routing +* snps,route-avcp, AV Untagged Control packets +* snps,route-ptp, PTP Packets +* snps,route-dcbcp, DCB Control Packets +* snps,route-up, Untagged Packets +* snps,route-multi-broad, Multicast & Broadcast Packets + * snps,priority, RX queue priority (Range 0x0 to 0xF) + + snps,mtl-tx-config: +$ref: /schemas/types.yaml#definitions/phandle +description: + Multiple TX Queues parameters. Phandle to a node that can + contain the following properties +* snps,tx-queues-to-use, number of TX queues to be used in the + driver +* Choose one of these TX scheduling algorithms + * snps,tx-sched-wrr, Weighted Round Robin + * snps,tx-sched-wfq, Weighted Fair Queuing + * snps,tx-sched-dwrr, Deficit Weighted Round Robin + * snps,tx-sched-sp, Strict priority +* For each TX queue + * snps,weight, TX queue weight (if using a DCB weight +algorithm) + * Choose one of these modes +* snps,dcb-algorithm, TX queue will be working in DCB +* snps,avb-algorithm, TX queue
[PATCH 8/8] dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 201 +--
Documentation/devicetree/bindings/net/snps,dwmac.yaml | 342 +++-
2 files changed, 342 insertions(+), 201 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
deleted file mode 100644
index 54c66d0611cb..
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ /dev/null
@@ -1,201 +0,0 @@
-* Allwinner sun8i GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
-- compatible: must be one of the following string:
- "allwinner,sun8i-a83t-emac"
- "allwinner,sun8i-h3-emac"
- "allwinner,sun8i-r40-gmac"
- "allwinner,sun8i-v3s-emac"
- "allwinner,sun50i-a64-emac"
- "allwinner,sun50i-h6-emac", "allwinner-sun50i-a64-emac"
-- reg: address and length of the register for the device.
-- interrupts: interrupt for the device
-- interrupt-names: must be "macirq"
-- clocks: A phandle to the reference clock for this device
-- clock-names: must be "stmmaceth"
-- resets: A phandle to the reset control for this device
-- reset-names: must be "stmmaceth"
-- phy-mode: See ethernet.txt
-- phy-handle: See ethernet.txt
-- syscon: A phandle to the device containing the EMAC or GMAC clock register
-
-Optional properties:
-- allwinner,tx-delay-ps: TX clock delay chain value in ps.
-Range is 0-700. Default is 0.
-Unavailable for allwinner,sun8i-r40-gmac
-- allwinner,rx-delay-ps: RX clock delay chain value in ps.
-Range is 0-3100. Default is 0.
-Range is 0-700 for allwinner,sun8i-r40-gmac
-Both delay properties need to be a multiple of 100. They control the
-clock delay for external RGMII PHY. They do not apply to the internal
-PHY or external non-RGMII PHYs.
-
-Optional properties for the following compatibles:
- - "allwinner,sun8i-h3-emac",
- - "allwinner,sun8i-v3s-emac":
-- allwinner,leds-active-low: EPHY LEDs are active low
-
-Required child node of emac:
-- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
-
-Required properties of the mdio node:
-- #address-cells: shall be 1
-- #size-cells: shall be 0
-
-The device node referenced by "phy" or "phy-handle" must be a child node
-of the mdio node. See phy.txt for the generic PHY bindings.
-
-The following compatibles require that the emac node have a mdio-mux child
-node called "mdio-mux":
- - "allwinner,sun8i-h3-emac"
- - "allwinner,sun8i-v3s-emac":
-Required properties for the mdio-mux node:
- - compatible = "allwinner,sun8i-h3-mdio-mux"
- - mdio-parent-bus: a phandle to EMAC mdio
- - one child mdio for the integrated mdio with the compatible
-"allwinner,sun8i-h3-mdio-internal"
- - one child mdio for the external mdio if present (V3s have none)
-Required properties for the mdio-mux children node:
- - reg: 1 for internal MDIO bus, 2 for external MDIO bus
-
-The following compatibles require a PHY node representing the integrated
-PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- - "allwinner,sun8i-h3-emac",
- - "allwinner,sun8i-v3s-emac":
-
-Additional information regarding generic multiplexer properties can be found
-at Documentation/devicetree/bindings/net/mdio-mux.txt
-
-Required properties of the integrated phy node:
-- clocks: a phandle to the reference clock for the EPHY
-- resets: a phandle to the reset control for the EPHY
-- Must be a child of the integrated mdio
-
-Example with integrated PHY:
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun8i-h3-emac";
- syscon = <&syscon>;
- reg = <0x01c0b000 0x104>;
- interrupts = ;
- interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC>;
- clock-names = "stmmaceth";
-
- phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
- allwinner,leds-active-low;
-
- mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
-
-
[PATCH 7/8] dt-bindings: net: sun7i-gmac: Convert the binding to a schemas
Switch our Allwinner A20 GMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt | 27
---
Documentation/devicetree/bindings/net/snps,dwmac.yaml | 45
+
2 files changed, 45 insertions(+), 27 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
deleted file mode 100644
index 8b3f953656e3..
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
- - compatible: Should be "allwinner,sun7i-a20-gmac"
- - clocks: Should contain the GMAC main clock, and tx clock
- The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
- - clock-names: Should contain the clock names "stmmaceth",
- and "allwinner_gmac_tx"
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Examples:
-
- gmac: ethernet@1c5 {
- compatible = "allwinner,sun7i-a20-gmac";
- reg = <0x01c5 0x1>,
- <0x01c20164 0x4>;
- interrupts = <0 85 1>;
- interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
- phy-mode = "mii";
- };
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index be3ada5121e1..d213c32ef153 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -14,6 +14,7 @@ maintainers:
properties:
compatible:
oneOf:
+ - const: allwinner,sun7i-a20-gmac
- const: snps,dwmac
- const: snps,dwmac-3.50a
- const: snps,dwmac-3.610
@@ -232,6 +233,7 @@ allOf:
properties:
compatible:
enum:
+- allwinner,sun7i-a20-gmac
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac
@@ -273,6 +275,37 @@ allOf:
Enables the TSO feature otherwise it will be managed by
MAC HW capability register. Only for GMAC4 and newer.
+ - if:
+ properties:
+compatible:
+ const: allwinner,sun7i-a20-gmac
+
+then:
+ properties:
+interrupts:
+ maxItems: 1
+
+interrupt-names:
+ const: macirq
+
+clocks:
+ items:
+- description: GMAC main clock
+- description: TX clock
+
+clock-names:
+ items:
+- const: stmmaceth
+- const: allwinner_gmac_tx
+
+phy-supply:
+ description:
+PHY regulator
+
+ required:
+- clocks
+- clock-names
+
examples:
- |
stmmac_axi_setup: stmmac-axi-config {
@@ -337,6 +370,18 @@ examples:
};
};
+ - |
+gmac: ethernet@1c5 {
+compatible = "allwinner,sun7i-a20-gmac";
+reg = <0x01c5 0x1>,
+ <0x01c20164 0x4>;
+interrupts = <0 85 1>;
+interrupt-names = "macirq";
+clocks = <&ahb_gates 49>, <&gmac_tx>;
+clock-names = "stmmaceth", "allwinner_gmac_tx";
+phy-mode = "mii";
+};
+
# FIXME: We should set it, but it would report all the generic
# properties as additional properties.
# additionalProperties: false
--
git-series 0.9.1
[PATCH 3/8] dt-bindings: net: phy: The interrupt property is not mandatory
Unlike what was initially claimed in the PHY binding, the interrupt property of a PHY can be omitted, and the OS will turn to polling instead. Document that. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index eb79ee6db977..d2cc4b46f6dc 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -125,7 +125,6 @@ properties: required: - reg - - interrupts examples: - | -- git-series 0.9.1
[PATCH 1/8] dt-bindings: net: Add YAML schemas for the generic Ethernet options
The Ethernet controllers have a good number of generic options that can be needed in a device tree. Add a YAML schemas for those. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 197 +++- Documentation/devicetree/bindings/net/ethernet.txt | 68 +-- Documentation/devicetree/bindings/net/fixed-link.txt | 55 +-- 3 files changed, 199 insertions(+), 121 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/ethernet-controller.yaml diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml new file mode 100644 index ..1c6e9e755481 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -0,0 +1,197 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ethernet Controller Generic Binding + +maintainers: + - David S. Miller + +properties: + $nodename: +pattern: "^ethernet(@.*)?$" + + local-mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was assigned to the network device. + + mac-address: +allOf: + - $ref: /schemas/types.yaml#definitions/uint8-array + - minItems: 6 +maxItems: 6 +description: + Specifies the MAC address that was last used by the boot + program; should be used in cases where the MAC address assigned + to the device by the boot program is different from the + local-mac-address property. + + max-frame-size: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Maximum transfer unit (IEEE defined MTU), rather than the + maximum frame size (there\'s contradiction in the Devicetree + Specification). + + max-speed: +$ref: /schemas/types.yaml#definitions/uint32 +description: + Specifies maximum speed in Mbit/s supported by the device. + + nvmem-cells: +maxItems: 1 +description: + Reference to an nvmem node for the MAC address + + nvmem-cells-names: +const: mac-address + + phy-connection-type: +description: + Operation mode of the PHY interface +oneOf: + - const: internal +description: + there is not a standard bus between the MAC and the PHY, + something proprietary is being used to embed the PHY in the + MAC. + - const: mii + - const: gmii + - const: sgmii + - const: qsgmii + - const: tbi + - const: rev-mii + - const: rmii + - const: rgmii +description: + RX and TX delays are added by the MAC when required + - const: rgmii-id +description: + RGMII with internal RX and TX delays provided by the PHY, + the MAC should not add the RX or TX delays in this case + - const: rgmii-rxid +description: + RGMII with internal RX delay provided by the PHY, the MAC + should not add an RX delay in this case + - const: rgmii-txid +description: + RGMII with internal TX delay provided by the PHY, the MAC + should not add an TX delay in this case + - const: rtbi + - const: smii + - const: xgmii + - const: trgmii + - const: 1000base-x + - const: 2500base-x + - const: rxaui + - const: xaui + - const: 10gbase-kr +description: + 10GBASE-KR, XFI, SFI + + phy-mode: +$ref: "#/properties/phy-connection-type" +description: + Deprecated in favor of phy-connection-type + + phy-handle: +$ref: /schemas/types.yaml#definitions/phandle +description: + Specifies a reference to a node representing a PHY device. + + phy: +$ref: "#/properties/phy-handle" +description: + Deprecated in favor of phy-handle + + phy-device: +$ref: "#/properties/phy-handle" +description: + Deprecated in favor of phy-handle + + rx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s receive fifo in bytes. This is used + for components that can have configurable receive fifo sizes, + and is useful for determining certain configuration settings + such as flow control thresholds. + + tx-fifo-depth: +$ref: /schemas/types.yaml#definitions/uint32 +description: + The size of the controller\'s transmit fifo in bytes. This + is used for components that can have configurable fifo sizes. + + managed: +allOf: + - $ref: /schemas/types.yaml#definitions/string + - default: auto +enum: + - auto + - in-band-status +description: + Specifies the PHY management type. If
[PATCH 2/8] dt-bindings: net: Add a YAML schemas for the generic PHY options
The networking PHYs have a number of available device tree properties that
can be used in their device tree node. Add a YAML schemas for those.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 148 +-
Documentation/devicetree/bindings/net/phy.txt | 80 +-
2 files changed, 149 insertions(+), 79 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/ethernet-phy.yaml
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
new file mode 100644
index ..eb79ee6db977
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -0,0 +1,148 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet PHY Generic Binding
+
+maintainers:
+ - David S. Miller
+
+properties:
+ $nodename:
+pattern: "^ethernet-phy(@[a-f0-9])?$"
+
+ compatible:
+oneOf:
+ - const: ethernet-phy-ieee802.3-c22
+description: PHYs that implement IEEE802.3 clause 22
+ - const: ethernet-phy-ieee802.3-c45
+description: PHYs that implement IEEE802.3 clause 45
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+description:
+ The first group of digits is the 16 bit Phy Identifier 1
+ register, this is the chip vendor OUI bits 3:18. The
+ second group of digits is the Phy Identifier 2 register,
+ this is the chip vendor OUI bits 19:24, followed by 10
+ bits of a vendor specific ID.
+
+ reg:
+maxItems: 1
+minimum: 0
+maximum: 31
+description:
+ The ID number for the PHY.
+
+ interrupts:
+maxItems: 1
+
+ max-speed:
+enum:
+ - 10
+ - 100
+ - 1000
+description:
+ Maximum PHY supported speed in Mbits / seconds.
+
+ broken-turn-around:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY device does not correctly release
+ the turn around line low at the end of a MDIO transaction.
+
+ enet-phy-lane-swap:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates the PHY will swap the TX/RX lanes to
+ compensate for the board being designed with the lanes
+ swapped.
+
+ eee-broken-100tx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000t:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gt:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000kx:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkx4:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkr:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ phy-is-integrated:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+ If set, indicates that the PHY is integrated into the same
+ physical package as the Ethernet MAC. If needed, muxers
+ should be configured to ensure the integrated PHY is
+ used. The absence of this property indicates the muxers
+ should be configured so that the external PHY is used.
+
+ resets:
+maxItems: 1
+
+ reset-names:
+const: phy
+
+ reset-gpios:
+description:
+ The GPIO phandle and specifier for the PHY reset signal.
+
+ reset-assert-us:
+description:
+ Delay after the reset was asserted in microseconds. If this
+ property is missing the delay will be skipped.
+
+ reset-deassert-us:
+description:
+ Delay after the reset was deasserted in microseconds. If
+ this property is missing the delay will be skipped.
+
+required:
+ - reg
+ - interrupts
+
+examples:
+ - |
+ethernet {
+#address-cells = <1>;
+#size-cells = <0>;
+
+ethernet-phy@0 {
+compatible = "ethernet-phy-id0141.0e90",
"ethernet-phy-ieee802.3-c22";
+interrupt-parent = <&PIC>;
+interrupts = &
Re: NVMEM address DT post processing [Was: Re: [PATCH net 0/3] add property "nvmem_macaddr_swap" to swap macaddr bytes order]
On Sat, May 11, 2019 at 04:44:44PM +0200, Petr Štetiar wrote:
> So something like this?
>
> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.txt
> b/Documentation/devicetree/bindings/nvmem/nvmem.txt
> index fd06c09b822b..d781e47b049d 100644
> --- a/Documentation/devicetree/bindings/nvmem/nvmem.txt
> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.txt
> @@ -1,12 +1,14 @@
> = NVMEM(Non Volatile Memory) Data Device Tree Bindings =
>
> This binding is intended to represent the location of hardware
> -configuration data stored in NVMEMs like eeprom, efuses and so on.
> +configuration data stored in NVMEMs like eeprom, efuses and so on. This
> +binding provides some basic transformation of the stored data as well.
>
> On a significant proportion of boards, the manufacturer has stored
> some data on NVMEM, for the OS to be able to retrieve these information
> and act upon it. Obviously, the OS has to know about where to retrieve
> -these data from, and where they are stored on the storage device.
> +these data from, where they are stored on the storage device and how to
> +postprocess them.
>
> This document is here to document this.
>
> @@ -29,6 +31,19 @@ Optional properties:
> bits: Is pair of bit location and number of bits, which specifies offset
> in bit and number of bits within the address range specified by reg
> property.
> Offset takes values from 0-7.
> +byte-indices: array, encoded as an arbitrary number of (offset, length)
> pairs,
> +within the address range specified by reg property. Each pair is
> +then processed with byte-transform in order to produce single u8
> +sized byte.
> +byte-transform: string, specifies the transformation which should be applied
> + to every byte-indices pair in order to produce usable u8 sized
> byte,
> + possible values are "none", "ascii" and "bcd". Default is
> "none".
> +byte-adjust: number, value by which should be adjusted resulting output byte
> at
> + byte-adjust-at offset.
> +byte-adjust-at: number, specifies offset of resulting output byte which
> should be
> + adjusted by byte-adjust value, default is 0.
> +byte-result-swap: boolean, specifies if the resulting output bytes should be
> +swapped prior to return
>
> For example:
>
> @@ -59,6 +74,36 @@ For example:
> ...
> };
>
> +Another example where we've MAC address for eth1 stored in the NOR EEPROM as
> +following sequence of bytes (output of hexdump -C /dev/mtdX):
> +
> + 0180 66 61 63 5f 6d 61 63 20 3d 20 44 34 3a 45 45 3a |fac_mac =
> D4:EE:|
> + 0190 30 37 3a 33 33 3a 36 43 3a 32 30 0a 42 44 49 4e
> |07:33:6C:20.BDIN|
> +
> +Which means, that MAC address is stored in EEPROM as D4:EE:07:33:6C:20, so
> +ASCII delimited by colons, but we can't use this MAC address directly as
> +there's only one MAC address stored in the EEPROM and we need to increment
> last
> +octet/byte in this address in order to get usable MAC address for eth1
> device.
> +
> + eth1_addr: eth-mac-addr@18a {
> + reg = <0x18a 0x11>;
> + byte-indices = < 0 2
> + 3 2
> + 6 2
> + 9 2
> + 12 2
> + 15 2>;
> + byte-transform = "ascii";
> + byte-increment = <1>;
> + byte-increment-at = <5>;
> + byte-result-swap;
> + };
> +
> + ð1 {
> + nvmem-cells = <ð1_addr>;
> + nvmem-cell-names = "mac-address";
> + };
> +
Something along those lines yes. I'm not sure why in your example the
cell doesn't start at the mac address itself, instead of starting at
the key + having to specify an offset though. The reg property is the
offset already.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Re: [PATCH net 0/3] add property "nvmem_macaddr_swap" to swap macaddr bytes order
On Fri, May 10, 2019 at 01:28:22PM +0200, Petr Štetiar wrote:
> Andy Duan [2019-05-10 08:23:58]:
>
> Hi Andy,
>
> you've probably forget to Cc some maintainers and mailing lists, so I'm
> adding them now to the Cc loop. This patch series should be posted against
> net-next tree as per netdev FAQ[0], but you've to wait little bit as
> net-next is currently closed for the new submissions and you would need to
> resend it anyway.
>
> 0. https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html
>
> > ethernet controller driver call .of_get_mac_address() to get
> > the mac address from devictree tree, if these properties are
> > not present, then try to read from nvmem. i.MX6x/7D/8MQ/8MM
> > platforms ethernet MAC address read from nvmem ocotp eFuses,
> > but it requires to swap the six bytes order.
>
> Thanks for bringing up this topic, as I would like to extend the
> functionality as well, but I'm still unsure how to tackle this and where,
> so I'll (ab)use this opportunity to bring other use cases I would like to
> cover in the future, so we could better understand the needs.
>
> This reverse byte order format/layout is one of a few other storage formats
> currently used by vendors, some other (creative) vendors are currently
> providing MAC addresses in NVMEMs as ASCII text in following two formats
> (hexdump -C /dev/mtdX):
>
> a) 0090FEC9CBE5 - MAC address stored as ASCII without colon between octets
>
> 0090 57 2e 4c 41 4e 2e 4d 41 43 2e 41 64 64 72 65 73
> |W.LAN.MAC.Addres|
> 00a0 73 3d 30 30 39 30 46 45 43 39 43 42 45 35 00 48
> |s=0090FEC9CBE5.H|
> 00b0 57 2e 4c 41 4e 2e 32 47 2e 30 2e 4d 41 43 2e 41
> |W.LAN.2G.0.MAC.A|
>
> (From https://github.com/openwrt/openwrt/pull/1448#issuecomment-442476695)
>
> b) D4:EE:07:33:6C:20 - MAC address stored as ASCII with colon between octets
>
> 0180 66 61 63 5f 6d 61 63 20 3d 20 44 34 3a 45 45 3a |fac_mac =
> D4:EE:|
> 0190 30 37 3a 33 33 3a 36 43 3a 32 30 0a 42 44 49 4e
> |07:33:6C:20.BDIN|
>
> (From https://github.com/openwrt/openwrt/pull/1906#issuecomment-483881911)
>
> > The patch set is to add property "nvmem_macaddr_swap" to swap
> > macaddr bytes order.
>
> so it would allow following DT construct (simplified):
>
> ð0 {
> nvmem-cells = <ð0_addr>;
> nvmem-cell-names = "mac-address";
> nvmem_macaddr_swap;
> };
>
> I'm not sure about the `nvmem_macaddr_swap` property name, as currently there
> are no other properties with underscores, so it should be probably named as
> `nvmem-macaddr-swap`. DT specs permits use of the underscores, but the
> estabilished convention is probably prefered.
>
> In order to cover all above mentioned use cases, it would make more sense
> to add a description of the MAC address layout to the DT and use this
> information to properly postprocess the NVMEM content into usable MAC
> address?
>
> Something like this?
>
> - nvmem-cells: phandle, reference to an nvmem node for the MAC address
> - nvmem-cell-names: string, should be "mac-address" if nvmem is to be used
> - nvmem-mac-address-layout: string, specifies MAC address storage layout.
>Supported values are: "binary", "binary-swapped", "ascii",
> "ascii-delimited".
>"binary" is the default.
>
> Or perhaps something like this?
>
> - nvmem-cells: phandle, reference to an nvmem node for the MAC address
> - nvmem-cell-names: string, should be any of the supported values.
>Supported values are: "mac-address", "mac-address-swapped",
>"mac-address-ascii", "mac-address-ascii-delimited".
>
> I'm more inclined towards the first proposed solution, as I would like to
> propose MAC address octet incrementation feature in the future, so it would
> become:
>
> - nvmem-cells: phandle, reference to an nvmem node for the MAC address
> - nvmem-cell-names: string, should be "mac-address" if nvmem is to be used
> - nvmem-mac-address-layout: string, specifies MAC address storage layout.
>Supported values are: "binary", "binary-swapped", "ascii",
> "ascii-delimited".
>"binary" is the default.
> - nvmem-mac-address-increment: number, value by which should be
>incremented MAC address octet, could be negative value as well.
> - nvmem-mac-address-increment-octet: number, valid values 0-5, default is 5.
>Specifies MAC address octet used for `nvmem-mac-address-increment`.
>
> What do you think?
It looks to me that it should be abstracted away by the nvmem
interface and done at the provider level, not the customer.
Maxime
--
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Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH] of_net: add mtd-mac-address support to of_get_mac_address()
On Wed, Apr 17, 2019 at 06:06:00PM +0200, Petr Štetiar wrote: > Maxime Ripard [2019-04-17 10:06:14]: > > > NVMEM is supported by of_net already > > Well, not anymore: > > commit afa64a72b862a7a9d04f8d07fba632eaf06b23f8 > Author: Bartosz Golaszewski > Date: Fri Nov 30 09:20:59 2018 +0100 > > of: net: kill of_get_nvmem_mac_address() > > Now, I'm really confused. > > Documentation/devicetree/bindings/net/ethernet.txt states following: > > - nvmem-cells: phandle, reference to an nvmem node for the MAC address; > - nvmem-cell-names: string, should be "mac-address" if nvmem is to be used; > > which is actually misleading and confusing. There are only two ethernet > drivers in the tree cadence and davinci which support this properties. Well > there's nixge, but this one is special, because it has renamed `mac-address` > to `address` with it's own implementation in `nixge_get_nvmem_address`. > > All other ethernet drivers (and few others) simply use `of_get_mac_address` > which doesn't support NVMEM and the documented nvmem-cells* properties. > > > so it doesn't look really necessary to create additional properties that > > cover the same use case. > > NVMEM could be reused for this purpose and it seems like a way to go, probably > if we could wire `nvmem_get_mac_address` into `of_get_mac_address` and find a > way how to handle the remaining use cases currently not handled in NVMEM: > > * MAC address (octet/byte) incrementation (already handled by the proposed > patch) > * MAC address stored as ascii/text (0090FEC9CBE4 and 00:90:FE:C9:CB:E4 >formats) which is currently missing but would be nice to have > > I can prepare patches for that, just don't want to waste more time then really > necessary, so it would really help me if someone could tell me how this should > be implemented in NVMEM and I'll simply do it in this acceptable way and call > it a day. Just send whatever you have in mind with the nvmem developpers as recepients. They are not in this thread, so I'm not sure we can point you in the direction they want Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH] of_net: add mtd-mac-address support to of_get_mac_address()
On Wed, Apr 17, 2019 at 11:49:21AM +0200, Petr Štetiar wrote: > Maxime Ripard [2019-04-17 10:06:14]: > > Hi Maxime, > > > On Tue, Apr 16, 2019 at 10:05:00PM +0200, Petr Štetiar wrote: > > > From: John Crispin > > > > > > Many embedded devices have information such as MAC addresses stored > > > inside MTD devices. This patch allows us to add a property inside a node > > > describing a network interface. The new property points at a MTD > > > partition with an offset where the MAC address can be found. > > > > > > This patch has originated in OpenWrt some time ago, so in order to > > > consider usefulness of this patch, here are some real-world numbers > > > which hopefully speak for themselves: > > > > > > * mtd-mac-addressused 497 times in 357 device tree files > > > * mtd-mac-address-increment used 74 times in 58 device tree files > > > * mtd-mac-address-increment-byte used 1 time in 1 device tree file > > > > NVMEM is supported by of_net already and there's an MTD-to-nvmem > > bridge already, so it doesn't look really necessary to create > > additional properties that cover the same use case. > > if those use cases could be handled with NVMEM, then I'm all in. As I can't > find any example in some device tree file in the kernel tree yet and the > documentation isn't clear to me about this topic either, could you please help > me and provide me with some NVMEM based example for the following simplified > use case? Or what do I need to bend/patch in order to support this within > NVME. https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/nvmem/nvmem.txt and https://elixir.bootlin.com/linux/latest/source/net/ethernet/eth.c#L564 Should get you started Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH] of_net: add mtd-mac-address support to of_get_mac_address()
On Tue, Apr 16, 2019 at 10:05:00PM +0200, Petr Štetiar wrote: > From: John Crispin > > Many embedded devices have information such as MAC addresses stored > inside MTD devices. This patch allows us to add a property inside a node > describing a network interface. The new property points at a MTD > partition with an offset where the MAC address can be found. > > This patch has originated in OpenWrt some time ago, so in order to > consider usefulness of this patch, here are some real-world numbers > which hopefully speak for themselves: > > * mtd-mac-addressused 497 times in 357 device tree files > * mtd-mac-address-increment used 74 times in 58 device tree files > * mtd-mac-address-increment-byte used 1 time in 1 device tree file > > Signed-off-by: John Crispin > Signed-off-by: Felix Fietkau > [cleanup of the patch for upstream submission] > Signed-off-by: Petr Štetiar NVMEM is supported by of_net already and there's an MTD-to-nvmem bridge already, so it doesn't look really necessary to create additional properties that cover the same use case. (or at least, you should explain why nvmem doesn't work there) Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH] net: stmmac: Variable "val" in function sun8i_dwmac_set_syscon() could be uninitialized
On Thu, Feb 07, 2019 at 09:46:23AM -0800, Yizhuo wrote: > In function sun8i_dwmac_set_syscon(), local variable "val" could > be uninitialized if function regmap_read() returns -EINVAL. > However, it will be used directly in the if statement, which > is potentially unsafe. > > Signed-off-by: Yizhuo Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH] net: stmmac: Variable "val" in function sun8i_dwmac_set_syscon() could be uninitialized
On Wed, Feb 06, 2019 at 09:53:16PM -0800, Yizhuo Zhai wrote:
>
>
> On Wed, Feb 6, 2019 at 9:52 PM Yizhuo Zhai wrote:
> >
> > Thanks, but why initialization matters here? Is performance the main
> > concern?
> >
> > On Wed, Feb 6, 2019 at 8:17 PM David Miller wrote:
> >>
> >> From: Yizhuo
> >> Date: Tue, 5 Feb 2019 14:15:59 -0800
> >>
> >> > @@ -639,9 +639,14 @@ static int sun8i_dwmac_set_syscon(struct
> >> > stmmac_priv *priv)
> >> > struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> >> > struct device_node *node = priv->device->of_node;
> >> > int ret;
> >> > - u32 reg, val;
> >> > + u32 reg, val = 0;
> >> > +
> >> > + ret = regmap_read(gmac->regmap, SYSCON_EMAC_REG, &val);
> >> > + if (ret) {
> >> > + dev_err(priv->device, "Fail to read SYSCON_EMAC_REG.\n");
> >> > + return ret;
> >> > + }
> >>
> >> I agree with the other reviewer that since you check 'ret' the
> >> initialization of
> >> 'val' is no longer needed.
>
> Thanks, but why initialization matters here? Is performance the main
> concern?
Not really, but if we turn this the other way around, why should we do
something that doesn't bring anything?
Maxime
--
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Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH] net: stmmac: Variable "val" in function sun8i_dwmac_set_syscon() could be uninitialized
Hi, On Tue, Feb 05, 2019 at 02:15:59PM -0800, Yizhuo wrote: > In function sun8i_dwmac_set_syscon(), local variable "val" could > be uninitialized if function regmap_read() returns -EINVAL. > However, it will be used directly in the if statement, which > is potentially unsafe. > > Signed-off-by: Yizhuo > --- > drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 9 +++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > index 39c2122a4f26..11d481c9e7ab 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > @@ -639,9 +639,14 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv > *priv) > struct sunxi_priv_data *gmac = priv->plat->bsp_priv; > struct device_node *node = priv->device->of_node; > int ret; > - u32 reg, val; > + u32 reg, val = 0; I guess we don't need to initialize it anymore with the check you add? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [RFC net-next 4/5] net: phy: Fixup GPLv2 SPDX tags based on license text
On Tue, Jan 15, 2019 at 05:27:13PM +0100, Andrew Lunn wrote: > A few PHY drivers have the GPLv2 license text. They then either have > a MODULE_LICENSE() of GPLv2+, or an SPDX tag of GPLv2+. > > Since the license text is much easier to understand than either the > SPDX tag or the MODULE_LICENSE, use it as the definitive source of the > licence, and fixup with others when there are contradictions. > > Cc: Russell King > Cc: Maxime Ripard > Cc: Jonas Jensen > Cc: Laurent Pinchart > Cc: Paulius Zaleckas > Cc: Scott Wood > Cc: Andrew F. Davis > Cc: Dan Murphy > Signed-off-by: Andrew Lunn > --- > drivers/net/phy/dp83822.c | 12 ++-- > drivers/net/phy/dp83848.c | 12 ++-- > drivers/net/phy/dp83867.c | 12 ++-- > drivers/net/phy/mdio-bitbang.c | 7 ++- > drivers/net/phy/mdio-gpio.c| 7 ++- > drivers/net/phy/mdio-moxart.c | 7 ++- > drivers/net/phy/mdio-sun4i.c | 7 ++----- for mdio-sun4i Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH v3 0/5] phy: core: rework phy_set_mode to accept phy mode and submode
Hi Grygorii, Kishon, On Mon, Nov 19, 2018 at 07:24:19PM -0600, Grygorii Strashko wrote: > Thank you for your review. > I've not added "Tested-by"/"Acked-by" tags due to code changes in v3. > > As was discussed in [1] I'm posting series which introduces rework of > phy_set_mode to accept phy mode and submode. I've dropped TI specific patches > as > this change is pretty big by itself. > > Patch 1 is cumulative change which refactors PHY framework code to > support dual level PHYs mode configuration - PHY mode and PHY submode. It > extends .set_mode() callback to support additional parameter "int submode" > and converts all corresponding PHY drivers to support new .set_mode() > callback declaration. > The new extended PHY API > int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) > is introduced to support dual level PHYs mode configuration and existing > phy_set_mode() API is converted to macros, so PHY framework consumers do > not need to be changed (~21 matches). > > Patches 2-4: Add new PHY's mode to be used by Ethernet PHY interface drivers > or > multipurpose PHYs like serdes and convert ocelot-serdes and mvebu-cp110-comphy > PHY drivers to use recently introduced PHY_MODE_ETHERNET and > phy_set_mode_ext(). > > Patch 5 - removes unused, ethernet specific phy modes from enum phy_mode. > > Testing: > - series tested on TI am335x/am437x/am5(dra7) paltforms. > - other driver build tested. I realise I'm a bit late to the party, but while working on the D-PHY support, I noticed a few things that could be improved. I guess the main issue is that the sub-mode is completely opaque to the generic phy framework now. This might not be a big issue, and I assume that it has been done that way because the net framework already has a define for the submode it wants. However, this creates a bunch of drawbacks at the phy framework level: - phy_set_mode will now pass a submode of 0, all the time. This means that the behaviour is undefined for all the modes not using the submodes at the moment, and phy_interface_t seems to have the value PHY_INTERFACE_MODE_NA matching 0, but I guess this could change in the future (or the guarantee is not documented anywhere). - on a similar note, there's no documentation for which value to pass to phy_set_mode_ext when used with something else than a PHY_MODE_ETHERNET. - at the provider level, if you're supporting a phy that isn't using the submodes, you have no way to filter out or reject any subnode, since you have no idea what the "no submode" value is. I guess this can be addressed by: A) defining a generic phy framework wide unused / invalid phy submode, that wouldn't collide with the subnode values (such as -1?), and making phy_set_mode_ext use that. B) moving the phy submodes definition to the generic phy headers. This would allow to have a documented, obvious link between a mode and its subnodes, for all the actors involved (consumer, provider, and framework) without prior knowledge. C) Document what the submodes expectations are What do you think? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH net-next v2 15/15] arm64: dts: allwinner: a64: add SRAM controller device tree node
Hi,
On Tue, May 15, 2018 at 11:47:16PM -0700, Chen-Yu Tsai wrote:
> On Mon, May 14, 2018 at 1:03 AM, Maxime Ripard
> wrote:
> > 1;5201;0c
> > On Sun, May 13, 2018 at 12:37:49PM -0700, Chen-Yu Tsai wrote:
> >> On Wed, May 2, 2018 at 4:54 AM, Maxime Ripard
> >> wrote:
> >> > On Wed, May 02, 2018 at 06:19:51PM +0800, Icenowy Zheng wrote:
> >> >>
> >> >>
> >> >> 于 2018年5月2日 GMT+08:00 下午5:53:21, Chen-Yu Tsai 写到:
> >> >> >On Wed, May 2, 2018 at 5:51 PM, Maxime Ripard
> >> >> > wrote:
> >> >> >> Hi,
> >> >> >>
> >> >> >> On Wed, May 02, 2018 at 12:12:27AM +0800, Chen-Yu Tsai wrote:
> >> >> >>> From: Icenowy Zheng
> >> >> >>>
> >> >> >>> Allwinner A64 has a SRAM controller, and in the device tree
> >> >> >currently
> >> >> >>> we have a syscon node to enable EMAC driver to access the EMAC clock
> >> >> >>> register. As SRAM controller driver can now export regmap for this
> >> >> >>> register, replace the syscon node to the SRAM controller device
> >> >> >node,
> >> >> >>> and let EMAC driver to acquire its EMAC clock regmap.
> >> >> >>>
> >> >> >>> Signed-off-by: Icenowy Zheng
> >> >> >>> Signed-off-by: Chen-Yu Tsai
> >> >> >>> ---
> >> >> >>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23
> >> >> >+++
> >> >> >>> 1 file changed, 19 insertions(+), 4 deletions(-)
> >> >> >>>
> >> >> >>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >> >>> index 1b2ef28c42bd..1c37659d9d41 100644
> >> >> >>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >> >>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >> >>> @@ -168,10 +168,25 @@
> >> >> >>> #size-cells = <1>;
> >> >> >>> ranges;
> >> >> >>>
> >> >> >>> - syscon: syscon@1c0 {
> >> >> >>> - compatible =
> >> >> >"allwinner,sun50i-a64-system-controller",
> >> >> >>> - "syscon";
> >> >> >>> + sram_controller: sram-controller@1c0 {
> >> >> >>> + compatible =
> >> >> >"allwinner,sun50i-a64-sram-controller";
> >> >> >>
> >> >> >> I don't think there's anything preventing us from keeping the
> >> >> >> -system-controller compatible. It's what was in the DT before, and
> >> >> >> it's how it's called in the datasheet.
> >> >> >
> >> >> >I actually meant to ask you about this. The -system-controller
> >> >> >compatible matches the datasheet better. Maybe we should just
> >> >> >switch to that one?
> >> >>
> >> >> No, if we do the switch the system-controller compatible,
> >> >> the device will be probed on the same memory region with
> >> >> a syscon on old DTs.
> >> >
> >> > The device hasn't magically changed either. Maybe we just need to add
> >> > a check to make sure we don't have the syscon compatible in the SRAM
> >> > driver probe so that the double driver issue doesn't happen?
> >>
> >> The syscon interface (which is not even a full blown device driver)
> >> only looks at the "syscon" compatible. Either way we're removing that
> >> part from the device tree so things should be ok for new device trees.
> >> As Maxime mentioned we can do a check for the syscon compatible and
> >> either give a warning to the user asking them to update their device
> >> tree, or not register our custom regmap, or not probe the SRAM driver.
> >> Personally I prefer the first option. The system controller block is
> >> probed before any syscon users, so we should be fine, given the dwmac
> >> driver goes the custom regmap path first.
> >>
> >> BTW, I still might end up changing the compatible. The manual uses
> >> "system control", not "system controller", which I think makes sense,
> >> since it is just a bunch of register files, kind of like the GRF
> >> (General Register Files) block found in Rockchip SoCs [1], and not an
> >> actual "controller".
> >
> > I'm not really fond of that, but we should at least make it consistent
> > on the other patches Paul sent then.
>
> For the A10s / A13 right?
And A33, yep.
> I think my naming is slightly better, but it's just a minor detail.
Let's do this then.
> While we're still debating this, can I merge the R40 stuff first?
> The driver bits are already in.
Yep, go ahead.
Maxime
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Re: [PATCH net-next v2 15/15] arm64: dts: allwinner: a64: add SRAM controller device tree node
1;5201;0c
On Sun, May 13, 2018 at 12:37:49PM -0700, Chen-Yu Tsai wrote:
> On Wed, May 2, 2018 at 4:54 AM, Maxime Ripard
> wrote:
> > On Wed, May 02, 2018 at 06:19:51PM +0800, Icenowy Zheng wrote:
> >>
> >>
> >> 于 2018年5月2日 GMT+08:00 下午5:53:21, Chen-Yu Tsai 写到:
> >> >On Wed, May 2, 2018 at 5:51 PM, Maxime Ripard
> >> > wrote:
> >> >> Hi,
> >> >>
> >> >> On Wed, May 02, 2018 at 12:12:27AM +0800, Chen-Yu Tsai wrote:
> >> >>> From: Icenowy Zheng
> >> >>>
> >> >>> Allwinner A64 has a SRAM controller, and in the device tree
> >> >currently
> >> >>> we have a syscon node to enable EMAC driver to access the EMAC clock
> >> >>> register. As SRAM controller driver can now export regmap for this
> >> >>> register, replace the syscon node to the SRAM controller device
> >> >node,
> >> >>> and let EMAC driver to acquire its EMAC clock regmap.
> >> >>>
> >> >>> Signed-off-by: Icenowy Zheng
> >> >>> Signed-off-by: Chen-Yu Tsai
> >> >>> ---
> >> >>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23
> >> >+++
> >> >>> 1 file changed, 19 insertions(+), 4 deletions(-)
> >> >>>
> >> >>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >>> index 1b2ef28c42bd..1c37659d9d41 100644
> >> >>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> >>> @@ -168,10 +168,25 @@
> >> >>> #size-cells = <1>;
> >> >>> ranges;
> >> >>>
> >> >>> - syscon: syscon@1c0 {
> >> >>> - compatible =
> >> >"allwinner,sun50i-a64-system-controller",
> >> >>> - "syscon";
> >> >>> + sram_controller: sram-controller@1c0 {
> >> >>> + compatible =
> >> >"allwinner,sun50i-a64-sram-controller";
> >> >>
> >> >> I don't think there's anything preventing us from keeping the
> >> >> -system-controller compatible. It's what was in the DT before, and
> >> >> it's how it's called in the datasheet.
> >> >
> >> >I actually meant to ask you about this. The -system-controller
> >> >compatible matches the datasheet better. Maybe we should just
> >> >switch to that one?
> >>
> >> No, if we do the switch the system-controller compatible,
> >> the device will be probed on the same memory region with
> >> a syscon on old DTs.
> >
> > The device hasn't magically changed either. Maybe we just need to add
> > a check to make sure we don't have the syscon compatible in the SRAM
> > driver probe so that the double driver issue doesn't happen?
>
> The syscon interface (which is not even a full blown device driver)
> only looks at the "syscon" compatible. Either way we're removing that
> part from the device tree so things should be ok for new device trees.
> As Maxime mentioned we can do a check for the syscon compatible and
> either give a warning to the user asking them to update their device
> tree, or not register our custom regmap, or not probe the SRAM driver.
> Personally I prefer the first option. The system controller block is
> probed before any syscon users, so we should be fine, given the dwmac
> driver goes the custom regmap path first.
>
> BTW, I still might end up changing the compatible. The manual uses
> "system control", not "system controller", which I think makes sense,
> since it is just a bunch of register files, kind of like the GRF
> (General Register Files) block found in Rockchip SoCs [1], and not an
> actual "controller".
I'm not really fond of that, but we should at least make it consistent
on the other patches Paul sent then.
Maxime
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Embedded Linux and Kernel engineering
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Re: [PATCH RESEND net-next v2 1/8] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions
On Sun, May 13, 2018 at 09:59:22PM -0700, Chen-Yu Tsai wrote: > On Sun, May 13, 2018 at 1:29 PM, Andrew Lunn wrote: > > On Sun, May 13, 2018 at 01:11:08PM -0700, Chen-Yu Tsai wrote: > >> On Sun, May 13, 2018 at 1:05 PM, Andrew Lunn wrote: > >> >> > Hi Chen-Yu > >> >> > > >> >> > Are these delays the MAC applies? Not the PHY. It would be good to > >> >> > make it clear here these are MAC imposed delays. > >> >> > >> >> Yes these are applied on the MAC side. Being described in the device > >> >> tree bindings for the MAC, I thought this was implied to be the case? > >> >> Are there known exceptions? > >> > > >> > There is frequent confusion with this. Most of the time, the PHY does > >> > the delay, not the MAC, based on the phy-mode. So the MAC doing it is > >> > an exception in itself. > >> > > >> > Do you actually need these delays for the board you adding support > >> > for? Does the PHY not support adding the needed delays? If you don't > >> > need the delays, i would not even implement them. > >> > >> Yes this is already used on the Bananapi M3. This patch merely reformats > >> the description and adds a note saying this only applies to RGMII mode. > > > > Yes, the current code is needed for the Bananapi M3. But you have > > another patch which extends the code to support a smaller range. Do > > you have a board which actually needs this? If not, i would not add > > that new code. > > IIRC the delay on the PHY side is either 2ns or none. The delay on the > MAC side here is an order smaller, likely fine tuning to cope with board > design deficiencies. > > Currently no other board requires this, but this is already part of the > binding. The new stuff limits the range for a specific SoC, simply because > that is the range supported by the control register. Not implementing, i.e. > supporting the whole range from the property, which might get truncated, > doesn't make much sense to me. With that driver we don't, but the previous design had the same feature and it was used on more boards. It was simply initialized statically in U-Boot, and not in Linux through the DT like it is done here. Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH net-next v2 00/15] ARM: sun8i: r40: Add Ethernet support
On Thu, May 03, 2018 at 02:40:42PM -0400, David Miller wrote: > From: Maxime Ripard > Date: Thu, 3 May 2018 15:12:57 +0200 > > > Hi Dave, > > > > On Wed, May 02, 2018 at 11:06:17AM -0400, David Miller wrote: > >> From: Chen-Yu Tsai > >> Date: Wed, 2 May 2018 00:33:45 +0800 > >> > >> > I should've mentioned that patches 3 ~ 10, and only these, should go > >> > through net-next. sunxi will handle the remaining clk, device tree, and > >> > soc driver patches. > >> > >> Ok, I just noticed this. > >> > >> Why don't you just post those patches separately as a series on their > >> own then, in order to avoid confusion? > >> > >> Then you can adjust the patch series header posting to explain the > >> non-net-next changes, where they got merged, and what they provide > >> in order to faciliate the net-next changes. > > > > I now that we usually have some feedback from non-net maintainers that > > they actually prefer seeing the full picture (and I also tend to > > prefer that as well) and having all the patches relevant to enable a > > particular feature, even if it means getting multiple maintainers > > involved. > > > > Just to make sure we understood you fully, do you want Chen-Yu to > > resend his serie following your comments, or was that just a general > > remark for next time? > > Yeah, good questions. > > I think it can be argued either way. For review having the complete > context is important. > > But from a maintainer's standpoint, when there is any ambiguity > whatsoever about what patches go into this tree or that, it is really > frowned upon and is quite error prone. > > Also, that header posting is _SO_ important. It explains the series. > But for these 'partial apply' situations the header posting refers > to patches not in the series. > > This looks terrible in the logs, when, as I do, the header posting > text is added to a marge commit for the series. People will read it > and say "where are all of these other changes mentioned in the text? > was this series misapplied?" > > That's why, maybe after the review is successful, I want the actual > patch series standalone with appropriately updated header posting > text. Ok, thanks for the explanation, that makes sense :) Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH net-next v2 00/15] ARM: sun8i: r40: Add Ethernet support
Hi Dave, On Wed, May 02, 2018 at 11:06:17AM -0400, David Miller wrote: > From: Chen-Yu Tsai > Date: Wed, 2 May 2018 00:33:45 +0800 > > > I should've mentioned that patches 3 ~ 10, and only these, should go > > through net-next. sunxi will handle the remaining clk, device tree, and > > soc driver patches. > > Ok, I just noticed this. > > Why don't you just post those patches separately as a series on their > own then, in order to avoid confusion? > > Then you can adjust the patch series header posting to explain the > non-net-next changes, where they got merged, and what they provide > in order to faciliate the net-next changes. I now that we usually have some feedback from non-net maintainers that they actually prefer seeing the full picture (and I also tend to prefer that as well) and having all the patches relevant to enable a particular feature, even if it means getting multiple maintainers involved. Just to make sure we understood you fully, do you want Chen-Yu to resend his serie following your comments, or was that just a general remark for next time? Thanks! Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature
Re: [PATCH net-next v2 15/15] arm64: dts: allwinner: a64: add SRAM controller device tree node
On Wed, May 02, 2018 at 06:19:51PM +0800, Icenowy Zheng wrote:
>
>
> 于 2018年5月2日 GMT+08:00 下午5:53:21, Chen-Yu Tsai 写到:
> >On Wed, May 2, 2018 at 5:51 PM, Maxime Ripard
> > wrote:
> >> Hi,
> >>
> >> On Wed, May 02, 2018 at 12:12:27AM +0800, Chen-Yu Tsai wrote:
> >>> From: Icenowy Zheng
> >>>
> >>> Allwinner A64 has a SRAM controller, and in the device tree
> >currently
> >>> we have a syscon node to enable EMAC driver to access the EMAC clock
> >>> register. As SRAM controller driver can now export regmap for this
> >>> register, replace the syscon node to the SRAM controller device
> >node,
> >>> and let EMAC driver to acquire its EMAC clock regmap.
> >>>
> >>> Signed-off-by: Icenowy Zheng
> >>> Signed-off-by: Chen-Yu Tsai
> >>> ---
> >>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23
> >+++
> >>> 1 file changed, 19 insertions(+), 4 deletions(-)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >>> index 1b2ef28c42bd..1c37659d9d41 100644
> >>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >>> @@ -168,10 +168,25 @@
> >>> #size-cells = <1>;
> >>> ranges;
> >>>
> >>> - syscon: syscon@1c0 {
> >>> - compatible =
> >"allwinner,sun50i-a64-system-controller",
> >>> - "syscon";
> >>> + sram_controller: sram-controller@1c0 {
> >>> + compatible =
> >"allwinner,sun50i-a64-sram-controller";
> >>
> >> I don't think there's anything preventing us from keeping the
> >> -system-controller compatible. It's what was in the DT before, and
> >> it's how it's called in the datasheet.
> >
> >I actually meant to ask you about this. The -system-controller
> >compatible matches the datasheet better. Maybe we should just
> >switch to that one?
>
> No, if we do the switch the system-controller compatible,
> the device will be probed on the same memory region with
> a syscon on old DTs.
The device hasn't magically changed either. Maybe we just need to add
a check to make sure we don't have the syscon compatible in the SRAM
driver probe so that the double driver issue doesn't happen?
Maxime
--
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Embedded Linux and Kernel engineering
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Re: [PATCH net-next v2 15/15] arm64: dts: allwinner: a64: add SRAM controller device tree node
Hi,
On Wed, May 02, 2018 at 12:12:27AM +0800, Chen-Yu Tsai wrote:
> From: Icenowy Zheng
>
> Allwinner A64 has a SRAM controller, and in the device tree currently
> we have a syscon node to enable EMAC driver to access the EMAC clock
> register. As SRAM controller driver can now export regmap for this
> register, replace the syscon node to the SRAM controller device node,
> and let EMAC driver to acquire its EMAC clock regmap.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++
> 1 file changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 1b2ef28c42bd..1c37659d9d41 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -168,10 +168,25 @@
> #size-cells = <1>;
> ranges;
>
> - syscon: syscon@1c0 {
> - compatible = "allwinner,sun50i-a64-system-controller",
> - "syscon";
> + sram_controller: sram-controller@1c0 {
> + compatible = "allwinner,sun50i-a64-sram-controller";
I don't think there's anything preventing us from keeping the
-system-controller compatible. It's what was in the DT before, and
it's how it's called in the datasheet.
Otherwise, the whole serie looks good to me:
Acked-by: Maxime Ripard
Maxime
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Re: [linux-sunxi] Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device
On Mon, Apr 16, 2018 at 10:51:55PM +0800, Chen-Yu Tsai wrote:
> On Mon, Apr 16, 2018 at 10:31 PM, Maxime Ripard
> wrote:
> > On Thu, Apr 12, 2018 at 11:23:30PM +0800, Chen-Yu Tsai wrote:
> >> On Thu, Apr 12, 2018 at 11:11 PM, Icenowy Zheng wrote:
> >> > 于 2018年4月12日 GMT+08:00 下午10:56:28, Maxime Ripard
> >> > 写到:
> >> >>On Wed, Apr 11, 2018 at 10:16:39PM +0800, Icenowy Zheng wrote:
> >> >>> From: Chen-Yu Tsai
> >> >>>
> >> >>> On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU
> >> >>> address space; on the A64 SoC this register is in the SRAM controller
> >> >>> address space, and with a different offset.
> >> >>>
> >> >>> To access the register from another device and hide the internal
> >> >>> difference between the device, let it register a regmap named
> >> >>> "emac-clock". We can then get the device from the phandle, and
> >> >>> retrieve the regmap with dev_get_regmap(); in this situation the
> >> >>> regmap_field will be set up to access the only register in the
> >> >>regmap.
> >> >>>
> >> >>> Signed-off-by: Chen-Yu Tsai
> >> >>> [Icenowy: change to use regmaps with single register, change commit
> >> >>> message]
> >> >>> Signed-off-by: Icenowy Zheng
> >> >>> ---
> >> >>> drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 48
> >> >>++-
> >> >>> 1 file changed, 46 insertions(+), 2 deletions(-)
> >> >>>
> >> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >> >>b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >> >>> index 1037f6c78bca..b61210c0d415 100644
> >> >>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >> >>> @@ -85,6 +85,13 @@ const struct reg_field old_syscon_reg_field = {
> >> >>> .msb = 31,
> >> >>> };
> >> >>>
> >> >>> +/* Specially exported regmap which contains only EMAC register */
> >> >>> +const struct reg_field single_reg_field = {
> >> >>> +.reg = 0,
> >> >>> +.lsb = 0,
> >> >>> +.msb = 31,
> >> >>> +};
> >> >>> +
> >> >>
> >> >>I'm not sure this would be wise. If we ever need some other register
> >> >>exported through the regmap, will have to change all the calling sites
> >> >>everywhere in the kernel, which will be a pain and will break
> >> >>bisectability.
> >> >
> >> > In this situation the register can be exported as another
> >> > regmap. Currently the code will access a regmap with name
> >> > "emac-clock" for this register.
> >> >
> >> >>
> >> >>Chen-Yu's (or was it yours?) initial solution with a custom writeable
> >> >>hook only allowing a single register seemed like a better one.
> >> >
> >> > But I remember you mentioned that you want it to hide the
> >> > difference inside the device.
> >>
> >> The idea is that a device can export multiple regmaps. This one,
> >> the one named "gmac" (in my soon to come v2) or "emac-clock" here,
> >> is but one of many possible regmaps, and it only exports the register
> >> needed by the GMAC/EMAC.
> >
> > I'm not sure this would be wise either. There's a single register map,
> > and as far as I know we don't have a binding to express this in the
> > DT. This means that the customer and provider would have to use the
> > same name, but without anything actually enforcing it aside from
> > "someone in the community knows it".
> >
> > This is not a really good design, and I was actually preferring your
> > first option. We shouldn't rely on any undocumented rule. This will be
> > easy to break and hard to maintain.
>
> So, one regmap per device covering the whole register range, and the
> consumer knows which register to poke by looking at its own compatible.
>
> That sound right?
Yep. And ideally, sending a single serie for both the A64 and the R40
cases, in order to provide the big picture.
Maxime
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Re: [linux-sunxi] Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device
On Thu, Apr 12, 2018 at 11:23:30PM +0800, Chen-Yu Tsai wrote:
> On Thu, Apr 12, 2018 at 11:11 PM, Icenowy Zheng wrote:
> > 于 2018年4月12日 GMT+08:00 下午10:56:28, Maxime Ripard
> > 写到:
> >>On Wed, Apr 11, 2018 at 10:16:39PM +0800, Icenowy Zheng wrote:
> >>> From: Chen-Yu Tsai
> >>>
> >>> On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU
> >>> address space; on the A64 SoC this register is in the SRAM controller
> >>> address space, and with a different offset.
> >>>
> >>> To access the register from another device and hide the internal
> >>> difference between the device, let it register a regmap named
> >>> "emac-clock". We can then get the device from the phandle, and
> >>> retrieve the regmap with dev_get_regmap(); in this situation the
> >>> regmap_field will be set up to access the only register in the
> >>regmap.
> >>>
> >>> Signed-off-by: Chen-Yu Tsai
> >>> [Icenowy: change to use regmaps with single register, change commit
> >>> message]
> >>> Signed-off-by: Icenowy Zheng
> >>> ---
> >>> drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 48
> >>++-
> >>> 1 file changed, 46 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >>b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >>> index 1037f6c78bca..b61210c0d415 100644
> >>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> >>> @@ -85,6 +85,13 @@ const struct reg_field old_syscon_reg_field = {
> >>> .msb = 31,
> >>> };
> >>>
> >>> +/* Specially exported regmap which contains only EMAC register */
> >>> +const struct reg_field single_reg_field = {
> >>> +.reg = 0,
> >>> +.lsb = 0,
> >>> +.msb = 31,
> >>> +};
> >>> +
> >>
> >>I'm not sure this would be wise. If we ever need some other register
> >>exported through the regmap, will have to change all the calling sites
> >>everywhere in the kernel, which will be a pain and will break
> >>bisectability.
> >
> > In this situation the register can be exported as another
> > regmap. Currently the code will access a regmap with name
> > "emac-clock" for this register.
> >
> >>
> >>Chen-Yu's (or was it yours?) initial solution with a custom writeable
> >>hook only allowing a single register seemed like a better one.
> >
> > But I remember you mentioned that you want it to hide the
> > difference inside the device.
>
> The idea is that a device can export multiple regmaps. This one,
> the one named "gmac" (in my soon to come v2) or "emac-clock" here,
> is but one of many possible regmaps, and it only exports the register
> needed by the GMAC/EMAC.
I'm not sure this would be wise either. There's a single register map,
and as far as I know we don't have a binding to express this in the
DT. This means that the customer and provider would have to use the
same name, but without anything actually enforcing it aside from
"someone in the community knows it".
This is not a really good design, and I was actually preferring your
first option. We shouldn't rely on any undocumented rule. This will be
easy to break and hard to maintain.
Maxime
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Re: [PATCH 5/5] arm64: allwinner: a64: add SRAM controller device tree node
Hi,
On Wed, Apr 11, 2018 at 10:16:41PM +0800, Icenowy Zheng wrote:
> Allwinner A64 has a SRAM controller, and in the device tree currently
> we have a syscon node to enable EMAC driver to access the EMAC clock
> register. As SRAM controller driver can now export regmap for this
> register, replace the syscon node to the SRAM controller device node,
> and let EMAC driver to acquire its EMAC clock regmap.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++
> 1 file changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 1b2ef28c42bd..1c37659d9d41 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -168,10 +168,25 @@
> #size-cells = <1>;
> ranges;
>
> - syscon: syscon@1c0 {
> - compatible = "allwinner,sun50i-a64-system-controller",
> - "syscon";
> + sram_controller: sram-controller@1c0 {
> + compatible = "allwinner,sun50i-a64-sram-controller";
> reg = <0x01c0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + sram_c: sram@18000 {
> + compatible = "mmio-sram";
> + reg = <0x00018000 0x28000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x00018000 0x28000>;
> +
> + de2_sram: sram-section@0 {
> + compatible =
> "allwinner,sun50i-a64-sram-c";
> + reg = <0x 0x28000>;
> + };
> + };
That doesn't look related at all to what's being discussed here, so
you'd rather add it as part of your DE2-enablement serie (or amend
your commit log to say why this is important to do it in this patch).
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device
On Wed, Apr 11, 2018 at 10:16:39PM +0800, Icenowy Zheng wrote:
> From: Chen-Yu Tsai
>
> On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU
> address space; on the A64 SoC this register is in the SRAM controller
> address space, and with a different offset.
>
> To access the register from another device and hide the internal
> difference between the device, let it register a regmap named
> "emac-clock". We can then get the device from the phandle, and
> retrieve the regmap with dev_get_regmap(); in this situation the
> regmap_field will be set up to access the only register in the regmap.
>
> Signed-off-by: Chen-Yu Tsai
> [Icenowy: change to use regmaps with single register, change commit
> message]
> Signed-off-by: Icenowy Zheng
> ---
> drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 48
> ++-
> 1 file changed, 46 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> index 1037f6c78bca..b61210c0d415 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> @@ -85,6 +85,13 @@ const struct reg_field old_syscon_reg_field = {
> .msb = 31,
> };
>
> +/* Specially exported regmap which contains only EMAC register */
> +const struct reg_field single_reg_field = {
> + .reg = 0,
> + .lsb = 0,
> + .msb = 31,
> +};
> +
I'm not sure this would be wise. If we ever need some other register
exported through the regmap, will have to change all the calling sites
everywhere in the kernel, which will be a pain and will break
bisectability.
Chen-Yu's (or was it yours?) initial solution with a custom writeable
hook only allowing a single register seemed like a better one.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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