Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
Hi Moritz,
[auto build test ERROR on net-next/master]
[also build test ERROR on v4.12 next-20170714]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Moritz-Fischer/dt-bindings-net-Add-bindings-for-National-Instruments-XGE-netdev/20170714-125718
config: um-allyesconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=um
All errors (new ones prefixed by >>):
arch/um/drivers/built-in.o: In function `vde_open_real':
(.text+0xc9f1): warning: Using 'getgrnam' in statically linked applications
requires at runtime the shared libraries from the glibc version used for linking
arch/um/drivers/built-in.o: In function `vde_open_real':
(.text+0xc83c): warning: Using 'getpwuid' in statically linked applications
requires at runtime the shared libraries from the glibc version used for linking
arch/um/drivers/built-in.o: In function `vde_open_real':
(.text+0xcb55): warning: Using 'getaddrinfo' in statically linked
applications requires at runtime the shared libraries from the glibc version
used for linking
arch/um/drivers/built-in.o: In function `pcap_nametoaddr':
(.text+0x1d5e5): warning: Using 'gethostbyname' in statically linked
applications requires at runtime the shared libraries from the glibc version
used for linking
arch/um/drivers/built-in.o: In function `pcap_nametonetaddr':
(.text+0x1d685): warning: Using 'getnetbyname' in statically linked
applications requires at runtime the shared libraries from the glibc version
used for linking
arch/um/drivers/built-in.o: In function `pcap_nametoproto':
(.text+0x1d8a5): warning: Using 'getprotobyname' in statically linked
applications requires at runtime the shared libraries from the glibc version
used for linking
arch/um/drivers/built-in.o: In function `pcap_nametoport':
(.text+0x1d6d7): warning: Using 'getservbyname' in statically linked
applications requires at runtime the shared libraries from the glibc version
used for linking
drivers/built-in.o: In function `nixge_start_xmit':
>> include/linux/dma-mapping.h:210: undefined reference to `bad_dma_ops'
drivers/built-in.o: In function `nixge_dma_bd_release':
>> drivers/net/ethernet/ni/nixge.c:234: undefined reference to `bad_dma_ops'
drivers/built-in.o: In function `nixge_dma_bd_release':
include/linux/dma-mapping.h:504: undefined reference to `bad_dma_ops'
include/linux/dma-mapping.h:510: undefined reference to `bad_dma_ops'
include/linux/dma-mapping.h:504: undefined reference to `bad_dma_ops'
drivers/built-in.o:drivers/net/ethernet/ni/nixge.c:252: more undefined
references to `bad_dma_ops' follow
drivers/built-in.o: In function `nixge_mdio_setup':
>> drivers/net/ethernet/ni/nixge.c:1039: undefined reference to
>> `of_address_to_resource'
drivers/built-in.o: In function `nixge_probe':
>> drivers/net/ethernet/ni/nixge.c:1120: undefined reference to
>> `devm_ioremap_resource'
drivers/built-in.o: In function `img_ascii_lcd_probe':
drivers/auxdisplay/img-ascii-lcd.c:386: undefined reference to
`devm_ioremap_resource'
collect2: error: ld returned 1 exit status
vim +234 drivers/net/ethernet/ni/nixge.c
228
229 #define nixge_ctrl_poll_timeout(priv, addr, val, cond, sleep_us,
timeout_us) \
230 readl_poll_timeout((priv)->ctrl_regs + (addr), (val), cond, \
231 (sleep_us), (timeout_us))
232
233 static void nixge_dma_bd_release(struct net_device *ndev)
> 234 {
235 int i;
236 struct nixge_priv *priv = netdev_priv(ndev);
237
238 for (i = 0; i < RX_BD_NUM; i++) {
239 dma_unmap_single(ndev->dev.parent,
priv->rx_bd_v[i].phys,
240 priv->max_frm_size, DMA_FROM_DEVICE);
241 dev_kfree_skb((struct sk_buff *)
242(priv->rx_bd_v[i].sw_id_offset));
243 }
244
245 if (priv->rx_bd_v) {
246 dma_free_coherent(ndev->dev.parent,
247sizeof(*priv->rx_bd_v) * RX_BD_NUM,
248priv->rx_bd_v,
249priv->rx_bd_p);
250 }
251 if (priv->tx_bd_v) {
252 dma_free_coherent(ndev->dev.parent,
253sizeof(*priv->tx_bd_v) * TX_BD_NUM,
254priv->tx_bd_v,
255priv->tx_bd_p);
256 }
257 }
258
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
Hi Moritz,
[auto build test WARNING on net-next/master]
[also build test WARNING on v4.12 next-20170713]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Moritz-Fischer/dt-bindings-net-Add-bindings-for-National-Instruments-XGE-netdev/20170714-125718
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 6.2.0
reproduce:
wget
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=ia64
All warnings (new ones prefixed by >>):
In file included from include/linux/if_ether.h:23:0,
from include/linux/etherdevice.h:25,
from drivers/net/ethernet/ni/nixge.c:14:
drivers/net/ethernet/ni/nixge.c: In function 'nixge_dma_bd_release':
>> drivers/net/ethernet/ni/nixge.c:241:17: warning: cast to pointer from
>> integer of different size [-Wint-to-pointer-cast]
dev_kfree_skb((struct sk_buff *)
^
include/linux/skbuff.h:977:38: note: in definition of macro 'dev_kfree_skb'
#define dev_kfree_skb(a) consume_skb(a)
^
drivers/net/ethernet/ni/nixge.c: In function 'nixge_dma_bd_init':
>> drivers/net/ethernet/ni/nixge.c:299:35: warning: cast from pointer to
>> integer of different size [-Wpointer-to-int-cast]
priv->rx_bd_v[i].sw_id_offset = (u32)skb;
^
drivers/net/ethernet/ni/nixge.c: In function 'nixge_start_xmit_done':
drivers/net/ethernet/ni/nixge.c:452:22: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
^
drivers/net/ethernet/ni/nixge.c: In function 'nixge_recv':
drivers/net/ethernet/ni/nixge.c:546:9: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
skb = (struct sk_buff *)(cur_p->sw_id_offset);
^
drivers/net/ethernet/ni/nixge.c:577:25: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]
cur_p->sw_id_offset = (u32)new_skb;
^
drivers/net/ethernet/ni/nixge.c: In function 'nixge_dma_err_handler':
drivers/net/ethernet/ni/nixge.c:687:22: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
^
vim +241 drivers/net/ethernet/ni/nixge.c
228
229 #define nixge_ctrl_poll_timeout(priv, addr, val, cond, sleep_us,
timeout_us) \
230 readl_poll_timeout((priv)->ctrl_regs + (addr), (val), cond, \
231 (sleep_us), (timeout_us))
232
233 static void nixge_dma_bd_release(struct net_device *ndev)
234 {
235 int i;
236 struct nixge_priv *priv = netdev_priv(ndev);
237
238 for (i = 0; i < RX_BD_NUM; i++) {
239 dma_unmap_single(ndev->dev.parent,
priv->rx_bd_v[i].phys,
240 priv->max_frm_size, DMA_FROM_DEVICE);
> 241 dev_kfree_skb((struct sk_buff *)
242(priv->rx_bd_v[i].sw_id_offset));
243 }
244
245 if (priv->rx_bd_v) {
246 dma_free_coherent(ndev->dev.parent,
247sizeof(*priv->rx_bd_v) * RX_BD_NUM,
248priv->rx_bd_v,
249priv->rx_bd_p);
250 }
251 if (priv->tx_bd_v) {
252 dma_free_coherent(ndev->dev.parent,
253sizeof(*priv->tx_bd_v) * TX_BD_NUM,
254priv->tx_bd_v,
255priv->tx_bd_p);
256 }
257 }
258
259 static int nixge_dma_bd_init(struct net_device *ndev)
260 {
261 u32 cr;
262 int i;
263 struct sk_buff *skb;
264 struct nixge_priv *priv = netdev_priv(ndev);
265
266 /* Reset the indexes which are used for accessing the BDs */
267 priv->tx_bd_ci = 0;
268 priv->tx_bd_tail = 0;
269 priv->rx_bd_ci = 0;
270
271 /* Allocate the Tx and Rx buffer descriptors. */
272 priv->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
273sizeof(*priv->tx_bd_v) *
TX_BD_NUM,
274&priv->tx_bd_p, GFP_KERNEL);
275 if (!priv->tx_bd_v)
276 goto out;
277
278 priv->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
279size
Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
Hi Andrew, On Thu, Jul 13, 2017 at 6:34 PM, Andrew Lunn wrote: >> > > + /* not sure if this is the correct way of dealing with this ... */ >> > > + ndev->phydev->supported &= ~(SUPPORTED_Autoneg); >> > > + ndev->phydev->advertising = ndev->phydev->supported; >> > > + ndev->phydev->autoneg = AUTONEG_DISABLE; >> > >> > What are you trying to achieve? >> >> Basically can't do Autoneg, I'll need to take a closer look. > > Hi Moritz > > What i actually think you mean, is it can only do 1Gbps. So you could > autoneg, but only advertise 1Gbps. Look at masking out > PHY_10BT_FEATURES and PHY_100BT_FEATURES. It does either 1Gbps or 10Gbps (over SFP+), depending which bitstream is loaded into the FPGA. In the current setup I could also just have two different compatible strings, since neither setup supports the other rate, but that might change. It seems getting rid of that part (the default values) now works, too. I'll need to take a closer look tomorrow (and I need to retest with 1Gbps) > > Take a look at: > > http://elixir.free-electrons.com/linux/latest/source/drivers/net/ethernet/renesas/ravb_main.c#L1045 Will do. Thanks for feedback, Moritz
Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
> > > + /* not sure if this is the correct way of dealing with this ... */ > > > + ndev->phydev->supported &= ~(SUPPORTED_Autoneg); > > > + ndev->phydev->advertising = ndev->phydev->supported; > > > + ndev->phydev->autoneg = AUTONEG_DISABLE; > > > > What are you trying to achieve? > > Basically can't do Autoneg, I'll need to take a closer look. Hi Moritz What i actually think you mean, is it can only do 1Gbps. So you could autoneg, but only advertise 1Gbps. Look at masking out PHY_10BT_FEATURES and PHY_100BT_FEATURES. Take a look at: http://elixir.free-electrons.com/linux/latest/source/drivers/net/ethernet/renesas/ravb_main.c#L1045 It might actually make sense to add a phy_set_min_speed(), a mirror to phy_set_max_speed(). Andrew
Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
Hi Andrew,
thanks for the quick response.
On Fri, Jul 14, 2017 at 12:36:36AM +0200, Andrew Lunn wrote:
> > +++ b/drivers/net/ethernet/ni/nixge.c
> > @@ -0,0 +1,1246 @@
> > +/*
> > + * Copyright (c) 2016-2017, National Instruments Corp.
> > + *
> > + * Network Driver for Ettus Research XGE MAC
> > + *
> > + * This is largely based on the Xilinx AXI Ethernet Driver,
> > + * and uses the same DMA engine in the FPGA
>
> Hi Moritz
>
> Is the DMA code the same as in the AXI driver? Should it be pulled out
> into a library and shared?
Mostly, I'll see what I can do. At least the register definitions and
common structures can be pulled out into a common header file.
>
> > +struct nixge_priv {
> > + struct net_device *ndev;
> > + struct device *dev;
> > +
> > + /* Connection to PHY device */
> > + struct phy_device *phy_dev;
> > + phy_interface_t phy_interface;
>
> > + /* protecting link parameters */
> > + spinlock_t lock;
> > + int link;
> > + int speed;
> > + int duplex;
>
> All these seem to be pointless. They are set, but never used.
Will fix.
>
> > +
> > +static inline void nixge_dma_write_reg(struct nixge_priv *priv, off_t
> > offset,
> > + u32 val)
>
> Please leave it up to the compile to inline.
Will fix.
>
> > +static void __nixge_device_reset(struct nixge_priv *priv, off_t offset)
> > +{
> > + u32 timeout;
> > + /* Reset Axi DMA. This would reset NIXGE Ethernet core as well.
> > +* The reset process of Axi DMA takes a while to complete as all
> > +* pending commands/transfers will be flushed or completed during
> > +* this reset process.
> > +*/
> > + nixge_dma_write_reg(priv, offset, XAXIDMA_CR_RESET_MASK);
> > + timeout = DELAY_OF_ONE_MILLISEC;
> > + while (nixge_dma_read_reg(priv, offset) & XAXIDMA_CR_RESET_MASK) {
> > + udelay(1);
>
> There is a link between the 1 and the value of DELAY_OF_ONE_MILLISEC.
> It would be good to try to link these two together.
D'oh ... Seems like a good candidate for iopoll ...
>
> > + if (--timeout == 0) {
> > + netdev_err(priv->ndev, "%s: DMA reset timeout!\n",
> > + __func__);
> > + break;
> > + }
> > + }
> > +}
> > +
>
> > +static void nixge_handle_link_change(struct net_device *ndev)
> > +{
> > + struct nixge_priv *priv = netdev_priv(ndev);
> > + struct phy_device *phydev = ndev->phydev;
> > + unsigned long flags;
> > + int status_change = 0;
> > +
> > + spin_lock_irqsave(&priv->lock, flags);
> > +
> > + if (phydev->link != priv->link) {
> > + if (!phydev->link) {
> > + priv->speed = 0;
> > + priv->duplex = -1;
> > + }
> > + priv->link = phydev->link;
> > +
> > + status_change = 1;
> > + }
> > +
> > + spin_unlock_irqrestore(&priv->lock, flags);
> > +
> > + if (status_change) {
> > + if (phydev->link) {
> > + netif_carrier_on(ndev);
> > + netdev_info(ndev, "link up (%d/%s)\n",
> > + phydev->speed,
> > + phydev->duplex == DUPLEX_FULL ?
> > + "Full" : "Half");
> > + } else {
> > + netif_carrier_off(ndev);
> > + netdev_info(ndev, "link down\n");
> > + }
>
> phy_print_status() should be used.
Will do.
>
> Also, the phylib will handle netif_carrier_off/on for you.
Good to know :)
>
> > +static int nixge_open(struct net_device *ndev)
> > +{
> > + struct nixge_priv *priv = netdev_priv(ndev);
> > + int ret;
> > +
> > + nixge_device_reset(ndev);
> > +
> > + /* start netif carrier down */
> > + netif_carrier_off(ndev);
> > +
> > + if (!ndev->phydev)
> > + netdev_err(ndev, "no phy, phy_start() failed\n");
>
> Not really correct. You don't call phy_start(). And phy_start() cannot
> indicate a failure, it is a void function.
Will fix.
>
> It would be a lot better to bail out if there is no phy. Probably
> during probe.
Yeah.
>
> > +static s32 __nixge_set_mac_address(struct net_device *ndev, const void
> > *addr)
> > +{
> > + struct nixge_priv *priv = netdev_priv(ndev);
> > +
> > + if (addr)
> > + memcpy(ndev->dev_addr, addr, ETH_ALEN);
> > + if (!is_valid_ether_addr(ndev->dev_addr))
> > + eth_random_addr(ndev->dev_addr);
>
> Messy. I would change this. Make addr mandatory. If it is invalid,
> return an error. That will make nixge_net_set_mac_address() do the
> right thing. When called from nixge_probe() should verify what it gets
> from the nvmem, and if it is invalid, pass a random MAC address.
Will fix.
>
> > +
> > + nixge_ctrl_write_reg(priv, NIXGE_REG_MAC_LSB,
> > +(ndev->dev_addr[2]) << 24 |
> > +(ndev->dev_addr[3] << 16) |
> > +(ndev->dev_addr[4]
Re: [PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
> +++ b/drivers/net/ethernet/ni/nixge.c
> @@ -0,0 +1,1246 @@
> +/*
> + * Copyright (c) 2016-2017, National Instruments Corp.
> + *
> + * Network Driver for Ettus Research XGE MAC
> + *
> + * This is largely based on the Xilinx AXI Ethernet Driver,
> + * and uses the same DMA engine in the FPGA
Hi Moritz
Is the DMA code the same as in the AXI driver? Should it be pulled out
into a library and shared?
> +struct nixge_priv {
> + struct net_device *ndev;
> + struct device *dev;
> +
> + /* Connection to PHY device */
> + struct phy_device *phy_dev;
> + phy_interface_t phy_interface;
> + /* protecting link parameters */
> + spinlock_t lock;
> + int link;
> + int speed;
> + int duplex;
All these seem to be pointless. They are set, but never used.
> +
> +static inline void nixge_dma_write_reg(struct nixge_priv *priv, off_t offset,
> +u32 val)
Please leave it up to the compile to inline.
> +static void __nixge_device_reset(struct nixge_priv *priv, off_t offset)
> +{
> + u32 timeout;
> + /* Reset Axi DMA. This would reset NIXGE Ethernet core as well.
> + * The reset process of Axi DMA takes a while to complete as all
> + * pending commands/transfers will be flushed or completed during
> + * this reset process.
> + */
> + nixge_dma_write_reg(priv, offset, XAXIDMA_CR_RESET_MASK);
> + timeout = DELAY_OF_ONE_MILLISEC;
> + while (nixge_dma_read_reg(priv, offset) & XAXIDMA_CR_RESET_MASK) {
> + udelay(1);
There is a link between the 1 and the value of DELAY_OF_ONE_MILLISEC.
It would be good to try to link these two together.
> + if (--timeout == 0) {
> + netdev_err(priv->ndev, "%s: DMA reset timeout!\n",
> +__func__);
> + break;
> + }
> + }
> +}
> +
> +static void nixge_handle_link_change(struct net_device *ndev)
> +{
> + struct nixge_priv *priv = netdev_priv(ndev);
> + struct phy_device *phydev = ndev->phydev;
> + unsigned long flags;
> + int status_change = 0;
> +
> + spin_lock_irqsave(&priv->lock, flags);
> +
> + if (phydev->link != priv->link) {
> + if (!phydev->link) {
> + priv->speed = 0;
> + priv->duplex = -1;
> + }
> + priv->link = phydev->link;
> +
> + status_change = 1;
> + }
> +
> + spin_unlock_irqrestore(&priv->lock, flags);
> +
> + if (status_change) {
> + if (phydev->link) {
> + netif_carrier_on(ndev);
> + netdev_info(ndev, "link up (%d/%s)\n",
> + phydev->speed,
> + phydev->duplex == DUPLEX_FULL ?
> + "Full" : "Half");
> + } else {
> + netif_carrier_off(ndev);
> + netdev_info(ndev, "link down\n");
> + }
phy_print_status() should be used.
Also, the phylib will handle netif_carrier_off/on for you.
> +static int nixge_open(struct net_device *ndev)
> +{
> + struct nixge_priv *priv = netdev_priv(ndev);
> + int ret;
> +
> + nixge_device_reset(ndev);
> +
> + /* start netif carrier down */
> + netif_carrier_off(ndev);
> +
> + if (!ndev->phydev)
> + netdev_err(ndev, "no phy, phy_start() failed\n");
Not really correct. You don't call phy_start(). And phy_start() cannot
indicate a failure, it is a void function.
It would be a lot better to bail out if there is no phy. Probably
during probe.
> +static s32 __nixge_set_mac_address(struct net_device *ndev, const void *addr)
> +{
> + struct nixge_priv *priv = netdev_priv(ndev);
> +
> + if (addr)
> + memcpy(ndev->dev_addr, addr, ETH_ALEN);
> + if (!is_valid_ether_addr(ndev->dev_addr))
> + eth_random_addr(ndev->dev_addr);
Messy. I would change this. Make addr mandatory. If it is invalid,
return an error. That will make nixge_net_set_mac_address() do the
right thing. When called from nixge_probe() should verify what it gets
from the nvmem, and if it is invalid, pass a random MAC address.
> +
> + nixge_ctrl_write_reg(priv, NIXGE_REG_MAC_LSB,
> + (ndev->dev_addr[2]) << 24 |
> + (ndev->dev_addr[3] << 16) |
> + (ndev->dev_addr[4] << 8) |
> + (ndev->dev_addr[5] << 0));
> +
> + nixge_ctrl_write_reg(priv, NIXGE_REG_MAC_MSB,
> + (ndev->dev_addr[1] | (ndev->dev_addr[0] << 8)));
> +
> + return 0;
> +}
> +
> +static void nixge_ethtools_get_drvinfo(struct net_device *ndev,
> +struct ethtool_drvinfo *ed)
> +{
> + strlcpy(ed->driver, "nixge", sizeof(ed->driver));
> + strlcpy(ed->version, "1.00a", sizeof(ed->version));
Driver version is pretty poin
[PATCH 2/2] net: ethernet: nixge: Add support for National Instruments XGE netdev
Add support for the National Instruments XGE 1/10G network device. It uses the EEPROM on the board via NVMEM. Signed-off-by: Moritz Fischer --- drivers/net/ethernet/Kconfig |1 + drivers/net/ethernet/Makefile|1 + drivers/net/ethernet/ni/Kconfig | 26 + drivers/net/ethernet/ni/Makefile |1 + drivers/net/ethernet/ni/nixge.c | 1246 ++ 5 files changed, 1275 insertions(+) create mode 100644 drivers/net/ethernet/ni/Kconfig create mode 100644 drivers/net/ethernet/ni/Makefile create mode 100644 drivers/net/ethernet/ni/nixge.c diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig index edae15ac..2021806 100644 --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig @@ -127,6 +127,7 @@ config FEALNX source "drivers/net/ethernet/natsemi/Kconfig" source "drivers/net/ethernet/netronome/Kconfig" +source "drivers/net/ethernet/ni/Kconfig" source "drivers/net/ethernet/8390/Kconfig" config NET_NETX diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile index bf7f450..68f49f7 100644 --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile @@ -58,6 +58,7 @@ obj-$(CONFIG_NET_VENDOR_MYRI) += myricom/ obj-$(CONFIG_FEALNX) += fealnx.o obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/ obj-$(CONFIG_NET_VENDOR_NETRONOME) += netronome/ +obj-$(CONFIG_NET_VENDOR_NI) += ni/ obj-$(CONFIG_NET_NETX) += netx-eth.o obj-$(CONFIG_NET_VENDOR_NUVOTON) += nuvoton/ obj-$(CONFIG_NET_VENDOR_NVIDIA) += nvidia/ diff --git a/drivers/net/ethernet/ni/Kconfig b/drivers/net/ethernet/ni/Kconfig new file mode 100644 index 000..a74ffeb --- /dev/null +++ b/drivers/net/ethernet/ni/Kconfig @@ -0,0 +1,26 @@ +# +# National Instuments network device configuration +# + +config NET_VENDOR_NI + bool "National Instruments Devices" + default y + ---help--- + If you have a network (Ethernet) device belonging to this class, say Y. + + Note that the answer to this question doesn't directly affect the + kernel: saying N will just cause the configurator to skip all + the questions about National Instrument devices. + If you say Y, you will be asked for your specific device in the + following questions. + +if NET_VENDOR_NI + +config NI_XGE_MANAGEMENT_ENET + tristate "National Instruments XGE management enet support" + select PHYLIB + ---help--- + Simple LAN device for debug or management purposes. Can + support either 10G or 1G PHYs via SFP+ ports. + +endif diff --git a/drivers/net/ethernet/ni/Makefile b/drivers/net/ethernet/ni/Makefile new file mode 100644 index 000..99c6646 --- /dev/null +++ b/drivers/net/ethernet/ni/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_NI_XGE_MANAGEMENT_ENET) += nixge.o diff --git a/drivers/net/ethernet/ni/nixge.c b/drivers/net/ethernet/ni/nixge.c new file mode 100644 index 000..85b213c --- /dev/null +++ b/drivers/net/ethernet/ni/nixge.c @@ -0,0 +1,1246 @@ +/* + * Copyright (c) 2016-2017, National Instruments Corp. + * + * Network Driver for Ettus Research XGE MAC + * + * This is largely based on the Xilinx AXI Ethernet Driver, + * and uses the same DMA engine in the FPGA + * + * SPDX-License-Identifier: GPL-2.0 + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TX_BD_NUM 64 +#define RX_BD_NUM 128 + +#define DELAY_OF_ONE_MILLISEC 1000 + +/* Axi DMA Register definitions */ + +#define XAXIDMA_TX_CR_OFFSET 0x /* Channel control */ +#define XAXIDMA_TX_SR_OFFSET 0x0004 /* Status */ +#define XAXIDMA_TX_CDESC_OFFSET0x0008 /* Current descriptor pointer */ +#define XAXIDMA_TX_TDESC_OFFSET0x0010 /* Tail descriptor pointer */ + +#define XAXIDMA_RX_CR_OFFSET 0x0030 /* Channel control */ +#define XAXIDMA_RX_SR_OFFSET 0x0034 /* Status */ +#define XAXIDMA_RX_CDESC_OFFSET0x0038 /* Current descriptor pointer */ +#define XAXIDMA_RX_TDESC_OFFSET0x0040 /* Tail descriptor pointer */ + +#define XAXIDMA_CR_RUNSTOP_MASK0x0001 /* Start/stop DMA channel */ +#define XAXIDMA_CR_RESET_MASK 0x0004 /* Reset DMA engine */ + +#define XAXIDMA_BD_NDESC_OFFSET0x00 /* Next descriptor pointer */ +#define XAXIDMA_BD_BUFA_OFFSET 0x08 /* Buffer address */ +#define XAXIDMA_BD_CTRL_LEN_OFFSET 0x18 /* Control/buffer length */ +#define XAXIDMA_BD_STS_OFFSET 0x1C /* Status */ +#define XAXIDMA_BD_USR0_OFFSET 0x20 /* User IP specific word0 */ +#define XAXIDMA_BD_USR1_OFFSET 0x24 /* User IP specific word1 */ +#define XAXIDMA_BD_USR2_OFFSET 0x28 /* User IP specific word2 */ +#define XAXIDMA_BD_USR3_OFFSET 0x2C /* User IP specific word3 */ +#define XAXIDMA_BD_USR4_OFFSET 0x30 /* User IP speci
